1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Interface the generic pinconfig portions of the pinctrl subsystem 4 * 5 * Copyright (C) 2011 ST-Ericsson SA 6 * Written on behalf of Linaro for ST-Ericsson 7 * This interface is used in the core to keep track of pins. 8 * 9 * Author: Linus Walleij <[email protected]> 10 */ 11 #ifndef __LINUX_PINCTRL_PINCONF_GENERIC_H 12 #define __LINUX_PINCTRL_PINCONF_GENERIC_H 13 14 /** 15 * enum pin_config_param - possible pin configuration parameters 16 * @PIN_CONFIG_BIAS_BUS_HOLD: the pin will be set to weakly latch so that it 17 * weakly drives the last value on a tristate bus, also known as a "bus 18 * holder", "bus keeper" or "repeater". This allows another device on the 19 * bus to change the value by driving the bus high or low and switching to 20 * tristate. The argument is ignored. 21 * @PIN_CONFIG_BIAS_DISABLE: disable any pin bias on the pin, a 22 * transition from say pull-up to pull-down implies that you disable 23 * pull-up in the process, this setting disables all biasing. 24 * @PIN_CONFIG_BIAS_HIGH_IMPEDANCE: the pin will be set to a high impedance 25 * mode, also know as "third-state" (tristate) or "high-Z" or "floating". 26 * On output pins this effectively disconnects the pin, which is useful 27 * if for example some other pin is going to drive the signal connected 28 * to it for a while. Pins used for input are usually always high 29 * impedance. 30 * @PIN_CONFIG_BIAS_PULL_DOWN: the pin will be pulled down (usually with high 31 * impedance to GROUND). If the argument is != 0 pull-down is enabled, 32 * if it is 0, pull-down is total, i.e. the pin is connected to GROUND. 33 * @PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: the pin will be pulled up or down based 34 * on embedded knowledge of the controller hardware, like current mux 35 * function. The pull direction and possibly strength too will normally 36 * be decided completely inside the hardware block and not be readable 37 * from the kernel side. 38 * If the argument is != 0 pull up/down is enabled, if it is 0, the 39 * configuration is ignored. The proper way to disable it is to use 40 * @PIN_CONFIG_BIAS_DISABLE. 41 * @PIN_CONFIG_BIAS_PULL_UP: the pin will be pulled up (usually with high 42 * impedance to VDD). If the argument is != 0 pull-up is enabled, 43 * if it is 0, pull-up is total, i.e. the pin is connected to VDD. 44 * @PIN_CONFIG_DRIVE_OPEN_DRAIN: the pin will be driven with open drain (open 45 * collector) which means it is usually wired with other output ports 46 * which are then pulled up with an external resistor. Setting this 47 * config will enable open drain mode, the argument is ignored. 48 * @PIN_CONFIG_DRIVE_OPEN_SOURCE: the pin will be driven with open source 49 * (open emitter). Setting this config will enable open source mode, the 50 * argument is ignored. 51 * @PIN_CONFIG_DRIVE_PUSH_PULL: the pin will be driven actively high and 52 * low, this is the most typical case and is typically achieved with two 53 * active transistors on the output. Setting this config will enable 54 * push-pull mode, the argument is ignored. 55 * @PIN_CONFIG_DRIVE_STRENGTH: the pin will sink or source at most the current 56 * passed as argument. The argument is in mA. 57 * @PIN_CONFIG_INPUT_DEBOUNCE: this will configure the pin to debounce mode, 58 * which means it will wait for signals to settle when reading inputs. The 59 * argument gives the debounce time in usecs. Setting the 60 * argument to zero turns debouncing off. 61 * @PIN_CONFIG_INPUT_ENABLE: enable the pin's input. Note that this does not 62 * affect the pin's ability to drive output. 1 enables input, 0 disables 63 * input. 64 * @PIN_CONFIG_INPUT_SCHMITT: this will configure an input pin to run in 65 * schmitt-trigger mode. If the schmitt-trigger has adjustable hysteresis, 66 * the threshold value is given on a custom format as argument when 67 * setting pins to this mode. 68 * @PIN_CONFIG_INPUT_SCHMITT_ENABLE: control schmitt-trigger mode on the pin. 69 * If the argument != 0, schmitt-trigger mode is enabled. If it's 0, 70 * schmitt-trigger mode is disabled. 71 * @PIN_CONFIG_LOW_POWER_MODE: this will configure the pin for low power 72 * operation, if several modes of operation are supported these can be 73 * passed in the argument on a custom form, else just use argument 1 74 * to indicate low power mode, argument 0 turns low power mode off. 75 * @PIN_CONFIG_OUTPUT_ENABLE: this will enable the pin's output mode 76 * without driving a value there. For most platforms this reduces to 77 * enable the output buffers and then let the pin controller current 78 * configuration (eg. the currently selected mux function) drive values on 79 * the line. Use argument 1 to enable output mode, argument 0 to disable 80 * it. 81 * @PIN_CONFIG_OUTPUT: this will configure the pin as an output and drive a 82 * value on the line. Use argument 1 to indicate high level, argument 0 to 83 * indicate low level. (Please see Documentation/driver-api/pinctl.rst, 84 * section "GPIO mode pitfalls" for a discussion around this parameter.) 85 * @PIN_CONFIG_POWER_SOURCE: if the pin can select between different power 86 * supplies, the argument to this parameter (on a custom format) tells 87 * the driver which alternative power source to use. 88 * @PIN_CONFIG_SLEEP_HARDWARE_STATE: indicate this is sleep related state. 89 * @PIN_CONFIG_SLEW_RATE: if the pin can select slew rate, the argument to 90 * this parameter (on a custom format) tells the driver which alternative 91 * slew rate to use. 92 * @PIN_CONFIG_SKEW_DELAY: if the pin has programmable skew rate (on inputs) 93 * or latch delay (on outputs) this parameter (in a custom format) 94 * specifies the clock skew or latch delay. It typically controls how 95 * many double inverters are put in front of the line. 96 * @PIN_CONFIG_PERSIST_STATE: retain pin state across sleep or controller reset 97 * @PIN_CONFIG_END: this is the last enumerator for pin configurations, if 98 * you need to pass in custom configurations to the pin controller, use 99 * PIN_CONFIG_END+1 as the base offset. 100 * @PIN_CONFIG_MAX: this is the maximum configuration value that can be 101 * presented using the packed format. 102 */ 103 enum pin_config_param { 104 PIN_CONFIG_BIAS_BUS_HOLD, 105 PIN_CONFIG_BIAS_DISABLE, 106 PIN_CONFIG_BIAS_HIGH_IMPEDANCE, 107 PIN_CONFIG_BIAS_PULL_DOWN, 108 PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, 109 PIN_CONFIG_BIAS_PULL_UP, 110 PIN_CONFIG_DRIVE_OPEN_DRAIN, 111 PIN_CONFIG_DRIVE_OPEN_SOURCE, 112 PIN_CONFIG_DRIVE_PUSH_PULL, 113 PIN_CONFIG_DRIVE_STRENGTH, 114 PIN_CONFIG_INPUT_DEBOUNCE, 115 PIN_CONFIG_INPUT_ENABLE, 116 PIN_CONFIG_INPUT_SCHMITT, 117 PIN_CONFIG_INPUT_SCHMITT_ENABLE, 118 PIN_CONFIG_LOW_POWER_MODE, 119 PIN_CONFIG_OUTPUT_ENABLE, 120 PIN_CONFIG_OUTPUT, 121 PIN_CONFIG_POWER_SOURCE, 122 PIN_CONFIG_SLEEP_HARDWARE_STATE, 123 PIN_CONFIG_SLEW_RATE, 124 PIN_CONFIG_SKEW_DELAY, 125 PIN_CONFIG_PERSIST_STATE, 126 PIN_CONFIG_END = 0x7F, 127 PIN_CONFIG_MAX = 0xFF, 128 }; 129 130 /* 131 * Helpful configuration macro to be used in tables etc. 132 */ 133 #define PIN_CONF_PACKED(p, a) ((a << 8) | ((unsigned long) p & 0xffUL)) 134 135 /* 136 * The following inlines stuffs a configuration parameter and data value 137 * into and out of an unsigned long argument, as used by the generic pin config 138 * system. We put the parameter in the lower 8 bits and the argument in the 139 * upper 24 bits. 140 */ 141 142 static inline enum pin_config_param pinconf_to_config_param(unsigned long config) 143 { 144 return (enum pin_config_param) (config & 0xffUL); 145 } 146 147 static inline u32 pinconf_to_config_argument(unsigned long config) 148 { 149 return (u32) ((config >> 8) & 0xffffffUL); 150 } 151 152 static inline unsigned long pinconf_to_config_packed(enum pin_config_param param, 153 u32 argument) 154 { 155 return PIN_CONF_PACKED(param, argument); 156 } 157 158 #ifdef CONFIG_GENERIC_PINCONF 159 160 #ifdef CONFIG_DEBUG_FS 161 #define PCONFDUMP(a, b, c, d) { \ 162 .param = a, .display = b, .format = c, .has_arg = d \ 163 } 164 165 struct pin_config_item { 166 const enum pin_config_param param; 167 const char * const display; 168 const char * const format; 169 bool has_arg; 170 }; 171 #endif /* CONFIG_DEBUG_FS */ 172 173 #ifdef CONFIG_OF 174 175 #include <linux/device.h> 176 #include <linux/pinctrl/machine.h> 177 struct pinctrl_dev; 178 struct pinctrl_map; 179 180 struct pinconf_generic_params { 181 const char * const property; 182 enum pin_config_param param; 183 u32 default_value; 184 }; 185 186 int pinconf_generic_dt_subnode_to_map(struct pinctrl_dev *pctldev, 187 struct device_node *np, struct pinctrl_map **map, 188 unsigned *reserved_maps, unsigned *num_maps, 189 enum pinctrl_map_type type); 190 int pinconf_generic_dt_node_to_map(struct pinctrl_dev *pctldev, 191 struct device_node *np_config, struct pinctrl_map **map, 192 unsigned *num_maps, enum pinctrl_map_type type); 193 void pinconf_generic_dt_free_map(struct pinctrl_dev *pctldev, 194 struct pinctrl_map *map, unsigned num_maps); 195 196 static inline int pinconf_generic_dt_node_to_map_group( 197 struct pinctrl_dev *pctldev, struct device_node *np_config, 198 struct pinctrl_map **map, unsigned *num_maps) 199 { 200 return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps, 201 PIN_MAP_TYPE_CONFIGS_GROUP); 202 } 203 204 static inline int pinconf_generic_dt_node_to_map_pin( 205 struct pinctrl_dev *pctldev, struct device_node *np_config, 206 struct pinctrl_map **map, unsigned *num_maps) 207 { 208 return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps, 209 PIN_MAP_TYPE_CONFIGS_PIN); 210 } 211 212 static inline int pinconf_generic_dt_node_to_map_all( 213 struct pinctrl_dev *pctldev, struct device_node *np_config, 214 struct pinctrl_map **map, unsigned *num_maps) 215 { 216 /* 217 * passing the type as PIN_MAP_TYPE_INVALID causes the underlying parser 218 * to infer the map type from the DT properties used. 219 */ 220 return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps, 221 PIN_MAP_TYPE_INVALID); 222 } 223 #endif 224 225 #endif /* CONFIG_GENERIC_PINCONF */ 226 227 #endif /* __LINUX_PINCTRL_PINCONF_GENERIC_H */ 228