1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/leds.h> 18 #include <linux/linkmode.h> 19 #include <linux/netlink.h> 20 #include <linux/mdio.h> 21 #include <linux/mii.h> 22 #include <linux/mii_timestamper.h> 23 #include <linux/module.h> 24 #include <linux/timer.h> 25 #include <linux/workqueue.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/u64_stats_sync.h> 28 #include <linux/irqreturn.h> 29 #include <linux/iopoll.h> 30 #include <linux/refcount.h> 31 32 #include <linux/atomic.h> 33 #include <net/eee.h> 34 35 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 36 SUPPORTED_TP | \ 37 SUPPORTED_MII) 38 39 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 40 SUPPORTED_10baseT_Full) 41 42 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 43 SUPPORTED_100baseT_Full) 44 45 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 46 SUPPORTED_1000baseT_Full) 47 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 54 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 55 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 56 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 57 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init; 58 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap2_features) __ro_after_init; 59 60 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 61 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 62 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 63 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 64 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 65 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 66 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 67 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 68 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 69 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features) 70 #define PHY_EEE_CAP2_FEATURES ((unsigned long *)&phy_eee_cap2_features) 71 72 extern const int phy_basic_ports_array[3]; 73 extern const int phy_fibre_port_array[1]; 74 extern const int phy_all_ports_features_array[7]; 75 extern const int phy_10_100_features_array[4]; 76 extern const int phy_basic_t1_features_array[3]; 77 extern const int phy_basic_t1s_p2mp_features_array[2]; 78 extern const int phy_gbit_features_array[2]; 79 extern const int phy_10gbit_features_array[1]; 80 81 /* 82 * Set phydev->irq to PHY_POLL if interrupts are not supported, 83 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 84 * the attached MAC driver handles the interrupt 85 */ 86 #define PHY_POLL -1 87 #define PHY_MAC_INTERRUPT -2 88 89 #define PHY_IS_INTERNAL 0x00000001 90 #define PHY_RST_AFTER_CLK_EN 0x00000002 91 #define PHY_POLL_CABLE_TEST 0x00000004 92 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008 93 #define MDIO_DEVICE_IS_PHY 0x80000000 94 95 /** 96 * enum phy_interface_t - Interface Mode definitions 97 * 98 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 99 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 100 * @PHY_INTERFACE_MODE_MII: Media-independent interface 101 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 102 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 103 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 104 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 105 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 106 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 107 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 108 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 109 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 110 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 111 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 112 * @PHY_INTERFACE_MODE_SMII: Serial MII 113 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 114 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 115 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 116 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII 117 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 118 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 119 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 120 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 121 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 122 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 123 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 124 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 125 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 126 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 127 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 128 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 129 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 130 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 131 * @PHY_INTERFACE_MODE_10G_QXGMII: 10G-QXGMII - 4 ports over 10G USXGMII 132 * @PHY_INTERFACE_MODE_MAX: Book keeping 133 * 134 * Describes the interface between the MAC and PHY. 135 */ 136 typedef enum { 137 PHY_INTERFACE_MODE_NA, 138 PHY_INTERFACE_MODE_INTERNAL, 139 PHY_INTERFACE_MODE_MII, 140 PHY_INTERFACE_MODE_GMII, 141 PHY_INTERFACE_MODE_SGMII, 142 PHY_INTERFACE_MODE_TBI, 143 PHY_INTERFACE_MODE_REVMII, 144 PHY_INTERFACE_MODE_RMII, 145 PHY_INTERFACE_MODE_REVRMII, 146 PHY_INTERFACE_MODE_RGMII, 147 PHY_INTERFACE_MODE_RGMII_ID, 148 PHY_INTERFACE_MODE_RGMII_RXID, 149 PHY_INTERFACE_MODE_RGMII_TXID, 150 PHY_INTERFACE_MODE_RTBI, 151 PHY_INTERFACE_MODE_SMII, 152 PHY_INTERFACE_MODE_XGMII, 153 PHY_INTERFACE_MODE_XLGMII, 154 PHY_INTERFACE_MODE_MOCA, 155 PHY_INTERFACE_MODE_PSGMII, 156 PHY_INTERFACE_MODE_QSGMII, 157 PHY_INTERFACE_MODE_TRGMII, 158 PHY_INTERFACE_MODE_100BASEX, 159 PHY_INTERFACE_MODE_1000BASEX, 160 PHY_INTERFACE_MODE_2500BASEX, 161 PHY_INTERFACE_MODE_5GBASER, 162 PHY_INTERFACE_MODE_RXAUI, 163 PHY_INTERFACE_MODE_XAUI, 164 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 165 PHY_INTERFACE_MODE_10GBASER, 166 PHY_INTERFACE_MODE_25GBASER, 167 PHY_INTERFACE_MODE_USXGMII, 168 /* 10GBASE-KR - with Clause 73 AN */ 169 PHY_INTERFACE_MODE_10GKR, 170 PHY_INTERFACE_MODE_QUSGMII, 171 PHY_INTERFACE_MODE_1000BASEKX, 172 PHY_INTERFACE_MODE_10G_QXGMII, 173 PHY_INTERFACE_MODE_MAX, 174 } phy_interface_t; 175 176 /* PHY interface mode bitmap handling */ 177 #define DECLARE_PHY_INTERFACE_MASK(name) \ 178 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 179 180 static inline void phy_interface_zero(unsigned long *intf) 181 { 182 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 183 } 184 185 static inline bool phy_interface_empty(const unsigned long *intf) 186 { 187 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 188 } 189 190 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 191 const unsigned long *b) 192 { 193 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 194 } 195 196 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 197 const unsigned long *b) 198 { 199 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 200 } 201 202 static inline void phy_interface_set_rgmii(unsigned long *intf) 203 { 204 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 205 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 206 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 207 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 208 } 209 210 /* 211 * phy_supported_speeds - return all speeds currently supported by a PHY device 212 */ 213 unsigned int phy_supported_speeds(struct phy_device *phy, 214 unsigned int *speeds, 215 unsigned int size); 216 217 /** 218 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 219 * @interface: enum phy_interface_t value 220 * 221 * Description: maps enum &phy_interface_t defined in this file 222 * into the device tree binding of 'phy-mode', so that Ethernet 223 * device driver can get PHY interface from device tree. 224 */ 225 static inline const char *phy_modes(phy_interface_t interface) 226 { 227 switch (interface) { 228 case PHY_INTERFACE_MODE_NA: 229 return ""; 230 case PHY_INTERFACE_MODE_INTERNAL: 231 return "internal"; 232 case PHY_INTERFACE_MODE_MII: 233 return "mii"; 234 case PHY_INTERFACE_MODE_GMII: 235 return "gmii"; 236 case PHY_INTERFACE_MODE_SGMII: 237 return "sgmii"; 238 case PHY_INTERFACE_MODE_TBI: 239 return "tbi"; 240 case PHY_INTERFACE_MODE_REVMII: 241 return "rev-mii"; 242 case PHY_INTERFACE_MODE_RMII: 243 return "rmii"; 244 case PHY_INTERFACE_MODE_REVRMII: 245 return "rev-rmii"; 246 case PHY_INTERFACE_MODE_RGMII: 247 return "rgmii"; 248 case PHY_INTERFACE_MODE_RGMII_ID: 249 return "rgmii-id"; 250 case PHY_INTERFACE_MODE_RGMII_RXID: 251 return "rgmii-rxid"; 252 case PHY_INTERFACE_MODE_RGMII_TXID: 253 return "rgmii-txid"; 254 case PHY_INTERFACE_MODE_RTBI: 255 return "rtbi"; 256 case PHY_INTERFACE_MODE_SMII: 257 return "smii"; 258 case PHY_INTERFACE_MODE_XGMII: 259 return "xgmii"; 260 case PHY_INTERFACE_MODE_XLGMII: 261 return "xlgmii"; 262 case PHY_INTERFACE_MODE_MOCA: 263 return "moca"; 264 case PHY_INTERFACE_MODE_PSGMII: 265 return "psgmii"; 266 case PHY_INTERFACE_MODE_QSGMII: 267 return "qsgmii"; 268 case PHY_INTERFACE_MODE_TRGMII: 269 return "trgmii"; 270 case PHY_INTERFACE_MODE_1000BASEX: 271 return "1000base-x"; 272 case PHY_INTERFACE_MODE_1000BASEKX: 273 return "1000base-kx"; 274 case PHY_INTERFACE_MODE_2500BASEX: 275 return "2500base-x"; 276 case PHY_INTERFACE_MODE_5GBASER: 277 return "5gbase-r"; 278 case PHY_INTERFACE_MODE_RXAUI: 279 return "rxaui"; 280 case PHY_INTERFACE_MODE_XAUI: 281 return "xaui"; 282 case PHY_INTERFACE_MODE_10GBASER: 283 return "10gbase-r"; 284 case PHY_INTERFACE_MODE_25GBASER: 285 return "25gbase-r"; 286 case PHY_INTERFACE_MODE_USXGMII: 287 return "usxgmii"; 288 case PHY_INTERFACE_MODE_10GKR: 289 return "10gbase-kr"; 290 case PHY_INTERFACE_MODE_100BASEX: 291 return "100base-x"; 292 case PHY_INTERFACE_MODE_QUSGMII: 293 return "qusgmii"; 294 case PHY_INTERFACE_MODE_10G_QXGMII: 295 return "10g-qxgmii"; 296 default: 297 return "unknown"; 298 } 299 } 300 301 #define PHY_INIT_TIMEOUT 100000 302 #define PHY_FORCE_TIMEOUT 10 303 304 #define PHY_MAX_ADDR 32 305 306 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 307 #define PHY_ID_FMT "%s:%02x" 308 309 #define MII_BUS_ID_SIZE 61 310 311 struct device; 312 struct kernel_hwtstamp_config; 313 struct phylink; 314 struct sfp_bus; 315 struct sfp_upstream_ops; 316 struct sk_buff; 317 318 /** 319 * struct mdio_bus_stats - Statistics counters for MDIO busses 320 * @transfers: Total number of transfers, i.e. @writes + @reads 321 * @errors: Number of MDIO transfers that returned an error 322 * @writes: Number of write transfers 323 * @reads: Number of read transfers 324 * @syncp: Synchronisation for incrementing statistics 325 */ 326 struct mdio_bus_stats { 327 u64_stats_t transfers; 328 u64_stats_t errors; 329 u64_stats_t writes; 330 u64_stats_t reads; 331 /* Must be last, add new statistics above */ 332 struct u64_stats_sync syncp; 333 }; 334 335 /** 336 * struct phy_package_shared - Shared information in PHY packages 337 * @base_addr: Base PHY address of PHY package used to combine PHYs 338 * in one package and for offset calculation of phy_package_read/write 339 * @np: Pointer to the Device Node if PHY package defined in DT 340 * @refcnt: Number of PHYs connected to this shared data 341 * @flags: Initialization of PHY package 342 * @priv_size: Size of the shared private data @priv 343 * @priv: Driver private data shared across a PHY package 344 * 345 * Represents a shared structure between different phydev's in the same 346 * package, for example a quad PHY. See phy_package_join() and 347 * phy_package_leave(). 348 */ 349 struct phy_package_shared { 350 u8 base_addr; 351 /* With PHY package defined in DT this points to the PHY package node */ 352 struct device_node *np; 353 refcount_t refcnt; 354 unsigned long flags; 355 size_t priv_size; 356 357 /* private data pointer */ 358 /* note that this pointer is shared between different phydevs and 359 * the user has to take care of appropriate locking. It is allocated 360 * and freed automatically by phy_package_join() and 361 * phy_package_leave(). 362 */ 363 void *priv; 364 }; 365 366 /* used as bit number in atomic bitops */ 367 #define PHY_SHARED_F_INIT_DONE 0 368 #define PHY_SHARED_F_PROBE_DONE 1 369 370 /** 371 * struct mii_bus - Represents an MDIO bus 372 * 373 * @owner: Who owns this device 374 * @name: User friendly name for this MDIO device, or driver name 375 * @id: Unique identifier for this bus, typical from bus hierarchy 376 * @priv: Driver private data 377 * 378 * The Bus class for PHYs. Devices which provide access to 379 * PHYs should register using this structure 380 */ 381 struct mii_bus { 382 struct module *owner; 383 const char *name; 384 char id[MII_BUS_ID_SIZE]; 385 void *priv; 386 /** @read: Perform a read transfer on the bus */ 387 int (*read)(struct mii_bus *bus, int addr, int regnum); 388 /** @write: Perform a write transfer on the bus */ 389 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 390 /** @read_c45: Perform a C45 read transfer on the bus */ 391 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 392 /** @write_c45: Perform a C45 write transfer on the bus */ 393 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 394 int regnum, u16 val); 395 /** @reset: Perform a reset of the bus */ 396 int (*reset)(struct mii_bus *bus); 397 398 /** @stats: Statistic counters per device on the bus */ 399 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 400 401 /** 402 * @mdio_lock: A lock to ensure that only one thing can read/write 403 * the MDIO bus at a time 404 */ 405 struct mutex mdio_lock; 406 407 /** @parent: Parent device of this bus */ 408 struct device *parent; 409 /** @state: State of bus structure */ 410 enum { 411 MDIOBUS_ALLOCATED = 1, 412 MDIOBUS_REGISTERED, 413 MDIOBUS_UNREGISTERED, 414 MDIOBUS_RELEASED, 415 } state; 416 417 /** @dev: Kernel device representation */ 418 struct device dev; 419 420 /** @mdio_map: list of all MDIO devices on bus */ 421 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 422 423 /** @phy_mask: PHY addresses to be ignored when probing */ 424 u32 phy_mask; 425 426 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 427 u32 phy_ignore_ta_mask; 428 429 /** 430 * @irq: An array of interrupts, each PHY's interrupt at the index 431 * matching its address 432 */ 433 int irq[PHY_MAX_ADDR]; 434 435 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 436 int reset_delay_us; 437 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 438 int reset_post_delay_us; 439 /** @reset_gpiod: Reset GPIO descriptor pointer */ 440 struct gpio_desc *reset_gpiod; 441 442 /** @shared_lock: protect access to the shared element */ 443 struct mutex shared_lock; 444 445 /** @shared: shared state across different PHYs */ 446 struct phy_package_shared *shared[PHY_MAX_ADDR]; 447 }; 448 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 449 450 struct mii_bus *mdiobus_alloc_size(size_t size); 451 452 /** 453 * mdiobus_alloc - Allocate an MDIO bus structure 454 * 455 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 456 * for the driver to register the bus. 457 */ 458 static inline struct mii_bus *mdiobus_alloc(void) 459 { 460 return mdiobus_alloc_size(0); 461 } 462 463 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 464 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 465 struct module *owner); 466 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 467 #define devm_mdiobus_register(dev, bus) \ 468 __devm_mdiobus_register(dev, bus, THIS_MODULE) 469 470 void mdiobus_unregister(struct mii_bus *bus); 471 void mdiobus_free(struct mii_bus *bus); 472 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 473 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 474 { 475 return devm_mdiobus_alloc_size(dev, 0); 476 } 477 478 struct mii_bus *mdio_find_bus(const char *mdio_name); 479 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); 480 481 #define PHY_INTERRUPT_DISABLED false 482 #define PHY_INTERRUPT_ENABLED true 483 484 /** 485 * enum phy_state - PHY state machine states: 486 * 487 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 488 * should be called if and only if the PHY is in this state, 489 * given that the PHY device exists. 490 * - PHY driver probe function will set the state to @PHY_READY 491 * 492 * @PHY_READY: PHY is ready to send and receive packets, but the 493 * controller is not. By default, PHYs which do not implement 494 * probe will be set to this state by phy_probe(). 495 * - start will set the state to UP 496 * 497 * @PHY_UP: The PHY and attached device are ready to do work. 498 * Interrupts should be started here. 499 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 500 * 501 * @PHY_NOLINK: PHY is up, but not currently plugged in. 502 * - irq or timer will set @PHY_RUNNING if link comes back 503 * - phy_stop moves to @PHY_HALTED 504 * 505 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 506 * and/or receiving packets 507 * - irq or timer will set @PHY_NOLINK if link goes down 508 * - phy_stop moves to @PHY_HALTED 509 * 510 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 511 * is not expected to work, carrier will be indicated as down. PHY will be 512 * poll once per second, or on interrupt for it current state. 513 * Once complete, move to UP to restart the PHY. 514 * - phy_stop aborts the running test and moves to @PHY_HALTED 515 * 516 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. 517 * - phy_start moves to @PHY_UP 518 * 519 * @PHY_ERROR: PHY is up, but is in an error state. 520 * - phy_stop moves to @PHY_HALTED 521 */ 522 enum phy_state { 523 PHY_DOWN = 0, 524 PHY_READY, 525 PHY_HALTED, 526 PHY_ERROR, 527 PHY_UP, 528 PHY_RUNNING, 529 PHY_NOLINK, 530 PHY_CABLETEST, 531 }; 532 533 #define MDIO_MMD_NUM 32 534 535 /** 536 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 537 * @devices_in_package: IEEE 802.3 devices in package register value. 538 * @mmds_present: bit vector of MMDs present. 539 * @device_ids: The device identifer for each present device. 540 */ 541 struct phy_c45_device_ids { 542 u32 devices_in_package; 543 u32 mmds_present; 544 u32 device_ids[MDIO_MMD_NUM]; 545 }; 546 547 struct macsec_context; 548 struct macsec_ops; 549 550 /** 551 * struct phy_device - An instance of a PHY 552 * 553 * @mdio: MDIO bus this PHY is on 554 * @drv: Pointer to the driver for this PHY instance 555 * @devlink: Create a link between phy dev and mac dev, if the external phy 556 * used by current mac interface is managed by another mac interface. 557 * @phy_id: UID for this device found during discovery 558 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 559 * @is_c45: Set to true if this PHY uses clause 45 addressing. 560 * @is_internal: Set to true if this PHY is internal to a MAC. 561 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 562 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 563 * @has_fixups: Set to true if this PHY has fixups/quirks. 564 * @suspended: Set to true if this PHY has been suspended successfully. 565 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 566 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 567 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 568 * @downshifted_rate: Set true if link speed has been downshifted. 569 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 570 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 571 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN 572 * enabled. 573 * @state: State of the PHY for management purposes 574 * @dev_flags: Device-specific flags used by the PHY driver. 575 * 576 * - Bits [15:0] are free to use by the PHY driver to communicate 577 * driver specific behavior. 578 * - Bits [23:16] are currently reserved for future use. 579 * - Bits [31:24] are reserved for defining generic 580 * PHY driver behavior. 581 * @irq: IRQ number of the PHY's interrupt (-1 if none) 582 * @phylink: Pointer to phylink instance for this PHY 583 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 584 * @sfp_bus: SFP bus attached to this PHY's fiber port 585 * @attached_dev: The attached enet driver's device instance ptr 586 * @adjust_link: Callback for the enet controller to respond to changes: in the 587 * link state. 588 * @phy_link_change: Callback for phylink for notification of link change 589 * @macsec_ops: MACsec offloading ops. 590 * 591 * @speed: Current link speed 592 * @duplex: Current duplex 593 * @port: Current port 594 * @pause: Current pause 595 * @asym_pause: Current asymmetric pause 596 * @supported: Combined MAC/PHY supported linkmodes 597 * @advertising: Currently advertised linkmodes 598 * @adv_old: Saved advertised while power saving for WoL 599 * @supported_eee: supported PHY EEE linkmodes 600 * @advertising_eee: Currently advertised EEE linkmodes 601 * @eee_enabled: Flag indicating whether the EEE feature is enabled 602 * @enable_tx_lpi: When True, MAC should transmit LPI to PHY 603 * @eee_cfg: User configuration of EEE 604 * @lp_advertising: Current link partner advertised linkmodes 605 * @host_interfaces: PHY interface modes supported by host 606 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 607 * @autoneg: Flag autoneg being used 608 * @rate_matching: Current rate matching mode 609 * @link: Current link state 610 * @autoneg_complete: Flag auto negotiation of the link has completed 611 * @mdix: Current crossover 612 * @mdix_ctrl: User setting of crossover 613 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 614 * @interrupts: Flag interrupts have been enabled 615 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 616 * handling shall be postponed until PHY has resumed 617 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 618 * requiring a rerun of the interrupt handler after resume 619 * @interface: enum phy_interface_t value 620 * @possible_interfaces: bitmap if interface modes that the attached PHY 621 * will switch between depending on media speed. 622 * @skb: Netlink message for cable diagnostics 623 * @nest: Netlink nest used for cable diagnostics 624 * @ehdr: nNtlink header for cable diagnostics 625 * @phy_led_triggers: Array of LED triggers 626 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 627 * @led_link_trigger: LED trigger for link up/down 628 * @last_triggered: last LED trigger for link speed 629 * @leds: list of PHY LED structures 630 * @master_slave_set: User requested master/slave configuration 631 * @master_slave_get: Current master/slave advertisement 632 * @master_slave_state: Current master/slave configuration 633 * @mii_ts: Pointer to time stamper callbacks 634 * @psec: Pointer to Power Sourcing Equipment control struct 635 * @lock: Mutex for serialization access to PHY 636 * @state_queue: Work queue for state machine 637 * @link_down_events: Number of times link was lost 638 * @shared: Pointer to private data shared by phys in one package 639 * @priv: Pointer to driver private data 640 * 641 * interrupts currently only supports enabled or disabled, 642 * but could be changed in the future to support enabling 643 * and disabling specific interrupts 644 * 645 * Contains some infrastructure for polling and interrupt 646 * handling, as well as handling shifts in PHY hardware state 647 */ 648 struct phy_device { 649 struct mdio_device mdio; 650 651 /* Information about the PHY type */ 652 /* And management functions */ 653 const struct phy_driver *drv; 654 655 struct device_link *devlink; 656 657 u32 phy_id; 658 659 struct phy_c45_device_ids c45_ids; 660 unsigned is_c45:1; 661 unsigned is_internal:1; 662 unsigned is_pseudo_fixed_link:1; 663 unsigned is_gigabit_capable:1; 664 unsigned has_fixups:1; 665 unsigned suspended:1; 666 unsigned suspended_by_mdio_bus:1; 667 unsigned sysfs_links:1; 668 unsigned loopback_enabled:1; 669 unsigned downshifted_rate:1; 670 unsigned is_on_sfp_module:1; 671 unsigned mac_managed_pm:1; 672 unsigned wol_enabled:1; 673 674 unsigned autoneg:1; 675 /* The most recently read link state */ 676 unsigned link:1; 677 unsigned autoneg_complete:1; 678 679 /* Interrupts are enabled */ 680 unsigned interrupts:1; 681 unsigned irq_suspended:1; 682 unsigned irq_rerun:1; 683 684 int rate_matching; 685 686 enum phy_state state; 687 688 u32 dev_flags; 689 690 phy_interface_t interface; 691 DECLARE_PHY_INTERFACE_MASK(possible_interfaces); 692 693 /* 694 * forced speed & duplex (no autoneg) 695 * partner speed & duplex & pause (autoneg) 696 */ 697 int speed; 698 int duplex; 699 int port; 700 int pause; 701 int asym_pause; 702 u8 master_slave_get; 703 u8 master_slave_set; 704 u8 master_slave_state; 705 706 /* Union of PHY and Attached devices' supported link modes */ 707 /* See ethtool.h for more info */ 708 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 709 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 710 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 711 /* used with phy_speed_down */ 712 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 713 /* used for eee validation and configuration*/ 714 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee); 715 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee); 716 bool eee_enabled; 717 718 /* Host supported PHY interface types. Should be ignored if empty. */ 719 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 720 721 /* Energy efficient ethernet modes which should be prohibited */ 722 u32 eee_broken_modes; 723 bool enable_tx_lpi; 724 struct eee_config eee_cfg; 725 726 #ifdef CONFIG_LED_TRIGGER_PHY 727 struct phy_led_trigger *phy_led_triggers; 728 unsigned int phy_num_led_triggers; 729 struct phy_led_trigger *last_triggered; 730 731 struct phy_led_trigger *led_link_trigger; 732 #endif 733 struct list_head leds; 734 735 /* 736 * Interrupt number for this PHY 737 * -1 means no interrupt 738 */ 739 int irq; 740 741 /* private data pointer */ 742 /* For use by PHYs to maintain extra state */ 743 void *priv; 744 745 /* shared data pointer */ 746 /* For use by PHYs inside the same package that need a shared state. */ 747 struct phy_package_shared *shared; 748 749 /* Reporting cable test results */ 750 struct sk_buff *skb; 751 void *ehdr; 752 struct nlattr *nest; 753 754 /* Interrupt and Polling infrastructure */ 755 struct delayed_work state_queue; 756 757 struct mutex lock; 758 759 /* This may be modified under the rtnl lock */ 760 bool sfp_bus_attached; 761 struct sfp_bus *sfp_bus; 762 struct phylink *phylink; 763 struct net_device *attached_dev; 764 struct mii_timestamper *mii_ts; 765 struct pse_control *psec; 766 767 u8 mdix; 768 u8 mdix_ctrl; 769 770 int pma_extable; 771 772 unsigned int link_down_events; 773 774 void (*phy_link_change)(struct phy_device *phydev, bool up); 775 void (*adjust_link)(struct net_device *dev); 776 777 #if IS_ENABLED(CONFIG_MACSEC) 778 /* MACsec management functions */ 779 const struct macsec_ops *macsec_ops; 780 #endif 781 }; 782 783 /* Generic phy_device::dev_flags */ 784 #define PHY_F_NO_IRQ 0x80000000 785 #define PHY_F_RXC_ALWAYS_ON 0x40000000 786 787 static inline struct phy_device *to_phy_device(const struct device *dev) 788 { 789 return container_of(to_mdio_device(dev), struct phy_device, mdio); 790 } 791 792 /** 793 * struct phy_tdr_config - Configuration of a TDR raw test 794 * 795 * @first: Distance for first data collection point 796 * @last: Distance for last data collection point 797 * @step: Step between data collection points 798 * @pair: Bitmap of cable pairs to collect data for 799 * 800 * A structure containing possible configuration parameters 801 * for a TDR cable test. The driver does not need to implement 802 * all the parameters, but should report what is actually used. 803 * All distances are in centimeters. 804 */ 805 struct phy_tdr_config { 806 u32 first; 807 u32 last; 808 u32 step; 809 s8 pair; 810 }; 811 #define PHY_PAIR_ALL -1 812 813 /** 814 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 815 * Avoidance) Reconciliation Sublayer. 816 * 817 * @version: read-only PLCA register map version. -1 = not available. Ignored 818 * when setting the configuration. Format is the same as reported by the PLCA 819 * IDVER register (31.CA00). -1 = not available. 820 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 821 * set. 0 = disabled, anything else = enabled. 822 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 823 * Allowed values [0 .. 254]. 255 = node disabled. 824 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 825 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 826 * set. Allowed values [1 .. 255]. 827 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 828 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 829 * more details. The to_timer shall be set equal over all nodes. 830 * -1 = not available / don't set. Allowed values [0 .. 255]. 831 * @burst_cnt: controls how many additional frames a node is allowed to send in 832 * single transmit opportunity (TO). The default value of 0 means that the 833 * node is allowed exactly one frame per TO. A value of 1 allows two frames 834 * per TO, and so on. -1 = not available / don't set. 835 * Allowed values [0 .. 255]. 836 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 837 * frame before interrupting the burst. This value should be set to a value 838 * greater than the MAC inter-packet gap (which is typically 96 bits). 839 * -1 = not available / don't set. Allowed values [0 .. 255]. 840 * 841 * A structure containing configuration parameters for setting/getting the PLCA 842 * RS configuration. The driver does not need to implement all the parameters, 843 * but should report what is actually used. 844 */ 845 struct phy_plca_cfg { 846 int version; 847 int enabled; 848 int node_id; 849 int node_cnt; 850 int to_tmr; 851 int burst_cnt; 852 int burst_tmr; 853 }; 854 855 /** 856 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 857 * Avoidance) Reconciliation Sublayer. 858 * 859 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 860 * register(31.CA03), indicating BEACON activity. 861 * 862 * A structure containing status information of the PLCA RS configuration. 863 * The driver does not need to implement all the parameters, but should report 864 * what is actually used. 865 */ 866 struct phy_plca_status { 867 bool pst; 868 }; 869 870 /* Modes for PHY LED configuration */ 871 enum phy_led_modes { 872 PHY_LED_ACTIVE_LOW = 0, 873 PHY_LED_INACTIVE_HIGH_IMPEDANCE = 1, 874 875 /* keep it last */ 876 __PHY_LED_MODES_NUM, 877 }; 878 879 /** 880 * struct phy_led: An LED driven by the PHY 881 * 882 * @list: List of LEDs 883 * @phydev: PHY this LED is attached to 884 * @led_cdev: Standard LED class structure 885 * @index: Number of the LED 886 */ 887 struct phy_led { 888 struct list_head list; 889 struct phy_device *phydev; 890 struct led_classdev led_cdev; 891 u8 index; 892 }; 893 894 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev) 895 896 /** 897 * struct phy_driver - Driver structure for a particular PHY type 898 * 899 * @mdiodrv: Data common to all MDIO devices 900 * @phy_id: The result of reading the UID registers of this PHY 901 * type, and ANDing them with the phy_id_mask. This driver 902 * only works for PHYs with IDs which match this field 903 * @name: The friendly name of this PHY type 904 * @phy_id_mask: Defines the important bits of the phy_id 905 * @features: A mandatory list of features (speed, duplex, etc) 906 * supported by this PHY 907 * @flags: A bitfield defining certain other features this PHY 908 * supports (like interrupts) 909 * @driver_data: Static driver data 910 * 911 * All functions are optional. If config_aneg or read_status 912 * are not implemented, the phy core uses the genphy versions. 913 * Note that none of these functions should be called from 914 * interrupt time. The goal is for the bus read/write functions 915 * to be able to block when the bus transaction is happening, 916 * and be freed up by an interrupt (The MPC85xx has this ability, 917 * though it is not currently supported in the driver). 918 */ 919 struct phy_driver { 920 struct mdio_driver_common mdiodrv; 921 u32 phy_id; 922 char *name; 923 u32 phy_id_mask; 924 const unsigned long * const features; 925 u32 flags; 926 const void *driver_data; 927 928 /** 929 * @soft_reset: Called to issue a PHY software reset 930 */ 931 int (*soft_reset)(struct phy_device *phydev); 932 933 /** 934 * @config_init: Called to initialize the PHY, 935 * including after a reset 936 */ 937 int (*config_init)(struct phy_device *phydev); 938 939 /** 940 * @probe: Called during discovery. Used to set 941 * up device-specific structures, if any 942 */ 943 int (*probe)(struct phy_device *phydev); 944 945 /** 946 * @get_features: Probe the hardware to determine what 947 * abilities it has. Should only set phydev->supported. 948 */ 949 int (*get_features)(struct phy_device *phydev); 950 951 /** 952 * @get_rate_matching: Get the supported type of rate matching for a 953 * particular phy interface. This is used by phy consumers to determine 954 * whether to advertise lower-speed modes for that interface. It is 955 * assumed that if a rate matching mode is supported on an interface, 956 * then that interface's rate can be adapted to all slower link speeds 957 * supported by the phy. If the interface is not supported, this should 958 * return %RATE_MATCH_NONE. 959 */ 960 int (*get_rate_matching)(struct phy_device *phydev, 961 phy_interface_t iface); 962 963 /* PHY Power Management */ 964 /** @suspend: Suspend the hardware, saving state if needed */ 965 int (*suspend)(struct phy_device *phydev); 966 /** @resume: Resume the hardware, restoring state if needed */ 967 int (*resume)(struct phy_device *phydev); 968 969 /** 970 * @config_aneg: Configures the advertisement and resets 971 * autonegotiation if phydev->autoneg is on, 972 * forces the speed to the current settings in phydev 973 * if phydev->autoneg is off 974 */ 975 int (*config_aneg)(struct phy_device *phydev); 976 977 /** @aneg_done: Determines the auto negotiation result */ 978 int (*aneg_done)(struct phy_device *phydev); 979 980 /** @read_status: Determines the negotiated speed and duplex */ 981 int (*read_status)(struct phy_device *phydev); 982 983 /** 984 * @config_intr: Enables or disables interrupts. 985 * It should also clear any pending interrupts prior to enabling the 986 * IRQs and after disabling them. 987 */ 988 int (*config_intr)(struct phy_device *phydev); 989 990 /** @handle_interrupt: Override default interrupt handling */ 991 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 992 993 /** @remove: Clears up any memory if needed */ 994 void (*remove)(struct phy_device *phydev); 995 996 /** 997 * @match_phy_device: Returns true if this is a suitable 998 * driver for the given phydev. If NULL, matching is based on 999 * phy_id and phy_id_mask. 1000 */ 1001 int (*match_phy_device)(struct phy_device *phydev); 1002 1003 /** 1004 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 1005 * register changes to enable Wake on LAN, so set_wol is 1006 * provided to be called in the ethernet driver's set_wol 1007 * function. 1008 */ 1009 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1010 1011 /** 1012 * @get_wol: See set_wol, but for checking whether Wake on LAN 1013 * is enabled. 1014 */ 1015 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1016 1017 /** 1018 * @link_change_notify: Called to inform a PHY device driver 1019 * when the core is about to change the link state. This 1020 * callback is supposed to be used as fixup hook for drivers 1021 * that need to take action when the link state 1022 * changes. Drivers are by no means allowed to mess with the 1023 * PHY device structure in their implementations. 1024 */ 1025 void (*link_change_notify)(struct phy_device *dev); 1026 1027 /** 1028 * @read_mmd: PHY specific driver override for reading a MMD 1029 * register. This function is optional for PHY specific 1030 * drivers. When not provided, the default MMD read function 1031 * will be used by phy_read_mmd(), which will use either a 1032 * direct read for Clause 45 PHYs or an indirect read for 1033 * Clause 22 PHYs. devnum is the MMD device number within the 1034 * PHY device, regnum is the register within the selected MMD 1035 * device. 1036 */ 1037 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 1038 1039 /** 1040 * @write_mmd: PHY specific driver override for writing a MMD 1041 * register. This function is optional for PHY specific 1042 * drivers. When not provided, the default MMD write function 1043 * will be used by phy_write_mmd(), which will use either a 1044 * direct write for Clause 45 PHYs, or an indirect write for 1045 * Clause 22 PHYs. devnum is the MMD device number within the 1046 * PHY device, regnum is the register within the selected MMD 1047 * device. val is the value to be written. 1048 */ 1049 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 1050 u16 val); 1051 1052 /** @read_page: Return the current PHY register page number */ 1053 int (*read_page)(struct phy_device *dev); 1054 /** @write_page: Set the current PHY register page number */ 1055 int (*write_page)(struct phy_device *dev, int page); 1056 1057 /** 1058 * @module_info: Get the size and type of the eeprom contained 1059 * within a plug-in module 1060 */ 1061 int (*module_info)(struct phy_device *dev, 1062 struct ethtool_modinfo *modinfo); 1063 1064 /** 1065 * @module_eeprom: Get the eeprom information from the plug-in 1066 * module 1067 */ 1068 int (*module_eeprom)(struct phy_device *dev, 1069 struct ethtool_eeprom *ee, u8 *data); 1070 1071 /** @cable_test_start: Start a cable test */ 1072 int (*cable_test_start)(struct phy_device *dev); 1073 1074 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1075 int (*cable_test_tdr_start)(struct phy_device *dev, 1076 const struct phy_tdr_config *config); 1077 1078 /** 1079 * @cable_test_get_status: Once per second, or on interrupt, 1080 * request the status of the test. 1081 */ 1082 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1083 1084 /* Get statistics from the PHY using ethtool */ 1085 /** @get_sset_count: Number of statistic counters */ 1086 int (*get_sset_count)(struct phy_device *dev); 1087 /** @get_strings: Names of the statistic counters */ 1088 void (*get_strings)(struct phy_device *dev, u8 *data); 1089 /** @get_stats: Return the statistic counter values */ 1090 void (*get_stats)(struct phy_device *dev, 1091 struct ethtool_stats *stats, u64 *data); 1092 1093 /* Get and Set PHY tunables */ 1094 /** @get_tunable: Return the value of a tunable */ 1095 int (*get_tunable)(struct phy_device *dev, 1096 struct ethtool_tunable *tuna, void *data); 1097 /** @set_tunable: Set the value of a tunable */ 1098 int (*set_tunable)(struct phy_device *dev, 1099 struct ethtool_tunable *tuna, 1100 const void *data); 1101 /** @set_loopback: Set the loopback mood of the PHY */ 1102 int (*set_loopback)(struct phy_device *dev, bool enable); 1103 /** @get_sqi: Get the signal quality indication */ 1104 int (*get_sqi)(struct phy_device *dev); 1105 /** @get_sqi_max: Get the maximum signal quality indication */ 1106 int (*get_sqi_max)(struct phy_device *dev); 1107 1108 /* PLCA RS interface */ 1109 /** @get_plca_cfg: Return the current PLCA configuration */ 1110 int (*get_plca_cfg)(struct phy_device *dev, 1111 struct phy_plca_cfg *plca_cfg); 1112 /** @set_plca_cfg: Set the PLCA configuration */ 1113 int (*set_plca_cfg)(struct phy_device *dev, 1114 const struct phy_plca_cfg *plca_cfg); 1115 /** @get_plca_status: Return the current PLCA status info */ 1116 int (*get_plca_status)(struct phy_device *dev, 1117 struct phy_plca_status *plca_st); 1118 1119 /** 1120 * @led_brightness_set: Set a PHY LED brightness. Index 1121 * indicates which of the PHYs led should be set. Value 1122 * follows the standard LED class meaning, e.g. LED_OFF, 1123 * LED_HALF, LED_FULL. 1124 */ 1125 int (*led_brightness_set)(struct phy_device *dev, 1126 u8 index, enum led_brightness value); 1127 1128 /** 1129 * @led_blink_set: Set a PHY LED blinking. Index indicates 1130 * which of the PHYs led should be configured to blink. Delays 1131 * are in milliseconds and if both are zero then a sensible 1132 * default should be chosen. The call should adjust the 1133 * timings in that case and if it can't match the values 1134 * specified exactly. 1135 */ 1136 int (*led_blink_set)(struct phy_device *dev, u8 index, 1137 unsigned long *delay_on, 1138 unsigned long *delay_off); 1139 /** 1140 * @led_hw_is_supported: Can the HW support the given rules. 1141 * @dev: PHY device which has the LED 1142 * @index: Which LED of the PHY device 1143 * @rules The core is interested in these rules 1144 * 1145 * Return 0 if yes, -EOPNOTSUPP if not, or an error code. 1146 */ 1147 int (*led_hw_is_supported)(struct phy_device *dev, u8 index, 1148 unsigned long rules); 1149 /** 1150 * @led_hw_control_set: Set the HW to control the LED 1151 * @dev: PHY device which has the LED 1152 * @index: Which LED of the PHY device 1153 * @rules The rules used to control the LED 1154 * 1155 * Returns 0, or a an error code. 1156 */ 1157 int (*led_hw_control_set)(struct phy_device *dev, u8 index, 1158 unsigned long rules); 1159 /** 1160 * @led_hw_control_get: Get how the HW is controlling the LED 1161 * @dev: PHY device which has the LED 1162 * @index: Which LED of the PHY device 1163 * @rules Pointer to the rules used to control the LED 1164 * 1165 * Set *@rules to how the HW is currently blinking. Returns 0 1166 * on success, or a error code if the current blinking cannot 1167 * be represented in rules, or some other error happens. 1168 */ 1169 int (*led_hw_control_get)(struct phy_device *dev, u8 index, 1170 unsigned long *rules); 1171 1172 /** 1173 * @led_polarity_set: Set the LED polarity modes 1174 * @dev: PHY device which has the LED 1175 * @index: Which LED of the PHY device 1176 * @modes: bitmap of LED polarity modes 1177 * 1178 * Configure LED with all the required polarity modes in @modes 1179 * to make it correctly turn ON or OFF. 1180 * 1181 * Returns 0, or an error code. 1182 */ 1183 int (*led_polarity_set)(struct phy_device *dev, int index, 1184 unsigned long modes); 1185 }; 1186 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 1187 struct phy_driver, mdiodrv) 1188 1189 #define PHY_ANY_ID "MATCH ANY PHY" 1190 #define PHY_ANY_UID 0xffffffff 1191 1192 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 1193 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 1194 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 1195 1196 /** 1197 * phy_id_compare - compare @id1 with @id2 taking account of @mask 1198 * @id1: first PHY ID 1199 * @id2: second PHY ID 1200 * @mask: the PHY ID mask, set bits are significant in matching 1201 * 1202 * Return true if the bits from @id1 and @id2 specified by @mask match. 1203 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask). 1204 */ 1205 static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask) 1206 { 1207 return !((id1 ^ id2) & mask); 1208 } 1209 1210 /** 1211 * phydev_id_compare - compare @id with the PHY's Clause 22 ID 1212 * @phydev: the PHY device 1213 * @id: the PHY ID to be matched 1214 * 1215 * Compare the @phydev clause 22 ID with the provided @id and return true or 1216 * false depending whether it matches, using the bound driver mask. The 1217 * @phydev must be bound to a driver. 1218 */ 1219 static inline bool phydev_id_compare(struct phy_device *phydev, u32 id) 1220 { 1221 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask); 1222 } 1223 1224 /* A Structure for boards to register fixups with the PHY Lib */ 1225 struct phy_fixup { 1226 struct list_head list; 1227 char bus_id[MII_BUS_ID_SIZE + 3]; 1228 u32 phy_uid; 1229 u32 phy_uid_mask; 1230 int (*run)(struct phy_device *phydev); 1231 }; 1232 1233 const char *phy_speed_to_str(int speed); 1234 const char *phy_duplex_to_str(unsigned int duplex); 1235 const char *phy_rate_matching_to_str(int rate_matching); 1236 1237 int phy_interface_num_ports(phy_interface_t interface); 1238 1239 /* A structure for mapping a particular speed and duplex 1240 * combination to a particular SUPPORTED and ADVERTISED value 1241 */ 1242 struct phy_setting { 1243 u32 speed; 1244 u8 duplex; 1245 u8 bit; 1246 }; 1247 1248 const struct phy_setting * 1249 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 1250 bool exact); 1251 size_t phy_speeds(unsigned int *speeds, size_t size, 1252 unsigned long *mask); 1253 void of_set_phy_supported(struct phy_device *phydev); 1254 void of_set_phy_eee_broken(struct phy_device *phydev); 1255 int phy_speed_down_core(struct phy_device *phydev); 1256 1257 /** 1258 * phy_is_started - Convenience function to check whether PHY is started 1259 * @phydev: The phy_device struct 1260 */ 1261 static inline bool phy_is_started(struct phy_device *phydev) 1262 { 1263 return phydev->state >= PHY_UP; 1264 } 1265 1266 void phy_resolve_aneg_pause(struct phy_device *phydev); 1267 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1268 void phy_check_downshift(struct phy_device *phydev); 1269 1270 /** 1271 * phy_read - Convenience function for reading a given PHY register 1272 * @phydev: the phy_device struct 1273 * @regnum: register number to read 1274 * 1275 * NOTE: MUST NOT be called from interrupt context, 1276 * because the bus read/write functions may wait for an interrupt 1277 * to conclude the operation. 1278 */ 1279 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1280 { 1281 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1282 } 1283 1284 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1285 timeout_us, sleep_before_read) \ 1286 ({ \ 1287 int __ret, __val; \ 1288 __ret = read_poll_timeout(__val = phy_read, val, \ 1289 __val < 0 || (cond), \ 1290 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1291 if (__val < 0) \ 1292 __ret = __val; \ 1293 if (__ret) \ 1294 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1295 __ret; \ 1296 }) 1297 1298 /** 1299 * __phy_read - convenience function for reading a given PHY register 1300 * @phydev: the phy_device struct 1301 * @regnum: register number to read 1302 * 1303 * The caller must have taken the MDIO bus lock. 1304 */ 1305 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1306 { 1307 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1308 } 1309 1310 /** 1311 * phy_write - Convenience function for writing a given PHY register 1312 * @phydev: the phy_device struct 1313 * @regnum: register number to write 1314 * @val: value to write to @regnum 1315 * 1316 * NOTE: MUST NOT be called from interrupt context, 1317 * because the bus read/write functions may wait for an interrupt 1318 * to conclude the operation. 1319 */ 1320 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1321 { 1322 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1323 } 1324 1325 /** 1326 * __phy_write - Convenience function for writing a given PHY register 1327 * @phydev: the phy_device struct 1328 * @regnum: register number to write 1329 * @val: value to write to @regnum 1330 * 1331 * The caller must have taken the MDIO bus lock. 1332 */ 1333 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1334 { 1335 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1336 val); 1337 } 1338 1339 /** 1340 * __phy_modify_changed() - Convenience function for modifying a PHY register 1341 * @phydev: a pointer to a &struct phy_device 1342 * @regnum: register number 1343 * @mask: bit mask of bits to clear 1344 * @set: bit mask of bits to set 1345 * 1346 * Unlocked helper function which allows a PHY register to be modified as 1347 * new register value = (old register value & ~mask) | set 1348 * 1349 * Returns negative errno, 0 if there was no change, and 1 in case of change 1350 */ 1351 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1352 u16 mask, u16 set) 1353 { 1354 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1355 regnum, mask, set); 1356 } 1357 1358 /* 1359 * phy_read_mmd - Convenience function for reading a register 1360 * from an MMD on a given PHY. 1361 */ 1362 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1363 1364 /** 1365 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1366 * condition is met or a timeout occurs 1367 * 1368 * @phydev: The phy_device struct 1369 * @devaddr: The MMD to read from 1370 * @regnum: The register on the MMD to read 1371 * @val: Variable to read the register into 1372 * @cond: Break condition (usually involving @val) 1373 * @sleep_us: Maximum time to sleep between reads in us (0 1374 * tight-loops). Should be less than ~20ms since usleep_range 1375 * is used (see Documentation/timers/timers-howto.rst). 1376 * @timeout_us: Timeout in us, 0 means never timeout 1377 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1378 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either 1379 * case, the last read value at @args is stored in @val. Must not 1380 * be called from atomic context if sleep_us or timeout_us are used. 1381 */ 1382 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1383 sleep_us, timeout_us, sleep_before_read) \ 1384 ({ \ 1385 int __ret, __val; \ 1386 __ret = read_poll_timeout(__val = phy_read_mmd, val, \ 1387 __val < 0 || (cond), \ 1388 sleep_us, timeout_us, sleep_before_read, \ 1389 phydev, devaddr, regnum); \ 1390 if (__val < 0) \ 1391 __ret = __val; \ 1392 if (__ret) \ 1393 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1394 __ret; \ 1395 }) 1396 1397 /* 1398 * __phy_read_mmd - Convenience function for reading a register 1399 * from an MMD on a given PHY. 1400 */ 1401 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1402 1403 /* 1404 * phy_write_mmd - Convenience function for writing a register 1405 * on an MMD on a given PHY. 1406 */ 1407 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1408 1409 /* 1410 * __phy_write_mmd - Convenience function for writing a register 1411 * on an MMD on a given PHY. 1412 */ 1413 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1414 1415 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1416 u16 set); 1417 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1418 u16 set); 1419 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1420 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1421 1422 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1423 u16 mask, u16 set); 1424 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1425 u16 mask, u16 set); 1426 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1427 u16 mask, u16 set); 1428 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1429 u16 mask, u16 set); 1430 1431 /** 1432 * __phy_set_bits - Convenience function for setting bits in a PHY register 1433 * @phydev: the phy_device struct 1434 * @regnum: register number to write 1435 * @val: bits to set 1436 * 1437 * The caller must have taken the MDIO bus lock. 1438 */ 1439 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1440 { 1441 return __phy_modify(phydev, regnum, 0, val); 1442 } 1443 1444 /** 1445 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1446 * @phydev: the phy_device struct 1447 * @regnum: register number to write 1448 * @val: bits to clear 1449 * 1450 * The caller must have taken the MDIO bus lock. 1451 */ 1452 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1453 u16 val) 1454 { 1455 return __phy_modify(phydev, regnum, val, 0); 1456 } 1457 1458 /** 1459 * phy_set_bits - Convenience function for setting bits in a PHY register 1460 * @phydev: the phy_device struct 1461 * @regnum: register number to write 1462 * @val: bits to set 1463 */ 1464 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1465 { 1466 return phy_modify(phydev, regnum, 0, val); 1467 } 1468 1469 /** 1470 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1471 * @phydev: the phy_device struct 1472 * @regnum: register number to write 1473 * @val: bits to clear 1474 */ 1475 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1476 { 1477 return phy_modify(phydev, regnum, val, 0); 1478 } 1479 1480 /** 1481 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1482 * on MMD 1483 * @phydev: the phy_device struct 1484 * @devad: the MMD containing register to modify 1485 * @regnum: register number to modify 1486 * @val: bits to set 1487 * 1488 * The caller must have taken the MDIO bus lock. 1489 */ 1490 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1491 u32 regnum, u16 val) 1492 { 1493 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1494 } 1495 1496 /** 1497 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1498 * on MMD 1499 * @phydev: the phy_device struct 1500 * @devad: the MMD containing register to modify 1501 * @regnum: register number to modify 1502 * @val: bits to clear 1503 * 1504 * The caller must have taken the MDIO bus lock. 1505 */ 1506 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1507 u32 regnum, u16 val) 1508 { 1509 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1510 } 1511 1512 /** 1513 * phy_set_bits_mmd - Convenience function for setting bits in a register 1514 * on MMD 1515 * @phydev: the phy_device struct 1516 * @devad: the MMD containing register to modify 1517 * @regnum: register number to modify 1518 * @val: bits to set 1519 */ 1520 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1521 u32 regnum, u16 val) 1522 { 1523 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1524 } 1525 1526 /** 1527 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1528 * on MMD 1529 * @phydev: the phy_device struct 1530 * @devad: the MMD containing register to modify 1531 * @regnum: register number to modify 1532 * @val: bits to clear 1533 */ 1534 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1535 u32 regnum, u16 val) 1536 { 1537 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1538 } 1539 1540 /** 1541 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1542 * @phydev: the phy_device struct 1543 * 1544 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1545 * PHY_MAC_INTERRUPT 1546 */ 1547 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1548 { 1549 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1550 } 1551 1552 /** 1553 * phy_polling_mode - Convenience function for testing whether polling is 1554 * used to detect PHY status changes 1555 * @phydev: the phy_device struct 1556 */ 1557 static inline bool phy_polling_mode(struct phy_device *phydev) 1558 { 1559 if (phydev->state == PHY_CABLETEST) 1560 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1561 return true; 1562 1563 return phydev->irq == PHY_POLL; 1564 } 1565 1566 /** 1567 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1568 * @phydev: the phy_device struct 1569 */ 1570 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1571 { 1572 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1573 } 1574 1575 /** 1576 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1577 * @phydev: the phy_device struct 1578 */ 1579 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1580 { 1581 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1582 } 1583 1584 /** 1585 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1586 * PTP hardware clock capabilities. 1587 * @phydev: the phy_device struct 1588 */ 1589 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1590 { 1591 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1592 } 1593 1594 /** 1595 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1596 * @phydev: the phy_device struct 1597 */ 1598 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1599 { 1600 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1601 } 1602 1603 static inline int phy_hwtstamp(struct phy_device *phydev, 1604 struct kernel_hwtstamp_config *cfg, 1605 struct netlink_ext_ack *extack) 1606 { 1607 return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack); 1608 } 1609 1610 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1611 int type) 1612 { 1613 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1614 } 1615 1616 static inline int phy_ts_info(struct phy_device *phydev, 1617 struct ethtool_ts_info *tsinfo) 1618 { 1619 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1620 } 1621 1622 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1623 int type) 1624 { 1625 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1626 } 1627 1628 /** 1629 * phy_is_internal - Convenience function for testing if a PHY is internal 1630 * @phydev: the phy_device struct 1631 */ 1632 static inline bool phy_is_internal(struct phy_device *phydev) 1633 { 1634 return phydev->is_internal; 1635 } 1636 1637 /** 1638 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1639 * @phydev: the phy_device struct 1640 */ 1641 static inline bool phy_on_sfp(struct phy_device *phydev) 1642 { 1643 return phydev->is_on_sfp_module; 1644 } 1645 1646 /** 1647 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1648 * PHY interface mode is RGMII (all variants) 1649 * @mode: the &phy_interface_t enum 1650 */ 1651 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1652 { 1653 return mode >= PHY_INTERFACE_MODE_RGMII && 1654 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1655 }; 1656 1657 /** 1658 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1659 * negotiation 1660 * @mode: one of &enum phy_interface_t 1661 * 1662 * Returns true if the PHY interface mode uses the 16-bit negotiation 1663 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1664 */ 1665 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1666 { 1667 return mode == PHY_INTERFACE_MODE_1000BASEX || 1668 mode == PHY_INTERFACE_MODE_2500BASEX; 1669 } 1670 1671 /** 1672 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1673 * is RGMII (all variants) 1674 * @phydev: the phy_device struct 1675 */ 1676 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1677 { 1678 return phy_interface_mode_is_rgmii(phydev->interface); 1679 }; 1680 1681 /** 1682 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1683 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1684 * @phydev: the phy_device struct 1685 */ 1686 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1687 { 1688 return phydev->is_pseudo_fixed_link; 1689 } 1690 1691 int phy_save_page(struct phy_device *phydev); 1692 int phy_select_page(struct phy_device *phydev, int page); 1693 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1694 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1695 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1696 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1697 u16 mask, u16 set); 1698 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1699 u16 mask, u16 set); 1700 1701 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1702 bool is_c45, 1703 struct phy_c45_device_ids *c45_ids); 1704 #if IS_ENABLED(CONFIG_PHYLIB) 1705 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1706 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1707 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1708 struct phy_device *device_phy_find_device(struct device *dev); 1709 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode); 1710 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1711 int phy_device_register(struct phy_device *phy); 1712 void phy_device_free(struct phy_device *phydev); 1713 #else 1714 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1715 { 1716 return 0; 1717 } 1718 static inline 1719 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1720 { 1721 return 0; 1722 } 1723 1724 static inline 1725 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1726 { 1727 return NULL; 1728 } 1729 1730 static inline struct phy_device *device_phy_find_device(struct device *dev) 1731 { 1732 return NULL; 1733 } 1734 1735 static inline 1736 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1737 { 1738 return NULL; 1739 } 1740 1741 static inline 1742 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1743 { 1744 return NULL; 1745 } 1746 1747 static inline int phy_device_register(struct phy_device *phy) 1748 { 1749 return 0; 1750 } 1751 1752 static inline void phy_device_free(struct phy_device *phydev) { } 1753 #endif /* CONFIG_PHYLIB */ 1754 void phy_device_remove(struct phy_device *phydev); 1755 int phy_get_c45_ids(struct phy_device *phydev); 1756 int phy_init_hw(struct phy_device *phydev); 1757 int phy_suspend(struct phy_device *phydev); 1758 int phy_resume(struct phy_device *phydev); 1759 int __phy_resume(struct phy_device *phydev); 1760 int phy_loopback(struct phy_device *phydev, bool enable); 1761 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1762 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1763 int phy_sfp_probe(struct phy_device *phydev, 1764 const struct sfp_upstream_ops *ops); 1765 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1766 phy_interface_t interface); 1767 struct phy_device *phy_find_first(struct mii_bus *bus); 1768 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1769 u32 flags, phy_interface_t interface); 1770 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1771 void (*handler)(struct net_device *), 1772 phy_interface_t interface); 1773 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1774 void (*handler)(struct net_device *), 1775 phy_interface_t interface); 1776 void phy_disconnect(struct phy_device *phydev); 1777 void phy_detach(struct phy_device *phydev); 1778 void phy_start(struct phy_device *phydev); 1779 void phy_stop(struct phy_device *phydev); 1780 int phy_config_aneg(struct phy_device *phydev); 1781 int _phy_start_aneg(struct phy_device *phydev); 1782 int phy_start_aneg(struct phy_device *phydev); 1783 int phy_aneg_done(struct phy_device *phydev); 1784 int phy_speed_down(struct phy_device *phydev, bool sync); 1785 int phy_speed_up(struct phy_device *phydev); 1786 bool phy_check_valid(int speed, int duplex, unsigned long *features); 1787 1788 int phy_restart_aneg(struct phy_device *phydev); 1789 int phy_reset_after_clk_enable(struct phy_device *phydev); 1790 1791 #if IS_ENABLED(CONFIG_PHYLIB) 1792 int phy_start_cable_test(struct phy_device *phydev, 1793 struct netlink_ext_ack *extack); 1794 int phy_start_cable_test_tdr(struct phy_device *phydev, 1795 struct netlink_ext_ack *extack, 1796 const struct phy_tdr_config *config); 1797 #else 1798 static inline 1799 int phy_start_cable_test(struct phy_device *phydev, 1800 struct netlink_ext_ack *extack) 1801 { 1802 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1803 return -EOPNOTSUPP; 1804 } 1805 static inline 1806 int phy_start_cable_test_tdr(struct phy_device *phydev, 1807 struct netlink_ext_ack *extack, 1808 const struct phy_tdr_config *config) 1809 { 1810 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1811 return -EOPNOTSUPP; 1812 } 1813 #endif 1814 1815 static inline void phy_device_reset(struct phy_device *phydev, int value) 1816 { 1817 mdio_device_reset(&phydev->mdio, value); 1818 } 1819 1820 #define phydev_err(_phydev, format, args...) \ 1821 dev_err(&_phydev->mdio.dev, format, ##args) 1822 1823 #define phydev_err_probe(_phydev, err, format, args...) \ 1824 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1825 1826 #define phydev_info(_phydev, format, args...) \ 1827 dev_info(&_phydev->mdio.dev, format, ##args) 1828 1829 #define phydev_warn(_phydev, format, args...) \ 1830 dev_warn(&_phydev->mdio.dev, format, ##args) 1831 1832 #define phydev_dbg(_phydev, format, args...) \ 1833 dev_dbg(&_phydev->mdio.dev, format, ##args) 1834 1835 static inline const char *phydev_name(const struct phy_device *phydev) 1836 { 1837 return dev_name(&phydev->mdio.dev); 1838 } 1839 1840 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1841 { 1842 mutex_lock(&phydev->mdio.bus->mdio_lock); 1843 } 1844 1845 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1846 { 1847 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1848 } 1849 1850 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1851 __printf(2, 3); 1852 char *phy_attached_info_irq(struct phy_device *phydev) 1853 __malloc; 1854 void phy_attached_info(struct phy_device *phydev); 1855 1856 /* Clause 22 PHY */ 1857 int genphy_read_abilities(struct phy_device *phydev); 1858 int genphy_setup_forced(struct phy_device *phydev); 1859 int genphy_restart_aneg(struct phy_device *phydev); 1860 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1861 int genphy_config_eee_advert(struct phy_device *phydev); 1862 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1863 int genphy_aneg_done(struct phy_device *phydev); 1864 int genphy_update_link(struct phy_device *phydev); 1865 int genphy_read_lpa(struct phy_device *phydev); 1866 int genphy_read_status_fixed(struct phy_device *phydev); 1867 int genphy_read_status(struct phy_device *phydev); 1868 int genphy_read_master_slave(struct phy_device *phydev); 1869 int genphy_suspend(struct phy_device *phydev); 1870 int genphy_resume(struct phy_device *phydev); 1871 int genphy_loopback(struct phy_device *phydev, bool enable); 1872 int genphy_soft_reset(struct phy_device *phydev); 1873 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1874 1875 static inline int genphy_config_aneg(struct phy_device *phydev) 1876 { 1877 return __genphy_config_aneg(phydev, false); 1878 } 1879 1880 static inline int genphy_no_config_intr(struct phy_device *phydev) 1881 { 1882 return 0; 1883 } 1884 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1885 u16 regnum); 1886 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1887 u16 regnum, u16 val); 1888 1889 /* Clause 37 */ 1890 int genphy_c37_config_aneg(struct phy_device *phydev); 1891 int genphy_c37_read_status(struct phy_device *phydev, bool *changed); 1892 1893 /* Clause 45 PHY */ 1894 int genphy_c45_restart_aneg(struct phy_device *phydev); 1895 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1896 int genphy_c45_aneg_done(struct phy_device *phydev); 1897 int genphy_c45_read_link(struct phy_device *phydev); 1898 int genphy_c45_read_lpa(struct phy_device *phydev); 1899 int genphy_c45_read_pma(struct phy_device *phydev); 1900 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1901 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 1902 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1903 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1904 int genphy_c45_read_mdix(struct phy_device *phydev); 1905 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1906 int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev); 1907 int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev); 1908 int genphy_c45_read_eee_abilities(struct phy_device *phydev); 1909 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 1910 int genphy_c45_read_status(struct phy_device *phydev); 1911 int genphy_c45_baset1_read_status(struct phy_device *phydev); 1912 int genphy_c45_config_aneg(struct phy_device *phydev); 1913 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1914 int genphy_c45_pma_resume(struct phy_device *phydev); 1915 int genphy_c45_pma_suspend(struct phy_device *phydev); 1916 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 1917 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 1918 struct phy_plca_cfg *plca_cfg); 1919 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 1920 const struct phy_plca_cfg *plca_cfg); 1921 int genphy_c45_plca_get_status(struct phy_device *phydev, 1922 struct phy_plca_status *plca_st); 1923 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv, 1924 unsigned long *lp, bool *is_enabled); 1925 int genphy_c45_ethtool_get_eee(struct phy_device *phydev, 1926 struct ethtool_keee *data); 1927 int genphy_c45_ethtool_set_eee(struct phy_device *phydev, 1928 struct ethtool_keee *data); 1929 int genphy_c45_write_eee_adv(struct phy_device *phydev, unsigned long *adv); 1930 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev); 1931 int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv); 1932 1933 /* Generic C45 PHY driver */ 1934 extern struct phy_driver genphy_c45_driver; 1935 1936 /* The gen10g_* functions are the old Clause 45 stub */ 1937 int gen10g_config_aneg(struct phy_device *phydev); 1938 1939 static inline int phy_read_status(struct phy_device *phydev) 1940 { 1941 if (!phydev->drv) 1942 return -EIO; 1943 1944 if (phydev->drv->read_status) 1945 return phydev->drv->read_status(phydev); 1946 else 1947 return genphy_read_status(phydev); 1948 } 1949 1950 void phy_driver_unregister(struct phy_driver *drv); 1951 void phy_drivers_unregister(struct phy_driver *drv, int n); 1952 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1953 int phy_drivers_register(struct phy_driver *new_driver, int n, 1954 struct module *owner); 1955 void phy_error(struct phy_device *phydev); 1956 void phy_state_machine(struct work_struct *work); 1957 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1958 void phy_trigger_machine(struct phy_device *phydev); 1959 void phy_mac_interrupt(struct phy_device *phydev); 1960 void phy_start_machine(struct phy_device *phydev); 1961 void phy_stop_machine(struct phy_device *phydev); 1962 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1963 struct ethtool_link_ksettings *cmd); 1964 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1965 const struct ethtool_link_ksettings *cmd); 1966 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1967 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1968 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1969 int phy_disable_interrupts(struct phy_device *phydev); 1970 void phy_request_interrupt(struct phy_device *phydev); 1971 void phy_free_interrupt(struct phy_device *phydev); 1972 void phy_print_status(struct phy_device *phydev); 1973 int phy_get_rate_matching(struct phy_device *phydev, 1974 phy_interface_t iface); 1975 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1976 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1977 void phy_advertise_supported(struct phy_device *phydev); 1978 void phy_advertise_eee_all(struct phy_device *phydev); 1979 void phy_support_sym_pause(struct phy_device *phydev); 1980 void phy_support_asym_pause(struct phy_device *phydev); 1981 void phy_support_eee(struct phy_device *phydev); 1982 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1983 bool autoneg); 1984 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1985 bool phy_validate_pause(struct phy_device *phydev, 1986 struct ethtool_pauseparam *pp); 1987 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1988 1989 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 1990 const int *delay_values, int size, bool is_rx); 1991 1992 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1993 bool *tx_pause, bool *rx_pause); 1994 1995 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1996 int (*run)(struct phy_device *)); 1997 int phy_register_fixup_for_id(const char *bus_id, 1998 int (*run)(struct phy_device *)); 1999 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 2000 int (*run)(struct phy_device *)); 2001 2002 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 2003 int phy_unregister_fixup_for_id(const char *bus_id); 2004 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 2005 2006 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 2007 int phy_get_eee_err(struct phy_device *phydev); 2008 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data); 2009 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_keee *data); 2010 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 2011 void phy_ethtool_get_wol(struct phy_device *phydev, 2012 struct ethtool_wolinfo *wol); 2013 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 2014 struct ethtool_link_ksettings *cmd); 2015 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 2016 const struct ethtool_link_ksettings *cmd); 2017 int phy_ethtool_nway_reset(struct net_device *ndev); 2018 int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size); 2019 int of_phy_package_join(struct phy_device *phydev, size_t priv_size); 2020 void phy_package_leave(struct phy_device *phydev); 2021 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 2022 int base_addr, size_t priv_size); 2023 int devm_of_phy_package_join(struct device *dev, struct phy_device *phydev, 2024 size_t priv_size); 2025 2026 int __init mdio_bus_init(void); 2027 void mdio_bus_exit(void); 2028 2029 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 2030 int phy_ethtool_get_sset_count(struct phy_device *phydev); 2031 int phy_ethtool_get_stats(struct phy_device *phydev, 2032 struct ethtool_stats *stats, u64 *data); 2033 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 2034 struct phy_plca_cfg *plca_cfg); 2035 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 2036 const struct phy_plca_cfg *plca_cfg, 2037 struct netlink_ext_ack *extack); 2038 int phy_ethtool_get_plca_status(struct phy_device *phydev, 2039 struct phy_plca_status *plca_st); 2040 2041 int __phy_hwtstamp_get(struct phy_device *phydev, 2042 struct kernel_hwtstamp_config *config); 2043 int __phy_hwtstamp_set(struct phy_device *phydev, 2044 struct kernel_hwtstamp_config *config, 2045 struct netlink_ext_ack *extack); 2046 2047 static inline int phy_package_address(struct phy_device *phydev, 2048 unsigned int addr_offset) 2049 { 2050 struct phy_package_shared *shared = phydev->shared; 2051 u8 base_addr = shared->base_addr; 2052 2053 if (addr_offset >= PHY_MAX_ADDR - base_addr) 2054 return -EIO; 2055 2056 /* we know that addr will be in the range 0..31 and thus the 2057 * implicit cast to a signed int is not a problem. 2058 */ 2059 return base_addr + addr_offset; 2060 } 2061 2062 static inline int phy_package_read(struct phy_device *phydev, 2063 unsigned int addr_offset, u32 regnum) 2064 { 2065 int addr = phy_package_address(phydev, addr_offset); 2066 2067 if (addr < 0) 2068 return addr; 2069 2070 return mdiobus_read(phydev->mdio.bus, addr, regnum); 2071 } 2072 2073 static inline int __phy_package_read(struct phy_device *phydev, 2074 unsigned int addr_offset, u32 regnum) 2075 { 2076 int addr = phy_package_address(phydev, addr_offset); 2077 2078 if (addr < 0) 2079 return addr; 2080 2081 return __mdiobus_read(phydev->mdio.bus, addr, regnum); 2082 } 2083 2084 static inline int phy_package_write(struct phy_device *phydev, 2085 unsigned int addr_offset, u32 regnum, 2086 u16 val) 2087 { 2088 int addr = phy_package_address(phydev, addr_offset); 2089 2090 if (addr < 0) 2091 return addr; 2092 2093 return mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2094 } 2095 2096 static inline int __phy_package_write(struct phy_device *phydev, 2097 unsigned int addr_offset, u32 regnum, 2098 u16 val) 2099 { 2100 int addr = phy_package_address(phydev, addr_offset); 2101 2102 if (addr < 0) 2103 return addr; 2104 2105 return __mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2106 } 2107 2108 int __phy_package_read_mmd(struct phy_device *phydev, 2109 unsigned int addr_offset, int devad, 2110 u32 regnum); 2111 2112 int phy_package_read_mmd(struct phy_device *phydev, 2113 unsigned int addr_offset, int devad, 2114 u32 regnum); 2115 2116 int __phy_package_write_mmd(struct phy_device *phydev, 2117 unsigned int addr_offset, int devad, 2118 u32 regnum, u16 val); 2119 2120 int phy_package_write_mmd(struct phy_device *phydev, 2121 unsigned int addr_offset, int devad, 2122 u32 regnum, u16 val); 2123 2124 static inline bool __phy_package_set_once(struct phy_device *phydev, 2125 unsigned int b) 2126 { 2127 struct phy_package_shared *shared = phydev->shared; 2128 2129 if (!shared) 2130 return false; 2131 2132 return !test_and_set_bit(b, &shared->flags); 2133 } 2134 2135 static inline bool phy_package_init_once(struct phy_device *phydev) 2136 { 2137 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 2138 } 2139 2140 static inline bool phy_package_probe_once(struct phy_device *phydev) 2141 { 2142 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 2143 } 2144 2145 extern const struct bus_type mdio_bus_type; 2146 2147 struct mdio_board_info { 2148 const char *bus_id; 2149 char modalias[MDIO_NAME_SIZE]; 2150 int mdio_addr; 2151 const void *platform_data; 2152 }; 2153 2154 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 2155 int mdiobus_register_board_info(const struct mdio_board_info *info, 2156 unsigned int n); 2157 #else 2158 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 2159 unsigned int n) 2160 { 2161 return 0; 2162 } 2163 #endif 2164 2165 2166 /** 2167 * phy_module_driver() - Helper macro for registering PHY drivers 2168 * @__phy_drivers: array of PHY drivers to register 2169 * @__count: Numbers of members in array 2170 * 2171 * Helper macro for PHY drivers which do not do anything special in module 2172 * init/exit. Each module may only use this macro once, and calling it 2173 * replaces module_init() and module_exit(). 2174 */ 2175 #define phy_module_driver(__phy_drivers, __count) \ 2176 static int __init phy_module_init(void) \ 2177 { \ 2178 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 2179 } \ 2180 module_init(phy_module_init); \ 2181 static void __exit phy_module_exit(void) \ 2182 { \ 2183 phy_drivers_unregister(__phy_drivers, __count); \ 2184 } \ 2185 module_exit(phy_module_exit) 2186 2187 #define module_phy_driver(__phy_drivers) \ 2188 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 2189 2190 bool phy_driver_is_genphy(struct phy_device *phydev); 2191 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 2192 2193 #endif /* __PHY_H */ 2194