1 /* 2 * Framework and drivers for configuring and reading different PHYs 3 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 4 * 5 * Author: Andy Fleming 6 * 7 * Copyright (c) 2004 Freescale Semiconductor, Inc. 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or (at your 12 * option) any later version. 13 * 14 */ 15 16 #ifndef __PHY_H 17 #define __PHY_H 18 19 #include <linux/compiler.h> 20 #include <linux/spinlock.h> 21 #include <linux/ethtool.h> 22 #include <linux/linkmode.h> 23 #include <linux/mdio.h> 24 #include <linux/mii.h> 25 #include <linux/module.h> 26 #include <linux/timer.h> 27 #include <linux/workqueue.h> 28 #include <linux/mod_devicetable.h> 29 30 #include <linux/atomic.h> 31 32 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 33 SUPPORTED_TP | \ 34 SUPPORTED_MII) 35 36 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 37 SUPPORTED_10baseT_Full) 38 39 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 40 SUPPORTED_100baseT_Full) 41 42 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 43 SUPPORTED_1000baseT_Full) 44 45 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 53 54 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 55 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 56 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 57 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 58 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 59 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 60 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 61 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 62 63 extern const int phy_10_100_features_array[4]; 64 extern const int phy_basic_t1_features_array[2]; 65 extern const int phy_gbit_features_array[2]; 66 extern const int phy_10gbit_features_array[1]; 67 68 /* 69 * Set phydev->irq to PHY_POLL if interrupts are not supported, 70 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if 71 * the attached driver handles the interrupt 72 */ 73 #define PHY_POLL -1 74 #define PHY_IGNORE_INTERRUPT -2 75 76 #define PHY_IS_INTERNAL 0x00000001 77 #define PHY_RST_AFTER_CLK_EN 0x00000002 78 #define MDIO_DEVICE_IS_PHY 0x80000000 79 80 /* Interface Mode definitions */ 81 typedef enum { 82 PHY_INTERFACE_MODE_NA, 83 PHY_INTERFACE_MODE_INTERNAL, 84 PHY_INTERFACE_MODE_MII, 85 PHY_INTERFACE_MODE_GMII, 86 PHY_INTERFACE_MODE_SGMII, 87 PHY_INTERFACE_MODE_TBI, 88 PHY_INTERFACE_MODE_REVMII, 89 PHY_INTERFACE_MODE_RMII, 90 PHY_INTERFACE_MODE_RGMII, 91 PHY_INTERFACE_MODE_RGMII_ID, 92 PHY_INTERFACE_MODE_RGMII_RXID, 93 PHY_INTERFACE_MODE_RGMII_TXID, 94 PHY_INTERFACE_MODE_RTBI, 95 PHY_INTERFACE_MODE_SMII, 96 PHY_INTERFACE_MODE_XGMII, 97 PHY_INTERFACE_MODE_MOCA, 98 PHY_INTERFACE_MODE_QSGMII, 99 PHY_INTERFACE_MODE_TRGMII, 100 PHY_INTERFACE_MODE_1000BASEX, 101 PHY_INTERFACE_MODE_2500BASEX, 102 PHY_INTERFACE_MODE_RXAUI, 103 PHY_INTERFACE_MODE_XAUI, 104 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */ 105 PHY_INTERFACE_MODE_10GKR, 106 PHY_INTERFACE_MODE_MAX, 107 } phy_interface_t; 108 109 /** 110 * phy_supported_speeds - return all speeds currently supported by a phy device 111 * @phy: The phy device to return supported speeds of. 112 * @speeds: buffer to store supported speeds in. 113 * @size: size of speeds buffer. 114 * 115 * Description: Returns the number of supported speeds, and fills 116 * the speeds buffer with the supported speeds. If speeds buffer is 117 * too small to contain all currently supported speeds, will return as 118 * many speeds as can fit. 119 */ 120 unsigned int phy_supported_speeds(struct phy_device *phy, 121 unsigned int *speeds, 122 unsigned int size); 123 124 /** 125 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 126 * @interface: enum phy_interface_t value 127 * 128 * Description: maps 'enum phy_interface_t' defined in this file 129 * into the device tree binding of 'phy-mode', so that Ethernet 130 * device driver can get phy interface from device tree. 131 */ 132 static inline const char *phy_modes(phy_interface_t interface) 133 { 134 switch (interface) { 135 case PHY_INTERFACE_MODE_NA: 136 return ""; 137 case PHY_INTERFACE_MODE_INTERNAL: 138 return "internal"; 139 case PHY_INTERFACE_MODE_MII: 140 return "mii"; 141 case PHY_INTERFACE_MODE_GMII: 142 return "gmii"; 143 case PHY_INTERFACE_MODE_SGMII: 144 return "sgmii"; 145 case PHY_INTERFACE_MODE_TBI: 146 return "tbi"; 147 case PHY_INTERFACE_MODE_REVMII: 148 return "rev-mii"; 149 case PHY_INTERFACE_MODE_RMII: 150 return "rmii"; 151 case PHY_INTERFACE_MODE_RGMII: 152 return "rgmii"; 153 case PHY_INTERFACE_MODE_RGMII_ID: 154 return "rgmii-id"; 155 case PHY_INTERFACE_MODE_RGMII_RXID: 156 return "rgmii-rxid"; 157 case PHY_INTERFACE_MODE_RGMII_TXID: 158 return "rgmii-txid"; 159 case PHY_INTERFACE_MODE_RTBI: 160 return "rtbi"; 161 case PHY_INTERFACE_MODE_SMII: 162 return "smii"; 163 case PHY_INTERFACE_MODE_XGMII: 164 return "xgmii"; 165 case PHY_INTERFACE_MODE_MOCA: 166 return "moca"; 167 case PHY_INTERFACE_MODE_QSGMII: 168 return "qsgmii"; 169 case PHY_INTERFACE_MODE_TRGMII: 170 return "trgmii"; 171 case PHY_INTERFACE_MODE_1000BASEX: 172 return "1000base-x"; 173 case PHY_INTERFACE_MODE_2500BASEX: 174 return "2500base-x"; 175 case PHY_INTERFACE_MODE_RXAUI: 176 return "rxaui"; 177 case PHY_INTERFACE_MODE_XAUI: 178 return "xaui"; 179 case PHY_INTERFACE_MODE_10GKR: 180 return "10gbase-kr"; 181 default: 182 return "unknown"; 183 } 184 } 185 186 187 #define PHY_INIT_TIMEOUT 100000 188 #define PHY_STATE_TIME 1 189 #define PHY_FORCE_TIMEOUT 10 190 191 #define PHY_MAX_ADDR 32 192 193 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 194 #define PHY_ID_FMT "%s:%02x" 195 196 #define MII_BUS_ID_SIZE 61 197 198 /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit 199 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */ 200 #define MII_ADDR_C45 (1<<30) 201 202 struct device; 203 struct phylink; 204 struct sk_buff; 205 206 /* 207 * The Bus class for PHYs. Devices which provide access to 208 * PHYs should register using this structure 209 */ 210 struct mii_bus { 211 struct module *owner; 212 const char *name; 213 char id[MII_BUS_ID_SIZE]; 214 void *priv; 215 int (*read)(struct mii_bus *bus, int addr, int regnum); 216 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 217 int (*reset)(struct mii_bus *bus); 218 219 /* 220 * A lock to ensure that only one thing can read/write 221 * the MDIO bus at a time 222 */ 223 struct mutex mdio_lock; 224 225 struct device *parent; 226 enum { 227 MDIOBUS_ALLOCATED = 1, 228 MDIOBUS_REGISTERED, 229 MDIOBUS_UNREGISTERED, 230 MDIOBUS_RELEASED, 231 } state; 232 struct device dev; 233 234 /* list of all PHYs on bus */ 235 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 236 237 /* PHY addresses to be ignored when probing */ 238 u32 phy_mask; 239 240 /* PHY addresses to ignore the TA/read failure */ 241 u32 phy_ignore_ta_mask; 242 243 /* 244 * An array of interrupts, each PHY's interrupt at the index 245 * matching its address 246 */ 247 int irq[PHY_MAX_ADDR]; 248 249 /* GPIO reset pulse width in microseconds */ 250 int reset_delay_us; 251 /* RESET GPIO descriptor pointer */ 252 struct gpio_desc *reset_gpiod; 253 }; 254 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 255 256 struct mii_bus *mdiobus_alloc_size(size_t); 257 static inline struct mii_bus *mdiobus_alloc(void) 258 { 259 return mdiobus_alloc_size(0); 260 } 261 262 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 263 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 264 void mdiobus_unregister(struct mii_bus *bus); 265 void mdiobus_free(struct mii_bus *bus); 266 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 267 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 268 { 269 return devm_mdiobus_alloc_size(dev, 0); 270 } 271 272 void devm_mdiobus_free(struct device *dev, struct mii_bus *bus); 273 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); 274 275 #define PHY_INTERRUPT_DISABLED false 276 #define PHY_INTERRUPT_ENABLED true 277 278 /* PHY state machine states: 279 * 280 * DOWN: PHY device and driver are not ready for anything. probe 281 * should be called if and only if the PHY is in this state, 282 * given that the PHY device exists. 283 * - PHY driver probe function will set the state to READY 284 * 285 * READY: PHY is ready to send and receive packets, but the 286 * controller is not. By default, PHYs which do not implement 287 * probe will be set to this state by phy_probe(). 288 * - start will set the state to UP 289 * 290 * UP: The PHY and attached device are ready to do work. 291 * Interrupts should be started here. 292 * - timer moves to NOLINK or RUNNING 293 * 294 * NOLINK: PHY is up, but not currently plugged in. 295 * - irq or timer will set RUNNING if link comes back 296 * - phy_stop moves to HALTED 297 * 298 * FORCING: PHY is being configured with forced settings 299 * - if link is up, move to RUNNING 300 * - If link is down, we drop to the next highest setting, and 301 * retry (FORCING) after a timeout 302 * - phy_stop moves to HALTED 303 * 304 * RUNNING: PHY is currently up, running, and possibly sending 305 * and/or receiving packets 306 * - irq or timer will set NOLINK if link goes down 307 * - phy_stop moves to HALTED 308 * 309 * HALTED: PHY is up, but no polling or interrupts are done. Or 310 * PHY is in an error state. 311 * 312 * - phy_start moves to RESUMING 313 * 314 * RESUMING: PHY was halted, but now wants to run again. 315 * - If we are forcing, or aneg is done, timer moves to RUNNING 316 * - If aneg is not done, timer moves to AN 317 * - phy_stop moves to HALTED 318 */ 319 enum phy_state { 320 PHY_DOWN = 0, 321 PHY_READY, 322 PHY_HALTED, 323 PHY_UP, 324 PHY_RUNNING, 325 PHY_NOLINK, 326 PHY_FORCING, 327 PHY_RESUMING 328 }; 329 330 /** 331 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 332 * @devices_in_package: Bit vector of devices present. 333 * @device_ids: The device identifer for each present device. 334 */ 335 struct phy_c45_device_ids { 336 u32 devices_in_package; 337 u32 device_ids[8]; 338 }; 339 340 /* phy_device: An instance of a PHY 341 * 342 * drv: Pointer to the driver for this PHY instance 343 * phy_id: UID for this device found during discovery 344 * c45_ids: 802.3-c45 Device Identifers if is_c45. 345 * is_c45: Set to true if this phy uses clause 45 addressing. 346 * is_internal: Set to true if this phy is internal to a MAC. 347 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc. 348 * is_gigabit_capable: Set to true if PHY supports 1000Mbps 349 * has_fixups: Set to true if this phy has fixups/quirks. 350 * suspended: Set to true if this phy has been suspended successfully. 351 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 352 * loopback_enabled: Set true if this phy has been loopbacked successfully. 353 * state: state of the PHY for management purposes 354 * dev_flags: Device-specific flags used by the PHY driver. 355 * link_timeout: The number of timer firings to wait before the 356 * giving up on the current attempt at acquiring a link 357 * irq: IRQ number of the PHY's interrupt (-1 if none) 358 * phy_timer: The timer for handling the state machine 359 * attached_dev: The attached enet driver's device instance ptr 360 * adjust_link: Callback for the enet controller to respond to 361 * changes in the link state. 362 * 363 * speed, duplex, pause, supported, advertising, lp_advertising, 364 * and autoneg are used like in mii_if_info 365 * 366 * interrupts currently only supports enabled or disabled, 367 * but could be changed in the future to support enabling 368 * and disabling specific interrupts 369 * 370 * Contains some infrastructure for polling and interrupt 371 * handling, as well as handling shifts in PHY hardware state 372 */ 373 struct phy_device { 374 struct mdio_device mdio; 375 376 /* Information about the PHY type */ 377 /* And management functions */ 378 struct phy_driver *drv; 379 380 u32 phy_id; 381 382 struct phy_c45_device_ids c45_ids; 383 unsigned is_c45:1; 384 unsigned is_internal:1; 385 unsigned is_pseudo_fixed_link:1; 386 unsigned is_gigabit_capable:1; 387 unsigned has_fixups:1; 388 unsigned suspended:1; 389 unsigned sysfs_links:1; 390 unsigned loopback_enabled:1; 391 392 unsigned autoneg:1; 393 /* The most recently read link state */ 394 unsigned link:1; 395 unsigned autoneg_complete:1; 396 397 /* Interrupts are enabled */ 398 unsigned interrupts:1; 399 400 enum phy_state state; 401 402 u32 dev_flags; 403 404 phy_interface_t interface; 405 406 /* 407 * forced speed & duplex (no autoneg) 408 * partner speed & duplex & pause (autoneg) 409 */ 410 int speed; 411 int duplex; 412 int pause; 413 int asym_pause; 414 415 /* Union of PHY and Attached devices' supported link modes */ 416 /* See ethtool.h for more info */ 417 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 418 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 419 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 420 421 /* Energy efficient ethernet modes which should be prohibited */ 422 u32 eee_broken_modes; 423 424 int link_timeout; 425 426 #ifdef CONFIG_LED_TRIGGER_PHY 427 struct phy_led_trigger *phy_led_triggers; 428 unsigned int phy_num_led_triggers; 429 struct phy_led_trigger *last_triggered; 430 431 struct phy_led_trigger *led_link_trigger; 432 #endif 433 434 /* 435 * Interrupt number for this PHY 436 * -1 means no interrupt 437 */ 438 int irq; 439 440 /* private data pointer */ 441 /* For use by PHYs to maintain extra state */ 442 void *priv; 443 444 /* Interrupt and Polling infrastructure */ 445 struct delayed_work state_queue; 446 447 struct mutex lock; 448 449 struct phylink *phylink; 450 struct net_device *attached_dev; 451 452 u8 mdix; 453 u8 mdix_ctrl; 454 455 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier); 456 void (*adjust_link)(struct net_device *dev); 457 }; 458 #define to_phy_device(d) container_of(to_mdio_device(d), \ 459 struct phy_device, mdio) 460 461 /* struct phy_driver: Driver structure for a particular PHY type 462 * 463 * driver_data: static driver data 464 * phy_id: The result of reading the UID registers of this PHY 465 * type, and ANDing them with the phy_id_mask. This driver 466 * only works for PHYs with IDs which match this field 467 * name: The friendly name of this PHY type 468 * phy_id_mask: Defines the important bits of the phy_id 469 * features: A mandatory list of features (speed, duplex, etc) 470 * supported by this PHY 471 * flags: A bitfield defining certain other features this PHY 472 * supports (like interrupts) 473 * 474 * All functions are optional. If config_aneg or read_status 475 * are not implemented, the phy core uses the genphy versions. 476 * Note that none of these functions should be called from 477 * interrupt time. The goal is for the bus read/write functions 478 * to be able to block when the bus transaction is happening, 479 * and be freed up by an interrupt (The MPC85xx has this ability, 480 * though it is not currently supported in the driver). 481 */ 482 struct phy_driver { 483 struct mdio_driver_common mdiodrv; 484 u32 phy_id; 485 char *name; 486 u32 phy_id_mask; 487 const unsigned long * const features; 488 u32 flags; 489 const void *driver_data; 490 491 /* 492 * Called to issue a PHY software reset 493 */ 494 int (*soft_reset)(struct phy_device *phydev); 495 496 /* 497 * Called to initialize the PHY, 498 * including after a reset 499 */ 500 int (*config_init)(struct phy_device *phydev); 501 502 /* 503 * Called during discovery. Used to set 504 * up device-specific structures, if any 505 */ 506 int (*probe)(struct phy_device *phydev); 507 508 /* 509 * Probe the hardware to determine what abilities it has. 510 * Should only set phydev->supported. 511 */ 512 int (*get_features)(struct phy_device *phydev); 513 514 /* PHY Power Management */ 515 int (*suspend)(struct phy_device *phydev); 516 int (*resume)(struct phy_device *phydev); 517 518 /* 519 * Configures the advertisement and resets 520 * autonegotiation if phydev->autoneg is on, 521 * forces the speed to the current settings in phydev 522 * if phydev->autoneg is off 523 */ 524 int (*config_aneg)(struct phy_device *phydev); 525 526 /* Determines the auto negotiation result */ 527 int (*aneg_done)(struct phy_device *phydev); 528 529 /* Determines the negotiated speed and duplex */ 530 int (*read_status)(struct phy_device *phydev); 531 532 /* Clears any pending interrupts */ 533 int (*ack_interrupt)(struct phy_device *phydev); 534 535 /* Enables or disables interrupts */ 536 int (*config_intr)(struct phy_device *phydev); 537 538 /* 539 * Checks if the PHY generated an interrupt. 540 * For multi-PHY devices with shared PHY interrupt pin 541 */ 542 int (*did_interrupt)(struct phy_device *phydev); 543 544 /* Clears up any memory if needed */ 545 void (*remove)(struct phy_device *phydev); 546 547 /* Returns true if this is a suitable driver for the given 548 * phydev. If NULL, matching is based on phy_id and 549 * phy_id_mask. 550 */ 551 int (*match_phy_device)(struct phy_device *phydev); 552 553 /* Handles ethtool queries for hardware time stamping. */ 554 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti); 555 556 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */ 557 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr); 558 559 /* 560 * Requests a Rx timestamp for 'skb'. If the skb is accepted, 561 * the phy driver promises to deliver it using netif_rx() as 562 * soon as a timestamp becomes available. One of the 563 * PTP_CLASS_ values is passed in 'type'. The function must 564 * return true if the skb is accepted for delivery. 565 */ 566 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); 567 568 /* 569 * Requests a Tx timestamp for 'skb'. The phy driver promises 570 * to deliver it using skb_complete_tx_timestamp() as soon as a 571 * timestamp becomes available. One of the PTP_CLASS_ values 572 * is passed in 'type'. 573 */ 574 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); 575 576 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to 577 * enable Wake on LAN, so set_wol is provided to be called in the 578 * ethernet driver's set_wol function. */ 579 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 580 581 /* See set_wol, but for checking whether Wake on LAN is enabled. */ 582 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 583 584 /* 585 * Called to inform a PHY device driver when the core is about to 586 * change the link state. This callback is supposed to be used as 587 * fixup hook for drivers that need to take action when the link 588 * state changes. Drivers are by no means allowed to mess with the 589 * PHY device structure in their implementations. 590 */ 591 void (*link_change_notify)(struct phy_device *dev); 592 593 /* 594 * Phy specific driver override for reading a MMD register. 595 * This function is optional for PHY specific drivers. When 596 * not provided, the default MMD read function will be used 597 * by phy_read_mmd(), which will use either a direct read for 598 * Clause 45 PHYs or an indirect read for Clause 22 PHYs. 599 * devnum is the MMD device number within the PHY device, 600 * regnum is the register within the selected MMD device. 601 */ 602 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 603 604 /* 605 * Phy specific driver override for writing a MMD register. 606 * This function is optional for PHY specific drivers. When 607 * not provided, the default MMD write function will be used 608 * by phy_write_mmd(), which will use either a direct write for 609 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs. 610 * devnum is the MMD device number within the PHY device, 611 * regnum is the register within the selected MMD device. 612 * val is the value to be written. 613 */ 614 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 615 u16 val); 616 617 int (*read_page)(struct phy_device *dev); 618 int (*write_page)(struct phy_device *dev, int page); 619 620 /* Get the size and type of the eeprom contained within a plug-in 621 * module */ 622 int (*module_info)(struct phy_device *dev, 623 struct ethtool_modinfo *modinfo); 624 625 /* Get the eeprom information from the plug-in module */ 626 int (*module_eeprom)(struct phy_device *dev, 627 struct ethtool_eeprom *ee, u8 *data); 628 629 /* Get statistics from the phy using ethtool */ 630 int (*get_sset_count)(struct phy_device *dev); 631 void (*get_strings)(struct phy_device *dev, u8 *data); 632 void (*get_stats)(struct phy_device *dev, 633 struct ethtool_stats *stats, u64 *data); 634 635 /* Get and Set PHY tunables */ 636 int (*get_tunable)(struct phy_device *dev, 637 struct ethtool_tunable *tuna, void *data); 638 int (*set_tunable)(struct phy_device *dev, 639 struct ethtool_tunable *tuna, 640 const void *data); 641 int (*set_loopback)(struct phy_device *dev, bool enable); 642 }; 643 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 644 struct phy_driver, mdiodrv) 645 646 #define PHY_ANY_ID "MATCH ANY PHY" 647 #define PHY_ANY_UID 0xffffffff 648 649 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 650 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 651 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 652 653 /* A Structure for boards to register fixups with the PHY Lib */ 654 struct phy_fixup { 655 struct list_head list; 656 char bus_id[MII_BUS_ID_SIZE + 3]; 657 u32 phy_uid; 658 u32 phy_uid_mask; 659 int (*run)(struct phy_device *phydev); 660 }; 661 662 const char *phy_speed_to_str(int speed); 663 const char *phy_duplex_to_str(unsigned int duplex); 664 665 /* A structure for mapping a particular speed and duplex 666 * combination to a particular SUPPORTED and ADVERTISED value 667 */ 668 struct phy_setting { 669 u32 speed; 670 u8 duplex; 671 u8 bit; 672 }; 673 674 const struct phy_setting * 675 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 676 bool exact); 677 size_t phy_speeds(unsigned int *speeds, size_t size, 678 unsigned long *mask); 679 void of_set_phy_supported(struct phy_device *phydev); 680 void of_set_phy_eee_broken(struct phy_device *phydev); 681 682 /** 683 * phy_is_started - Convenience function to check whether PHY is started 684 * @phydev: The phy_device struct 685 */ 686 static inline bool phy_is_started(struct phy_device *phydev) 687 { 688 return phydev->state >= PHY_UP; 689 } 690 691 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 692 693 /** 694 * phy_read - Convenience function for reading a given PHY register 695 * @phydev: the phy_device struct 696 * @regnum: register number to read 697 * 698 * NOTE: MUST NOT be called from interrupt context, 699 * because the bus read/write functions may wait for an interrupt 700 * to conclude the operation. 701 */ 702 static inline int phy_read(struct phy_device *phydev, u32 regnum) 703 { 704 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 705 } 706 707 /** 708 * __phy_read - convenience function for reading a given PHY register 709 * @phydev: the phy_device struct 710 * @regnum: register number to read 711 * 712 * The caller must have taken the MDIO bus lock. 713 */ 714 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 715 { 716 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 717 } 718 719 /** 720 * phy_write - Convenience function for writing a given PHY register 721 * @phydev: the phy_device struct 722 * @regnum: register number to write 723 * @val: value to write to @regnum 724 * 725 * NOTE: MUST NOT be called from interrupt context, 726 * because the bus read/write functions may wait for an interrupt 727 * to conclude the operation. 728 */ 729 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 730 { 731 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 732 } 733 734 /** 735 * __phy_write - Convenience function for writing a given PHY register 736 * @phydev: the phy_device struct 737 * @regnum: register number to write 738 * @val: value to write to @regnum 739 * 740 * The caller must have taken the MDIO bus lock. 741 */ 742 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 743 { 744 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 745 val); 746 } 747 748 /** 749 * phy_read_mmd - Convenience function for reading a register 750 * from an MMD on a given PHY. 751 * @phydev: The phy_device struct 752 * @devad: The MMD to read from 753 * @regnum: The register on the MMD to read 754 * 755 * Same rules as for phy_read(); 756 */ 757 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 758 759 /** 760 * __phy_read_mmd - Convenience function for reading a register 761 * from an MMD on a given PHY. 762 * @phydev: The phy_device struct 763 * @devad: The MMD to read from 764 * @regnum: The register on the MMD to read 765 * 766 * Same rules as for __phy_read(); 767 */ 768 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 769 770 /** 771 * phy_write_mmd - Convenience function for writing a register 772 * on an MMD on a given PHY. 773 * @phydev: The phy_device struct 774 * @devad: The MMD to write to 775 * @regnum: The register on the MMD to read 776 * @val: value to write to @regnum 777 * 778 * Same rules as for phy_write(); 779 */ 780 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 781 782 /** 783 * __phy_write_mmd - Convenience function for writing a register 784 * on an MMD on a given PHY. 785 * @phydev: The phy_device struct 786 * @devad: The MMD to write to 787 * @regnum: The register on the MMD to read 788 * @val: value to write to @regnum 789 * 790 * Same rules as for __phy_write(); 791 */ 792 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 793 794 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 795 u16 set); 796 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 797 u16 set); 798 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 799 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 800 801 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 802 u16 mask, u16 set); 803 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 804 u16 mask, u16 set); 805 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 806 u16 mask, u16 set); 807 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 808 u16 mask, u16 set); 809 810 /** 811 * __phy_set_bits - Convenience function for setting bits in a PHY register 812 * @phydev: the phy_device struct 813 * @regnum: register number to write 814 * @val: bits to set 815 * 816 * The caller must have taken the MDIO bus lock. 817 */ 818 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 819 { 820 return __phy_modify(phydev, regnum, 0, val); 821 } 822 823 /** 824 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 825 * @phydev: the phy_device struct 826 * @regnum: register number to write 827 * @val: bits to clear 828 * 829 * The caller must have taken the MDIO bus lock. 830 */ 831 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 832 u16 val) 833 { 834 return __phy_modify(phydev, regnum, val, 0); 835 } 836 837 /** 838 * phy_set_bits - Convenience function for setting bits in a PHY register 839 * @phydev: the phy_device struct 840 * @regnum: register number to write 841 * @val: bits to set 842 */ 843 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 844 { 845 return phy_modify(phydev, regnum, 0, val); 846 } 847 848 /** 849 * phy_clear_bits - Convenience function for clearing bits in a PHY register 850 * @phydev: the phy_device struct 851 * @regnum: register number to write 852 * @val: bits to clear 853 */ 854 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 855 { 856 return phy_modify(phydev, regnum, val, 0); 857 } 858 859 /** 860 * __phy_set_bits_mmd - Convenience function for setting bits in a register 861 * on MMD 862 * @phydev: the phy_device struct 863 * @devad: the MMD containing register to modify 864 * @regnum: register number to modify 865 * @val: bits to set 866 * 867 * The caller must have taken the MDIO bus lock. 868 */ 869 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 870 u32 regnum, u16 val) 871 { 872 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 873 } 874 875 /** 876 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 877 * on MMD 878 * @phydev: the phy_device struct 879 * @devad: the MMD containing register to modify 880 * @regnum: register number to modify 881 * @val: bits to clear 882 * 883 * The caller must have taken the MDIO bus lock. 884 */ 885 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 886 u32 regnum, u16 val) 887 { 888 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 889 } 890 891 /** 892 * phy_set_bits_mmd - Convenience function for setting bits in a register 893 * on MMD 894 * @phydev: the phy_device struct 895 * @devad: the MMD containing register to modify 896 * @regnum: register number to modify 897 * @val: bits to set 898 */ 899 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 900 u32 regnum, u16 val) 901 { 902 return phy_modify_mmd(phydev, devad, regnum, 0, val); 903 } 904 905 /** 906 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 907 * on MMD 908 * @phydev: the phy_device struct 909 * @devad: the MMD containing register to modify 910 * @regnum: register number to modify 911 * @val: bits to clear 912 */ 913 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 914 u32 regnum, u16 val) 915 { 916 return phy_modify_mmd(phydev, devad, regnum, val, 0); 917 } 918 919 /** 920 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 921 * @phydev: the phy_device struct 922 * 923 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 924 * PHY_IGNORE_INTERRUPT 925 */ 926 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 927 { 928 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT; 929 } 930 931 /** 932 * phy_polling_mode - Convenience function for testing whether polling is 933 * used to detect PHY status changes 934 * @phydev: the phy_device struct 935 */ 936 static inline bool phy_polling_mode(struct phy_device *phydev) 937 { 938 return phydev->irq == PHY_POLL; 939 } 940 941 /** 942 * phy_is_internal - Convenience function for testing if a PHY is internal 943 * @phydev: the phy_device struct 944 */ 945 static inline bool phy_is_internal(struct phy_device *phydev) 946 { 947 return phydev->is_internal; 948 } 949 950 /** 951 * phy_interface_mode_is_rgmii - Convenience function for testing if a 952 * PHY interface mode is RGMII (all variants) 953 * @mode: the phy_interface_t enum 954 */ 955 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 956 { 957 return mode >= PHY_INTERFACE_MODE_RGMII && 958 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 959 }; 960 961 /** 962 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z 963 * negotiation 964 * @mode: one of &enum phy_interface_t 965 * 966 * Returns true if the phy interface mode uses the 16-bit negotiation 967 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 968 */ 969 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 970 { 971 return mode == PHY_INTERFACE_MODE_1000BASEX || 972 mode == PHY_INTERFACE_MODE_2500BASEX; 973 } 974 975 /** 976 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 977 * is RGMII (all variants) 978 * @phydev: the phy_device struct 979 */ 980 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 981 { 982 return phy_interface_mode_is_rgmii(phydev->interface); 983 }; 984 985 /* 986 * phy_is_pseudo_fixed_link - Convenience function for testing if this 987 * PHY is the CPU port facing side of an Ethernet switch, or similar. 988 * @phydev: the phy_device struct 989 */ 990 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 991 { 992 return phydev->is_pseudo_fixed_link; 993 } 994 995 int phy_save_page(struct phy_device *phydev); 996 int phy_select_page(struct phy_device *phydev, int page); 997 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 998 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 999 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1000 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1001 u16 mask, u16 set); 1002 1003 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id, 1004 bool is_c45, 1005 struct phy_c45_device_ids *c45_ids); 1006 #if IS_ENABLED(CONFIG_PHYLIB) 1007 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1008 int phy_device_register(struct phy_device *phy); 1009 void phy_device_free(struct phy_device *phydev); 1010 #else 1011 static inline 1012 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1013 { 1014 return NULL; 1015 } 1016 1017 static inline int phy_device_register(struct phy_device *phy) 1018 { 1019 return 0; 1020 } 1021 1022 static inline void phy_device_free(struct phy_device *phydev) { } 1023 #endif /* CONFIG_PHYLIB */ 1024 void phy_device_remove(struct phy_device *phydev); 1025 int phy_init_hw(struct phy_device *phydev); 1026 int phy_suspend(struct phy_device *phydev); 1027 int phy_resume(struct phy_device *phydev); 1028 int __phy_resume(struct phy_device *phydev); 1029 int phy_loopback(struct phy_device *phydev, bool enable); 1030 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1031 phy_interface_t interface); 1032 struct phy_device *phy_find_first(struct mii_bus *bus); 1033 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1034 u32 flags, phy_interface_t interface); 1035 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1036 void (*handler)(struct net_device *), 1037 phy_interface_t interface); 1038 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1039 void (*handler)(struct net_device *), 1040 phy_interface_t interface); 1041 void phy_disconnect(struct phy_device *phydev); 1042 void phy_detach(struct phy_device *phydev); 1043 void phy_start(struct phy_device *phydev); 1044 void phy_stop(struct phy_device *phydev); 1045 int phy_start_aneg(struct phy_device *phydev); 1046 int phy_aneg_done(struct phy_device *phydev); 1047 int phy_speed_down(struct phy_device *phydev, bool sync); 1048 int phy_speed_up(struct phy_device *phydev); 1049 1050 int phy_restart_aneg(struct phy_device *phydev); 1051 int phy_reset_after_clk_enable(struct phy_device *phydev); 1052 1053 static inline void phy_device_reset(struct phy_device *phydev, int value) 1054 { 1055 mdio_device_reset(&phydev->mdio, value); 1056 } 1057 1058 #define phydev_err(_phydev, format, args...) \ 1059 dev_err(&_phydev->mdio.dev, format, ##args) 1060 1061 #define phydev_info(_phydev, format, args...) \ 1062 dev_info(&_phydev->mdio.dev, format, ##args) 1063 1064 #define phydev_warn(_phydev, format, args...) \ 1065 dev_warn(&_phydev->mdio.dev, format, ##args) 1066 1067 #define phydev_dbg(_phydev, format, args...) \ 1068 dev_dbg(&_phydev->mdio.dev, format, ##args) 1069 1070 static inline const char *phydev_name(const struct phy_device *phydev) 1071 { 1072 return dev_name(&phydev->mdio.dev); 1073 } 1074 1075 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1076 __printf(2, 3); 1077 void phy_attached_info(struct phy_device *phydev); 1078 1079 /* Clause 22 PHY */ 1080 int genphy_config_init(struct phy_device *phydev); 1081 int genphy_read_abilities(struct phy_device *phydev); 1082 int genphy_setup_forced(struct phy_device *phydev); 1083 int genphy_restart_aneg(struct phy_device *phydev); 1084 int genphy_config_eee_advert(struct phy_device *phydev); 1085 int genphy_config_aneg(struct phy_device *phydev); 1086 int genphy_aneg_done(struct phy_device *phydev); 1087 int genphy_update_link(struct phy_device *phydev); 1088 int genphy_read_status(struct phy_device *phydev); 1089 int genphy_suspend(struct phy_device *phydev); 1090 int genphy_resume(struct phy_device *phydev); 1091 int genphy_loopback(struct phy_device *phydev, bool enable); 1092 int genphy_soft_reset(struct phy_device *phydev); 1093 static inline int genphy_no_soft_reset(struct phy_device *phydev) 1094 { 1095 return 0; 1096 } 1097 static inline int genphy_no_ack_interrupt(struct phy_device *phydev) 1098 { 1099 return 0; 1100 } 1101 static inline int genphy_no_config_intr(struct phy_device *phydev) 1102 { 1103 return 0; 1104 } 1105 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1106 u16 regnum); 1107 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1108 u16 regnum, u16 val); 1109 1110 /* Clause 45 PHY */ 1111 int genphy_c45_restart_aneg(struct phy_device *phydev); 1112 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1113 int genphy_c45_aneg_done(struct phy_device *phydev); 1114 int genphy_c45_read_link(struct phy_device *phydev); 1115 int genphy_c45_read_lpa(struct phy_device *phydev); 1116 int genphy_c45_read_pma(struct phy_device *phydev); 1117 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1118 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1119 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1120 int genphy_c45_read_mdix(struct phy_device *phydev); 1121 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1122 int genphy_c45_read_status(struct phy_device *phydev); 1123 1124 /* The gen10g_* functions are the old Clause 45 stub */ 1125 int gen10g_config_aneg(struct phy_device *phydev); 1126 1127 static inline int phy_read_status(struct phy_device *phydev) 1128 { 1129 if (!phydev->drv) 1130 return -EIO; 1131 1132 if (phydev->drv->read_status) 1133 return phydev->drv->read_status(phydev); 1134 else 1135 return genphy_read_status(phydev); 1136 } 1137 1138 void phy_driver_unregister(struct phy_driver *drv); 1139 void phy_drivers_unregister(struct phy_driver *drv, int n); 1140 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1141 int phy_drivers_register(struct phy_driver *new_driver, int n, 1142 struct module *owner); 1143 void phy_state_machine(struct work_struct *work); 1144 void phy_mac_interrupt(struct phy_device *phydev); 1145 void phy_start_machine(struct phy_device *phydev); 1146 void phy_stop_machine(struct phy_device *phydev); 1147 int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd); 1148 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1149 struct ethtool_link_ksettings *cmd); 1150 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1151 const struct ethtool_link_ksettings *cmd); 1152 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1153 void phy_request_interrupt(struct phy_device *phydev); 1154 void phy_print_status(struct phy_device *phydev); 1155 int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1156 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1157 void phy_support_sym_pause(struct phy_device *phydev); 1158 void phy_support_asym_pause(struct phy_device *phydev); 1159 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1160 bool autoneg); 1161 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1162 bool phy_validate_pause(struct phy_device *phydev, 1163 struct ethtool_pauseparam *pp); 1164 1165 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1166 int (*run)(struct phy_device *)); 1167 int phy_register_fixup_for_id(const char *bus_id, 1168 int (*run)(struct phy_device *)); 1169 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1170 int (*run)(struct phy_device *)); 1171 1172 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1173 int phy_unregister_fixup_for_id(const char *bus_id); 1174 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1175 1176 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1177 int phy_get_eee_err(struct phy_device *phydev); 1178 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1179 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1180 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1181 void phy_ethtool_get_wol(struct phy_device *phydev, 1182 struct ethtool_wolinfo *wol); 1183 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1184 struct ethtool_link_ksettings *cmd); 1185 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1186 const struct ethtool_link_ksettings *cmd); 1187 int phy_ethtool_nway_reset(struct net_device *ndev); 1188 1189 #if IS_ENABLED(CONFIG_PHYLIB) 1190 int __init mdio_bus_init(void); 1191 void mdio_bus_exit(void); 1192 #endif 1193 1194 /* Inline function for use within net/core/ethtool.c (built-in) */ 1195 static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data) 1196 { 1197 if (!phydev->drv) 1198 return -EIO; 1199 1200 mutex_lock(&phydev->lock); 1201 phydev->drv->get_strings(phydev, data); 1202 mutex_unlock(&phydev->lock); 1203 1204 return 0; 1205 } 1206 1207 static inline int phy_ethtool_get_sset_count(struct phy_device *phydev) 1208 { 1209 int ret; 1210 1211 if (!phydev->drv) 1212 return -EIO; 1213 1214 if (phydev->drv->get_sset_count && 1215 phydev->drv->get_strings && 1216 phydev->drv->get_stats) { 1217 mutex_lock(&phydev->lock); 1218 ret = phydev->drv->get_sset_count(phydev); 1219 mutex_unlock(&phydev->lock); 1220 1221 return ret; 1222 } 1223 1224 return -EOPNOTSUPP; 1225 } 1226 1227 static inline int phy_ethtool_get_stats(struct phy_device *phydev, 1228 struct ethtool_stats *stats, u64 *data) 1229 { 1230 if (!phydev->drv) 1231 return -EIO; 1232 1233 mutex_lock(&phydev->lock); 1234 phydev->drv->get_stats(phydev, stats, data); 1235 mutex_unlock(&phydev->lock); 1236 1237 return 0; 1238 } 1239 1240 extern struct bus_type mdio_bus_type; 1241 1242 struct mdio_board_info { 1243 const char *bus_id; 1244 char modalias[MDIO_NAME_SIZE]; 1245 int mdio_addr; 1246 const void *platform_data; 1247 }; 1248 1249 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1250 int mdiobus_register_board_info(const struct mdio_board_info *info, 1251 unsigned int n); 1252 #else 1253 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1254 unsigned int n) 1255 { 1256 return 0; 1257 } 1258 #endif 1259 1260 1261 /** 1262 * module_phy_driver() - Helper macro for registering PHY drivers 1263 * @__phy_drivers: array of PHY drivers to register 1264 * 1265 * Helper macro for PHY drivers which do not do anything special in module 1266 * init/exit. Each module may only use this macro once, and calling it 1267 * replaces module_init() and module_exit(). 1268 */ 1269 #define phy_module_driver(__phy_drivers, __count) \ 1270 static int __init phy_module_init(void) \ 1271 { \ 1272 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 1273 } \ 1274 module_init(phy_module_init); \ 1275 static void __exit phy_module_exit(void) \ 1276 { \ 1277 phy_drivers_unregister(__phy_drivers, __count); \ 1278 } \ 1279 module_exit(phy_module_exit) 1280 1281 #define module_phy_driver(__phy_drivers) \ 1282 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 1283 1284 bool phy_driver_is_genphy(struct phy_device *phydev); 1285 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 1286 1287 #endif /* __PHY_H */ 1288