1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/leds.h> 18 #include <linux/linkmode.h> 19 #include <linux/netlink.h> 20 #include <linux/mdio.h> 21 #include <linux/mii.h> 22 #include <linux/mii_timestamper.h> 23 #include <linux/module.h> 24 #include <linux/timer.h> 25 #include <linux/workqueue.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/u64_stats_sync.h> 28 #include <linux/irqreturn.h> 29 #include <linux/iopoll.h> 30 #include <linux/refcount.h> 31 32 #include <linux/atomic.h> 33 #include <net/eee.h> 34 35 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 36 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 37 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 38 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 39 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 40 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 41 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init; 42 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap2_features) __ro_after_init; 43 44 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 45 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 46 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 47 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 48 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 49 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 50 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features) 51 #define PHY_EEE_CAP2_FEATURES ((unsigned long *)&phy_eee_cap2_features) 52 53 extern const int phy_basic_ports_array[3]; 54 55 /* 56 * Set phydev->irq to PHY_POLL if interrupts are not supported, 57 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 58 * the attached MAC driver handles the interrupt 59 */ 60 #define PHY_POLL -1 61 #define PHY_MAC_INTERRUPT -2 62 63 #define PHY_IS_INTERNAL 0x00000001 64 #define PHY_RST_AFTER_CLK_EN 0x00000002 65 #define PHY_POLL_CABLE_TEST 0x00000004 66 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008 67 #define MDIO_DEVICE_IS_PHY 0x80000000 68 69 /** 70 * enum phy_interface_t - Interface Mode definitions 71 * 72 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 73 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 74 * @PHY_INTERFACE_MODE_MII: Media-independent interface 75 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 76 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 77 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 78 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 79 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 80 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 81 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 82 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 83 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 84 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 85 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 86 * @PHY_INTERFACE_MODE_SMII: Serial MII 87 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 88 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 89 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 90 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII 91 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 92 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 93 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 94 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 95 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 96 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 97 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 98 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 99 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 100 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 101 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 102 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 103 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 104 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 105 * @PHY_INTERFACE_MODE_10G_QXGMII: 10G-QXGMII - 4 ports over 10G USXGMII 106 * @PHY_INTERFACE_MODE_MAX: Book keeping 107 * 108 * Describes the interface between the MAC and PHY. 109 */ 110 typedef enum { 111 PHY_INTERFACE_MODE_NA, 112 PHY_INTERFACE_MODE_INTERNAL, 113 PHY_INTERFACE_MODE_MII, 114 PHY_INTERFACE_MODE_GMII, 115 PHY_INTERFACE_MODE_SGMII, 116 PHY_INTERFACE_MODE_TBI, 117 PHY_INTERFACE_MODE_REVMII, 118 PHY_INTERFACE_MODE_RMII, 119 PHY_INTERFACE_MODE_REVRMII, 120 PHY_INTERFACE_MODE_RGMII, 121 PHY_INTERFACE_MODE_RGMII_ID, 122 PHY_INTERFACE_MODE_RGMII_RXID, 123 PHY_INTERFACE_MODE_RGMII_TXID, 124 PHY_INTERFACE_MODE_RTBI, 125 PHY_INTERFACE_MODE_SMII, 126 PHY_INTERFACE_MODE_XGMII, 127 PHY_INTERFACE_MODE_XLGMII, 128 PHY_INTERFACE_MODE_MOCA, 129 PHY_INTERFACE_MODE_PSGMII, 130 PHY_INTERFACE_MODE_QSGMII, 131 PHY_INTERFACE_MODE_TRGMII, 132 PHY_INTERFACE_MODE_100BASEX, 133 PHY_INTERFACE_MODE_1000BASEX, 134 PHY_INTERFACE_MODE_2500BASEX, 135 PHY_INTERFACE_MODE_5GBASER, 136 PHY_INTERFACE_MODE_RXAUI, 137 PHY_INTERFACE_MODE_XAUI, 138 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 139 PHY_INTERFACE_MODE_10GBASER, 140 PHY_INTERFACE_MODE_25GBASER, 141 PHY_INTERFACE_MODE_USXGMII, 142 /* 10GBASE-KR - with Clause 73 AN */ 143 PHY_INTERFACE_MODE_10GKR, 144 PHY_INTERFACE_MODE_QUSGMII, 145 PHY_INTERFACE_MODE_1000BASEKX, 146 PHY_INTERFACE_MODE_10G_QXGMII, 147 PHY_INTERFACE_MODE_MAX, 148 } phy_interface_t; 149 150 /* PHY interface mode bitmap handling */ 151 #define DECLARE_PHY_INTERFACE_MASK(name) \ 152 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 153 154 static inline void phy_interface_zero(unsigned long *intf) 155 { 156 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 157 } 158 159 static inline bool phy_interface_empty(const unsigned long *intf) 160 { 161 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 162 } 163 164 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 165 const unsigned long *b) 166 { 167 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 168 } 169 170 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 171 const unsigned long *b) 172 { 173 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 174 } 175 176 static inline void phy_interface_set_rgmii(unsigned long *intf) 177 { 178 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 179 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 180 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 181 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 182 } 183 184 /** 185 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 186 * @interface: enum phy_interface_t value 187 * 188 * Description: maps enum &phy_interface_t defined in this file 189 * into the device tree binding of 'phy-mode', so that Ethernet 190 * device driver can get PHY interface from device tree. 191 */ 192 static inline const char *phy_modes(phy_interface_t interface) 193 { 194 switch (interface) { 195 case PHY_INTERFACE_MODE_NA: 196 return ""; 197 case PHY_INTERFACE_MODE_INTERNAL: 198 return "internal"; 199 case PHY_INTERFACE_MODE_MII: 200 return "mii"; 201 case PHY_INTERFACE_MODE_GMII: 202 return "gmii"; 203 case PHY_INTERFACE_MODE_SGMII: 204 return "sgmii"; 205 case PHY_INTERFACE_MODE_TBI: 206 return "tbi"; 207 case PHY_INTERFACE_MODE_REVMII: 208 return "rev-mii"; 209 case PHY_INTERFACE_MODE_RMII: 210 return "rmii"; 211 case PHY_INTERFACE_MODE_REVRMII: 212 return "rev-rmii"; 213 case PHY_INTERFACE_MODE_RGMII: 214 return "rgmii"; 215 case PHY_INTERFACE_MODE_RGMII_ID: 216 return "rgmii-id"; 217 case PHY_INTERFACE_MODE_RGMII_RXID: 218 return "rgmii-rxid"; 219 case PHY_INTERFACE_MODE_RGMII_TXID: 220 return "rgmii-txid"; 221 case PHY_INTERFACE_MODE_RTBI: 222 return "rtbi"; 223 case PHY_INTERFACE_MODE_SMII: 224 return "smii"; 225 case PHY_INTERFACE_MODE_XGMII: 226 return "xgmii"; 227 case PHY_INTERFACE_MODE_XLGMII: 228 return "xlgmii"; 229 case PHY_INTERFACE_MODE_MOCA: 230 return "moca"; 231 case PHY_INTERFACE_MODE_PSGMII: 232 return "psgmii"; 233 case PHY_INTERFACE_MODE_QSGMII: 234 return "qsgmii"; 235 case PHY_INTERFACE_MODE_TRGMII: 236 return "trgmii"; 237 case PHY_INTERFACE_MODE_1000BASEX: 238 return "1000base-x"; 239 case PHY_INTERFACE_MODE_1000BASEKX: 240 return "1000base-kx"; 241 case PHY_INTERFACE_MODE_2500BASEX: 242 return "2500base-x"; 243 case PHY_INTERFACE_MODE_5GBASER: 244 return "5gbase-r"; 245 case PHY_INTERFACE_MODE_RXAUI: 246 return "rxaui"; 247 case PHY_INTERFACE_MODE_XAUI: 248 return "xaui"; 249 case PHY_INTERFACE_MODE_10GBASER: 250 return "10gbase-r"; 251 case PHY_INTERFACE_MODE_25GBASER: 252 return "25gbase-r"; 253 case PHY_INTERFACE_MODE_USXGMII: 254 return "usxgmii"; 255 case PHY_INTERFACE_MODE_10GKR: 256 return "10gbase-kr"; 257 case PHY_INTERFACE_MODE_100BASEX: 258 return "100base-x"; 259 case PHY_INTERFACE_MODE_QUSGMII: 260 return "qusgmii"; 261 case PHY_INTERFACE_MODE_10G_QXGMII: 262 return "10g-qxgmii"; 263 default: 264 return "unknown"; 265 } 266 } 267 268 /** 269 * rgmii_clock - map link speed to the clock rate 270 * @speed: link speed value 271 * 272 * Description: maps RGMII supported link speeds 273 * into the clock rates. 274 * 275 * Returns: clock rate or negative errno 276 */ 277 static inline long rgmii_clock(int speed) 278 { 279 switch (speed) { 280 case SPEED_10: 281 return 2500000; 282 case SPEED_100: 283 return 25000000; 284 case SPEED_1000: 285 return 125000000; 286 default: 287 return -EINVAL; 288 } 289 } 290 291 #define PHY_MAX_ADDR 32 292 293 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 294 #define PHY_ID_FMT "%s:%02x" 295 296 #define MII_BUS_ID_SIZE 61 297 298 struct device; 299 struct kernel_hwtstamp_config; 300 struct phylink; 301 struct sfp_bus; 302 struct sfp_upstream_ops; 303 struct sk_buff; 304 305 /** 306 * struct mdio_bus_stats - Statistics counters for MDIO busses 307 * @transfers: Total number of transfers, i.e. @writes + @reads 308 * @errors: Number of MDIO transfers that returned an error 309 * @writes: Number of write transfers 310 * @reads: Number of read transfers 311 * @syncp: Synchronisation for incrementing statistics 312 */ 313 struct mdio_bus_stats { 314 u64_stats_t transfers; 315 u64_stats_t errors; 316 u64_stats_t writes; 317 u64_stats_t reads; 318 /* Must be last, add new statistics above */ 319 struct u64_stats_sync syncp; 320 }; 321 322 /** 323 * struct phy_package_shared - Shared information in PHY packages 324 * @base_addr: Base PHY address of PHY package used to combine PHYs 325 * in one package and for offset calculation of phy_package_read/write 326 * @np: Pointer to the Device Node if PHY package defined in DT 327 * @refcnt: Number of PHYs connected to this shared data 328 * @flags: Initialization of PHY package 329 * @priv_size: Size of the shared private data @priv 330 * @priv: Driver private data shared across a PHY package 331 * 332 * Represents a shared structure between different phydev's in the same 333 * package, for example a quad PHY. See phy_package_join() and 334 * phy_package_leave(). 335 */ 336 struct phy_package_shared { 337 u8 base_addr; 338 /* With PHY package defined in DT this points to the PHY package node */ 339 struct device_node *np; 340 refcount_t refcnt; 341 unsigned long flags; 342 size_t priv_size; 343 344 /* private data pointer */ 345 /* note that this pointer is shared between different phydevs and 346 * the user has to take care of appropriate locking. It is allocated 347 * and freed automatically by phy_package_join() and 348 * phy_package_leave(). 349 */ 350 void *priv; 351 }; 352 353 /** 354 * struct mii_bus - Represents an MDIO bus 355 * 356 * @owner: Who owns this device 357 * @name: User friendly name for this MDIO device, or driver name 358 * @id: Unique identifier for this bus, typical from bus hierarchy 359 * @priv: Driver private data 360 * 361 * The Bus class for PHYs. Devices which provide access to 362 * PHYs should register using this structure 363 */ 364 struct mii_bus { 365 struct module *owner; 366 const char *name; 367 char id[MII_BUS_ID_SIZE]; 368 void *priv; 369 /** @read: Perform a read transfer on the bus */ 370 int (*read)(struct mii_bus *bus, int addr, int regnum); 371 /** @write: Perform a write transfer on the bus */ 372 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 373 /** @read_c45: Perform a C45 read transfer on the bus */ 374 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 375 /** @write_c45: Perform a C45 write transfer on the bus */ 376 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 377 int regnum, u16 val); 378 /** @reset: Perform a reset of the bus */ 379 int (*reset)(struct mii_bus *bus); 380 381 /** @stats: Statistic counters per device on the bus */ 382 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 383 384 /** 385 * @mdio_lock: A lock to ensure that only one thing can read/write 386 * the MDIO bus at a time 387 */ 388 struct mutex mdio_lock; 389 390 /** @parent: Parent device of this bus */ 391 struct device *parent; 392 /** @state: State of bus structure */ 393 enum { 394 MDIOBUS_ALLOCATED = 1, 395 MDIOBUS_REGISTERED, 396 MDIOBUS_UNREGISTERED, 397 MDIOBUS_RELEASED, 398 } state; 399 400 /** @dev: Kernel device representation */ 401 struct device dev; 402 403 /** @mdio_map: list of all MDIO devices on bus */ 404 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 405 406 /** @phy_mask: PHY addresses to be ignored when probing */ 407 u32 phy_mask; 408 409 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 410 u32 phy_ignore_ta_mask; 411 412 /** 413 * @irq: An array of interrupts, each PHY's interrupt at the index 414 * matching its address 415 */ 416 int irq[PHY_MAX_ADDR]; 417 418 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 419 int reset_delay_us; 420 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 421 int reset_post_delay_us; 422 /** @reset_gpiod: Reset GPIO descriptor pointer */ 423 struct gpio_desc *reset_gpiod; 424 425 /** @shared_lock: protect access to the shared element */ 426 struct mutex shared_lock; 427 428 /** @shared: shared state across different PHYs */ 429 struct phy_package_shared *shared[PHY_MAX_ADDR]; 430 }; 431 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 432 433 struct mii_bus *mdiobus_alloc_size(size_t size); 434 435 /** 436 * mdiobus_alloc - Allocate an MDIO bus structure 437 * 438 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 439 * for the driver to register the bus. 440 */ 441 static inline struct mii_bus *mdiobus_alloc(void) 442 { 443 return mdiobus_alloc_size(0); 444 } 445 446 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 447 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 448 struct module *owner); 449 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 450 #define devm_mdiobus_register(dev, bus) \ 451 __devm_mdiobus_register(dev, bus, THIS_MODULE) 452 453 void mdiobus_unregister(struct mii_bus *bus); 454 void mdiobus_free(struct mii_bus *bus); 455 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 456 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 457 { 458 return devm_mdiobus_alloc_size(dev, 0); 459 } 460 461 struct mii_bus *mdio_find_bus(const char *mdio_name); 462 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); 463 464 #define PHY_INTERRUPT_DISABLED false 465 #define PHY_INTERRUPT_ENABLED true 466 467 /** 468 * enum phy_state - PHY state machine states: 469 * 470 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 471 * should be called if and only if the PHY is in this state, 472 * given that the PHY device exists. 473 * - PHY driver probe function will set the state to @PHY_READY 474 * 475 * @PHY_READY: PHY is ready to send and receive packets, but the 476 * controller is not. By default, PHYs which do not implement 477 * probe will be set to this state by phy_probe(). 478 * - start will set the state to UP 479 * 480 * @PHY_UP: The PHY and attached device are ready to do work. 481 * Interrupts should be started here. 482 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 483 * 484 * @PHY_NOLINK: PHY is up, but not currently plugged in. 485 * - irq or timer will set @PHY_RUNNING if link comes back 486 * - phy_stop moves to @PHY_HALTED 487 * 488 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 489 * and/or receiving packets 490 * - irq or timer will set @PHY_NOLINK if link goes down 491 * - phy_stop moves to @PHY_HALTED 492 * 493 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 494 * is not expected to work, carrier will be indicated as down. PHY will be 495 * poll once per second, or on interrupt for it current state. 496 * Once complete, move to UP to restart the PHY. 497 * - phy_stop aborts the running test and moves to @PHY_HALTED 498 * 499 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. 500 * - phy_start moves to @PHY_UP 501 * 502 * @PHY_ERROR: PHY is up, but is in an error state. 503 * - phy_stop moves to @PHY_HALTED 504 */ 505 enum phy_state { 506 PHY_DOWN = 0, 507 PHY_READY, 508 PHY_HALTED, 509 PHY_ERROR, 510 PHY_UP, 511 PHY_RUNNING, 512 PHY_NOLINK, 513 PHY_CABLETEST, 514 }; 515 516 #define MDIO_MMD_NUM 32 517 518 /** 519 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 520 * @devices_in_package: IEEE 802.3 devices in package register value. 521 * @mmds_present: bit vector of MMDs present. 522 * @device_ids: The device identifer for each present device. 523 */ 524 struct phy_c45_device_ids { 525 u32 devices_in_package; 526 u32 mmds_present; 527 u32 device_ids[MDIO_MMD_NUM]; 528 }; 529 530 struct macsec_context; 531 struct macsec_ops; 532 533 /** 534 * struct phy_device - An instance of a PHY 535 * 536 * @mdio: MDIO bus this PHY is on 537 * @drv: Pointer to the driver for this PHY instance 538 * @devlink: Create a link between phy dev and mac dev, if the external phy 539 * used by current mac interface is managed by another mac interface. 540 * @phyindex: Unique id across the phy's parent tree of phys to address the PHY 541 * from userspace, similar to ifindex. A zero index means the PHY 542 * wasn't assigned an id yet. 543 * @phy_id: UID for this device found during discovery 544 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 545 * @is_c45: Set to true if this PHY uses clause 45 addressing. 546 * @is_internal: Set to true if this PHY is internal to a MAC. 547 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 548 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 549 * @has_fixups: Set to true if this PHY has fixups/quirks. 550 * @suspended: Set to true if this PHY has been suspended successfully. 551 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 552 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 553 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 554 * @downshifted_rate: Set true if link speed has been downshifted. 555 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 556 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 557 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN 558 * enabled. 559 * @state: State of the PHY for management purposes 560 * @dev_flags: Device-specific flags used by the PHY driver. 561 * 562 * - Bits [15:0] are free to use by the PHY driver to communicate 563 * driver specific behavior. 564 * - Bits [23:16] are currently reserved for future use. 565 * - Bits [31:24] are reserved for defining generic 566 * PHY driver behavior. 567 * @irq: IRQ number of the PHY's interrupt (-1 if none) 568 * @phylink: Pointer to phylink instance for this PHY 569 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 570 * @sfp_bus: SFP bus attached to this PHY's fiber port 571 * @attached_dev: The attached enet driver's device instance ptr 572 * @adjust_link: Callback for the enet controller to respond to changes: in the 573 * link state. 574 * @phy_link_change: Callback for phylink for notification of link change 575 * @macsec_ops: MACsec offloading ops. 576 * 577 * @speed: Current link speed 578 * @duplex: Current duplex 579 * @port: Current port 580 * @pause: Current pause 581 * @asym_pause: Current asymmetric pause 582 * @supported: Combined MAC/PHY supported linkmodes 583 * @advertising: Currently advertised linkmodes 584 * @adv_old: Saved advertised while power saving for WoL 585 * @supported_eee: supported PHY EEE linkmodes 586 * @advertising_eee: Currently advertised EEE linkmodes 587 * @enable_tx_lpi: When True, MAC should transmit LPI to PHY 588 * @eee_active: phylib private state, indicating that EEE has been negotiated 589 * @eee_cfg: User configuration of EEE 590 * @lp_advertising: Current link partner advertised linkmodes 591 * @host_interfaces: PHY interface modes supported by host 592 * @eee_disabled_modes: Energy efficient ethernet modes not to be advertised 593 * @autoneg: Flag autoneg being used 594 * @rate_matching: Current rate matching mode 595 * @link: Current link state 596 * @autoneg_complete: Flag auto negotiation of the link has completed 597 * @mdix: Current crossover 598 * @mdix_ctrl: User setting of crossover 599 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 600 * @interrupts: Flag interrupts have been enabled 601 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 602 * handling shall be postponed until PHY has resumed 603 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 604 * requiring a rerun of the interrupt handler after resume 605 * @default_timestamp: Flag indicating whether we are using the phy 606 * timestamp as the default one 607 * @interface: enum phy_interface_t value 608 * @possible_interfaces: bitmap if interface modes that the attached PHY 609 * will switch between depending on media speed. 610 * @skb: Netlink message for cable diagnostics 611 * @nest: Netlink nest used for cable diagnostics 612 * @ehdr: nNtlink header for cable diagnostics 613 * @phy_led_triggers: Array of LED triggers 614 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 615 * @led_link_trigger: LED trigger for link up/down 616 * @last_triggered: last LED trigger for link speed 617 * @leds: list of PHY LED structures 618 * @master_slave_set: User requested master/slave configuration 619 * @master_slave_get: Current master/slave advertisement 620 * @master_slave_state: Current master/slave configuration 621 * @mii_ts: Pointer to time stamper callbacks 622 * @psec: Pointer to Power Sourcing Equipment control struct 623 * @lock: Mutex for serialization access to PHY 624 * @state_queue: Work queue for state machine 625 * @link_down_events: Number of times link was lost 626 * @shared: Pointer to private data shared by phys in one package 627 * @priv: Pointer to driver private data 628 * 629 * interrupts currently only supports enabled or disabled, 630 * but could be changed in the future to support enabling 631 * and disabling specific interrupts 632 * 633 * Contains some infrastructure for polling and interrupt 634 * handling, as well as handling shifts in PHY hardware state 635 */ 636 struct phy_device { 637 struct mdio_device mdio; 638 639 /* Information about the PHY type */ 640 /* And management functions */ 641 const struct phy_driver *drv; 642 643 struct device_link *devlink; 644 645 u32 phyindex; 646 u32 phy_id; 647 648 struct phy_c45_device_ids c45_ids; 649 unsigned is_c45:1; 650 unsigned is_internal:1; 651 unsigned is_pseudo_fixed_link:1; 652 unsigned is_gigabit_capable:1; 653 unsigned has_fixups:1; 654 unsigned suspended:1; 655 unsigned suspended_by_mdio_bus:1; 656 unsigned sysfs_links:1; 657 unsigned loopback_enabled:1; 658 unsigned downshifted_rate:1; 659 unsigned is_on_sfp_module:1; 660 unsigned mac_managed_pm:1; 661 unsigned wol_enabled:1; 662 663 unsigned autoneg:1; 664 /* The most recently read link state */ 665 unsigned link:1; 666 unsigned autoneg_complete:1; 667 668 /* Interrupts are enabled */ 669 unsigned interrupts:1; 670 unsigned irq_suspended:1; 671 unsigned irq_rerun:1; 672 673 unsigned default_timestamp:1; 674 675 int rate_matching; 676 677 enum phy_state state; 678 679 u32 dev_flags; 680 681 phy_interface_t interface; 682 DECLARE_PHY_INTERFACE_MASK(possible_interfaces); 683 684 /* 685 * forced speed & duplex (no autoneg) 686 * partner speed & duplex & pause (autoneg) 687 */ 688 int speed; 689 int duplex; 690 int port; 691 int pause; 692 int asym_pause; 693 u8 master_slave_get; 694 u8 master_slave_set; 695 u8 master_slave_state; 696 697 /* Union of PHY and Attached devices' supported link modes */ 698 /* See ethtool.h for more info */ 699 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 700 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 701 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 702 /* used with phy_speed_down */ 703 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 704 /* used for eee validation and configuration*/ 705 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee); 706 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee); 707 /* Energy efficient ethernet modes which should be prohibited */ 708 __ETHTOOL_DECLARE_LINK_MODE_MASK(eee_disabled_modes); 709 bool enable_tx_lpi; 710 bool eee_active; 711 struct eee_config eee_cfg; 712 713 /* Host supported PHY interface types. Should be ignored if empty. */ 714 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 715 716 #ifdef CONFIG_LED_TRIGGER_PHY 717 struct phy_led_trigger *phy_led_triggers; 718 unsigned int phy_num_led_triggers; 719 struct phy_led_trigger *last_triggered; 720 721 struct phy_led_trigger *led_link_trigger; 722 #endif 723 struct list_head leds; 724 725 /* 726 * Interrupt number for this PHY 727 * -1 means no interrupt 728 */ 729 int irq; 730 731 /* private data pointer */ 732 /* For use by PHYs to maintain extra state */ 733 void *priv; 734 735 /* shared data pointer */ 736 /* For use by PHYs inside the same package that need a shared state. */ 737 struct phy_package_shared *shared; 738 739 /* Reporting cable test results */ 740 struct sk_buff *skb; 741 void *ehdr; 742 struct nlattr *nest; 743 744 /* Interrupt and Polling infrastructure */ 745 struct delayed_work state_queue; 746 747 struct mutex lock; 748 749 /* This may be modified under the rtnl lock */ 750 bool sfp_bus_attached; 751 struct sfp_bus *sfp_bus; 752 struct phylink *phylink; 753 struct net_device *attached_dev; 754 struct mii_timestamper *mii_ts; 755 struct pse_control *psec; 756 757 u8 mdix; 758 u8 mdix_ctrl; 759 760 int pma_extable; 761 762 unsigned int link_down_events; 763 764 void (*phy_link_change)(struct phy_device *phydev, bool up); 765 void (*adjust_link)(struct net_device *dev); 766 767 #if IS_ENABLED(CONFIG_MACSEC) 768 /* MACsec management functions */ 769 const struct macsec_ops *macsec_ops; 770 #endif 771 }; 772 773 /* Generic phy_device::dev_flags */ 774 #define PHY_F_NO_IRQ 0x80000000 775 #define PHY_F_RXC_ALWAYS_ON 0x40000000 776 777 static inline struct phy_device *to_phy_device(const struct device *dev) 778 { 779 return container_of(to_mdio_device(dev), struct phy_device, mdio); 780 } 781 782 /** 783 * struct phy_tdr_config - Configuration of a TDR raw test 784 * 785 * @first: Distance for first data collection point 786 * @last: Distance for last data collection point 787 * @step: Step between data collection points 788 * @pair: Bitmap of cable pairs to collect data for 789 * 790 * A structure containing possible configuration parameters 791 * for a TDR cable test. The driver does not need to implement 792 * all the parameters, but should report what is actually used. 793 * All distances are in centimeters. 794 */ 795 struct phy_tdr_config { 796 u32 first; 797 u32 last; 798 u32 step; 799 s8 pair; 800 }; 801 #define PHY_PAIR_ALL -1 802 803 /** 804 * enum link_inband_signalling - in-band signalling modes that are supported 805 * 806 * @LINK_INBAND_DISABLE: in-band signalling can be disabled 807 * @LINK_INBAND_ENABLE: in-band signalling can be enabled without bypass 808 * @LINK_INBAND_BYPASS: in-band signalling can be enabled with bypass 809 * 810 * The possible and required bits can only be used if the valid bit is set. 811 * If possible is clear, that means inband signalling can not be used. 812 * Required is only valid when possible is set, and means that inband 813 * signalling must be used. 814 */ 815 enum link_inband_signalling { 816 LINK_INBAND_DISABLE = BIT(0), 817 LINK_INBAND_ENABLE = BIT(1), 818 LINK_INBAND_BYPASS = BIT(2), 819 }; 820 821 /** 822 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 823 * Avoidance) Reconciliation Sublayer. 824 * 825 * @version: read-only PLCA register map version. -1 = not available. Ignored 826 * when setting the configuration. Format is the same as reported by the PLCA 827 * IDVER register (31.CA00). -1 = not available. 828 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 829 * set. 0 = disabled, anything else = enabled. 830 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 831 * Allowed values [0 .. 254]. 255 = node disabled. 832 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 833 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 834 * set. Allowed values [1 .. 255]. 835 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 836 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 837 * more details. The to_timer shall be set equal over all nodes. 838 * -1 = not available / don't set. Allowed values [0 .. 255]. 839 * @burst_cnt: controls how many additional frames a node is allowed to send in 840 * single transmit opportunity (TO). The default value of 0 means that the 841 * node is allowed exactly one frame per TO. A value of 1 allows two frames 842 * per TO, and so on. -1 = not available / don't set. 843 * Allowed values [0 .. 255]. 844 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 845 * frame before interrupting the burst. This value should be set to a value 846 * greater than the MAC inter-packet gap (which is typically 96 bits). 847 * -1 = not available / don't set. Allowed values [0 .. 255]. 848 * 849 * A structure containing configuration parameters for setting/getting the PLCA 850 * RS configuration. The driver does not need to implement all the parameters, 851 * but should report what is actually used. 852 */ 853 struct phy_plca_cfg { 854 int version; 855 int enabled; 856 int node_id; 857 int node_cnt; 858 int to_tmr; 859 int burst_cnt; 860 int burst_tmr; 861 }; 862 863 /** 864 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 865 * Avoidance) Reconciliation Sublayer. 866 * 867 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 868 * register(31.CA03), indicating BEACON activity. 869 * 870 * A structure containing status information of the PLCA RS configuration. 871 * The driver does not need to implement all the parameters, but should report 872 * what is actually used. 873 */ 874 struct phy_plca_status { 875 bool pst; 876 }; 877 878 /* Modes for PHY LED configuration */ 879 enum phy_led_modes { 880 PHY_LED_ACTIVE_HIGH = 0, 881 PHY_LED_ACTIVE_LOW = 1, 882 PHY_LED_INACTIVE_HIGH_IMPEDANCE = 2, 883 884 /* keep it last */ 885 __PHY_LED_MODES_NUM, 886 }; 887 888 /** 889 * struct phy_led: An LED driven by the PHY 890 * 891 * @list: List of LEDs 892 * @phydev: PHY this LED is attached to 893 * @led_cdev: Standard LED class structure 894 * @index: Number of the LED 895 */ 896 struct phy_led { 897 struct list_head list; 898 struct phy_device *phydev; 899 struct led_classdev led_cdev; 900 u8 index; 901 }; 902 903 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev) 904 905 /** 906 * struct phy_driver - Driver structure for a particular PHY type 907 * 908 * @mdiodrv: Data common to all MDIO devices 909 * @phy_id: The result of reading the UID registers of this PHY 910 * type, and ANDing them with the phy_id_mask. This driver 911 * only works for PHYs with IDs which match this field 912 * @name: The friendly name of this PHY type 913 * @phy_id_mask: Defines the important bits of the phy_id 914 * @features: A mandatory list of features (speed, duplex, etc) 915 * supported by this PHY 916 * @flags: A bitfield defining certain other features this PHY 917 * supports (like interrupts) 918 * @driver_data: Static driver data 919 * 920 * All functions are optional. If config_aneg or read_status 921 * are not implemented, the phy core uses the genphy versions. 922 * Note that none of these functions should be called from 923 * interrupt time. The goal is for the bus read/write functions 924 * to be able to block when the bus transaction is happening, 925 * and be freed up by an interrupt (The MPC85xx has this ability, 926 * though it is not currently supported in the driver). 927 */ 928 struct phy_driver { 929 struct mdio_driver_common mdiodrv; 930 u32 phy_id; 931 char *name; 932 u32 phy_id_mask; 933 const unsigned long * const features; 934 u32 flags; 935 const void *driver_data; 936 937 /** 938 * @soft_reset: Called to issue a PHY software reset 939 */ 940 int (*soft_reset)(struct phy_device *phydev); 941 942 /** 943 * @config_init: Called to initialize the PHY, 944 * including after a reset 945 */ 946 int (*config_init)(struct phy_device *phydev); 947 948 /** 949 * @probe: Called during discovery. Used to set 950 * up device-specific structures, if any 951 */ 952 int (*probe)(struct phy_device *phydev); 953 954 /** 955 * @get_features: Probe the hardware to determine what 956 * abilities it has. Should only set phydev->supported. 957 */ 958 int (*get_features)(struct phy_device *phydev); 959 960 /** 961 * @inband_caps: query whether in-band is supported for the given PHY 962 * interface mode. Returns a bitmask of bits defined by enum 963 * link_inband_signalling. 964 */ 965 unsigned int (*inband_caps)(struct phy_device *phydev, 966 phy_interface_t interface); 967 968 /** 969 * @config_inband: configure in-band mode for the PHY 970 */ 971 int (*config_inband)(struct phy_device *phydev, unsigned int modes); 972 973 /** 974 * @get_rate_matching: Get the supported type of rate matching for a 975 * particular phy interface. This is used by phy consumers to determine 976 * whether to advertise lower-speed modes for that interface. It is 977 * assumed that if a rate matching mode is supported on an interface, 978 * then that interface's rate can be adapted to all slower link speeds 979 * supported by the phy. If the interface is not supported, this should 980 * return %RATE_MATCH_NONE. 981 */ 982 int (*get_rate_matching)(struct phy_device *phydev, 983 phy_interface_t iface); 984 985 /* PHY Power Management */ 986 /** @suspend: Suspend the hardware, saving state if needed */ 987 int (*suspend)(struct phy_device *phydev); 988 /** @resume: Resume the hardware, restoring state if needed */ 989 int (*resume)(struct phy_device *phydev); 990 991 /** 992 * @config_aneg: Configures the advertisement and resets 993 * autonegotiation if phydev->autoneg is on, 994 * forces the speed to the current settings in phydev 995 * if phydev->autoneg is off 996 */ 997 int (*config_aneg)(struct phy_device *phydev); 998 999 /** @aneg_done: Determines the auto negotiation result */ 1000 int (*aneg_done)(struct phy_device *phydev); 1001 1002 /** @read_status: Determines the negotiated speed and duplex */ 1003 int (*read_status)(struct phy_device *phydev); 1004 1005 /** 1006 * @config_intr: Enables or disables interrupts. 1007 * It should also clear any pending interrupts prior to enabling the 1008 * IRQs and after disabling them. 1009 */ 1010 int (*config_intr)(struct phy_device *phydev); 1011 1012 /** @handle_interrupt: Override default interrupt handling */ 1013 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 1014 1015 /** @remove: Clears up any memory if needed */ 1016 void (*remove)(struct phy_device *phydev); 1017 1018 /** 1019 * @match_phy_device: Returns true if this is a suitable 1020 * driver for the given phydev. If NULL, matching is based on 1021 * phy_id and phy_id_mask. 1022 */ 1023 int (*match_phy_device)(struct phy_device *phydev); 1024 1025 /** 1026 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 1027 * register changes to enable Wake on LAN, so set_wol is 1028 * provided to be called in the ethernet driver's set_wol 1029 * function. 1030 */ 1031 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1032 1033 /** 1034 * @get_wol: See set_wol, but for checking whether Wake on LAN 1035 * is enabled. 1036 */ 1037 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1038 1039 /** 1040 * @link_change_notify: Called to inform a PHY device driver 1041 * when the core is about to change the link state. This 1042 * callback is supposed to be used as fixup hook for drivers 1043 * that need to take action when the link state 1044 * changes. Drivers are by no means allowed to mess with the 1045 * PHY device structure in their implementations. 1046 */ 1047 void (*link_change_notify)(struct phy_device *dev); 1048 1049 /** 1050 * @read_mmd: PHY specific driver override for reading a MMD 1051 * register. This function is optional for PHY specific 1052 * drivers. When not provided, the default MMD read function 1053 * will be used by phy_read_mmd(), which will use either a 1054 * direct read for Clause 45 PHYs or an indirect read for 1055 * Clause 22 PHYs. devnum is the MMD device number within the 1056 * PHY device, regnum is the register within the selected MMD 1057 * device. 1058 */ 1059 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 1060 1061 /** 1062 * @write_mmd: PHY specific driver override for writing a MMD 1063 * register. This function is optional for PHY specific 1064 * drivers. When not provided, the default MMD write function 1065 * will be used by phy_write_mmd(), which will use either a 1066 * direct write for Clause 45 PHYs, or an indirect write for 1067 * Clause 22 PHYs. devnum is the MMD device number within the 1068 * PHY device, regnum is the register within the selected MMD 1069 * device. val is the value to be written. 1070 */ 1071 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 1072 u16 val); 1073 1074 /** @read_page: Return the current PHY register page number */ 1075 int (*read_page)(struct phy_device *dev); 1076 /** @write_page: Set the current PHY register page number */ 1077 int (*write_page)(struct phy_device *dev, int page); 1078 1079 /** 1080 * @module_info: Get the size and type of the eeprom contained 1081 * within a plug-in module 1082 */ 1083 int (*module_info)(struct phy_device *dev, 1084 struct ethtool_modinfo *modinfo); 1085 1086 /** 1087 * @module_eeprom: Get the eeprom information from the plug-in 1088 * module 1089 */ 1090 int (*module_eeprom)(struct phy_device *dev, 1091 struct ethtool_eeprom *ee, u8 *data); 1092 1093 /** @cable_test_start: Start a cable test */ 1094 int (*cable_test_start)(struct phy_device *dev); 1095 1096 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1097 int (*cable_test_tdr_start)(struct phy_device *dev, 1098 const struct phy_tdr_config *config); 1099 1100 /** 1101 * @cable_test_get_status: Once per second, or on interrupt, 1102 * request the status of the test. 1103 */ 1104 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1105 1106 /* Get statistics from the PHY using ethtool */ 1107 /** 1108 * @get_phy_stats: Retrieve PHY statistics. 1109 * @dev: The PHY device for which the statistics are retrieved. 1110 * @eth_stats: structure where Ethernet PHY stats will be stored. 1111 * @stats: structure where additional PHY-specific stats will be stored. 1112 * 1113 * Retrieves the supported PHY statistics and populates the provided 1114 * structures. The input structures are pre-initialized with 1115 * `ETHTOOL_STAT_NOT_SET`, and the driver must only modify members 1116 * corresponding to supported statistics. Unmodified members will remain 1117 * set to `ETHTOOL_STAT_NOT_SET` and will not be returned to userspace. 1118 */ 1119 void (*get_phy_stats)(struct phy_device *dev, 1120 struct ethtool_eth_phy_stats *eth_stats, 1121 struct ethtool_phy_stats *stats); 1122 1123 /** 1124 * @get_link_stats: Retrieve link statistics. 1125 * @dev: The PHY device for which the statistics are retrieved. 1126 * @link_stats: structure where link-specific stats will be stored. 1127 * 1128 * Retrieves link-related statistics for the given PHY device. The input 1129 * structure is pre-initialized with `ETHTOOL_STAT_NOT_SET`, and the 1130 * driver must only modify members corresponding to supported 1131 * statistics. Unmodified members will remain set to 1132 * `ETHTOOL_STAT_NOT_SET` and will not be returned to userspace. 1133 */ 1134 void (*get_link_stats)(struct phy_device *dev, 1135 struct ethtool_link_ext_stats *link_stats); 1136 1137 /** 1138 * @update_stats: Trigger periodic statistics updates. 1139 * @dev: The PHY device for which statistics updates are triggered. 1140 * 1141 * Periodically gathers statistics from the PHY device to update locally 1142 * maintained 64-bit counters. This is necessary for PHYs that implement 1143 * reduced-width counters (e.g., 16-bit or 32-bit) which can overflow 1144 * more frequently compared to 64-bit counters. By invoking this 1145 * callback, drivers can fetch the current counter values, handle 1146 * overflow detection, and accumulate the results into local 64-bit 1147 * counters for accurate reporting through the `get_phy_stats` and 1148 * `get_link_stats` interfaces. 1149 * 1150 * Return: 0 on success or a negative error code on failure. 1151 */ 1152 int (*update_stats)(struct phy_device *dev); 1153 1154 /** @get_sset_count: Number of statistic counters */ 1155 int (*get_sset_count)(struct phy_device *dev); 1156 /** @get_strings: Names of the statistic counters */ 1157 void (*get_strings)(struct phy_device *dev, u8 *data); 1158 /** @get_stats: Return the statistic counter values */ 1159 void (*get_stats)(struct phy_device *dev, 1160 struct ethtool_stats *stats, u64 *data); 1161 1162 /* Get and Set PHY tunables */ 1163 /** @get_tunable: Return the value of a tunable */ 1164 int (*get_tunable)(struct phy_device *dev, 1165 struct ethtool_tunable *tuna, void *data); 1166 /** @set_tunable: Set the value of a tunable */ 1167 int (*set_tunable)(struct phy_device *dev, 1168 struct ethtool_tunable *tuna, 1169 const void *data); 1170 /** @set_loopback: Set the loopback mood of the PHY */ 1171 int (*set_loopback)(struct phy_device *dev, bool enable); 1172 /** @get_sqi: Get the signal quality indication */ 1173 int (*get_sqi)(struct phy_device *dev); 1174 /** @get_sqi_max: Get the maximum signal quality indication */ 1175 int (*get_sqi_max)(struct phy_device *dev); 1176 1177 /* PLCA RS interface */ 1178 /** @get_plca_cfg: Return the current PLCA configuration */ 1179 int (*get_plca_cfg)(struct phy_device *dev, 1180 struct phy_plca_cfg *plca_cfg); 1181 /** @set_plca_cfg: Set the PLCA configuration */ 1182 int (*set_plca_cfg)(struct phy_device *dev, 1183 const struct phy_plca_cfg *plca_cfg); 1184 /** @get_plca_status: Return the current PLCA status info */ 1185 int (*get_plca_status)(struct phy_device *dev, 1186 struct phy_plca_status *plca_st); 1187 1188 /** 1189 * @led_brightness_set: Set a PHY LED brightness. Index 1190 * indicates which of the PHYs led should be set. Value 1191 * follows the standard LED class meaning, e.g. LED_OFF, 1192 * LED_HALF, LED_FULL. 1193 */ 1194 int (*led_brightness_set)(struct phy_device *dev, 1195 u8 index, enum led_brightness value); 1196 1197 /** 1198 * @led_blink_set: Set a PHY LED blinking. Index indicates 1199 * which of the PHYs led should be configured to blink. Delays 1200 * are in milliseconds and if both are zero then a sensible 1201 * default should be chosen. The call should adjust the 1202 * timings in that case and if it can't match the values 1203 * specified exactly. 1204 */ 1205 int (*led_blink_set)(struct phy_device *dev, u8 index, 1206 unsigned long *delay_on, 1207 unsigned long *delay_off); 1208 /** 1209 * @led_hw_is_supported: Can the HW support the given rules. 1210 * @dev: PHY device which has the LED 1211 * @index: Which LED of the PHY device 1212 * @rules The core is interested in these rules 1213 * 1214 * Return 0 if yes, -EOPNOTSUPP if not, or an error code. 1215 */ 1216 int (*led_hw_is_supported)(struct phy_device *dev, u8 index, 1217 unsigned long rules); 1218 /** 1219 * @led_hw_control_set: Set the HW to control the LED 1220 * @dev: PHY device which has the LED 1221 * @index: Which LED of the PHY device 1222 * @rules The rules used to control the LED 1223 * 1224 * Returns 0, or a an error code. 1225 */ 1226 int (*led_hw_control_set)(struct phy_device *dev, u8 index, 1227 unsigned long rules); 1228 /** 1229 * @led_hw_control_get: Get how the HW is controlling the LED 1230 * @dev: PHY device which has the LED 1231 * @index: Which LED of the PHY device 1232 * @rules Pointer to the rules used to control the LED 1233 * 1234 * Set *@rules to how the HW is currently blinking. Returns 0 1235 * on success, or a error code if the current blinking cannot 1236 * be represented in rules, or some other error happens. 1237 */ 1238 int (*led_hw_control_get)(struct phy_device *dev, u8 index, 1239 unsigned long *rules); 1240 1241 /** 1242 * @led_polarity_set: Set the LED polarity modes 1243 * @dev: PHY device which has the LED 1244 * @index: Which LED of the PHY device 1245 * @modes: bitmap of LED polarity modes 1246 * 1247 * Configure LED with all the required polarity modes in @modes 1248 * to make it correctly turn ON or OFF. 1249 * 1250 * Returns 0, or an error code. 1251 */ 1252 int (*led_polarity_set)(struct phy_device *dev, int index, 1253 unsigned long modes); 1254 1255 /** 1256 * @get_next_update_time: Get the time until the next update event 1257 * @dev: PHY device 1258 * 1259 * Callback to determine the time (in jiffies) until the next 1260 * update event for the PHY state machine. Allows PHY drivers to 1261 * dynamically adjust polling intervals based on link state or other 1262 * conditions. 1263 * 1264 * Returns the time in jiffies until the next update event. 1265 */ 1266 unsigned int (*get_next_update_time)(struct phy_device *dev); 1267 }; 1268 #define to_phy_driver(d) container_of_const(to_mdio_common_driver(d), \ 1269 struct phy_driver, mdiodrv) 1270 1271 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 1272 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 1273 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 1274 1275 /** 1276 * phy_id_compare - compare @id1 with @id2 taking account of @mask 1277 * @id1: first PHY ID 1278 * @id2: second PHY ID 1279 * @mask: the PHY ID mask, set bits are significant in matching 1280 * 1281 * Return true if the bits from @id1 and @id2 specified by @mask match. 1282 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask). 1283 */ 1284 static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask) 1285 { 1286 return !((id1 ^ id2) & mask); 1287 } 1288 1289 /** 1290 * phydev_id_compare - compare @id with the PHY's Clause 22 ID 1291 * @phydev: the PHY device 1292 * @id: the PHY ID to be matched 1293 * 1294 * Compare the @phydev clause 22 ID with the provided @id and return true or 1295 * false depending whether it matches, using the bound driver mask. The 1296 * @phydev must be bound to a driver. 1297 */ 1298 static inline bool phydev_id_compare(struct phy_device *phydev, u32 id) 1299 { 1300 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask); 1301 } 1302 1303 const char *phy_speed_to_str(int speed); 1304 const char *phy_duplex_to_str(unsigned int duplex); 1305 const char *phy_rate_matching_to_str(int rate_matching); 1306 1307 int phy_interface_num_ports(phy_interface_t interface); 1308 1309 /* A structure for mapping a particular speed and duplex 1310 * combination to a particular SUPPORTED and ADVERTISED value 1311 */ 1312 struct phy_setting { 1313 u32 speed; 1314 u8 duplex; 1315 u8 bit; 1316 }; 1317 1318 const struct phy_setting * 1319 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 1320 bool exact); 1321 size_t phy_speeds(unsigned int *speeds, size_t size, 1322 unsigned long *mask); 1323 1324 /** 1325 * phy_is_started - Convenience function to check whether PHY is started 1326 * @phydev: The phy_device struct 1327 */ 1328 static inline bool phy_is_started(struct phy_device *phydev) 1329 { 1330 return phydev->state >= PHY_UP; 1331 } 1332 1333 /** 1334 * phy_disable_eee_mode - Don't advertise an EEE mode. 1335 * @phydev: The phy_device struct 1336 * @link_mode: The EEE mode to be disabled 1337 */ 1338 static inline void phy_disable_eee_mode(struct phy_device *phydev, u32 link_mode) 1339 { 1340 WARN_ON(phy_is_started(phydev)); 1341 1342 linkmode_set_bit(link_mode, phydev->eee_disabled_modes); 1343 linkmode_clear_bit(link_mode, phydev->advertising_eee); 1344 } 1345 1346 void phy_resolve_aneg_pause(struct phy_device *phydev); 1347 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1348 1349 /** 1350 * phy_read - Convenience function for reading a given PHY register 1351 * @phydev: the phy_device struct 1352 * @regnum: register number to read 1353 * 1354 * NOTE: MUST NOT be called from interrupt context, 1355 * because the bus read/write functions may wait for an interrupt 1356 * to conclude the operation. 1357 */ 1358 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1359 { 1360 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1361 } 1362 1363 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1364 timeout_us, sleep_before_read) \ 1365 ({ \ 1366 int __ret, __val; \ 1367 __ret = read_poll_timeout(__val = phy_read, val, \ 1368 __val < 0 || (cond), \ 1369 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1370 if (__val < 0) \ 1371 __ret = __val; \ 1372 if (__ret) \ 1373 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1374 __ret; \ 1375 }) 1376 1377 /** 1378 * __phy_read - convenience function for reading a given PHY register 1379 * @phydev: the phy_device struct 1380 * @regnum: register number to read 1381 * 1382 * The caller must have taken the MDIO bus lock. 1383 */ 1384 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1385 { 1386 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1387 } 1388 1389 /** 1390 * phy_write - Convenience function for writing a given PHY register 1391 * @phydev: the phy_device struct 1392 * @regnum: register number to write 1393 * @val: value to write to @regnum 1394 * 1395 * NOTE: MUST NOT be called from interrupt context, 1396 * because the bus read/write functions may wait for an interrupt 1397 * to conclude the operation. 1398 */ 1399 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1400 { 1401 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1402 } 1403 1404 /** 1405 * __phy_write - Convenience function for writing a given PHY register 1406 * @phydev: the phy_device struct 1407 * @regnum: register number to write 1408 * @val: value to write to @regnum 1409 * 1410 * The caller must have taken the MDIO bus lock. 1411 */ 1412 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1413 { 1414 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1415 val); 1416 } 1417 1418 /** 1419 * __phy_modify_changed() - Convenience function for modifying a PHY register 1420 * @phydev: a pointer to a &struct phy_device 1421 * @regnum: register number 1422 * @mask: bit mask of bits to clear 1423 * @set: bit mask of bits to set 1424 * 1425 * Unlocked helper function which allows a PHY register to be modified as 1426 * new register value = (old register value & ~mask) | set 1427 * 1428 * Returns negative errno, 0 if there was no change, and 1 in case of change 1429 */ 1430 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1431 u16 mask, u16 set) 1432 { 1433 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1434 regnum, mask, set); 1435 } 1436 1437 /* 1438 * phy_read_mmd - Convenience function for reading a register 1439 * from an MMD on a given PHY. 1440 */ 1441 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1442 1443 /** 1444 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1445 * condition is met or a timeout occurs 1446 * 1447 * @phydev: The phy_device struct 1448 * @devaddr: The MMD to read from 1449 * @regnum: The register on the MMD to read 1450 * @val: Variable to read the register into 1451 * @cond: Break condition (usually involving @val) 1452 * @sleep_us: Maximum time to sleep between reads in us (0 tight-loops). Please 1453 * read usleep_range() function description for details and 1454 * limitations. 1455 * @timeout_us: Timeout in us, 0 means never timeout 1456 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1457 * 1458 * Returns: 0 on success and -ETIMEDOUT upon a timeout. In either 1459 * case, the last read value at @args is stored in @val. Must not 1460 * be called from atomic context if sleep_us or timeout_us are used. 1461 */ 1462 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1463 sleep_us, timeout_us, sleep_before_read) \ 1464 ({ \ 1465 int __ret, __val; \ 1466 __ret = read_poll_timeout(__val = phy_read_mmd, val, \ 1467 __val < 0 || (cond), \ 1468 sleep_us, timeout_us, sleep_before_read, \ 1469 phydev, devaddr, regnum); \ 1470 if (__val < 0) \ 1471 __ret = __val; \ 1472 if (__ret) \ 1473 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1474 __ret; \ 1475 }) 1476 1477 /* 1478 * __phy_read_mmd - Convenience function for reading a register 1479 * from an MMD on a given PHY. 1480 */ 1481 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1482 1483 /* 1484 * phy_write_mmd - Convenience function for writing a register 1485 * on an MMD on a given PHY. 1486 */ 1487 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1488 1489 /* 1490 * __phy_write_mmd - Convenience function for writing a register 1491 * on an MMD on a given PHY. 1492 */ 1493 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1494 1495 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1496 u16 set); 1497 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1498 u16 set); 1499 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1500 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1501 1502 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1503 u16 mask, u16 set); 1504 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1505 u16 mask, u16 set); 1506 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1507 u16 mask, u16 set); 1508 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1509 u16 mask, u16 set); 1510 1511 /** 1512 * __phy_set_bits - Convenience function for setting bits in a PHY register 1513 * @phydev: the phy_device struct 1514 * @regnum: register number to write 1515 * @val: bits to set 1516 * 1517 * The caller must have taken the MDIO bus lock. 1518 */ 1519 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1520 { 1521 return __phy_modify(phydev, regnum, 0, val); 1522 } 1523 1524 /** 1525 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1526 * @phydev: the phy_device struct 1527 * @regnum: register number to write 1528 * @val: bits to clear 1529 * 1530 * The caller must have taken the MDIO bus lock. 1531 */ 1532 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1533 u16 val) 1534 { 1535 return __phy_modify(phydev, regnum, val, 0); 1536 } 1537 1538 /** 1539 * phy_set_bits - Convenience function for setting bits in a PHY register 1540 * @phydev: the phy_device struct 1541 * @regnum: register number to write 1542 * @val: bits to set 1543 */ 1544 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1545 { 1546 return phy_modify(phydev, regnum, 0, val); 1547 } 1548 1549 /** 1550 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1551 * @phydev: the phy_device struct 1552 * @regnum: register number to write 1553 * @val: bits to clear 1554 */ 1555 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1556 { 1557 return phy_modify(phydev, regnum, val, 0); 1558 } 1559 1560 /** 1561 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1562 * on MMD 1563 * @phydev: the phy_device struct 1564 * @devad: the MMD containing register to modify 1565 * @regnum: register number to modify 1566 * @val: bits to set 1567 * 1568 * The caller must have taken the MDIO bus lock. 1569 */ 1570 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1571 u32 regnum, u16 val) 1572 { 1573 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1574 } 1575 1576 /** 1577 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1578 * on MMD 1579 * @phydev: the phy_device struct 1580 * @devad: the MMD containing register to modify 1581 * @regnum: register number to modify 1582 * @val: bits to clear 1583 * 1584 * The caller must have taken the MDIO bus lock. 1585 */ 1586 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1587 u32 regnum, u16 val) 1588 { 1589 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1590 } 1591 1592 /** 1593 * phy_set_bits_mmd - Convenience function for setting bits in a register 1594 * on MMD 1595 * @phydev: the phy_device struct 1596 * @devad: the MMD containing register to modify 1597 * @regnum: register number to modify 1598 * @val: bits to set 1599 */ 1600 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1601 u32 regnum, u16 val) 1602 { 1603 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1604 } 1605 1606 /** 1607 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1608 * on MMD 1609 * @phydev: the phy_device struct 1610 * @devad: the MMD containing register to modify 1611 * @regnum: register number to modify 1612 * @val: bits to clear 1613 */ 1614 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1615 u32 regnum, u16 val) 1616 { 1617 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1618 } 1619 1620 /** 1621 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1622 * @phydev: the phy_device struct 1623 * 1624 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1625 * PHY_MAC_INTERRUPT 1626 */ 1627 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1628 { 1629 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1630 } 1631 1632 /** 1633 * phy_polling_mode - Convenience function for testing whether polling is 1634 * used to detect PHY status changes 1635 * @phydev: the phy_device struct 1636 */ 1637 static inline bool phy_polling_mode(struct phy_device *phydev) 1638 { 1639 if (phydev->state == PHY_CABLETEST) 1640 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1641 return true; 1642 1643 if (phydev->drv->update_stats) 1644 return true; 1645 1646 return phydev->irq == PHY_POLL; 1647 } 1648 1649 /** 1650 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1651 * @phydev: the phy_device struct 1652 */ 1653 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1654 { 1655 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1656 } 1657 1658 /** 1659 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1660 * @phydev: the phy_device struct 1661 */ 1662 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1663 { 1664 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1665 } 1666 1667 /** 1668 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1669 * PTP hardware clock capabilities. 1670 * @phydev: the phy_device struct 1671 */ 1672 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1673 { 1674 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1675 } 1676 1677 /** 1678 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1679 * @phydev: the phy_device struct 1680 */ 1681 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1682 { 1683 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1684 } 1685 1686 static inline int phy_hwtstamp(struct phy_device *phydev, 1687 struct kernel_hwtstamp_config *cfg, 1688 struct netlink_ext_ack *extack) 1689 { 1690 return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack); 1691 } 1692 1693 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1694 int type) 1695 { 1696 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1697 } 1698 1699 static inline int phy_ts_info(struct phy_device *phydev, 1700 struct kernel_ethtool_ts_info *tsinfo) 1701 { 1702 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1703 } 1704 1705 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1706 int type) 1707 { 1708 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1709 } 1710 1711 /** 1712 * phy_is_default_hwtstamp - Is the PHY hwtstamp the default timestamp 1713 * @phydev: Pointer to phy_device 1714 * 1715 * This is used to get default timestamping device taking into account 1716 * the new API choice, which is selecting the timestamping from MAC by 1717 * default if the phydev does not have default_timestamp flag enabled. 1718 * 1719 * Return: True if phy is the default hw timestamp, false otherwise. 1720 */ 1721 static inline bool phy_is_default_hwtstamp(struct phy_device *phydev) 1722 { 1723 return phy_has_hwtstamp(phydev) && phydev->default_timestamp; 1724 } 1725 1726 /** 1727 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1728 * @phydev: the phy_device struct 1729 */ 1730 static inline bool phy_on_sfp(struct phy_device *phydev) 1731 { 1732 return phydev->is_on_sfp_module; 1733 } 1734 1735 /** 1736 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1737 * PHY interface mode is RGMII (all variants) 1738 * @mode: the &phy_interface_t enum 1739 */ 1740 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1741 { 1742 return mode >= PHY_INTERFACE_MODE_RGMII && 1743 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1744 }; 1745 1746 /** 1747 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1748 * negotiation 1749 * @mode: one of &enum phy_interface_t 1750 * 1751 * Returns true if the PHY interface mode uses the 16-bit negotiation 1752 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1753 */ 1754 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1755 { 1756 return mode == PHY_INTERFACE_MODE_1000BASEX || 1757 mode == PHY_INTERFACE_MODE_2500BASEX; 1758 } 1759 1760 /** 1761 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1762 * is RGMII (all variants) 1763 * @phydev: the phy_device struct 1764 */ 1765 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1766 { 1767 return phy_interface_mode_is_rgmii(phydev->interface); 1768 }; 1769 1770 /** 1771 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1772 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1773 * @phydev: the phy_device struct 1774 */ 1775 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1776 { 1777 return phydev->is_pseudo_fixed_link; 1778 } 1779 1780 int phy_save_page(struct phy_device *phydev); 1781 int phy_select_page(struct phy_device *phydev, int page); 1782 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1783 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1784 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1785 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1786 u16 mask, u16 set); 1787 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1788 u16 mask, u16 set); 1789 1790 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1791 bool is_c45, 1792 struct phy_c45_device_ids *c45_ids); 1793 #if IS_ENABLED(CONFIG_PHYLIB) 1794 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1795 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1796 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1797 struct phy_device *device_phy_find_device(struct device *dev); 1798 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode); 1799 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1800 int phy_device_register(struct phy_device *phy); 1801 void phy_device_free(struct phy_device *phydev); 1802 #else 1803 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1804 { 1805 return 0; 1806 } 1807 static inline 1808 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1809 { 1810 return 0; 1811 } 1812 1813 static inline 1814 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1815 { 1816 return NULL; 1817 } 1818 1819 static inline struct phy_device *device_phy_find_device(struct device *dev) 1820 { 1821 return NULL; 1822 } 1823 1824 static inline 1825 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1826 { 1827 return NULL; 1828 } 1829 1830 static inline 1831 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1832 { 1833 return NULL; 1834 } 1835 1836 static inline int phy_device_register(struct phy_device *phy) 1837 { 1838 return 0; 1839 } 1840 1841 static inline void phy_device_free(struct phy_device *phydev) { } 1842 #endif /* CONFIG_PHYLIB */ 1843 void phy_device_remove(struct phy_device *phydev); 1844 int phy_get_c45_ids(struct phy_device *phydev); 1845 int phy_init_hw(struct phy_device *phydev); 1846 int phy_suspend(struct phy_device *phydev); 1847 int phy_resume(struct phy_device *phydev); 1848 int __phy_resume(struct phy_device *phydev); 1849 int phy_loopback(struct phy_device *phydev, bool enable); 1850 int phy_sfp_connect_phy(void *upstream, struct phy_device *phy); 1851 void phy_sfp_disconnect_phy(void *upstream, struct phy_device *phy); 1852 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1853 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1854 int phy_sfp_probe(struct phy_device *phydev, 1855 const struct sfp_upstream_ops *ops); 1856 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1857 phy_interface_t interface); 1858 struct phy_device *phy_find_first(struct mii_bus *bus); 1859 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1860 u32 flags, phy_interface_t interface); 1861 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1862 void (*handler)(struct net_device *), 1863 phy_interface_t interface); 1864 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1865 void (*handler)(struct net_device *), 1866 phy_interface_t interface); 1867 void phy_disconnect(struct phy_device *phydev); 1868 void phy_detach(struct phy_device *phydev); 1869 void phy_start(struct phy_device *phydev); 1870 void phy_stop(struct phy_device *phydev); 1871 int phy_config_aneg(struct phy_device *phydev); 1872 int _phy_start_aneg(struct phy_device *phydev); 1873 int phy_start_aneg(struct phy_device *phydev); 1874 int phy_aneg_done(struct phy_device *phydev); 1875 unsigned int phy_inband_caps(struct phy_device *phydev, 1876 phy_interface_t interface); 1877 int phy_config_inband(struct phy_device *phydev, unsigned int modes); 1878 int phy_speed_down(struct phy_device *phydev, bool sync); 1879 int phy_speed_up(struct phy_device *phydev); 1880 bool phy_check_valid(int speed, int duplex, unsigned long *features); 1881 1882 int phy_restart_aneg(struct phy_device *phydev); 1883 int phy_reset_after_clk_enable(struct phy_device *phydev); 1884 1885 #if IS_ENABLED(CONFIG_PHYLIB) 1886 int phy_start_cable_test(struct phy_device *phydev, 1887 struct netlink_ext_ack *extack); 1888 int phy_start_cable_test_tdr(struct phy_device *phydev, 1889 struct netlink_ext_ack *extack, 1890 const struct phy_tdr_config *config); 1891 #else 1892 static inline 1893 int phy_start_cable_test(struct phy_device *phydev, 1894 struct netlink_ext_ack *extack) 1895 { 1896 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1897 return -EOPNOTSUPP; 1898 } 1899 static inline 1900 int phy_start_cable_test_tdr(struct phy_device *phydev, 1901 struct netlink_ext_ack *extack, 1902 const struct phy_tdr_config *config) 1903 { 1904 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1905 return -EOPNOTSUPP; 1906 } 1907 #endif 1908 1909 static inline void phy_device_reset(struct phy_device *phydev, int value) 1910 { 1911 mdio_device_reset(&phydev->mdio, value); 1912 } 1913 1914 #define phydev_err(_phydev, format, args...) \ 1915 dev_err(&_phydev->mdio.dev, format, ##args) 1916 1917 #define phydev_err_probe(_phydev, err, format, args...) \ 1918 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1919 1920 #define phydev_info(_phydev, format, args...) \ 1921 dev_info(&_phydev->mdio.dev, format, ##args) 1922 1923 #define phydev_warn(_phydev, format, args...) \ 1924 dev_warn(&_phydev->mdio.dev, format, ##args) 1925 1926 #define phydev_dbg(_phydev, format, args...) \ 1927 dev_dbg(&_phydev->mdio.dev, format, ##args) 1928 1929 static inline const char *phydev_name(const struct phy_device *phydev) 1930 { 1931 return dev_name(&phydev->mdio.dev); 1932 } 1933 1934 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1935 { 1936 mutex_lock(&phydev->mdio.bus->mdio_lock); 1937 } 1938 1939 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1940 { 1941 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1942 } 1943 1944 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1945 __printf(2, 3); 1946 char *phy_attached_info_irq(struct phy_device *phydev) 1947 __malloc; 1948 void phy_attached_info(struct phy_device *phydev); 1949 1950 /* Clause 22 PHY */ 1951 int genphy_read_abilities(struct phy_device *phydev); 1952 int genphy_setup_forced(struct phy_device *phydev); 1953 int genphy_restart_aneg(struct phy_device *phydev); 1954 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1955 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1956 int genphy_aneg_done(struct phy_device *phydev); 1957 int genphy_update_link(struct phy_device *phydev); 1958 int genphy_read_lpa(struct phy_device *phydev); 1959 int genphy_read_status_fixed(struct phy_device *phydev); 1960 int genphy_read_status(struct phy_device *phydev); 1961 int genphy_read_master_slave(struct phy_device *phydev); 1962 int genphy_suspend(struct phy_device *phydev); 1963 int genphy_resume(struct phy_device *phydev); 1964 int genphy_loopback(struct phy_device *phydev, bool enable); 1965 int genphy_soft_reset(struct phy_device *phydev); 1966 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1967 1968 static inline int genphy_config_aneg(struct phy_device *phydev) 1969 { 1970 return __genphy_config_aneg(phydev, false); 1971 } 1972 1973 static inline int genphy_no_config_intr(struct phy_device *phydev) 1974 { 1975 return 0; 1976 } 1977 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1978 u16 regnum); 1979 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1980 u16 regnum, u16 val); 1981 1982 /* Clause 37 */ 1983 int genphy_c37_config_aneg(struct phy_device *phydev); 1984 int genphy_c37_read_status(struct phy_device *phydev, bool *changed); 1985 1986 /* Clause 45 PHY */ 1987 int genphy_c45_restart_aneg(struct phy_device *phydev); 1988 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1989 int genphy_c45_aneg_done(struct phy_device *phydev); 1990 int genphy_c45_read_link(struct phy_device *phydev); 1991 int genphy_c45_read_lpa(struct phy_device *phydev); 1992 int genphy_c45_read_pma(struct phy_device *phydev); 1993 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1994 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 1995 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1996 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1997 int genphy_c45_read_mdix(struct phy_device *phydev); 1998 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1999 int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev); 2000 int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev); 2001 int genphy_c45_read_eee_abilities(struct phy_device *phydev); 2002 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 2003 int genphy_c45_read_status(struct phy_device *phydev); 2004 int genphy_c45_baset1_read_status(struct phy_device *phydev); 2005 int genphy_c45_config_aneg(struct phy_device *phydev); 2006 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 2007 int genphy_c45_pma_resume(struct phy_device *phydev); 2008 int genphy_c45_pma_suspend(struct phy_device *phydev); 2009 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 2010 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 2011 struct phy_plca_cfg *plca_cfg); 2012 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 2013 const struct phy_plca_cfg *plca_cfg); 2014 int genphy_c45_plca_get_status(struct phy_device *phydev, 2015 struct phy_plca_status *plca_st); 2016 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *lp); 2017 int genphy_c45_ethtool_get_eee(struct phy_device *phydev, 2018 struct ethtool_keee *data); 2019 int genphy_c45_ethtool_set_eee(struct phy_device *phydev, 2020 struct ethtool_keee *data); 2021 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev); 2022 2023 /* Generic C45 PHY driver */ 2024 extern struct phy_driver genphy_c45_driver; 2025 2026 /* The gen10g_* functions are the old Clause 45 stub */ 2027 int gen10g_config_aneg(struct phy_device *phydev); 2028 2029 static inline int phy_read_status(struct phy_device *phydev) 2030 { 2031 if (!phydev->drv) 2032 return -EIO; 2033 2034 if (phydev->drv->read_status) 2035 return phydev->drv->read_status(phydev); 2036 else 2037 return genphy_read_status(phydev); 2038 } 2039 2040 void phy_driver_unregister(struct phy_driver *drv); 2041 void phy_drivers_unregister(struct phy_driver *drv, int n); 2042 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 2043 int phy_drivers_register(struct phy_driver *new_driver, int n, 2044 struct module *owner); 2045 void phy_error(struct phy_device *phydev); 2046 void phy_state_machine(struct work_struct *work); 2047 void phy_trigger_machine(struct phy_device *phydev); 2048 void phy_mac_interrupt(struct phy_device *phydev); 2049 void phy_start_machine(struct phy_device *phydev); 2050 void phy_stop_machine(struct phy_device *phydev); 2051 void phy_ethtool_ksettings_get(struct phy_device *phydev, 2052 struct ethtool_link_ksettings *cmd); 2053 int phy_ethtool_ksettings_set(struct phy_device *phydev, 2054 const struct ethtool_link_ksettings *cmd); 2055 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 2056 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 2057 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 2058 int phy_disable_interrupts(struct phy_device *phydev); 2059 void phy_request_interrupt(struct phy_device *phydev); 2060 void phy_free_interrupt(struct phy_device *phydev); 2061 void phy_print_status(struct phy_device *phydev); 2062 int phy_get_rate_matching(struct phy_device *phydev, 2063 phy_interface_t iface); 2064 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 2065 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 2066 void phy_advertise_supported(struct phy_device *phydev); 2067 void phy_advertise_eee_all(struct phy_device *phydev); 2068 void phy_support_sym_pause(struct phy_device *phydev); 2069 void phy_support_asym_pause(struct phy_device *phydev); 2070 void phy_support_eee(struct phy_device *phydev); 2071 void phy_disable_eee(struct phy_device *phydev); 2072 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 2073 bool autoneg); 2074 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 2075 bool phy_validate_pause(struct phy_device *phydev, 2076 struct ethtool_pauseparam *pp); 2077 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 2078 2079 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 2080 const int *delay_values, int size, bool is_rx); 2081 2082 int phy_get_tx_amplitude_gain(struct phy_device *phydev, struct device *dev, 2083 enum ethtool_link_mode_bit_indices linkmode, 2084 u32 *val); 2085 2086 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 2087 bool *tx_pause, bool *rx_pause); 2088 2089 int phy_register_fixup_for_id(const char *bus_id, 2090 int (*run)(struct phy_device *)); 2091 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 2092 int (*run)(struct phy_device *)); 2093 2094 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 2095 int phy_unregister_fixup_for_id(const char *bus_id); 2096 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 2097 2098 int phy_eee_tx_clock_stop_capable(struct phy_device *phydev); 2099 int phy_eee_rx_clock_stop(struct phy_device *phydev, bool clk_stop_enable); 2100 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 2101 int phy_get_eee_err(struct phy_device *phydev); 2102 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data); 2103 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_keee *data); 2104 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 2105 void phy_ethtool_get_wol(struct phy_device *phydev, 2106 struct ethtool_wolinfo *wol); 2107 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 2108 struct ethtool_link_ksettings *cmd); 2109 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 2110 const struct ethtool_link_ksettings *cmd); 2111 int phy_ethtool_nway_reset(struct net_device *ndev); 2112 int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size); 2113 int of_phy_package_join(struct phy_device *phydev, size_t priv_size); 2114 void phy_package_leave(struct phy_device *phydev); 2115 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 2116 int base_addr, size_t priv_size); 2117 int devm_of_phy_package_join(struct device *dev, struct phy_device *phydev, 2118 size_t priv_size); 2119 2120 int __init mdio_bus_init(void); 2121 void mdio_bus_exit(void); 2122 2123 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 2124 int phy_ethtool_get_sset_count(struct phy_device *phydev); 2125 int phy_ethtool_get_stats(struct phy_device *phydev, 2126 struct ethtool_stats *stats, u64 *data); 2127 2128 void __phy_ethtool_get_phy_stats(struct phy_device *phydev, 2129 struct ethtool_eth_phy_stats *phy_stats, 2130 struct ethtool_phy_stats *phydev_stats); 2131 void __phy_ethtool_get_link_ext_stats(struct phy_device *phydev, 2132 struct ethtool_link_ext_stats *link_stats); 2133 2134 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 2135 struct phy_plca_cfg *plca_cfg); 2136 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 2137 const struct phy_plca_cfg *plca_cfg, 2138 struct netlink_ext_ack *extack); 2139 int phy_ethtool_get_plca_status(struct phy_device *phydev, 2140 struct phy_plca_status *plca_st); 2141 2142 int __phy_hwtstamp_get(struct phy_device *phydev, 2143 struct kernel_hwtstamp_config *config); 2144 int __phy_hwtstamp_set(struct phy_device *phydev, 2145 struct kernel_hwtstamp_config *config, 2146 struct netlink_ext_ack *extack); 2147 2148 int __phy_package_read_mmd(struct phy_device *phydev, 2149 unsigned int addr_offset, int devad, 2150 u32 regnum); 2151 2152 int phy_package_read_mmd(struct phy_device *phydev, 2153 unsigned int addr_offset, int devad, 2154 u32 regnum); 2155 2156 int __phy_package_write_mmd(struct phy_device *phydev, 2157 unsigned int addr_offset, int devad, 2158 u32 regnum, u16 val); 2159 2160 int phy_package_write_mmd(struct phy_device *phydev, 2161 unsigned int addr_offset, int devad, 2162 u32 regnum, u16 val); 2163 2164 extern const struct bus_type mdio_bus_type; 2165 2166 struct mdio_board_info { 2167 const char *bus_id; 2168 char modalias[MDIO_NAME_SIZE]; 2169 int mdio_addr; 2170 const void *platform_data; 2171 }; 2172 2173 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 2174 int mdiobus_register_board_info(const struct mdio_board_info *info, 2175 unsigned int n); 2176 #else 2177 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 2178 unsigned int n) 2179 { 2180 return 0; 2181 } 2182 #endif 2183 2184 2185 /** 2186 * phy_module_driver() - Helper macro for registering PHY drivers 2187 * @__phy_drivers: array of PHY drivers to register 2188 * @__count: Numbers of members in array 2189 * 2190 * Helper macro for PHY drivers which do not do anything special in module 2191 * init/exit. Each module may only use this macro once, and calling it 2192 * replaces module_init() and module_exit(). 2193 */ 2194 #define phy_module_driver(__phy_drivers, __count) \ 2195 static int __init phy_module_init(void) \ 2196 { \ 2197 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 2198 } \ 2199 module_init(phy_module_init); \ 2200 static void __exit phy_module_exit(void) \ 2201 { \ 2202 phy_drivers_unregister(__phy_drivers, __count); \ 2203 } \ 2204 module_exit(phy_module_exit) 2205 2206 #define module_phy_driver(__phy_drivers) \ 2207 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 2208 2209 bool phy_driver_is_genphy(struct phy_device *phydev); 2210 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 2211 2212 #endif /* __PHY_H */ 2213