1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/leds.h> 18 #include <linux/linkmode.h> 19 #include <linux/netlink.h> 20 #include <linux/mdio.h> 21 #include <linux/mii.h> 22 #include <linux/mii_timestamper.h> 23 #include <linux/module.h> 24 #include <linux/timer.h> 25 #include <linux/workqueue.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/u64_stats_sync.h> 28 #include <linux/irqreturn.h> 29 #include <linux/iopoll.h> 30 #include <linux/refcount.h> 31 32 #include <linux/atomic.h> 33 34 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 35 SUPPORTED_TP | \ 36 SUPPORTED_MII) 37 38 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 39 SUPPORTED_10baseT_Full) 40 41 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 42 SUPPORTED_100baseT_Full) 43 44 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 45 SUPPORTED_1000baseT_Full) 46 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 54 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 55 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 56 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init; 57 58 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 59 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 60 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 61 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 62 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 63 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 64 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 65 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 66 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 67 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features) 68 69 extern const int phy_basic_ports_array[3]; 70 extern const int phy_fibre_port_array[1]; 71 extern const int phy_all_ports_features_array[7]; 72 extern const int phy_10_100_features_array[4]; 73 extern const int phy_basic_t1_features_array[3]; 74 extern const int phy_basic_t1s_p2mp_features_array[2]; 75 extern const int phy_gbit_features_array[2]; 76 extern const int phy_10gbit_features_array[1]; 77 78 /* 79 * Set phydev->irq to PHY_POLL if interrupts are not supported, 80 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 81 * the attached MAC driver handles the interrupt 82 */ 83 #define PHY_POLL -1 84 #define PHY_MAC_INTERRUPT -2 85 86 #define PHY_IS_INTERNAL 0x00000001 87 #define PHY_RST_AFTER_CLK_EN 0x00000002 88 #define PHY_POLL_CABLE_TEST 0x00000004 89 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008 90 #define MDIO_DEVICE_IS_PHY 0x80000000 91 92 /** 93 * enum phy_interface_t - Interface Mode definitions 94 * 95 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 96 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 97 * @PHY_INTERFACE_MODE_MII: Media-independent interface 98 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 99 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 100 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 101 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 102 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 103 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 104 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 105 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 106 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 107 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 108 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 109 * @PHY_INTERFACE_MODE_SMII: Serial MII 110 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 111 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 112 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 113 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII 114 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 115 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 116 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 117 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 118 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 119 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 120 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 121 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 122 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 123 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 124 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 125 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 126 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 127 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 128 * @PHY_INTERFACE_MODE_MAX: Book keeping 129 * 130 * Describes the interface between the MAC and PHY. 131 */ 132 typedef enum { 133 PHY_INTERFACE_MODE_NA, 134 PHY_INTERFACE_MODE_INTERNAL, 135 PHY_INTERFACE_MODE_MII, 136 PHY_INTERFACE_MODE_GMII, 137 PHY_INTERFACE_MODE_SGMII, 138 PHY_INTERFACE_MODE_TBI, 139 PHY_INTERFACE_MODE_REVMII, 140 PHY_INTERFACE_MODE_RMII, 141 PHY_INTERFACE_MODE_REVRMII, 142 PHY_INTERFACE_MODE_RGMII, 143 PHY_INTERFACE_MODE_RGMII_ID, 144 PHY_INTERFACE_MODE_RGMII_RXID, 145 PHY_INTERFACE_MODE_RGMII_TXID, 146 PHY_INTERFACE_MODE_RTBI, 147 PHY_INTERFACE_MODE_SMII, 148 PHY_INTERFACE_MODE_XGMII, 149 PHY_INTERFACE_MODE_XLGMII, 150 PHY_INTERFACE_MODE_MOCA, 151 PHY_INTERFACE_MODE_PSGMII, 152 PHY_INTERFACE_MODE_QSGMII, 153 PHY_INTERFACE_MODE_TRGMII, 154 PHY_INTERFACE_MODE_100BASEX, 155 PHY_INTERFACE_MODE_1000BASEX, 156 PHY_INTERFACE_MODE_2500BASEX, 157 PHY_INTERFACE_MODE_5GBASER, 158 PHY_INTERFACE_MODE_RXAUI, 159 PHY_INTERFACE_MODE_XAUI, 160 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 161 PHY_INTERFACE_MODE_10GBASER, 162 PHY_INTERFACE_MODE_25GBASER, 163 PHY_INTERFACE_MODE_USXGMII, 164 /* 10GBASE-KR - with Clause 73 AN */ 165 PHY_INTERFACE_MODE_10GKR, 166 PHY_INTERFACE_MODE_QUSGMII, 167 PHY_INTERFACE_MODE_1000BASEKX, 168 PHY_INTERFACE_MODE_MAX, 169 } phy_interface_t; 170 171 /* PHY interface mode bitmap handling */ 172 #define DECLARE_PHY_INTERFACE_MASK(name) \ 173 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 174 175 static inline void phy_interface_zero(unsigned long *intf) 176 { 177 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 178 } 179 180 static inline bool phy_interface_empty(const unsigned long *intf) 181 { 182 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 183 } 184 185 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 186 const unsigned long *b) 187 { 188 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 189 } 190 191 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 192 const unsigned long *b) 193 { 194 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 195 } 196 197 static inline void phy_interface_set_rgmii(unsigned long *intf) 198 { 199 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 200 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 201 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 202 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 203 } 204 205 /* 206 * phy_supported_speeds - return all speeds currently supported by a PHY device 207 */ 208 unsigned int phy_supported_speeds(struct phy_device *phy, 209 unsigned int *speeds, 210 unsigned int size); 211 212 /** 213 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 214 * @interface: enum phy_interface_t value 215 * 216 * Description: maps enum &phy_interface_t defined in this file 217 * into the device tree binding of 'phy-mode', so that Ethernet 218 * device driver can get PHY interface from device tree. 219 */ 220 static inline const char *phy_modes(phy_interface_t interface) 221 { 222 switch (interface) { 223 case PHY_INTERFACE_MODE_NA: 224 return ""; 225 case PHY_INTERFACE_MODE_INTERNAL: 226 return "internal"; 227 case PHY_INTERFACE_MODE_MII: 228 return "mii"; 229 case PHY_INTERFACE_MODE_GMII: 230 return "gmii"; 231 case PHY_INTERFACE_MODE_SGMII: 232 return "sgmii"; 233 case PHY_INTERFACE_MODE_TBI: 234 return "tbi"; 235 case PHY_INTERFACE_MODE_REVMII: 236 return "rev-mii"; 237 case PHY_INTERFACE_MODE_RMII: 238 return "rmii"; 239 case PHY_INTERFACE_MODE_REVRMII: 240 return "rev-rmii"; 241 case PHY_INTERFACE_MODE_RGMII: 242 return "rgmii"; 243 case PHY_INTERFACE_MODE_RGMII_ID: 244 return "rgmii-id"; 245 case PHY_INTERFACE_MODE_RGMII_RXID: 246 return "rgmii-rxid"; 247 case PHY_INTERFACE_MODE_RGMII_TXID: 248 return "rgmii-txid"; 249 case PHY_INTERFACE_MODE_RTBI: 250 return "rtbi"; 251 case PHY_INTERFACE_MODE_SMII: 252 return "smii"; 253 case PHY_INTERFACE_MODE_XGMII: 254 return "xgmii"; 255 case PHY_INTERFACE_MODE_XLGMII: 256 return "xlgmii"; 257 case PHY_INTERFACE_MODE_MOCA: 258 return "moca"; 259 case PHY_INTERFACE_MODE_PSGMII: 260 return "psgmii"; 261 case PHY_INTERFACE_MODE_QSGMII: 262 return "qsgmii"; 263 case PHY_INTERFACE_MODE_TRGMII: 264 return "trgmii"; 265 case PHY_INTERFACE_MODE_1000BASEX: 266 return "1000base-x"; 267 case PHY_INTERFACE_MODE_1000BASEKX: 268 return "1000base-kx"; 269 case PHY_INTERFACE_MODE_2500BASEX: 270 return "2500base-x"; 271 case PHY_INTERFACE_MODE_5GBASER: 272 return "5gbase-r"; 273 case PHY_INTERFACE_MODE_RXAUI: 274 return "rxaui"; 275 case PHY_INTERFACE_MODE_XAUI: 276 return "xaui"; 277 case PHY_INTERFACE_MODE_10GBASER: 278 return "10gbase-r"; 279 case PHY_INTERFACE_MODE_25GBASER: 280 return "25gbase-r"; 281 case PHY_INTERFACE_MODE_USXGMII: 282 return "usxgmii"; 283 case PHY_INTERFACE_MODE_10GKR: 284 return "10gbase-kr"; 285 case PHY_INTERFACE_MODE_100BASEX: 286 return "100base-x"; 287 case PHY_INTERFACE_MODE_QUSGMII: 288 return "qusgmii"; 289 default: 290 return "unknown"; 291 } 292 } 293 294 #define PHY_INIT_TIMEOUT 100000 295 #define PHY_FORCE_TIMEOUT 10 296 297 #define PHY_MAX_ADDR 32 298 299 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 300 #define PHY_ID_FMT "%s:%02x" 301 302 #define MII_BUS_ID_SIZE 61 303 304 struct device; 305 struct kernel_hwtstamp_config; 306 struct phylink; 307 struct sfp_bus; 308 struct sfp_upstream_ops; 309 struct sk_buff; 310 311 /** 312 * struct mdio_bus_stats - Statistics counters for MDIO busses 313 * @transfers: Total number of transfers, i.e. @writes + @reads 314 * @errors: Number of MDIO transfers that returned an error 315 * @writes: Number of write transfers 316 * @reads: Number of read transfers 317 * @syncp: Synchronisation for incrementing statistics 318 */ 319 struct mdio_bus_stats { 320 u64_stats_t transfers; 321 u64_stats_t errors; 322 u64_stats_t writes; 323 u64_stats_t reads; 324 /* Must be last, add new statistics above */ 325 struct u64_stats_sync syncp; 326 }; 327 328 /** 329 * struct phy_package_shared - Shared information in PHY packages 330 * @base_addr: Base PHY address of PHY package used to combine PHYs 331 * in one package and for offset calculation of phy_package_read/write 332 * @refcnt: Number of PHYs connected to this shared data 333 * @flags: Initialization of PHY package 334 * @priv_size: Size of the shared private data @priv 335 * @priv: Driver private data shared across a PHY package 336 * 337 * Represents a shared structure between different phydev's in the same 338 * package, for example a quad PHY. See phy_package_join() and 339 * phy_package_leave(). 340 */ 341 struct phy_package_shared { 342 u8 base_addr; 343 refcount_t refcnt; 344 unsigned long flags; 345 size_t priv_size; 346 347 /* private data pointer */ 348 /* note that this pointer is shared between different phydevs and 349 * the user has to take care of appropriate locking. It is allocated 350 * and freed automatically by phy_package_join() and 351 * phy_package_leave(). 352 */ 353 void *priv; 354 }; 355 356 /* used as bit number in atomic bitops */ 357 #define PHY_SHARED_F_INIT_DONE 0 358 #define PHY_SHARED_F_PROBE_DONE 1 359 360 /** 361 * struct mii_bus - Represents an MDIO bus 362 * 363 * @owner: Who owns this device 364 * @name: User friendly name for this MDIO device, or driver name 365 * @id: Unique identifier for this bus, typical from bus hierarchy 366 * @priv: Driver private data 367 * 368 * The Bus class for PHYs. Devices which provide access to 369 * PHYs should register using this structure 370 */ 371 struct mii_bus { 372 struct module *owner; 373 const char *name; 374 char id[MII_BUS_ID_SIZE]; 375 void *priv; 376 /** @read: Perform a read transfer on the bus */ 377 int (*read)(struct mii_bus *bus, int addr, int regnum); 378 /** @write: Perform a write transfer on the bus */ 379 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 380 /** @read_c45: Perform a C45 read transfer on the bus */ 381 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 382 /** @write_c45: Perform a C45 write transfer on the bus */ 383 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 384 int regnum, u16 val); 385 /** @reset: Perform a reset of the bus */ 386 int (*reset)(struct mii_bus *bus); 387 388 /** @stats: Statistic counters per device on the bus */ 389 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 390 391 /** 392 * @mdio_lock: A lock to ensure that only one thing can read/write 393 * the MDIO bus at a time 394 */ 395 struct mutex mdio_lock; 396 397 /** @parent: Parent device of this bus */ 398 struct device *parent; 399 /** @state: State of bus structure */ 400 enum { 401 MDIOBUS_ALLOCATED = 1, 402 MDIOBUS_REGISTERED, 403 MDIOBUS_UNREGISTERED, 404 MDIOBUS_RELEASED, 405 } state; 406 407 /** @dev: Kernel device representation */ 408 struct device dev; 409 410 /** @mdio_map: list of all MDIO devices on bus */ 411 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 412 413 /** @phy_mask: PHY addresses to be ignored when probing */ 414 u32 phy_mask; 415 416 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 417 u32 phy_ignore_ta_mask; 418 419 /** 420 * @irq: An array of interrupts, each PHY's interrupt at the index 421 * matching its address 422 */ 423 int irq[PHY_MAX_ADDR]; 424 425 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 426 int reset_delay_us; 427 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 428 int reset_post_delay_us; 429 /** @reset_gpiod: Reset GPIO descriptor pointer */ 430 struct gpio_desc *reset_gpiod; 431 432 /** @shared_lock: protect access to the shared element */ 433 struct mutex shared_lock; 434 435 /** @shared: shared state across different PHYs */ 436 struct phy_package_shared *shared[PHY_MAX_ADDR]; 437 }; 438 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 439 440 struct mii_bus *mdiobus_alloc_size(size_t size); 441 442 /** 443 * mdiobus_alloc - Allocate an MDIO bus structure 444 * 445 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 446 * for the driver to register the bus. 447 */ 448 static inline struct mii_bus *mdiobus_alloc(void) 449 { 450 return mdiobus_alloc_size(0); 451 } 452 453 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 454 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 455 struct module *owner); 456 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 457 #define devm_mdiobus_register(dev, bus) \ 458 __devm_mdiobus_register(dev, bus, THIS_MODULE) 459 460 void mdiobus_unregister(struct mii_bus *bus); 461 void mdiobus_free(struct mii_bus *bus); 462 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 463 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 464 { 465 return devm_mdiobus_alloc_size(dev, 0); 466 } 467 468 struct mii_bus *mdio_find_bus(const char *mdio_name); 469 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); 470 471 #define PHY_INTERRUPT_DISABLED false 472 #define PHY_INTERRUPT_ENABLED true 473 474 /** 475 * enum phy_state - PHY state machine states: 476 * 477 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 478 * should be called if and only if the PHY is in this state, 479 * given that the PHY device exists. 480 * - PHY driver probe function will set the state to @PHY_READY 481 * 482 * @PHY_READY: PHY is ready to send and receive packets, but the 483 * controller is not. By default, PHYs which do not implement 484 * probe will be set to this state by phy_probe(). 485 * - start will set the state to UP 486 * 487 * @PHY_UP: The PHY and attached device are ready to do work. 488 * Interrupts should be started here. 489 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 490 * 491 * @PHY_NOLINK: PHY is up, but not currently plugged in. 492 * - irq or timer will set @PHY_RUNNING if link comes back 493 * - phy_stop moves to @PHY_HALTED 494 * 495 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 496 * and/or receiving packets 497 * - irq or timer will set @PHY_NOLINK if link goes down 498 * - phy_stop moves to @PHY_HALTED 499 * 500 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 501 * is not expected to work, carrier will be indicated as down. PHY will be 502 * poll once per second, or on interrupt for it current state. 503 * Once complete, move to UP to restart the PHY. 504 * - phy_stop aborts the running test and moves to @PHY_HALTED 505 * 506 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. 507 * - phy_start moves to @PHY_UP 508 * 509 * @PHY_ERROR: PHY is up, but is in an error state. 510 * - phy_stop moves to @PHY_HALTED 511 */ 512 enum phy_state { 513 PHY_DOWN = 0, 514 PHY_READY, 515 PHY_HALTED, 516 PHY_ERROR, 517 PHY_UP, 518 PHY_RUNNING, 519 PHY_NOLINK, 520 PHY_CABLETEST, 521 }; 522 523 #define MDIO_MMD_NUM 32 524 525 /** 526 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 527 * @devices_in_package: IEEE 802.3 devices in package register value. 528 * @mmds_present: bit vector of MMDs present. 529 * @device_ids: The device identifer for each present device. 530 */ 531 struct phy_c45_device_ids { 532 u32 devices_in_package; 533 u32 mmds_present; 534 u32 device_ids[MDIO_MMD_NUM]; 535 }; 536 537 struct macsec_context; 538 struct macsec_ops; 539 540 /** 541 * struct phy_device - An instance of a PHY 542 * 543 * @mdio: MDIO bus this PHY is on 544 * @drv: Pointer to the driver for this PHY instance 545 * @devlink: Create a link between phy dev and mac dev, if the external phy 546 * used by current mac interface is managed by another mac interface. 547 * @phy_id: UID for this device found during discovery 548 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 549 * @is_c45: Set to true if this PHY uses clause 45 addressing. 550 * @is_internal: Set to true if this PHY is internal to a MAC. 551 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 552 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 553 * @has_fixups: Set to true if this PHY has fixups/quirks. 554 * @suspended: Set to true if this PHY has been suspended successfully. 555 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 556 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 557 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 558 * @downshifted_rate: Set true if link speed has been downshifted. 559 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 560 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 561 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN 562 * enabled. 563 * @state: State of the PHY for management purposes 564 * @dev_flags: Device-specific flags used by the PHY driver. 565 * 566 * - Bits [15:0] are free to use by the PHY driver to communicate 567 * driver specific behavior. 568 * - Bits [23:16] are currently reserved for future use. 569 * - Bits [31:24] are reserved for defining generic 570 * PHY driver behavior. 571 * @irq: IRQ number of the PHY's interrupt (-1 if none) 572 * @phylink: Pointer to phylink instance for this PHY 573 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 574 * @sfp_bus: SFP bus attached to this PHY's fiber port 575 * @attached_dev: The attached enet driver's device instance ptr 576 * @adjust_link: Callback for the enet controller to respond to changes: in the 577 * link state. 578 * @phy_link_change: Callback for phylink for notification of link change 579 * @macsec_ops: MACsec offloading ops. 580 * 581 * @speed: Current link speed 582 * @duplex: Current duplex 583 * @port: Current port 584 * @pause: Current pause 585 * @asym_pause: Current asymmetric pause 586 * @supported: Combined MAC/PHY supported linkmodes 587 * @advertising: Currently advertised linkmodes 588 * @adv_old: Saved advertised while power saving for WoL 589 * @supported_eee: supported PHY EEE linkmodes 590 * @advertising_eee: Currently advertised EEE linkmodes 591 * @eee_enabled: Flag indicating whether the EEE feature is enabled 592 * @lp_advertising: Current link partner advertised linkmodes 593 * @host_interfaces: PHY interface modes supported by host 594 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 595 * @autoneg: Flag autoneg being used 596 * @rate_matching: Current rate matching mode 597 * @link: Current link state 598 * @autoneg_complete: Flag auto negotiation of the link has completed 599 * @mdix: Current crossover 600 * @mdix_ctrl: User setting of crossover 601 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 602 * @interrupts: Flag interrupts have been enabled 603 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 604 * handling shall be postponed until PHY has resumed 605 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 606 * requiring a rerun of the interrupt handler after resume 607 * @interface: enum phy_interface_t value 608 * @possible_interfaces: bitmap if interface modes that the attached PHY 609 * will switch between depending on media speed. 610 * @skb: Netlink message for cable diagnostics 611 * @nest: Netlink nest used for cable diagnostics 612 * @ehdr: nNtlink header for cable diagnostics 613 * @phy_led_triggers: Array of LED triggers 614 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 615 * @led_link_trigger: LED trigger for link up/down 616 * @last_triggered: last LED trigger for link speed 617 * @leds: list of PHY LED structures 618 * @master_slave_set: User requested master/slave configuration 619 * @master_slave_get: Current master/slave advertisement 620 * @master_slave_state: Current master/slave configuration 621 * @mii_ts: Pointer to time stamper callbacks 622 * @psec: Pointer to Power Sourcing Equipment control struct 623 * @lock: Mutex for serialization access to PHY 624 * @state_queue: Work queue for state machine 625 * @link_down_events: Number of times link was lost 626 * @shared: Pointer to private data shared by phys in one package 627 * @priv: Pointer to driver private data 628 * 629 * interrupts currently only supports enabled or disabled, 630 * but could be changed in the future to support enabling 631 * and disabling specific interrupts 632 * 633 * Contains some infrastructure for polling and interrupt 634 * handling, as well as handling shifts in PHY hardware state 635 */ 636 struct phy_device { 637 struct mdio_device mdio; 638 639 /* Information about the PHY type */ 640 /* And management functions */ 641 struct phy_driver *drv; 642 643 struct device_link *devlink; 644 645 u32 phy_id; 646 647 struct phy_c45_device_ids c45_ids; 648 unsigned is_c45:1; 649 unsigned is_internal:1; 650 unsigned is_pseudo_fixed_link:1; 651 unsigned is_gigabit_capable:1; 652 unsigned has_fixups:1; 653 unsigned suspended:1; 654 unsigned suspended_by_mdio_bus:1; 655 unsigned sysfs_links:1; 656 unsigned loopback_enabled:1; 657 unsigned downshifted_rate:1; 658 unsigned is_on_sfp_module:1; 659 unsigned mac_managed_pm:1; 660 unsigned wol_enabled:1; 661 662 unsigned autoneg:1; 663 /* The most recently read link state */ 664 unsigned link:1; 665 unsigned autoneg_complete:1; 666 667 /* Interrupts are enabled */ 668 unsigned interrupts:1; 669 unsigned irq_suspended:1; 670 unsigned irq_rerun:1; 671 672 int rate_matching; 673 674 enum phy_state state; 675 676 u32 dev_flags; 677 678 phy_interface_t interface; 679 DECLARE_PHY_INTERFACE_MASK(possible_interfaces); 680 681 /* 682 * forced speed & duplex (no autoneg) 683 * partner speed & duplex & pause (autoneg) 684 */ 685 int speed; 686 int duplex; 687 int port; 688 int pause; 689 int asym_pause; 690 u8 master_slave_get; 691 u8 master_slave_set; 692 u8 master_slave_state; 693 694 /* Union of PHY and Attached devices' supported link modes */ 695 /* See ethtool.h for more info */ 696 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 697 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 698 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 699 /* used with phy_speed_down */ 700 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 701 /* used for eee validation */ 702 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee); 703 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee); 704 bool eee_enabled; 705 706 /* Host supported PHY interface types. Should be ignored if empty. */ 707 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 708 709 /* Energy efficient ethernet modes which should be prohibited */ 710 u32 eee_broken_modes; 711 712 #ifdef CONFIG_LED_TRIGGER_PHY 713 struct phy_led_trigger *phy_led_triggers; 714 unsigned int phy_num_led_triggers; 715 struct phy_led_trigger *last_triggered; 716 717 struct phy_led_trigger *led_link_trigger; 718 #endif 719 struct list_head leds; 720 721 /* 722 * Interrupt number for this PHY 723 * -1 means no interrupt 724 */ 725 int irq; 726 727 /* private data pointer */ 728 /* For use by PHYs to maintain extra state */ 729 void *priv; 730 731 /* shared data pointer */ 732 /* For use by PHYs inside the same package that need a shared state. */ 733 struct phy_package_shared *shared; 734 735 /* Reporting cable test results */ 736 struct sk_buff *skb; 737 void *ehdr; 738 struct nlattr *nest; 739 740 /* Interrupt and Polling infrastructure */ 741 struct delayed_work state_queue; 742 743 struct mutex lock; 744 745 /* This may be modified under the rtnl lock */ 746 bool sfp_bus_attached; 747 struct sfp_bus *sfp_bus; 748 struct phylink *phylink; 749 struct net_device *attached_dev; 750 struct mii_timestamper *mii_ts; 751 struct pse_control *psec; 752 753 u8 mdix; 754 u8 mdix_ctrl; 755 756 int pma_extable; 757 758 unsigned int link_down_events; 759 760 void (*phy_link_change)(struct phy_device *phydev, bool up); 761 void (*adjust_link)(struct net_device *dev); 762 763 #if IS_ENABLED(CONFIG_MACSEC) 764 /* MACsec management functions */ 765 const struct macsec_ops *macsec_ops; 766 #endif 767 }; 768 769 /* Generic phy_device::dev_flags */ 770 #define PHY_F_NO_IRQ 0x80000000 771 772 static inline struct phy_device *to_phy_device(const struct device *dev) 773 { 774 return container_of(to_mdio_device(dev), struct phy_device, mdio); 775 } 776 777 /** 778 * struct phy_tdr_config - Configuration of a TDR raw test 779 * 780 * @first: Distance for first data collection point 781 * @last: Distance for last data collection point 782 * @step: Step between data collection points 783 * @pair: Bitmap of cable pairs to collect data for 784 * 785 * A structure containing possible configuration parameters 786 * for a TDR cable test. The driver does not need to implement 787 * all the parameters, but should report what is actually used. 788 * All distances are in centimeters. 789 */ 790 struct phy_tdr_config { 791 u32 first; 792 u32 last; 793 u32 step; 794 s8 pair; 795 }; 796 #define PHY_PAIR_ALL -1 797 798 /** 799 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 800 * Avoidance) Reconciliation Sublayer. 801 * 802 * @version: read-only PLCA register map version. -1 = not available. Ignored 803 * when setting the configuration. Format is the same as reported by the PLCA 804 * IDVER register (31.CA00). -1 = not available. 805 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 806 * set. 0 = disabled, anything else = enabled. 807 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 808 * Allowed values [0 .. 254]. 255 = node disabled. 809 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 810 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 811 * set. Allowed values [1 .. 255]. 812 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 813 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 814 * more details. The to_timer shall be set equal over all nodes. 815 * -1 = not available / don't set. Allowed values [0 .. 255]. 816 * @burst_cnt: controls how many additional frames a node is allowed to send in 817 * single transmit opportunity (TO). The default value of 0 means that the 818 * node is allowed exactly one frame per TO. A value of 1 allows two frames 819 * per TO, and so on. -1 = not available / don't set. 820 * Allowed values [0 .. 255]. 821 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 822 * frame before interrupting the burst. This value should be set to a value 823 * greater than the MAC inter-packet gap (which is typically 96 bits). 824 * -1 = not available / don't set. Allowed values [0 .. 255]. 825 * 826 * A structure containing configuration parameters for setting/getting the PLCA 827 * RS configuration. The driver does not need to implement all the parameters, 828 * but should report what is actually used. 829 */ 830 struct phy_plca_cfg { 831 int version; 832 int enabled; 833 int node_id; 834 int node_cnt; 835 int to_tmr; 836 int burst_cnt; 837 int burst_tmr; 838 }; 839 840 /** 841 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 842 * Avoidance) Reconciliation Sublayer. 843 * 844 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 845 * register(31.CA03), indicating BEACON activity. 846 * 847 * A structure containing status information of the PLCA RS configuration. 848 * The driver does not need to implement all the parameters, but should report 849 * what is actually used. 850 */ 851 struct phy_plca_status { 852 bool pst; 853 }; 854 855 /* Modes for PHY LED configuration */ 856 enum phy_led_modes { 857 PHY_LED_ACTIVE_LOW = 0, 858 PHY_LED_INACTIVE_HIGH_IMPEDANCE = 1, 859 860 /* keep it last */ 861 __PHY_LED_MODES_NUM, 862 }; 863 864 /** 865 * struct phy_led: An LED driven by the PHY 866 * 867 * @list: List of LEDs 868 * @phydev: PHY this LED is attached to 869 * @led_cdev: Standard LED class structure 870 * @index: Number of the LED 871 */ 872 struct phy_led { 873 struct list_head list; 874 struct phy_device *phydev; 875 struct led_classdev led_cdev; 876 u8 index; 877 }; 878 879 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev) 880 881 /** 882 * struct phy_driver - Driver structure for a particular PHY type 883 * 884 * @mdiodrv: Data common to all MDIO devices 885 * @phy_id: The result of reading the UID registers of this PHY 886 * type, and ANDing them with the phy_id_mask. This driver 887 * only works for PHYs with IDs which match this field 888 * @name: The friendly name of this PHY type 889 * @phy_id_mask: Defines the important bits of the phy_id 890 * @features: A mandatory list of features (speed, duplex, etc) 891 * supported by this PHY 892 * @flags: A bitfield defining certain other features this PHY 893 * supports (like interrupts) 894 * @driver_data: Static driver data 895 * 896 * All functions are optional. If config_aneg or read_status 897 * are not implemented, the phy core uses the genphy versions. 898 * Note that none of these functions should be called from 899 * interrupt time. The goal is for the bus read/write functions 900 * to be able to block when the bus transaction is happening, 901 * and be freed up by an interrupt (The MPC85xx has this ability, 902 * though it is not currently supported in the driver). 903 */ 904 struct phy_driver { 905 struct mdio_driver_common mdiodrv; 906 u32 phy_id; 907 char *name; 908 u32 phy_id_mask; 909 const unsigned long * const features; 910 u32 flags; 911 const void *driver_data; 912 913 /** 914 * @soft_reset: Called to issue a PHY software reset 915 */ 916 int (*soft_reset)(struct phy_device *phydev); 917 918 /** 919 * @config_init: Called to initialize the PHY, 920 * including after a reset 921 */ 922 int (*config_init)(struct phy_device *phydev); 923 924 /** 925 * @probe: Called during discovery. Used to set 926 * up device-specific structures, if any 927 */ 928 int (*probe)(struct phy_device *phydev); 929 930 /** 931 * @get_features: Probe the hardware to determine what 932 * abilities it has. Should only set phydev->supported. 933 */ 934 int (*get_features)(struct phy_device *phydev); 935 936 /** 937 * @get_rate_matching: Get the supported type of rate matching for a 938 * particular phy interface. This is used by phy consumers to determine 939 * whether to advertise lower-speed modes for that interface. It is 940 * assumed that if a rate matching mode is supported on an interface, 941 * then that interface's rate can be adapted to all slower link speeds 942 * supported by the phy. If the interface is not supported, this should 943 * return %RATE_MATCH_NONE. 944 */ 945 int (*get_rate_matching)(struct phy_device *phydev, 946 phy_interface_t iface); 947 948 /* PHY Power Management */ 949 /** @suspend: Suspend the hardware, saving state if needed */ 950 int (*suspend)(struct phy_device *phydev); 951 /** @resume: Resume the hardware, restoring state if needed */ 952 int (*resume)(struct phy_device *phydev); 953 954 /** 955 * @config_aneg: Configures the advertisement and resets 956 * autonegotiation if phydev->autoneg is on, 957 * forces the speed to the current settings in phydev 958 * if phydev->autoneg is off 959 */ 960 int (*config_aneg)(struct phy_device *phydev); 961 962 /** @aneg_done: Determines the auto negotiation result */ 963 int (*aneg_done)(struct phy_device *phydev); 964 965 /** @read_status: Determines the negotiated speed and duplex */ 966 int (*read_status)(struct phy_device *phydev); 967 968 /** 969 * @config_intr: Enables or disables interrupts. 970 * It should also clear any pending interrupts prior to enabling the 971 * IRQs and after disabling them. 972 */ 973 int (*config_intr)(struct phy_device *phydev); 974 975 /** @handle_interrupt: Override default interrupt handling */ 976 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 977 978 /** @remove: Clears up any memory if needed */ 979 void (*remove)(struct phy_device *phydev); 980 981 /** 982 * @match_phy_device: Returns true if this is a suitable 983 * driver for the given phydev. If NULL, matching is based on 984 * phy_id and phy_id_mask. 985 */ 986 int (*match_phy_device)(struct phy_device *phydev); 987 988 /** 989 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 990 * register changes to enable Wake on LAN, so set_wol is 991 * provided to be called in the ethernet driver's set_wol 992 * function. 993 */ 994 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 995 996 /** 997 * @get_wol: See set_wol, but for checking whether Wake on LAN 998 * is enabled. 999 */ 1000 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1001 1002 /** 1003 * @link_change_notify: Called to inform a PHY device driver 1004 * when the core is about to change the link state. This 1005 * callback is supposed to be used as fixup hook for drivers 1006 * that need to take action when the link state 1007 * changes. Drivers are by no means allowed to mess with the 1008 * PHY device structure in their implementations. 1009 */ 1010 void (*link_change_notify)(struct phy_device *dev); 1011 1012 /** 1013 * @read_mmd: PHY specific driver override for reading a MMD 1014 * register. This function is optional for PHY specific 1015 * drivers. When not provided, the default MMD read function 1016 * will be used by phy_read_mmd(), which will use either a 1017 * direct read for Clause 45 PHYs or an indirect read for 1018 * Clause 22 PHYs. devnum is the MMD device number within the 1019 * PHY device, regnum is the register within the selected MMD 1020 * device. 1021 */ 1022 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 1023 1024 /** 1025 * @write_mmd: PHY specific driver override for writing a MMD 1026 * register. This function is optional for PHY specific 1027 * drivers. When not provided, the default MMD write function 1028 * will be used by phy_write_mmd(), which will use either a 1029 * direct write for Clause 45 PHYs, or an indirect write for 1030 * Clause 22 PHYs. devnum is the MMD device number within the 1031 * PHY device, regnum is the register within the selected MMD 1032 * device. val is the value to be written. 1033 */ 1034 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 1035 u16 val); 1036 1037 /** @read_page: Return the current PHY register page number */ 1038 int (*read_page)(struct phy_device *dev); 1039 /** @write_page: Set the current PHY register page number */ 1040 int (*write_page)(struct phy_device *dev, int page); 1041 1042 /** 1043 * @module_info: Get the size and type of the eeprom contained 1044 * within a plug-in module 1045 */ 1046 int (*module_info)(struct phy_device *dev, 1047 struct ethtool_modinfo *modinfo); 1048 1049 /** 1050 * @module_eeprom: Get the eeprom information from the plug-in 1051 * module 1052 */ 1053 int (*module_eeprom)(struct phy_device *dev, 1054 struct ethtool_eeprom *ee, u8 *data); 1055 1056 /** @cable_test_start: Start a cable test */ 1057 int (*cable_test_start)(struct phy_device *dev); 1058 1059 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1060 int (*cable_test_tdr_start)(struct phy_device *dev, 1061 const struct phy_tdr_config *config); 1062 1063 /** 1064 * @cable_test_get_status: Once per second, or on interrupt, 1065 * request the status of the test. 1066 */ 1067 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1068 1069 /* Get statistics from the PHY using ethtool */ 1070 /** @get_sset_count: Number of statistic counters */ 1071 int (*get_sset_count)(struct phy_device *dev); 1072 /** @get_strings: Names of the statistic counters */ 1073 void (*get_strings)(struct phy_device *dev, u8 *data); 1074 /** @get_stats: Return the statistic counter values */ 1075 void (*get_stats)(struct phy_device *dev, 1076 struct ethtool_stats *stats, u64 *data); 1077 1078 /* Get and Set PHY tunables */ 1079 /** @get_tunable: Return the value of a tunable */ 1080 int (*get_tunable)(struct phy_device *dev, 1081 struct ethtool_tunable *tuna, void *data); 1082 /** @set_tunable: Set the value of a tunable */ 1083 int (*set_tunable)(struct phy_device *dev, 1084 struct ethtool_tunable *tuna, 1085 const void *data); 1086 /** @set_loopback: Set the loopback mood of the PHY */ 1087 int (*set_loopback)(struct phy_device *dev, bool enable); 1088 /** @get_sqi: Get the signal quality indication */ 1089 int (*get_sqi)(struct phy_device *dev); 1090 /** @get_sqi_max: Get the maximum signal quality indication */ 1091 int (*get_sqi_max)(struct phy_device *dev); 1092 1093 /* PLCA RS interface */ 1094 /** @get_plca_cfg: Return the current PLCA configuration */ 1095 int (*get_plca_cfg)(struct phy_device *dev, 1096 struct phy_plca_cfg *plca_cfg); 1097 /** @set_plca_cfg: Set the PLCA configuration */ 1098 int (*set_plca_cfg)(struct phy_device *dev, 1099 const struct phy_plca_cfg *plca_cfg); 1100 /** @get_plca_status: Return the current PLCA status info */ 1101 int (*get_plca_status)(struct phy_device *dev, 1102 struct phy_plca_status *plca_st); 1103 1104 /** 1105 * @led_brightness_set: Set a PHY LED brightness. Index 1106 * indicates which of the PHYs led should be set. Value 1107 * follows the standard LED class meaning, e.g. LED_OFF, 1108 * LED_HALF, LED_FULL. 1109 */ 1110 int (*led_brightness_set)(struct phy_device *dev, 1111 u8 index, enum led_brightness value); 1112 1113 /** 1114 * @led_blink_set: Set a PHY LED brightness. Index indicates 1115 * which of the PHYs led should be configured to blink. Delays 1116 * are in milliseconds and if both are zero then a sensible 1117 * default should be chosen. The call should adjust the 1118 * timings in that case and if it can't match the values 1119 * specified exactly. 1120 */ 1121 int (*led_blink_set)(struct phy_device *dev, u8 index, 1122 unsigned long *delay_on, 1123 unsigned long *delay_off); 1124 /** 1125 * @led_hw_is_supported: Can the HW support the given rules. 1126 * @dev: PHY device which has the LED 1127 * @index: Which LED of the PHY device 1128 * @rules The core is interested in these rules 1129 * 1130 * Return 0 if yes, -EOPNOTSUPP if not, or an error code. 1131 */ 1132 int (*led_hw_is_supported)(struct phy_device *dev, u8 index, 1133 unsigned long rules); 1134 /** 1135 * @led_hw_control_set: Set the HW to control the LED 1136 * @dev: PHY device which has the LED 1137 * @index: Which LED of the PHY device 1138 * @rules The rules used to control the LED 1139 * 1140 * Returns 0, or a an error code. 1141 */ 1142 int (*led_hw_control_set)(struct phy_device *dev, u8 index, 1143 unsigned long rules); 1144 /** 1145 * @led_hw_control_get: Get how the HW is controlling the LED 1146 * @dev: PHY device which has the LED 1147 * @index: Which LED of the PHY device 1148 * @rules Pointer to the rules used to control the LED 1149 * 1150 * Set *@rules to how the HW is currently blinking. Returns 0 1151 * on success, or a error code if the current blinking cannot 1152 * be represented in rules, or some other error happens. 1153 */ 1154 int (*led_hw_control_get)(struct phy_device *dev, u8 index, 1155 unsigned long *rules); 1156 1157 /** 1158 * @led_polarity_set: Set the LED polarity modes 1159 * @dev: PHY device which has the LED 1160 * @index: Which LED of the PHY device 1161 * @modes: bitmap of LED polarity modes 1162 * 1163 * Configure LED with all the required polarity modes in @modes 1164 * to make it correctly turn ON or OFF. 1165 * 1166 * Returns 0, or an error code. 1167 */ 1168 int (*led_polarity_set)(struct phy_device *dev, int index, 1169 unsigned long modes); 1170 }; 1171 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 1172 struct phy_driver, mdiodrv) 1173 1174 #define PHY_ANY_ID "MATCH ANY PHY" 1175 #define PHY_ANY_UID 0xffffffff 1176 1177 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 1178 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 1179 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 1180 1181 /** 1182 * phy_id_compare - compare @id1 with @id2 taking account of @mask 1183 * @id1: first PHY ID 1184 * @id2: second PHY ID 1185 * @mask: the PHY ID mask, set bits are significant in matching 1186 * 1187 * Return true if the bits from @id1 and @id2 specified by @mask match. 1188 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask). 1189 */ 1190 static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask) 1191 { 1192 return !((id1 ^ id2) & mask); 1193 } 1194 1195 /** 1196 * phydev_id_compare - compare @id with the PHY's Clause 22 ID 1197 * @phydev: the PHY device 1198 * @id: the PHY ID to be matched 1199 * 1200 * Compare the @phydev clause 22 ID with the provided @id and return true or 1201 * false depending whether it matches, using the bound driver mask. The 1202 * @phydev must be bound to a driver. 1203 */ 1204 static inline bool phydev_id_compare(struct phy_device *phydev, u32 id) 1205 { 1206 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask); 1207 } 1208 1209 /* A Structure for boards to register fixups with the PHY Lib */ 1210 struct phy_fixup { 1211 struct list_head list; 1212 char bus_id[MII_BUS_ID_SIZE + 3]; 1213 u32 phy_uid; 1214 u32 phy_uid_mask; 1215 int (*run)(struct phy_device *phydev); 1216 }; 1217 1218 const char *phy_speed_to_str(int speed); 1219 const char *phy_duplex_to_str(unsigned int duplex); 1220 const char *phy_rate_matching_to_str(int rate_matching); 1221 1222 int phy_interface_num_ports(phy_interface_t interface); 1223 1224 /* A structure for mapping a particular speed and duplex 1225 * combination to a particular SUPPORTED and ADVERTISED value 1226 */ 1227 struct phy_setting { 1228 u32 speed; 1229 u8 duplex; 1230 u8 bit; 1231 }; 1232 1233 const struct phy_setting * 1234 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 1235 bool exact); 1236 size_t phy_speeds(unsigned int *speeds, size_t size, 1237 unsigned long *mask); 1238 void of_set_phy_supported(struct phy_device *phydev); 1239 void of_set_phy_eee_broken(struct phy_device *phydev); 1240 int phy_speed_down_core(struct phy_device *phydev); 1241 1242 /** 1243 * phy_is_started - Convenience function to check whether PHY is started 1244 * @phydev: The phy_device struct 1245 */ 1246 static inline bool phy_is_started(struct phy_device *phydev) 1247 { 1248 return phydev->state >= PHY_UP; 1249 } 1250 1251 void phy_resolve_aneg_pause(struct phy_device *phydev); 1252 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1253 void phy_check_downshift(struct phy_device *phydev); 1254 1255 /** 1256 * phy_read - Convenience function for reading a given PHY register 1257 * @phydev: the phy_device struct 1258 * @regnum: register number to read 1259 * 1260 * NOTE: MUST NOT be called from interrupt context, 1261 * because the bus read/write functions may wait for an interrupt 1262 * to conclude the operation. 1263 */ 1264 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1265 { 1266 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1267 } 1268 1269 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1270 timeout_us, sleep_before_read) \ 1271 ({ \ 1272 int __ret, __val; \ 1273 __ret = read_poll_timeout(__val = phy_read, val, \ 1274 __val < 0 || (cond), \ 1275 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1276 if (__val < 0) \ 1277 __ret = __val; \ 1278 if (__ret) \ 1279 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1280 __ret; \ 1281 }) 1282 1283 /** 1284 * __phy_read - convenience function for reading a given PHY register 1285 * @phydev: the phy_device struct 1286 * @regnum: register number to read 1287 * 1288 * The caller must have taken the MDIO bus lock. 1289 */ 1290 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1291 { 1292 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1293 } 1294 1295 /** 1296 * phy_write - Convenience function for writing a given PHY register 1297 * @phydev: the phy_device struct 1298 * @regnum: register number to write 1299 * @val: value to write to @regnum 1300 * 1301 * NOTE: MUST NOT be called from interrupt context, 1302 * because the bus read/write functions may wait for an interrupt 1303 * to conclude the operation. 1304 */ 1305 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1306 { 1307 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1308 } 1309 1310 /** 1311 * __phy_write - Convenience function for writing a given PHY register 1312 * @phydev: the phy_device struct 1313 * @regnum: register number to write 1314 * @val: value to write to @regnum 1315 * 1316 * The caller must have taken the MDIO bus lock. 1317 */ 1318 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1319 { 1320 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1321 val); 1322 } 1323 1324 /** 1325 * __phy_modify_changed() - Convenience function for modifying a PHY register 1326 * @phydev: a pointer to a &struct phy_device 1327 * @regnum: register number 1328 * @mask: bit mask of bits to clear 1329 * @set: bit mask of bits to set 1330 * 1331 * Unlocked helper function which allows a PHY register to be modified as 1332 * new register value = (old register value & ~mask) | set 1333 * 1334 * Returns negative errno, 0 if there was no change, and 1 in case of change 1335 */ 1336 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1337 u16 mask, u16 set) 1338 { 1339 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1340 regnum, mask, set); 1341 } 1342 1343 /* 1344 * phy_read_mmd - Convenience function for reading a register 1345 * from an MMD on a given PHY. 1346 */ 1347 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1348 1349 /** 1350 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1351 * condition is met or a timeout occurs 1352 * 1353 * @phydev: The phy_device struct 1354 * @devaddr: The MMD to read from 1355 * @regnum: The register on the MMD to read 1356 * @val: Variable to read the register into 1357 * @cond: Break condition (usually involving @val) 1358 * @sleep_us: Maximum time to sleep between reads in us (0 1359 * tight-loops). Should be less than ~20ms since usleep_range 1360 * is used (see Documentation/timers/timers-howto.rst). 1361 * @timeout_us: Timeout in us, 0 means never timeout 1362 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1363 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either 1364 * case, the last read value at @args is stored in @val. Must not 1365 * be called from atomic context if sleep_us or timeout_us are used. 1366 */ 1367 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1368 sleep_us, timeout_us, sleep_before_read) \ 1369 ({ \ 1370 int __ret, __val; \ 1371 __ret = read_poll_timeout(__val = phy_read_mmd, val, \ 1372 __val < 0 || (cond), \ 1373 sleep_us, timeout_us, sleep_before_read, \ 1374 phydev, devaddr, regnum); \ 1375 if (__val < 0) \ 1376 __ret = __val; \ 1377 if (__ret) \ 1378 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1379 __ret; \ 1380 }) 1381 1382 /* 1383 * __phy_read_mmd - Convenience function for reading a register 1384 * from an MMD on a given PHY. 1385 */ 1386 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1387 1388 /* 1389 * phy_write_mmd - Convenience function for writing a register 1390 * on an MMD on a given PHY. 1391 */ 1392 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1393 1394 /* 1395 * __phy_write_mmd - Convenience function for writing a register 1396 * on an MMD on a given PHY. 1397 */ 1398 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1399 1400 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1401 u16 set); 1402 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1403 u16 set); 1404 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1405 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1406 1407 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1408 u16 mask, u16 set); 1409 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1410 u16 mask, u16 set); 1411 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1412 u16 mask, u16 set); 1413 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1414 u16 mask, u16 set); 1415 1416 /** 1417 * __phy_set_bits - Convenience function for setting bits in a PHY register 1418 * @phydev: the phy_device struct 1419 * @regnum: register number to write 1420 * @val: bits to set 1421 * 1422 * The caller must have taken the MDIO bus lock. 1423 */ 1424 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1425 { 1426 return __phy_modify(phydev, regnum, 0, val); 1427 } 1428 1429 /** 1430 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1431 * @phydev: the phy_device struct 1432 * @regnum: register number to write 1433 * @val: bits to clear 1434 * 1435 * The caller must have taken the MDIO bus lock. 1436 */ 1437 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1438 u16 val) 1439 { 1440 return __phy_modify(phydev, regnum, val, 0); 1441 } 1442 1443 /** 1444 * phy_set_bits - Convenience function for setting bits in a PHY register 1445 * @phydev: the phy_device struct 1446 * @regnum: register number to write 1447 * @val: bits to set 1448 */ 1449 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1450 { 1451 return phy_modify(phydev, regnum, 0, val); 1452 } 1453 1454 /** 1455 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1456 * @phydev: the phy_device struct 1457 * @regnum: register number to write 1458 * @val: bits to clear 1459 */ 1460 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1461 { 1462 return phy_modify(phydev, regnum, val, 0); 1463 } 1464 1465 /** 1466 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1467 * on MMD 1468 * @phydev: the phy_device struct 1469 * @devad: the MMD containing register to modify 1470 * @regnum: register number to modify 1471 * @val: bits to set 1472 * 1473 * The caller must have taken the MDIO bus lock. 1474 */ 1475 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1476 u32 regnum, u16 val) 1477 { 1478 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1479 } 1480 1481 /** 1482 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1483 * on MMD 1484 * @phydev: the phy_device struct 1485 * @devad: the MMD containing register to modify 1486 * @regnum: register number to modify 1487 * @val: bits to clear 1488 * 1489 * The caller must have taken the MDIO bus lock. 1490 */ 1491 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1492 u32 regnum, u16 val) 1493 { 1494 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1495 } 1496 1497 /** 1498 * phy_set_bits_mmd - Convenience function for setting bits in a register 1499 * on MMD 1500 * @phydev: the phy_device struct 1501 * @devad: the MMD containing register to modify 1502 * @regnum: register number to modify 1503 * @val: bits to set 1504 */ 1505 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1506 u32 regnum, u16 val) 1507 { 1508 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1509 } 1510 1511 /** 1512 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1513 * on MMD 1514 * @phydev: the phy_device struct 1515 * @devad: the MMD containing register to modify 1516 * @regnum: register number to modify 1517 * @val: bits to clear 1518 */ 1519 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1520 u32 regnum, u16 val) 1521 { 1522 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1523 } 1524 1525 /** 1526 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1527 * @phydev: the phy_device struct 1528 * 1529 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1530 * PHY_MAC_INTERRUPT 1531 */ 1532 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1533 { 1534 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1535 } 1536 1537 /** 1538 * phy_polling_mode - Convenience function for testing whether polling is 1539 * used to detect PHY status changes 1540 * @phydev: the phy_device struct 1541 */ 1542 static inline bool phy_polling_mode(struct phy_device *phydev) 1543 { 1544 if (phydev->state == PHY_CABLETEST) 1545 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1546 return true; 1547 1548 return phydev->irq == PHY_POLL; 1549 } 1550 1551 /** 1552 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1553 * @phydev: the phy_device struct 1554 */ 1555 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1556 { 1557 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1558 } 1559 1560 /** 1561 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1562 * @phydev: the phy_device struct 1563 */ 1564 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1565 { 1566 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1567 } 1568 1569 /** 1570 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1571 * PTP hardware clock capabilities. 1572 * @phydev: the phy_device struct 1573 */ 1574 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1575 { 1576 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1577 } 1578 1579 /** 1580 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1581 * @phydev: the phy_device struct 1582 */ 1583 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1584 { 1585 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1586 } 1587 1588 static inline int phy_hwtstamp(struct phy_device *phydev, 1589 struct kernel_hwtstamp_config *cfg, 1590 struct netlink_ext_ack *extack) 1591 { 1592 return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack); 1593 } 1594 1595 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1596 int type) 1597 { 1598 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1599 } 1600 1601 static inline int phy_ts_info(struct phy_device *phydev, 1602 struct ethtool_ts_info *tsinfo) 1603 { 1604 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1605 } 1606 1607 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1608 int type) 1609 { 1610 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1611 } 1612 1613 /** 1614 * phy_is_internal - Convenience function for testing if a PHY is internal 1615 * @phydev: the phy_device struct 1616 */ 1617 static inline bool phy_is_internal(struct phy_device *phydev) 1618 { 1619 return phydev->is_internal; 1620 } 1621 1622 /** 1623 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1624 * @phydev: the phy_device struct 1625 */ 1626 static inline bool phy_on_sfp(struct phy_device *phydev) 1627 { 1628 return phydev->is_on_sfp_module; 1629 } 1630 1631 /** 1632 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1633 * PHY interface mode is RGMII (all variants) 1634 * @mode: the &phy_interface_t enum 1635 */ 1636 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1637 { 1638 return mode >= PHY_INTERFACE_MODE_RGMII && 1639 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1640 }; 1641 1642 /** 1643 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1644 * negotiation 1645 * @mode: one of &enum phy_interface_t 1646 * 1647 * Returns true if the PHY interface mode uses the 16-bit negotiation 1648 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1649 */ 1650 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1651 { 1652 return mode == PHY_INTERFACE_MODE_1000BASEX || 1653 mode == PHY_INTERFACE_MODE_2500BASEX; 1654 } 1655 1656 /** 1657 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1658 * is RGMII (all variants) 1659 * @phydev: the phy_device struct 1660 */ 1661 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1662 { 1663 return phy_interface_mode_is_rgmii(phydev->interface); 1664 }; 1665 1666 /** 1667 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1668 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1669 * @phydev: the phy_device struct 1670 */ 1671 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1672 { 1673 return phydev->is_pseudo_fixed_link; 1674 } 1675 1676 int phy_save_page(struct phy_device *phydev); 1677 int phy_select_page(struct phy_device *phydev, int page); 1678 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1679 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1680 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1681 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1682 u16 mask, u16 set); 1683 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1684 u16 mask, u16 set); 1685 1686 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1687 bool is_c45, 1688 struct phy_c45_device_ids *c45_ids); 1689 #if IS_ENABLED(CONFIG_PHYLIB) 1690 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1691 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1692 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1693 struct phy_device *device_phy_find_device(struct device *dev); 1694 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode); 1695 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1696 int phy_device_register(struct phy_device *phy); 1697 void phy_device_free(struct phy_device *phydev); 1698 #else 1699 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1700 { 1701 return 0; 1702 } 1703 static inline 1704 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1705 { 1706 return 0; 1707 } 1708 1709 static inline 1710 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1711 { 1712 return NULL; 1713 } 1714 1715 static inline struct phy_device *device_phy_find_device(struct device *dev) 1716 { 1717 return NULL; 1718 } 1719 1720 static inline 1721 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1722 { 1723 return NULL; 1724 } 1725 1726 static inline 1727 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1728 { 1729 return NULL; 1730 } 1731 1732 static inline int phy_device_register(struct phy_device *phy) 1733 { 1734 return 0; 1735 } 1736 1737 static inline void phy_device_free(struct phy_device *phydev) { } 1738 #endif /* CONFIG_PHYLIB */ 1739 void phy_device_remove(struct phy_device *phydev); 1740 int phy_get_c45_ids(struct phy_device *phydev); 1741 int phy_init_hw(struct phy_device *phydev); 1742 int phy_suspend(struct phy_device *phydev); 1743 int phy_resume(struct phy_device *phydev); 1744 int __phy_resume(struct phy_device *phydev); 1745 int phy_loopback(struct phy_device *phydev, bool enable); 1746 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1747 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1748 int phy_sfp_probe(struct phy_device *phydev, 1749 const struct sfp_upstream_ops *ops); 1750 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1751 phy_interface_t interface); 1752 struct phy_device *phy_find_first(struct mii_bus *bus); 1753 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1754 u32 flags, phy_interface_t interface); 1755 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1756 void (*handler)(struct net_device *), 1757 phy_interface_t interface); 1758 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1759 void (*handler)(struct net_device *), 1760 phy_interface_t interface); 1761 void phy_disconnect(struct phy_device *phydev); 1762 void phy_detach(struct phy_device *phydev); 1763 void phy_start(struct phy_device *phydev); 1764 void phy_stop(struct phy_device *phydev); 1765 int phy_config_aneg(struct phy_device *phydev); 1766 int _phy_start_aneg(struct phy_device *phydev); 1767 int phy_start_aneg(struct phy_device *phydev); 1768 int phy_aneg_done(struct phy_device *phydev); 1769 int phy_speed_down(struct phy_device *phydev, bool sync); 1770 int phy_speed_up(struct phy_device *phydev); 1771 bool phy_check_valid(int speed, int duplex, unsigned long *features); 1772 1773 int phy_restart_aneg(struct phy_device *phydev); 1774 int phy_reset_after_clk_enable(struct phy_device *phydev); 1775 1776 #if IS_ENABLED(CONFIG_PHYLIB) 1777 int phy_start_cable_test(struct phy_device *phydev, 1778 struct netlink_ext_ack *extack); 1779 int phy_start_cable_test_tdr(struct phy_device *phydev, 1780 struct netlink_ext_ack *extack, 1781 const struct phy_tdr_config *config); 1782 #else 1783 static inline 1784 int phy_start_cable_test(struct phy_device *phydev, 1785 struct netlink_ext_ack *extack) 1786 { 1787 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1788 return -EOPNOTSUPP; 1789 } 1790 static inline 1791 int phy_start_cable_test_tdr(struct phy_device *phydev, 1792 struct netlink_ext_ack *extack, 1793 const struct phy_tdr_config *config) 1794 { 1795 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1796 return -EOPNOTSUPP; 1797 } 1798 #endif 1799 1800 static inline void phy_device_reset(struct phy_device *phydev, int value) 1801 { 1802 mdio_device_reset(&phydev->mdio, value); 1803 } 1804 1805 #define phydev_err(_phydev, format, args...) \ 1806 dev_err(&_phydev->mdio.dev, format, ##args) 1807 1808 #define phydev_err_probe(_phydev, err, format, args...) \ 1809 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1810 1811 #define phydev_info(_phydev, format, args...) \ 1812 dev_info(&_phydev->mdio.dev, format, ##args) 1813 1814 #define phydev_warn(_phydev, format, args...) \ 1815 dev_warn(&_phydev->mdio.dev, format, ##args) 1816 1817 #define phydev_dbg(_phydev, format, args...) \ 1818 dev_dbg(&_phydev->mdio.dev, format, ##args) 1819 1820 static inline const char *phydev_name(const struct phy_device *phydev) 1821 { 1822 return dev_name(&phydev->mdio.dev); 1823 } 1824 1825 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1826 { 1827 mutex_lock(&phydev->mdio.bus->mdio_lock); 1828 } 1829 1830 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1831 { 1832 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1833 } 1834 1835 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1836 __printf(2, 3); 1837 char *phy_attached_info_irq(struct phy_device *phydev) 1838 __malloc; 1839 void phy_attached_info(struct phy_device *phydev); 1840 1841 /* Clause 22 PHY */ 1842 int genphy_read_abilities(struct phy_device *phydev); 1843 int genphy_setup_forced(struct phy_device *phydev); 1844 int genphy_restart_aneg(struct phy_device *phydev); 1845 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1846 int genphy_config_eee_advert(struct phy_device *phydev); 1847 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1848 int genphy_aneg_done(struct phy_device *phydev); 1849 int genphy_update_link(struct phy_device *phydev); 1850 int genphy_read_lpa(struct phy_device *phydev); 1851 int genphy_read_status_fixed(struct phy_device *phydev); 1852 int genphy_read_status(struct phy_device *phydev); 1853 int genphy_read_master_slave(struct phy_device *phydev); 1854 int genphy_suspend(struct phy_device *phydev); 1855 int genphy_resume(struct phy_device *phydev); 1856 int genphy_loopback(struct phy_device *phydev, bool enable); 1857 int genphy_soft_reset(struct phy_device *phydev); 1858 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1859 1860 static inline int genphy_config_aneg(struct phy_device *phydev) 1861 { 1862 return __genphy_config_aneg(phydev, false); 1863 } 1864 1865 static inline int genphy_no_config_intr(struct phy_device *phydev) 1866 { 1867 return 0; 1868 } 1869 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1870 u16 regnum); 1871 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1872 u16 regnum, u16 val); 1873 1874 /* Clause 37 */ 1875 int genphy_c37_config_aneg(struct phy_device *phydev); 1876 int genphy_c37_read_status(struct phy_device *phydev); 1877 1878 /* Clause 45 PHY */ 1879 int genphy_c45_restart_aneg(struct phy_device *phydev); 1880 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1881 int genphy_c45_aneg_done(struct phy_device *phydev); 1882 int genphy_c45_read_link(struct phy_device *phydev); 1883 int genphy_c45_read_lpa(struct phy_device *phydev); 1884 int genphy_c45_read_pma(struct phy_device *phydev); 1885 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1886 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 1887 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1888 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1889 int genphy_c45_read_mdix(struct phy_device *phydev); 1890 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1891 int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev); 1892 int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev); 1893 int genphy_c45_read_eee_abilities(struct phy_device *phydev); 1894 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 1895 int genphy_c45_read_status(struct phy_device *phydev); 1896 int genphy_c45_baset1_read_status(struct phy_device *phydev); 1897 int genphy_c45_config_aneg(struct phy_device *phydev); 1898 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1899 int genphy_c45_pma_resume(struct phy_device *phydev); 1900 int genphy_c45_pma_suspend(struct phy_device *phydev); 1901 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 1902 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 1903 struct phy_plca_cfg *plca_cfg); 1904 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 1905 const struct phy_plca_cfg *plca_cfg); 1906 int genphy_c45_plca_get_status(struct phy_device *phydev, 1907 struct phy_plca_status *plca_st); 1908 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv, 1909 unsigned long *lp, bool *is_enabled); 1910 int genphy_c45_ethtool_get_eee(struct phy_device *phydev, 1911 struct ethtool_keee *data); 1912 int genphy_c45_ethtool_set_eee(struct phy_device *phydev, 1913 struct ethtool_keee *data); 1914 int genphy_c45_write_eee_adv(struct phy_device *phydev, unsigned long *adv); 1915 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev); 1916 int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv); 1917 1918 /* Generic C45 PHY driver */ 1919 extern struct phy_driver genphy_c45_driver; 1920 1921 /* The gen10g_* functions are the old Clause 45 stub */ 1922 int gen10g_config_aneg(struct phy_device *phydev); 1923 1924 static inline int phy_read_status(struct phy_device *phydev) 1925 { 1926 if (!phydev->drv) 1927 return -EIO; 1928 1929 if (phydev->drv->read_status) 1930 return phydev->drv->read_status(phydev); 1931 else 1932 return genphy_read_status(phydev); 1933 } 1934 1935 void phy_driver_unregister(struct phy_driver *drv); 1936 void phy_drivers_unregister(struct phy_driver *drv, int n); 1937 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1938 int phy_drivers_register(struct phy_driver *new_driver, int n, 1939 struct module *owner); 1940 void phy_error(struct phy_device *phydev); 1941 void phy_state_machine(struct work_struct *work); 1942 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1943 void phy_trigger_machine(struct phy_device *phydev); 1944 void phy_mac_interrupt(struct phy_device *phydev); 1945 void phy_start_machine(struct phy_device *phydev); 1946 void phy_stop_machine(struct phy_device *phydev); 1947 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1948 struct ethtool_link_ksettings *cmd); 1949 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1950 const struct ethtool_link_ksettings *cmd); 1951 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1952 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1953 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1954 int phy_disable_interrupts(struct phy_device *phydev); 1955 void phy_request_interrupt(struct phy_device *phydev); 1956 void phy_free_interrupt(struct phy_device *phydev); 1957 void phy_print_status(struct phy_device *phydev); 1958 int phy_get_rate_matching(struct phy_device *phydev, 1959 phy_interface_t iface); 1960 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1961 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1962 void phy_advertise_supported(struct phy_device *phydev); 1963 void phy_support_sym_pause(struct phy_device *phydev); 1964 void phy_support_asym_pause(struct phy_device *phydev); 1965 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1966 bool autoneg); 1967 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1968 bool phy_validate_pause(struct phy_device *phydev, 1969 struct ethtool_pauseparam *pp); 1970 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1971 1972 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 1973 const int *delay_values, int size, bool is_rx); 1974 1975 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1976 bool *tx_pause, bool *rx_pause); 1977 1978 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1979 int (*run)(struct phy_device *)); 1980 int phy_register_fixup_for_id(const char *bus_id, 1981 int (*run)(struct phy_device *)); 1982 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1983 int (*run)(struct phy_device *)); 1984 1985 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1986 int phy_unregister_fixup_for_id(const char *bus_id); 1987 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1988 1989 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1990 int phy_get_eee_err(struct phy_device *phydev); 1991 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data); 1992 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_keee *data); 1993 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1994 void phy_ethtool_get_wol(struct phy_device *phydev, 1995 struct ethtool_wolinfo *wol); 1996 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1997 struct ethtool_link_ksettings *cmd); 1998 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1999 const struct ethtool_link_ksettings *cmd); 2000 int phy_ethtool_nway_reset(struct net_device *ndev); 2001 int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size); 2002 void phy_package_leave(struct phy_device *phydev); 2003 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 2004 int base_addr, size_t priv_size); 2005 2006 int __init mdio_bus_init(void); 2007 void mdio_bus_exit(void); 2008 2009 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 2010 int phy_ethtool_get_sset_count(struct phy_device *phydev); 2011 int phy_ethtool_get_stats(struct phy_device *phydev, 2012 struct ethtool_stats *stats, u64 *data); 2013 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 2014 struct phy_plca_cfg *plca_cfg); 2015 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 2016 const struct phy_plca_cfg *plca_cfg, 2017 struct netlink_ext_ack *extack); 2018 int phy_ethtool_get_plca_status(struct phy_device *phydev, 2019 struct phy_plca_status *plca_st); 2020 2021 int __phy_hwtstamp_get(struct phy_device *phydev, 2022 struct kernel_hwtstamp_config *config); 2023 int __phy_hwtstamp_set(struct phy_device *phydev, 2024 struct kernel_hwtstamp_config *config, 2025 struct netlink_ext_ack *extack); 2026 2027 static inline int phy_package_address(struct phy_device *phydev, 2028 unsigned int addr_offset) 2029 { 2030 struct phy_package_shared *shared = phydev->shared; 2031 u8 base_addr = shared->base_addr; 2032 2033 if (addr_offset >= PHY_MAX_ADDR - base_addr) 2034 return -EIO; 2035 2036 /* we know that addr will be in the range 0..31 and thus the 2037 * implicit cast to a signed int is not a problem. 2038 */ 2039 return base_addr + addr_offset; 2040 } 2041 2042 static inline int phy_package_read(struct phy_device *phydev, 2043 unsigned int addr_offset, u32 regnum) 2044 { 2045 int addr = phy_package_address(phydev, addr_offset); 2046 2047 if (addr < 0) 2048 return addr; 2049 2050 return mdiobus_read(phydev->mdio.bus, addr, regnum); 2051 } 2052 2053 static inline int __phy_package_read(struct phy_device *phydev, 2054 unsigned int addr_offset, u32 regnum) 2055 { 2056 int addr = phy_package_address(phydev, addr_offset); 2057 2058 if (addr < 0) 2059 return addr; 2060 2061 return __mdiobus_read(phydev->mdio.bus, addr, regnum); 2062 } 2063 2064 static inline int phy_package_write(struct phy_device *phydev, 2065 unsigned int addr_offset, u32 regnum, 2066 u16 val) 2067 { 2068 int addr = phy_package_address(phydev, addr_offset); 2069 2070 if (addr < 0) 2071 return addr; 2072 2073 return mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2074 } 2075 2076 static inline int __phy_package_write(struct phy_device *phydev, 2077 unsigned int addr_offset, u32 regnum, 2078 u16 val) 2079 { 2080 int addr = phy_package_address(phydev, addr_offset); 2081 2082 if (addr < 0) 2083 return addr; 2084 2085 return __mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2086 } 2087 2088 int __phy_package_read_mmd(struct phy_device *phydev, 2089 unsigned int addr_offset, int devad, 2090 u32 regnum); 2091 2092 int phy_package_read_mmd(struct phy_device *phydev, 2093 unsigned int addr_offset, int devad, 2094 u32 regnum); 2095 2096 int __phy_package_write_mmd(struct phy_device *phydev, 2097 unsigned int addr_offset, int devad, 2098 u32 regnum, u16 val); 2099 2100 int phy_package_write_mmd(struct phy_device *phydev, 2101 unsigned int addr_offset, int devad, 2102 u32 regnum, u16 val); 2103 2104 static inline bool __phy_package_set_once(struct phy_device *phydev, 2105 unsigned int b) 2106 { 2107 struct phy_package_shared *shared = phydev->shared; 2108 2109 if (!shared) 2110 return false; 2111 2112 return !test_and_set_bit(b, &shared->flags); 2113 } 2114 2115 static inline bool phy_package_init_once(struct phy_device *phydev) 2116 { 2117 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 2118 } 2119 2120 static inline bool phy_package_probe_once(struct phy_device *phydev) 2121 { 2122 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 2123 } 2124 2125 extern struct bus_type mdio_bus_type; 2126 2127 struct mdio_board_info { 2128 const char *bus_id; 2129 char modalias[MDIO_NAME_SIZE]; 2130 int mdio_addr; 2131 const void *platform_data; 2132 }; 2133 2134 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 2135 int mdiobus_register_board_info(const struct mdio_board_info *info, 2136 unsigned int n); 2137 #else 2138 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 2139 unsigned int n) 2140 { 2141 return 0; 2142 } 2143 #endif 2144 2145 2146 /** 2147 * phy_module_driver() - Helper macro for registering PHY drivers 2148 * @__phy_drivers: array of PHY drivers to register 2149 * @__count: Numbers of members in array 2150 * 2151 * Helper macro for PHY drivers which do not do anything special in module 2152 * init/exit. Each module may only use this macro once, and calling it 2153 * replaces module_init() and module_exit(). 2154 */ 2155 #define phy_module_driver(__phy_drivers, __count) \ 2156 static int __init phy_module_init(void) \ 2157 { \ 2158 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 2159 } \ 2160 module_init(phy_module_init); \ 2161 static void __exit phy_module_exit(void) \ 2162 { \ 2163 phy_drivers_unregister(__phy_drivers, __count); \ 2164 } \ 2165 module_exit(phy_module_exit) 2166 2167 #define module_phy_driver(__phy_drivers) \ 2168 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 2169 2170 bool phy_driver_is_genphy(struct phy_device *phydev); 2171 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 2172 2173 #endif /* __PHY_H */ 2174