1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/linkmode.h> 18 #include <linux/mdio.h> 19 #include <linux/mii.h> 20 #include <linux/mii_timestamper.h> 21 #include <linux/module.h> 22 #include <linux/timer.h> 23 #include <linux/workqueue.h> 24 #include <linux/mod_devicetable.h> 25 #include <linux/u64_stats_sync.h> 26 27 #include <linux/atomic.h> 28 29 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 30 SUPPORTED_TP | \ 31 SUPPORTED_MII) 32 33 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 34 SUPPORTED_10baseT_Full) 35 36 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 37 SUPPORTED_100baseT_Full) 38 39 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 40 SUPPORTED_1000baseT_Full) 41 42 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 43 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 44 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 45 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 50 51 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 52 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 53 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 54 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 55 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 56 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 57 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 58 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 59 60 extern const int phy_basic_ports_array[3]; 61 extern const int phy_fibre_port_array[1]; 62 extern const int phy_all_ports_features_array[7]; 63 extern const int phy_10_100_features_array[4]; 64 extern const int phy_basic_t1_features_array[2]; 65 extern const int phy_gbit_features_array[2]; 66 extern const int phy_10gbit_features_array[1]; 67 68 /* 69 * Set phydev->irq to PHY_POLL if interrupts are not supported, 70 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if 71 * the attached driver handles the interrupt 72 */ 73 #define PHY_POLL -1 74 #define PHY_IGNORE_INTERRUPT -2 75 76 #define PHY_IS_INTERNAL 0x00000001 77 #define PHY_RST_AFTER_CLK_EN 0x00000002 78 #define MDIO_DEVICE_IS_PHY 0x80000000 79 80 /* Interface Mode definitions */ 81 typedef enum { 82 PHY_INTERFACE_MODE_NA, 83 PHY_INTERFACE_MODE_INTERNAL, 84 PHY_INTERFACE_MODE_MII, 85 PHY_INTERFACE_MODE_GMII, 86 PHY_INTERFACE_MODE_SGMII, 87 PHY_INTERFACE_MODE_TBI, 88 PHY_INTERFACE_MODE_REVMII, 89 PHY_INTERFACE_MODE_RMII, 90 PHY_INTERFACE_MODE_RGMII, 91 PHY_INTERFACE_MODE_RGMII_ID, 92 PHY_INTERFACE_MODE_RGMII_RXID, 93 PHY_INTERFACE_MODE_RGMII_TXID, 94 PHY_INTERFACE_MODE_RTBI, 95 PHY_INTERFACE_MODE_SMII, 96 PHY_INTERFACE_MODE_XGMII, 97 PHY_INTERFACE_MODE_MOCA, 98 PHY_INTERFACE_MODE_QSGMII, 99 PHY_INTERFACE_MODE_TRGMII, 100 PHY_INTERFACE_MODE_1000BASEX, 101 PHY_INTERFACE_MODE_2500BASEX, 102 PHY_INTERFACE_MODE_RXAUI, 103 PHY_INTERFACE_MODE_XAUI, 104 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 105 PHY_INTERFACE_MODE_10GBASER, 106 PHY_INTERFACE_MODE_USXGMII, 107 /* 10GBASE-KR - with Clause 73 AN */ 108 PHY_INTERFACE_MODE_10GKR, 109 PHY_INTERFACE_MODE_MAX, 110 } phy_interface_t; 111 112 /** 113 * phy_supported_speeds - return all speeds currently supported by a phy device 114 * @phy: The phy device to return supported speeds of. 115 * @speeds: buffer to store supported speeds in. 116 * @size: size of speeds buffer. 117 * 118 * Description: Returns the number of supported speeds, and fills 119 * the speeds buffer with the supported speeds. If speeds buffer is 120 * too small to contain all currently supported speeds, will return as 121 * many speeds as can fit. 122 */ 123 unsigned int phy_supported_speeds(struct phy_device *phy, 124 unsigned int *speeds, 125 unsigned int size); 126 127 /** 128 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 129 * @interface: enum phy_interface_t value 130 * 131 * Description: maps 'enum phy_interface_t' defined in this file 132 * into the device tree binding of 'phy-mode', so that Ethernet 133 * device driver can get phy interface from device tree. 134 */ 135 static inline const char *phy_modes(phy_interface_t interface) 136 { 137 switch (interface) { 138 case PHY_INTERFACE_MODE_NA: 139 return ""; 140 case PHY_INTERFACE_MODE_INTERNAL: 141 return "internal"; 142 case PHY_INTERFACE_MODE_MII: 143 return "mii"; 144 case PHY_INTERFACE_MODE_GMII: 145 return "gmii"; 146 case PHY_INTERFACE_MODE_SGMII: 147 return "sgmii"; 148 case PHY_INTERFACE_MODE_TBI: 149 return "tbi"; 150 case PHY_INTERFACE_MODE_REVMII: 151 return "rev-mii"; 152 case PHY_INTERFACE_MODE_RMII: 153 return "rmii"; 154 case PHY_INTERFACE_MODE_RGMII: 155 return "rgmii"; 156 case PHY_INTERFACE_MODE_RGMII_ID: 157 return "rgmii-id"; 158 case PHY_INTERFACE_MODE_RGMII_RXID: 159 return "rgmii-rxid"; 160 case PHY_INTERFACE_MODE_RGMII_TXID: 161 return "rgmii-txid"; 162 case PHY_INTERFACE_MODE_RTBI: 163 return "rtbi"; 164 case PHY_INTERFACE_MODE_SMII: 165 return "smii"; 166 case PHY_INTERFACE_MODE_XGMII: 167 return "xgmii"; 168 case PHY_INTERFACE_MODE_MOCA: 169 return "moca"; 170 case PHY_INTERFACE_MODE_QSGMII: 171 return "qsgmii"; 172 case PHY_INTERFACE_MODE_TRGMII: 173 return "trgmii"; 174 case PHY_INTERFACE_MODE_1000BASEX: 175 return "1000base-x"; 176 case PHY_INTERFACE_MODE_2500BASEX: 177 return "2500base-x"; 178 case PHY_INTERFACE_MODE_RXAUI: 179 return "rxaui"; 180 case PHY_INTERFACE_MODE_XAUI: 181 return "xaui"; 182 case PHY_INTERFACE_MODE_10GBASER: 183 return "10gbase-r"; 184 case PHY_INTERFACE_MODE_USXGMII: 185 return "usxgmii"; 186 case PHY_INTERFACE_MODE_10GKR: 187 return "10gbase-kr"; 188 default: 189 return "unknown"; 190 } 191 } 192 193 194 #define PHY_INIT_TIMEOUT 100000 195 #define PHY_FORCE_TIMEOUT 10 196 197 #define PHY_MAX_ADDR 32 198 199 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 200 #define PHY_ID_FMT "%s:%02x" 201 202 #define MII_BUS_ID_SIZE 61 203 204 /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit 205 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */ 206 #define MII_ADDR_C45 (1<<30) 207 #define MII_DEVADDR_C45_SHIFT 16 208 #define MII_REGADDR_C45_MASK GENMASK(15, 0) 209 210 struct device; 211 struct phylink; 212 struct sfp_bus; 213 struct sfp_upstream_ops; 214 struct sk_buff; 215 216 struct mdio_bus_stats { 217 u64_stats_t transfers; 218 u64_stats_t errors; 219 u64_stats_t writes; 220 u64_stats_t reads; 221 /* Must be last, add new statistics above */ 222 struct u64_stats_sync syncp; 223 }; 224 225 /* 226 * The Bus class for PHYs. Devices which provide access to 227 * PHYs should register using this structure 228 */ 229 struct mii_bus { 230 struct module *owner; 231 const char *name; 232 char id[MII_BUS_ID_SIZE]; 233 void *priv; 234 int (*read)(struct mii_bus *bus, int addr, int regnum); 235 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 236 int (*reset)(struct mii_bus *bus); 237 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 238 239 /* 240 * A lock to ensure that only one thing can read/write 241 * the MDIO bus at a time 242 */ 243 struct mutex mdio_lock; 244 245 struct device *parent; 246 enum { 247 MDIOBUS_ALLOCATED = 1, 248 MDIOBUS_REGISTERED, 249 MDIOBUS_UNREGISTERED, 250 MDIOBUS_RELEASED, 251 } state; 252 struct device dev; 253 254 /* list of all PHYs on bus */ 255 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 256 257 /* PHY addresses to be ignored when probing */ 258 u32 phy_mask; 259 260 /* PHY addresses to ignore the TA/read failure */ 261 u32 phy_ignore_ta_mask; 262 263 /* 264 * An array of interrupts, each PHY's interrupt at the index 265 * matching its address 266 */ 267 int irq[PHY_MAX_ADDR]; 268 269 /* GPIO reset pulse width in microseconds */ 270 int reset_delay_us; 271 /* RESET GPIO descriptor pointer */ 272 struct gpio_desc *reset_gpiod; 273 }; 274 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 275 276 struct mii_bus *mdiobus_alloc_size(size_t); 277 static inline struct mii_bus *mdiobus_alloc(void) 278 { 279 return mdiobus_alloc_size(0); 280 } 281 282 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 283 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 284 void mdiobus_unregister(struct mii_bus *bus); 285 void mdiobus_free(struct mii_bus *bus); 286 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 287 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 288 { 289 return devm_mdiobus_alloc_size(dev, 0); 290 } 291 292 struct mii_bus *mdio_find_bus(const char *mdio_name); 293 void devm_mdiobus_free(struct device *dev, struct mii_bus *bus); 294 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); 295 296 #define PHY_INTERRUPT_DISABLED false 297 #define PHY_INTERRUPT_ENABLED true 298 299 /* PHY state machine states: 300 * 301 * DOWN: PHY device and driver are not ready for anything. probe 302 * should be called if and only if the PHY is in this state, 303 * given that the PHY device exists. 304 * - PHY driver probe function will set the state to READY 305 * 306 * READY: PHY is ready to send and receive packets, but the 307 * controller is not. By default, PHYs which do not implement 308 * probe will be set to this state by phy_probe(). 309 * - start will set the state to UP 310 * 311 * UP: The PHY and attached device are ready to do work. 312 * Interrupts should be started here. 313 * - timer moves to NOLINK or RUNNING 314 * 315 * NOLINK: PHY is up, but not currently plugged in. 316 * - irq or timer will set RUNNING if link comes back 317 * - phy_stop moves to HALTED 318 * 319 * RUNNING: PHY is currently up, running, and possibly sending 320 * and/or receiving packets 321 * - irq or timer will set NOLINK if link goes down 322 * - phy_stop moves to HALTED 323 * 324 * HALTED: PHY is up, but no polling or interrupts are done. Or 325 * PHY is in an error state. 326 * - phy_start moves to UP 327 */ 328 enum phy_state { 329 PHY_DOWN = 0, 330 PHY_READY, 331 PHY_HALTED, 332 PHY_UP, 333 PHY_RUNNING, 334 PHY_NOLINK, 335 }; 336 337 /** 338 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 339 * @devices_in_package: Bit vector of devices present. 340 * @device_ids: The device identifer for each present device. 341 */ 342 struct phy_c45_device_ids { 343 u32 devices_in_package; 344 u32 device_ids[8]; 345 }; 346 347 struct macsec_context; 348 struct macsec_ops; 349 350 /* phy_device: An instance of a PHY 351 * 352 * drv: Pointer to the driver for this PHY instance 353 * phy_id: UID for this device found during discovery 354 * c45_ids: 802.3-c45 Device Identifers if is_c45. 355 * is_c45: Set to true if this phy uses clause 45 addressing. 356 * is_internal: Set to true if this phy is internal to a MAC. 357 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc. 358 * is_gigabit_capable: Set to true if PHY supports 1000Mbps 359 * has_fixups: Set to true if this phy has fixups/quirks. 360 * suspended: Set to true if this phy has been suspended successfully. 361 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 362 * loopback_enabled: Set true if this phy has been loopbacked successfully. 363 * state: state of the PHY for management purposes 364 * dev_flags: Device-specific flags used by the PHY driver. 365 * irq: IRQ number of the PHY's interrupt (-1 if none) 366 * phy_timer: The timer for handling the state machine 367 * sfp_bus_attached: flag indicating whether the SFP bus has been attached 368 * sfp_bus: SFP bus attached to this PHY's fiber port 369 * attached_dev: The attached enet driver's device instance ptr 370 * adjust_link: Callback for the enet controller to respond to 371 * changes in the link state. 372 * macsec_ops: MACsec offloading ops. 373 * 374 * speed, duplex, pause, supported, advertising, lp_advertising, 375 * and autoneg are used like in mii_if_info 376 * 377 * interrupts currently only supports enabled or disabled, 378 * but could be changed in the future to support enabling 379 * and disabling specific interrupts 380 * 381 * Contains some infrastructure for polling and interrupt 382 * handling, as well as handling shifts in PHY hardware state 383 */ 384 struct phy_device { 385 struct mdio_device mdio; 386 387 /* Information about the PHY type */ 388 /* And management functions */ 389 struct phy_driver *drv; 390 391 u32 phy_id; 392 393 struct phy_c45_device_ids c45_ids; 394 unsigned is_c45:1; 395 unsigned is_internal:1; 396 unsigned is_pseudo_fixed_link:1; 397 unsigned is_gigabit_capable:1; 398 unsigned has_fixups:1; 399 unsigned suspended:1; 400 unsigned sysfs_links:1; 401 unsigned loopback_enabled:1; 402 403 unsigned autoneg:1; 404 /* The most recently read link state */ 405 unsigned link:1; 406 unsigned autoneg_complete:1; 407 408 /* Interrupts are enabled */ 409 unsigned interrupts:1; 410 411 enum phy_state state; 412 413 u32 dev_flags; 414 415 phy_interface_t interface; 416 417 /* 418 * forced speed & duplex (no autoneg) 419 * partner speed & duplex & pause (autoneg) 420 */ 421 int speed; 422 int duplex; 423 int pause; 424 int asym_pause; 425 426 /* Union of PHY and Attached devices' supported link modes */ 427 /* See ethtool.h for more info */ 428 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 429 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 430 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 431 /* used with phy_speed_down */ 432 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 433 434 /* Energy efficient ethernet modes which should be prohibited */ 435 u32 eee_broken_modes; 436 437 #ifdef CONFIG_LED_TRIGGER_PHY 438 struct phy_led_trigger *phy_led_triggers; 439 unsigned int phy_num_led_triggers; 440 struct phy_led_trigger *last_triggered; 441 442 struct phy_led_trigger *led_link_trigger; 443 #endif 444 445 /* 446 * Interrupt number for this PHY 447 * -1 means no interrupt 448 */ 449 int irq; 450 451 /* private data pointer */ 452 /* For use by PHYs to maintain extra state */ 453 void *priv; 454 455 /* Interrupt and Polling infrastructure */ 456 struct delayed_work state_queue; 457 458 struct mutex lock; 459 460 /* This may be modified under the rtnl lock */ 461 bool sfp_bus_attached; 462 struct sfp_bus *sfp_bus; 463 struct phylink *phylink; 464 struct net_device *attached_dev; 465 struct mii_timestamper *mii_ts; 466 467 u8 mdix; 468 u8 mdix_ctrl; 469 470 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier); 471 void (*adjust_link)(struct net_device *dev); 472 473 #if IS_ENABLED(CONFIG_MACSEC) 474 /* MACsec management functions */ 475 const struct macsec_ops *macsec_ops; 476 #endif 477 }; 478 #define to_phy_device(d) container_of(to_mdio_device(d), \ 479 struct phy_device, mdio) 480 481 /* struct phy_driver: Driver structure for a particular PHY type 482 * 483 * driver_data: static driver data 484 * phy_id: The result of reading the UID registers of this PHY 485 * type, and ANDing them with the phy_id_mask. This driver 486 * only works for PHYs with IDs which match this field 487 * name: The friendly name of this PHY type 488 * phy_id_mask: Defines the important bits of the phy_id 489 * features: A mandatory list of features (speed, duplex, etc) 490 * supported by this PHY 491 * flags: A bitfield defining certain other features this PHY 492 * supports (like interrupts) 493 * 494 * All functions are optional. If config_aneg or read_status 495 * are not implemented, the phy core uses the genphy versions. 496 * Note that none of these functions should be called from 497 * interrupt time. The goal is for the bus read/write functions 498 * to be able to block when the bus transaction is happening, 499 * and be freed up by an interrupt (The MPC85xx has this ability, 500 * though it is not currently supported in the driver). 501 */ 502 struct phy_driver { 503 struct mdio_driver_common mdiodrv; 504 u32 phy_id; 505 char *name; 506 u32 phy_id_mask; 507 const unsigned long * const features; 508 u32 flags; 509 const void *driver_data; 510 511 /* 512 * Called to issue a PHY software reset 513 */ 514 int (*soft_reset)(struct phy_device *phydev); 515 516 /* 517 * Called to initialize the PHY, 518 * including after a reset 519 */ 520 int (*config_init)(struct phy_device *phydev); 521 522 /* 523 * Called during discovery. Used to set 524 * up device-specific structures, if any 525 */ 526 int (*probe)(struct phy_device *phydev); 527 528 /* 529 * Probe the hardware to determine what abilities it has. 530 * Should only set phydev->supported. 531 */ 532 int (*get_features)(struct phy_device *phydev); 533 534 /* PHY Power Management */ 535 int (*suspend)(struct phy_device *phydev); 536 int (*resume)(struct phy_device *phydev); 537 538 /* 539 * Configures the advertisement and resets 540 * autonegotiation if phydev->autoneg is on, 541 * forces the speed to the current settings in phydev 542 * if phydev->autoneg is off 543 */ 544 int (*config_aneg)(struct phy_device *phydev); 545 546 /* Determines the auto negotiation result */ 547 int (*aneg_done)(struct phy_device *phydev); 548 549 /* Determines the negotiated speed and duplex */ 550 int (*read_status)(struct phy_device *phydev); 551 552 /* Clears any pending interrupts */ 553 int (*ack_interrupt)(struct phy_device *phydev); 554 555 /* Enables or disables interrupts */ 556 int (*config_intr)(struct phy_device *phydev); 557 558 /* 559 * Checks if the PHY generated an interrupt. 560 * For multi-PHY devices with shared PHY interrupt pin 561 */ 562 int (*did_interrupt)(struct phy_device *phydev); 563 564 /* Override default interrupt handling */ 565 int (*handle_interrupt)(struct phy_device *phydev); 566 567 /* Clears up any memory if needed */ 568 void (*remove)(struct phy_device *phydev); 569 570 /* Returns true if this is a suitable driver for the given 571 * phydev. If NULL, matching is based on phy_id and 572 * phy_id_mask. 573 */ 574 int (*match_phy_device)(struct phy_device *phydev); 575 576 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to 577 * enable Wake on LAN, so set_wol is provided to be called in the 578 * ethernet driver's set_wol function. */ 579 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 580 581 /* See set_wol, but for checking whether Wake on LAN is enabled. */ 582 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 583 584 /* 585 * Called to inform a PHY device driver when the core is about to 586 * change the link state. This callback is supposed to be used as 587 * fixup hook for drivers that need to take action when the link 588 * state changes. Drivers are by no means allowed to mess with the 589 * PHY device structure in their implementations. 590 */ 591 void (*link_change_notify)(struct phy_device *dev); 592 593 /* 594 * Phy specific driver override for reading a MMD register. 595 * This function is optional for PHY specific drivers. When 596 * not provided, the default MMD read function will be used 597 * by phy_read_mmd(), which will use either a direct read for 598 * Clause 45 PHYs or an indirect read for Clause 22 PHYs. 599 * devnum is the MMD device number within the PHY device, 600 * regnum is the register within the selected MMD device. 601 */ 602 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 603 604 /* 605 * Phy specific driver override for writing a MMD register. 606 * This function is optional for PHY specific drivers. When 607 * not provided, the default MMD write function will be used 608 * by phy_write_mmd(), which will use either a direct write for 609 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs. 610 * devnum is the MMD device number within the PHY device, 611 * regnum is the register within the selected MMD device. 612 * val is the value to be written. 613 */ 614 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 615 u16 val); 616 617 int (*read_page)(struct phy_device *dev); 618 int (*write_page)(struct phy_device *dev, int page); 619 620 /* Get the size and type of the eeprom contained within a plug-in 621 * module */ 622 int (*module_info)(struct phy_device *dev, 623 struct ethtool_modinfo *modinfo); 624 625 /* Get the eeprom information from the plug-in module */ 626 int (*module_eeprom)(struct phy_device *dev, 627 struct ethtool_eeprom *ee, u8 *data); 628 629 /* Get statistics from the phy using ethtool */ 630 int (*get_sset_count)(struct phy_device *dev); 631 void (*get_strings)(struct phy_device *dev, u8 *data); 632 void (*get_stats)(struct phy_device *dev, 633 struct ethtool_stats *stats, u64 *data); 634 635 /* Get and Set PHY tunables */ 636 int (*get_tunable)(struct phy_device *dev, 637 struct ethtool_tunable *tuna, void *data); 638 int (*set_tunable)(struct phy_device *dev, 639 struct ethtool_tunable *tuna, 640 const void *data); 641 int (*set_loopback)(struct phy_device *dev, bool enable); 642 }; 643 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 644 struct phy_driver, mdiodrv) 645 646 #define PHY_ANY_ID "MATCH ANY PHY" 647 #define PHY_ANY_UID 0xffffffff 648 649 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 650 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 651 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 652 653 /* A Structure for boards to register fixups with the PHY Lib */ 654 struct phy_fixup { 655 struct list_head list; 656 char bus_id[MII_BUS_ID_SIZE + 3]; 657 u32 phy_uid; 658 u32 phy_uid_mask; 659 int (*run)(struct phy_device *phydev); 660 }; 661 662 const char *phy_speed_to_str(int speed); 663 const char *phy_duplex_to_str(unsigned int duplex); 664 665 /* A structure for mapping a particular speed and duplex 666 * combination to a particular SUPPORTED and ADVERTISED value 667 */ 668 struct phy_setting { 669 u32 speed; 670 u8 duplex; 671 u8 bit; 672 }; 673 674 const struct phy_setting * 675 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 676 bool exact); 677 size_t phy_speeds(unsigned int *speeds, size_t size, 678 unsigned long *mask); 679 void of_set_phy_supported(struct phy_device *phydev); 680 void of_set_phy_eee_broken(struct phy_device *phydev); 681 int phy_speed_down_core(struct phy_device *phydev); 682 683 /** 684 * phy_is_started - Convenience function to check whether PHY is started 685 * @phydev: The phy_device struct 686 */ 687 static inline bool phy_is_started(struct phy_device *phydev) 688 { 689 return phydev->state >= PHY_UP; 690 } 691 692 void phy_resolve_aneg_pause(struct phy_device *phydev); 693 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 694 695 /** 696 * phy_read - Convenience function for reading a given PHY register 697 * @phydev: the phy_device struct 698 * @regnum: register number to read 699 * 700 * NOTE: MUST NOT be called from interrupt context, 701 * because the bus read/write functions may wait for an interrupt 702 * to conclude the operation. 703 */ 704 static inline int phy_read(struct phy_device *phydev, u32 regnum) 705 { 706 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 707 } 708 709 /** 710 * __phy_read - convenience function for reading a given PHY register 711 * @phydev: the phy_device struct 712 * @regnum: register number to read 713 * 714 * The caller must have taken the MDIO bus lock. 715 */ 716 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 717 { 718 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 719 } 720 721 /** 722 * phy_write - Convenience function for writing a given PHY register 723 * @phydev: the phy_device struct 724 * @regnum: register number to write 725 * @val: value to write to @regnum 726 * 727 * NOTE: MUST NOT be called from interrupt context, 728 * because the bus read/write functions may wait for an interrupt 729 * to conclude the operation. 730 */ 731 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 732 { 733 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 734 } 735 736 /** 737 * __phy_write - Convenience function for writing a given PHY register 738 * @phydev: the phy_device struct 739 * @regnum: register number to write 740 * @val: value to write to @regnum 741 * 742 * The caller must have taken the MDIO bus lock. 743 */ 744 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 745 { 746 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 747 val); 748 } 749 750 /** 751 * phy_read_mmd - Convenience function for reading a register 752 * from an MMD on a given PHY. 753 * @phydev: The phy_device struct 754 * @devad: The MMD to read from 755 * @regnum: The register on the MMD to read 756 * 757 * Same rules as for phy_read(); 758 */ 759 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 760 761 /** 762 * __phy_read_mmd - Convenience function for reading a register 763 * from an MMD on a given PHY. 764 * @phydev: The phy_device struct 765 * @devad: The MMD to read from 766 * @regnum: The register on the MMD to read 767 * 768 * Same rules as for __phy_read(); 769 */ 770 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 771 772 /** 773 * phy_write_mmd - Convenience function for writing a register 774 * on an MMD on a given PHY. 775 * @phydev: The phy_device struct 776 * @devad: The MMD to write to 777 * @regnum: The register on the MMD to read 778 * @val: value to write to @regnum 779 * 780 * Same rules as for phy_write(); 781 */ 782 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 783 784 /** 785 * __phy_write_mmd - Convenience function for writing a register 786 * on an MMD on a given PHY. 787 * @phydev: The phy_device struct 788 * @devad: The MMD to write to 789 * @regnum: The register on the MMD to read 790 * @val: value to write to @regnum 791 * 792 * Same rules as for __phy_write(); 793 */ 794 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 795 796 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 797 u16 set); 798 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 799 u16 set); 800 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 801 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 802 803 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 804 u16 mask, u16 set); 805 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 806 u16 mask, u16 set); 807 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 808 u16 mask, u16 set); 809 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 810 u16 mask, u16 set); 811 812 /** 813 * __phy_set_bits - Convenience function for setting bits in a PHY register 814 * @phydev: the phy_device struct 815 * @regnum: register number to write 816 * @val: bits to set 817 * 818 * The caller must have taken the MDIO bus lock. 819 */ 820 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 821 { 822 return __phy_modify(phydev, regnum, 0, val); 823 } 824 825 /** 826 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 827 * @phydev: the phy_device struct 828 * @regnum: register number to write 829 * @val: bits to clear 830 * 831 * The caller must have taken the MDIO bus lock. 832 */ 833 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 834 u16 val) 835 { 836 return __phy_modify(phydev, regnum, val, 0); 837 } 838 839 /** 840 * phy_set_bits - Convenience function for setting bits in a PHY register 841 * @phydev: the phy_device struct 842 * @regnum: register number to write 843 * @val: bits to set 844 */ 845 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 846 { 847 return phy_modify(phydev, regnum, 0, val); 848 } 849 850 /** 851 * phy_clear_bits - Convenience function for clearing bits in a PHY register 852 * @phydev: the phy_device struct 853 * @regnum: register number to write 854 * @val: bits to clear 855 */ 856 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 857 { 858 return phy_modify(phydev, regnum, val, 0); 859 } 860 861 /** 862 * __phy_set_bits_mmd - Convenience function for setting bits in a register 863 * on MMD 864 * @phydev: the phy_device struct 865 * @devad: the MMD containing register to modify 866 * @regnum: register number to modify 867 * @val: bits to set 868 * 869 * The caller must have taken the MDIO bus lock. 870 */ 871 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 872 u32 regnum, u16 val) 873 { 874 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 875 } 876 877 /** 878 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 879 * on MMD 880 * @phydev: the phy_device struct 881 * @devad: the MMD containing register to modify 882 * @regnum: register number to modify 883 * @val: bits to clear 884 * 885 * The caller must have taken the MDIO bus lock. 886 */ 887 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 888 u32 regnum, u16 val) 889 { 890 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 891 } 892 893 /** 894 * phy_set_bits_mmd - Convenience function for setting bits in a register 895 * on MMD 896 * @phydev: the phy_device struct 897 * @devad: the MMD containing register to modify 898 * @regnum: register number to modify 899 * @val: bits to set 900 */ 901 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 902 u32 regnum, u16 val) 903 { 904 return phy_modify_mmd(phydev, devad, regnum, 0, val); 905 } 906 907 /** 908 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 909 * on MMD 910 * @phydev: the phy_device struct 911 * @devad: the MMD containing register to modify 912 * @regnum: register number to modify 913 * @val: bits to clear 914 */ 915 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 916 u32 regnum, u16 val) 917 { 918 return phy_modify_mmd(phydev, devad, regnum, val, 0); 919 } 920 921 /** 922 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 923 * @phydev: the phy_device struct 924 * 925 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 926 * PHY_IGNORE_INTERRUPT 927 */ 928 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 929 { 930 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT; 931 } 932 933 /** 934 * phy_polling_mode - Convenience function for testing whether polling is 935 * used to detect PHY status changes 936 * @phydev: the phy_device struct 937 */ 938 static inline bool phy_polling_mode(struct phy_device *phydev) 939 { 940 return phydev->irq == PHY_POLL; 941 } 942 943 /** 944 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 945 * @phydev: the phy_device struct 946 */ 947 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 948 { 949 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 950 } 951 952 /** 953 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 954 * @phydev: the phy_device struct 955 */ 956 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 957 { 958 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 959 } 960 961 /** 962 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 963 * PTP hardware clock capabilities. 964 * @phydev: the phy_device struct 965 */ 966 static inline bool phy_has_tsinfo(struct phy_device *phydev) 967 { 968 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 969 } 970 971 /** 972 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 973 * @phydev: the phy_device struct 974 */ 975 static inline bool phy_has_txtstamp(struct phy_device *phydev) 976 { 977 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 978 } 979 980 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) 981 { 982 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); 983 } 984 985 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 986 int type) 987 { 988 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 989 } 990 991 static inline int phy_ts_info(struct phy_device *phydev, 992 struct ethtool_ts_info *tsinfo) 993 { 994 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 995 } 996 997 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 998 int type) 999 { 1000 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1001 } 1002 1003 /** 1004 * phy_is_internal - Convenience function for testing if a PHY is internal 1005 * @phydev: the phy_device struct 1006 */ 1007 static inline bool phy_is_internal(struct phy_device *phydev) 1008 { 1009 return phydev->is_internal; 1010 } 1011 1012 /** 1013 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1014 * PHY interface mode is RGMII (all variants) 1015 * @mode: the phy_interface_t enum 1016 */ 1017 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1018 { 1019 return mode >= PHY_INTERFACE_MODE_RGMII && 1020 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1021 }; 1022 1023 /** 1024 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z 1025 * negotiation 1026 * @mode: one of &enum phy_interface_t 1027 * 1028 * Returns true if the phy interface mode uses the 16-bit negotiation 1029 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1030 */ 1031 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1032 { 1033 return mode == PHY_INTERFACE_MODE_1000BASEX || 1034 mode == PHY_INTERFACE_MODE_2500BASEX; 1035 } 1036 1037 /** 1038 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1039 * is RGMII (all variants) 1040 * @phydev: the phy_device struct 1041 */ 1042 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1043 { 1044 return phy_interface_mode_is_rgmii(phydev->interface); 1045 }; 1046 1047 /* 1048 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1049 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1050 * @phydev: the phy_device struct 1051 */ 1052 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1053 { 1054 return phydev->is_pseudo_fixed_link; 1055 } 1056 1057 int phy_save_page(struct phy_device *phydev); 1058 int phy_select_page(struct phy_device *phydev, int page); 1059 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1060 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1061 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1062 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1063 u16 mask, u16 set); 1064 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1065 u16 mask, u16 set); 1066 1067 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1068 bool is_c45, 1069 struct phy_c45_device_ids *c45_ids); 1070 #if IS_ENABLED(CONFIG_PHYLIB) 1071 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1072 int phy_device_register(struct phy_device *phy); 1073 void phy_device_free(struct phy_device *phydev); 1074 #else 1075 static inline 1076 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1077 { 1078 return NULL; 1079 } 1080 1081 static inline int phy_device_register(struct phy_device *phy) 1082 { 1083 return 0; 1084 } 1085 1086 static inline void phy_device_free(struct phy_device *phydev) { } 1087 #endif /* CONFIG_PHYLIB */ 1088 void phy_device_remove(struct phy_device *phydev); 1089 int phy_init_hw(struct phy_device *phydev); 1090 int phy_suspend(struct phy_device *phydev); 1091 int phy_resume(struct phy_device *phydev); 1092 int __phy_resume(struct phy_device *phydev); 1093 int phy_loopback(struct phy_device *phydev, bool enable); 1094 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1095 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1096 int phy_sfp_probe(struct phy_device *phydev, 1097 const struct sfp_upstream_ops *ops); 1098 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1099 phy_interface_t interface); 1100 struct phy_device *phy_find_first(struct mii_bus *bus); 1101 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1102 u32 flags, phy_interface_t interface); 1103 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1104 void (*handler)(struct net_device *), 1105 phy_interface_t interface); 1106 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1107 void (*handler)(struct net_device *), 1108 phy_interface_t interface); 1109 void phy_disconnect(struct phy_device *phydev); 1110 void phy_detach(struct phy_device *phydev); 1111 void phy_start(struct phy_device *phydev); 1112 void phy_stop(struct phy_device *phydev); 1113 int phy_start_aneg(struct phy_device *phydev); 1114 int phy_aneg_done(struct phy_device *phydev); 1115 int phy_speed_down(struct phy_device *phydev, bool sync); 1116 int phy_speed_up(struct phy_device *phydev); 1117 1118 int phy_restart_aneg(struct phy_device *phydev); 1119 int phy_reset_after_clk_enable(struct phy_device *phydev); 1120 1121 static inline void phy_device_reset(struct phy_device *phydev, int value) 1122 { 1123 mdio_device_reset(&phydev->mdio, value); 1124 } 1125 1126 #define phydev_err(_phydev, format, args...) \ 1127 dev_err(&_phydev->mdio.dev, format, ##args) 1128 1129 #define phydev_info(_phydev, format, args...) \ 1130 dev_info(&_phydev->mdio.dev, format, ##args) 1131 1132 #define phydev_warn(_phydev, format, args...) \ 1133 dev_warn(&_phydev->mdio.dev, format, ##args) 1134 1135 #define phydev_dbg(_phydev, format, args...) \ 1136 dev_dbg(&_phydev->mdio.dev, format, ##args) 1137 1138 static inline const char *phydev_name(const struct phy_device *phydev) 1139 { 1140 return dev_name(&phydev->mdio.dev); 1141 } 1142 1143 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1144 { 1145 mutex_lock(&phydev->mdio.bus->mdio_lock); 1146 } 1147 1148 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1149 { 1150 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1151 } 1152 1153 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1154 __printf(2, 3); 1155 char *phy_attached_info_irq(struct phy_device *phydev) 1156 __malloc; 1157 void phy_attached_info(struct phy_device *phydev); 1158 1159 /* Clause 22 PHY */ 1160 int genphy_read_abilities(struct phy_device *phydev); 1161 int genphy_setup_forced(struct phy_device *phydev); 1162 int genphy_restart_aneg(struct phy_device *phydev); 1163 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1164 int genphy_config_eee_advert(struct phy_device *phydev); 1165 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1166 int genphy_aneg_done(struct phy_device *phydev); 1167 int genphy_update_link(struct phy_device *phydev); 1168 int genphy_read_lpa(struct phy_device *phydev); 1169 int genphy_read_status_fixed(struct phy_device *phydev); 1170 int genphy_read_status(struct phy_device *phydev); 1171 int genphy_suspend(struct phy_device *phydev); 1172 int genphy_resume(struct phy_device *phydev); 1173 int genphy_loopback(struct phy_device *phydev, bool enable); 1174 int genphy_soft_reset(struct phy_device *phydev); 1175 1176 static inline int genphy_config_aneg(struct phy_device *phydev) 1177 { 1178 return __genphy_config_aneg(phydev, false); 1179 } 1180 1181 static inline int genphy_no_soft_reset(struct phy_device *phydev) 1182 { 1183 return 0; 1184 } 1185 static inline int genphy_no_ack_interrupt(struct phy_device *phydev) 1186 { 1187 return 0; 1188 } 1189 static inline int genphy_no_config_intr(struct phy_device *phydev) 1190 { 1191 return 0; 1192 } 1193 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1194 u16 regnum); 1195 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1196 u16 regnum, u16 val); 1197 1198 /* Clause 37 */ 1199 int genphy_c37_config_aneg(struct phy_device *phydev); 1200 int genphy_c37_read_status(struct phy_device *phydev); 1201 1202 /* Clause 45 PHY */ 1203 int genphy_c45_restart_aneg(struct phy_device *phydev); 1204 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1205 int genphy_c45_aneg_done(struct phy_device *phydev); 1206 int genphy_c45_read_link(struct phy_device *phydev); 1207 int genphy_c45_read_lpa(struct phy_device *phydev); 1208 int genphy_c45_read_pma(struct phy_device *phydev); 1209 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1210 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1211 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1212 int genphy_c45_read_mdix(struct phy_device *phydev); 1213 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1214 int genphy_c45_read_status(struct phy_device *phydev); 1215 int genphy_c45_config_aneg(struct phy_device *phydev); 1216 1217 /* The gen10g_* functions are the old Clause 45 stub */ 1218 int gen10g_config_aneg(struct phy_device *phydev); 1219 1220 static inline int phy_read_status(struct phy_device *phydev) 1221 { 1222 if (!phydev->drv) 1223 return -EIO; 1224 1225 if (phydev->drv->read_status) 1226 return phydev->drv->read_status(phydev); 1227 else 1228 return genphy_read_status(phydev); 1229 } 1230 1231 void phy_driver_unregister(struct phy_driver *drv); 1232 void phy_drivers_unregister(struct phy_driver *drv, int n); 1233 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1234 int phy_drivers_register(struct phy_driver *new_driver, int n, 1235 struct module *owner); 1236 void phy_state_machine(struct work_struct *work); 1237 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1238 void phy_mac_interrupt(struct phy_device *phydev); 1239 void phy_start_machine(struct phy_device *phydev); 1240 void phy_stop_machine(struct phy_device *phydev); 1241 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1242 struct ethtool_link_ksettings *cmd); 1243 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1244 const struct ethtool_link_ksettings *cmd); 1245 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1246 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1247 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1248 void phy_request_interrupt(struct phy_device *phydev); 1249 void phy_free_interrupt(struct phy_device *phydev); 1250 void phy_print_status(struct phy_device *phydev); 1251 int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1252 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1253 void phy_advertise_supported(struct phy_device *phydev); 1254 void phy_support_sym_pause(struct phy_device *phydev); 1255 void phy_support_asym_pause(struct phy_device *phydev); 1256 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1257 bool autoneg); 1258 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1259 bool phy_validate_pause(struct phy_device *phydev, 1260 struct ethtool_pauseparam *pp); 1261 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1262 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1263 bool *tx_pause, bool *rx_pause); 1264 1265 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1266 int (*run)(struct phy_device *)); 1267 int phy_register_fixup_for_id(const char *bus_id, 1268 int (*run)(struct phy_device *)); 1269 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1270 int (*run)(struct phy_device *)); 1271 1272 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1273 int phy_unregister_fixup_for_id(const char *bus_id); 1274 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1275 1276 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1277 int phy_get_eee_err(struct phy_device *phydev); 1278 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1279 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1280 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1281 void phy_ethtool_get_wol(struct phy_device *phydev, 1282 struct ethtool_wolinfo *wol); 1283 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1284 struct ethtool_link_ksettings *cmd); 1285 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1286 const struct ethtool_link_ksettings *cmd); 1287 int phy_ethtool_nway_reset(struct net_device *ndev); 1288 1289 #if IS_ENABLED(CONFIG_PHYLIB) 1290 int __init mdio_bus_init(void); 1291 void mdio_bus_exit(void); 1292 #endif 1293 1294 /* Inline function for use within net/core/ethtool.c (built-in) */ 1295 static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data) 1296 { 1297 if (!phydev->drv) 1298 return -EIO; 1299 1300 mutex_lock(&phydev->lock); 1301 phydev->drv->get_strings(phydev, data); 1302 mutex_unlock(&phydev->lock); 1303 1304 return 0; 1305 } 1306 1307 static inline int phy_ethtool_get_sset_count(struct phy_device *phydev) 1308 { 1309 int ret; 1310 1311 if (!phydev->drv) 1312 return -EIO; 1313 1314 if (phydev->drv->get_sset_count && 1315 phydev->drv->get_strings && 1316 phydev->drv->get_stats) { 1317 mutex_lock(&phydev->lock); 1318 ret = phydev->drv->get_sset_count(phydev); 1319 mutex_unlock(&phydev->lock); 1320 1321 return ret; 1322 } 1323 1324 return -EOPNOTSUPP; 1325 } 1326 1327 static inline int phy_ethtool_get_stats(struct phy_device *phydev, 1328 struct ethtool_stats *stats, u64 *data) 1329 { 1330 if (!phydev->drv) 1331 return -EIO; 1332 1333 mutex_lock(&phydev->lock); 1334 phydev->drv->get_stats(phydev, stats, data); 1335 mutex_unlock(&phydev->lock); 1336 1337 return 0; 1338 } 1339 1340 extern struct bus_type mdio_bus_type; 1341 1342 struct mdio_board_info { 1343 const char *bus_id; 1344 char modalias[MDIO_NAME_SIZE]; 1345 int mdio_addr; 1346 const void *platform_data; 1347 }; 1348 1349 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1350 int mdiobus_register_board_info(const struct mdio_board_info *info, 1351 unsigned int n); 1352 #else 1353 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1354 unsigned int n) 1355 { 1356 return 0; 1357 } 1358 #endif 1359 1360 1361 /** 1362 * module_phy_driver() - Helper macro for registering PHY drivers 1363 * @__phy_drivers: array of PHY drivers to register 1364 * 1365 * Helper macro for PHY drivers which do not do anything special in module 1366 * init/exit. Each module may only use this macro once, and calling it 1367 * replaces module_init() and module_exit(). 1368 */ 1369 #define phy_module_driver(__phy_drivers, __count) \ 1370 static int __init phy_module_init(void) \ 1371 { \ 1372 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 1373 } \ 1374 module_init(phy_module_init); \ 1375 static void __exit phy_module_exit(void) \ 1376 { \ 1377 phy_drivers_unregister(__phy_drivers, __count); \ 1378 } \ 1379 module_exit(phy_module_exit) 1380 1381 #define module_phy_driver(__phy_drivers) \ 1382 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 1383 1384 bool phy_driver_is_genphy(struct phy_device *phydev); 1385 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 1386 1387 #endif /* __PHY_H */ 1388