1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/leds.h> 18 #include <linux/linkmode.h> 19 #include <linux/netlink.h> 20 #include <linux/mdio.h> 21 #include <linux/mii.h> 22 #include <linux/mii_timestamper.h> 23 #include <linux/module.h> 24 #include <linux/timer.h> 25 #include <linux/workqueue.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/u64_stats_sync.h> 28 #include <linux/irqreturn.h> 29 #include <linux/iopoll.h> 30 #include <linux/refcount.h> 31 32 #include <linux/atomic.h> 33 #include <net/eee.h> 34 35 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 36 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 37 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 38 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 39 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 40 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 41 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init; 42 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap2_features) __ro_after_init; 43 44 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 45 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 46 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 47 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 48 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 49 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 50 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features) 51 #define PHY_EEE_CAP2_FEATURES ((unsigned long *)&phy_eee_cap2_features) 52 53 extern const int phy_basic_ports_array[3]; 54 55 /* 56 * Set phydev->irq to PHY_POLL if interrupts are not supported, 57 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 58 * the attached MAC driver handles the interrupt 59 */ 60 #define PHY_POLL -1 61 #define PHY_MAC_INTERRUPT -2 62 63 #define PHY_IS_INTERNAL 0x00000001 64 #define PHY_RST_AFTER_CLK_EN 0x00000002 65 #define PHY_POLL_CABLE_TEST 0x00000004 66 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008 67 #define MDIO_DEVICE_IS_PHY 0x80000000 68 69 /** 70 * enum phy_interface_t - Interface Mode definitions 71 * 72 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 73 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 74 * @PHY_INTERFACE_MODE_MII: Media-independent interface 75 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 76 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 77 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 78 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 79 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 80 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 81 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 82 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 83 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 84 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 85 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 86 * @PHY_INTERFACE_MODE_SMII: Serial MII 87 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 88 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 89 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 90 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII 91 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 92 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 93 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 94 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 95 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 96 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 97 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 98 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 99 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 100 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 101 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 102 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 103 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 104 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 105 * @PHY_INTERFACE_MODE_10G_QXGMII: 10G-QXGMII - 4 ports over 10G USXGMII 106 * @PHY_INTERFACE_MODE_MAX: Book keeping 107 * 108 * Describes the interface between the MAC and PHY. 109 */ 110 typedef enum { 111 PHY_INTERFACE_MODE_NA, 112 PHY_INTERFACE_MODE_INTERNAL, 113 PHY_INTERFACE_MODE_MII, 114 PHY_INTERFACE_MODE_GMII, 115 PHY_INTERFACE_MODE_SGMII, 116 PHY_INTERFACE_MODE_TBI, 117 PHY_INTERFACE_MODE_REVMII, 118 PHY_INTERFACE_MODE_RMII, 119 PHY_INTERFACE_MODE_REVRMII, 120 PHY_INTERFACE_MODE_RGMII, 121 PHY_INTERFACE_MODE_RGMII_ID, 122 PHY_INTERFACE_MODE_RGMII_RXID, 123 PHY_INTERFACE_MODE_RGMII_TXID, 124 PHY_INTERFACE_MODE_RTBI, 125 PHY_INTERFACE_MODE_SMII, 126 PHY_INTERFACE_MODE_XGMII, 127 PHY_INTERFACE_MODE_XLGMII, 128 PHY_INTERFACE_MODE_MOCA, 129 PHY_INTERFACE_MODE_PSGMII, 130 PHY_INTERFACE_MODE_QSGMII, 131 PHY_INTERFACE_MODE_TRGMII, 132 PHY_INTERFACE_MODE_100BASEX, 133 PHY_INTERFACE_MODE_1000BASEX, 134 PHY_INTERFACE_MODE_2500BASEX, 135 PHY_INTERFACE_MODE_5GBASER, 136 PHY_INTERFACE_MODE_RXAUI, 137 PHY_INTERFACE_MODE_XAUI, 138 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 139 PHY_INTERFACE_MODE_10GBASER, 140 PHY_INTERFACE_MODE_25GBASER, 141 PHY_INTERFACE_MODE_USXGMII, 142 /* 10GBASE-KR - with Clause 73 AN */ 143 PHY_INTERFACE_MODE_10GKR, 144 PHY_INTERFACE_MODE_QUSGMII, 145 PHY_INTERFACE_MODE_1000BASEKX, 146 PHY_INTERFACE_MODE_10G_QXGMII, 147 PHY_INTERFACE_MODE_MAX, 148 } phy_interface_t; 149 150 /* PHY interface mode bitmap handling */ 151 #define DECLARE_PHY_INTERFACE_MASK(name) \ 152 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 153 154 static inline void phy_interface_zero(unsigned long *intf) 155 { 156 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 157 } 158 159 static inline bool phy_interface_empty(const unsigned long *intf) 160 { 161 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 162 } 163 164 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 165 const unsigned long *b) 166 { 167 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 168 } 169 170 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 171 const unsigned long *b) 172 { 173 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 174 } 175 176 static inline void phy_interface_set_rgmii(unsigned long *intf) 177 { 178 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 179 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 180 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 181 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 182 } 183 184 /** 185 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 186 * @interface: enum phy_interface_t value 187 * 188 * Description: maps enum &phy_interface_t defined in this file 189 * into the device tree binding of 'phy-mode', so that Ethernet 190 * device driver can get PHY interface from device tree. 191 */ 192 static inline const char *phy_modes(phy_interface_t interface) 193 { 194 switch (interface) { 195 case PHY_INTERFACE_MODE_NA: 196 return ""; 197 case PHY_INTERFACE_MODE_INTERNAL: 198 return "internal"; 199 case PHY_INTERFACE_MODE_MII: 200 return "mii"; 201 case PHY_INTERFACE_MODE_GMII: 202 return "gmii"; 203 case PHY_INTERFACE_MODE_SGMII: 204 return "sgmii"; 205 case PHY_INTERFACE_MODE_TBI: 206 return "tbi"; 207 case PHY_INTERFACE_MODE_REVMII: 208 return "rev-mii"; 209 case PHY_INTERFACE_MODE_RMII: 210 return "rmii"; 211 case PHY_INTERFACE_MODE_REVRMII: 212 return "rev-rmii"; 213 case PHY_INTERFACE_MODE_RGMII: 214 return "rgmii"; 215 case PHY_INTERFACE_MODE_RGMII_ID: 216 return "rgmii-id"; 217 case PHY_INTERFACE_MODE_RGMII_RXID: 218 return "rgmii-rxid"; 219 case PHY_INTERFACE_MODE_RGMII_TXID: 220 return "rgmii-txid"; 221 case PHY_INTERFACE_MODE_RTBI: 222 return "rtbi"; 223 case PHY_INTERFACE_MODE_SMII: 224 return "smii"; 225 case PHY_INTERFACE_MODE_XGMII: 226 return "xgmii"; 227 case PHY_INTERFACE_MODE_XLGMII: 228 return "xlgmii"; 229 case PHY_INTERFACE_MODE_MOCA: 230 return "moca"; 231 case PHY_INTERFACE_MODE_PSGMII: 232 return "psgmii"; 233 case PHY_INTERFACE_MODE_QSGMII: 234 return "qsgmii"; 235 case PHY_INTERFACE_MODE_TRGMII: 236 return "trgmii"; 237 case PHY_INTERFACE_MODE_1000BASEX: 238 return "1000base-x"; 239 case PHY_INTERFACE_MODE_1000BASEKX: 240 return "1000base-kx"; 241 case PHY_INTERFACE_MODE_2500BASEX: 242 return "2500base-x"; 243 case PHY_INTERFACE_MODE_5GBASER: 244 return "5gbase-r"; 245 case PHY_INTERFACE_MODE_RXAUI: 246 return "rxaui"; 247 case PHY_INTERFACE_MODE_XAUI: 248 return "xaui"; 249 case PHY_INTERFACE_MODE_10GBASER: 250 return "10gbase-r"; 251 case PHY_INTERFACE_MODE_25GBASER: 252 return "25gbase-r"; 253 case PHY_INTERFACE_MODE_USXGMII: 254 return "usxgmii"; 255 case PHY_INTERFACE_MODE_10GKR: 256 return "10gbase-kr"; 257 case PHY_INTERFACE_MODE_100BASEX: 258 return "100base-x"; 259 case PHY_INTERFACE_MODE_QUSGMII: 260 return "qusgmii"; 261 case PHY_INTERFACE_MODE_10G_QXGMII: 262 return "10g-qxgmii"; 263 default: 264 return "unknown"; 265 } 266 } 267 268 /** 269 * rgmii_clock - map link speed to the clock rate 270 * @speed: link speed value 271 * 272 * Description: maps RGMII supported link speeds 273 * into the clock rates. 274 * 275 * Returns: clock rate or negative errno 276 */ 277 static inline long rgmii_clock(int speed) 278 { 279 switch (speed) { 280 case SPEED_10: 281 return 2500000; 282 case SPEED_100: 283 return 25000000; 284 case SPEED_1000: 285 return 125000000; 286 default: 287 return -EINVAL; 288 } 289 } 290 291 #define PHY_MAX_ADDR 32 292 293 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 294 #define PHY_ID_FMT "%s:%02x" 295 296 #define MII_BUS_ID_SIZE 61 297 298 struct device; 299 struct kernel_hwtstamp_config; 300 struct phylink; 301 struct sfp_bus; 302 struct sfp_upstream_ops; 303 struct sk_buff; 304 305 /** 306 * struct mdio_bus_stats - Statistics counters for MDIO busses 307 * @transfers: Total number of transfers, i.e. @writes + @reads 308 * @errors: Number of MDIO transfers that returned an error 309 * @writes: Number of write transfers 310 * @reads: Number of read transfers 311 * @syncp: Synchronisation for incrementing statistics 312 */ 313 struct mdio_bus_stats { 314 u64_stats_t transfers; 315 u64_stats_t errors; 316 u64_stats_t writes; 317 u64_stats_t reads; 318 /* Must be last, add new statistics above */ 319 struct u64_stats_sync syncp; 320 }; 321 322 /** 323 * struct phy_package_shared - Shared information in PHY packages 324 * @base_addr: Base PHY address of PHY package used to combine PHYs 325 * in one package and for offset calculation of phy_package_read/write 326 * @np: Pointer to the Device Node if PHY package defined in DT 327 * @refcnt: Number of PHYs connected to this shared data 328 * @flags: Initialization of PHY package 329 * @priv_size: Size of the shared private data @priv 330 * @priv: Driver private data shared across a PHY package 331 * 332 * Represents a shared structure between different phydev's in the same 333 * package, for example a quad PHY. See phy_package_join() and 334 * phy_package_leave(). 335 */ 336 struct phy_package_shared { 337 u8 base_addr; 338 /* With PHY package defined in DT this points to the PHY package node */ 339 struct device_node *np; 340 refcount_t refcnt; 341 unsigned long flags; 342 size_t priv_size; 343 344 /* private data pointer */ 345 /* note that this pointer is shared between different phydevs and 346 * the user has to take care of appropriate locking. It is allocated 347 * and freed automatically by phy_package_join() and 348 * phy_package_leave(). 349 */ 350 void *priv; 351 }; 352 353 /* used as bit number in atomic bitops */ 354 #define PHY_SHARED_F_INIT_DONE 0 355 #define PHY_SHARED_F_PROBE_DONE 1 356 357 /** 358 * struct mii_bus - Represents an MDIO bus 359 * 360 * @owner: Who owns this device 361 * @name: User friendly name for this MDIO device, or driver name 362 * @id: Unique identifier for this bus, typical from bus hierarchy 363 * @priv: Driver private data 364 * 365 * The Bus class for PHYs. Devices which provide access to 366 * PHYs should register using this structure 367 */ 368 struct mii_bus { 369 struct module *owner; 370 const char *name; 371 char id[MII_BUS_ID_SIZE]; 372 void *priv; 373 /** @read: Perform a read transfer on the bus */ 374 int (*read)(struct mii_bus *bus, int addr, int regnum); 375 /** @write: Perform a write transfer on the bus */ 376 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 377 /** @read_c45: Perform a C45 read transfer on the bus */ 378 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 379 /** @write_c45: Perform a C45 write transfer on the bus */ 380 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 381 int regnum, u16 val); 382 /** @reset: Perform a reset of the bus */ 383 int (*reset)(struct mii_bus *bus); 384 385 /** @stats: Statistic counters per device on the bus */ 386 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 387 388 /** 389 * @mdio_lock: A lock to ensure that only one thing can read/write 390 * the MDIO bus at a time 391 */ 392 struct mutex mdio_lock; 393 394 /** @parent: Parent device of this bus */ 395 struct device *parent; 396 /** @state: State of bus structure */ 397 enum { 398 MDIOBUS_ALLOCATED = 1, 399 MDIOBUS_REGISTERED, 400 MDIOBUS_UNREGISTERED, 401 MDIOBUS_RELEASED, 402 } state; 403 404 /** @dev: Kernel device representation */ 405 struct device dev; 406 407 /** @mdio_map: list of all MDIO devices on bus */ 408 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 409 410 /** @phy_mask: PHY addresses to be ignored when probing */ 411 u32 phy_mask; 412 413 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 414 u32 phy_ignore_ta_mask; 415 416 /** 417 * @irq: An array of interrupts, each PHY's interrupt at the index 418 * matching its address 419 */ 420 int irq[PHY_MAX_ADDR]; 421 422 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 423 int reset_delay_us; 424 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 425 int reset_post_delay_us; 426 /** @reset_gpiod: Reset GPIO descriptor pointer */ 427 struct gpio_desc *reset_gpiod; 428 429 /** @shared_lock: protect access to the shared element */ 430 struct mutex shared_lock; 431 432 /** @shared: shared state across different PHYs */ 433 struct phy_package_shared *shared[PHY_MAX_ADDR]; 434 }; 435 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 436 437 struct mii_bus *mdiobus_alloc_size(size_t size); 438 439 /** 440 * mdiobus_alloc - Allocate an MDIO bus structure 441 * 442 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 443 * for the driver to register the bus. 444 */ 445 static inline struct mii_bus *mdiobus_alloc(void) 446 { 447 return mdiobus_alloc_size(0); 448 } 449 450 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 451 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 452 struct module *owner); 453 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 454 #define devm_mdiobus_register(dev, bus) \ 455 __devm_mdiobus_register(dev, bus, THIS_MODULE) 456 457 void mdiobus_unregister(struct mii_bus *bus); 458 void mdiobus_free(struct mii_bus *bus); 459 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 460 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 461 { 462 return devm_mdiobus_alloc_size(dev, 0); 463 } 464 465 struct mii_bus *mdio_find_bus(const char *mdio_name); 466 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); 467 468 #define PHY_INTERRUPT_DISABLED false 469 #define PHY_INTERRUPT_ENABLED true 470 471 /** 472 * enum phy_state - PHY state machine states: 473 * 474 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 475 * should be called if and only if the PHY is in this state, 476 * given that the PHY device exists. 477 * - PHY driver probe function will set the state to @PHY_READY 478 * 479 * @PHY_READY: PHY is ready to send and receive packets, but the 480 * controller is not. By default, PHYs which do not implement 481 * probe will be set to this state by phy_probe(). 482 * - start will set the state to UP 483 * 484 * @PHY_UP: The PHY and attached device are ready to do work. 485 * Interrupts should be started here. 486 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 487 * 488 * @PHY_NOLINK: PHY is up, but not currently plugged in. 489 * - irq or timer will set @PHY_RUNNING if link comes back 490 * - phy_stop moves to @PHY_HALTED 491 * 492 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 493 * and/or receiving packets 494 * - irq or timer will set @PHY_NOLINK if link goes down 495 * - phy_stop moves to @PHY_HALTED 496 * 497 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 498 * is not expected to work, carrier will be indicated as down. PHY will be 499 * poll once per second, or on interrupt for it current state. 500 * Once complete, move to UP to restart the PHY. 501 * - phy_stop aborts the running test and moves to @PHY_HALTED 502 * 503 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. 504 * - phy_start moves to @PHY_UP 505 * 506 * @PHY_ERROR: PHY is up, but is in an error state. 507 * - phy_stop moves to @PHY_HALTED 508 */ 509 enum phy_state { 510 PHY_DOWN = 0, 511 PHY_READY, 512 PHY_HALTED, 513 PHY_ERROR, 514 PHY_UP, 515 PHY_RUNNING, 516 PHY_NOLINK, 517 PHY_CABLETEST, 518 }; 519 520 #define MDIO_MMD_NUM 32 521 522 /** 523 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 524 * @devices_in_package: IEEE 802.3 devices in package register value. 525 * @mmds_present: bit vector of MMDs present. 526 * @device_ids: The device identifer for each present device. 527 */ 528 struct phy_c45_device_ids { 529 u32 devices_in_package; 530 u32 mmds_present; 531 u32 device_ids[MDIO_MMD_NUM]; 532 }; 533 534 struct macsec_context; 535 struct macsec_ops; 536 537 /** 538 * struct phy_device - An instance of a PHY 539 * 540 * @mdio: MDIO bus this PHY is on 541 * @drv: Pointer to the driver for this PHY instance 542 * @devlink: Create a link between phy dev and mac dev, if the external phy 543 * used by current mac interface is managed by another mac interface. 544 * @phyindex: Unique id across the phy's parent tree of phys to address the PHY 545 * from userspace, similar to ifindex. A zero index means the PHY 546 * wasn't assigned an id yet. 547 * @phy_id: UID for this device found during discovery 548 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 549 * @is_c45: Set to true if this PHY uses clause 45 addressing. 550 * @is_internal: Set to true if this PHY is internal to a MAC. 551 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 552 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 553 * @has_fixups: Set to true if this PHY has fixups/quirks. 554 * @suspended: Set to true if this PHY has been suspended successfully. 555 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 556 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 557 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 558 * @downshifted_rate: Set true if link speed has been downshifted. 559 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 560 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 561 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN 562 * enabled. 563 * @state: State of the PHY for management purposes 564 * @dev_flags: Device-specific flags used by the PHY driver. 565 * 566 * - Bits [15:0] are free to use by the PHY driver to communicate 567 * driver specific behavior. 568 * - Bits [23:16] are currently reserved for future use. 569 * - Bits [31:24] are reserved for defining generic 570 * PHY driver behavior. 571 * @irq: IRQ number of the PHY's interrupt (-1 if none) 572 * @phylink: Pointer to phylink instance for this PHY 573 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 574 * @sfp_bus: SFP bus attached to this PHY's fiber port 575 * @attached_dev: The attached enet driver's device instance ptr 576 * @adjust_link: Callback for the enet controller to respond to changes: in the 577 * link state. 578 * @phy_link_change: Callback for phylink for notification of link change 579 * @macsec_ops: MACsec offloading ops. 580 * 581 * @speed: Current link speed 582 * @duplex: Current duplex 583 * @port: Current port 584 * @pause: Current pause 585 * @asym_pause: Current asymmetric pause 586 * @supported: Combined MAC/PHY supported linkmodes 587 * @advertising: Currently advertised linkmodes 588 * @adv_old: Saved advertised while power saving for WoL 589 * @supported_eee: supported PHY EEE linkmodes 590 * @advertising_eee: Currently advertised EEE linkmodes 591 * @enable_tx_lpi: When True, MAC should transmit LPI to PHY 592 * @eee_active: phylib private state, indicating that EEE has been negotiated 593 * @eee_cfg: User configuration of EEE 594 * @lp_advertising: Current link partner advertised linkmodes 595 * @host_interfaces: PHY interface modes supported by host 596 * @eee_disabled_modes: Energy efficient ethernet modes not to be advertised 597 * @autoneg: Flag autoneg being used 598 * @rate_matching: Current rate matching mode 599 * @link: Current link state 600 * @autoneg_complete: Flag auto negotiation of the link has completed 601 * @mdix: Current crossover 602 * @mdix_ctrl: User setting of crossover 603 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 604 * @interrupts: Flag interrupts have been enabled 605 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 606 * handling shall be postponed until PHY has resumed 607 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 608 * requiring a rerun of the interrupt handler after resume 609 * @default_timestamp: Flag indicating whether we are using the phy 610 * timestamp as the default one 611 * @interface: enum phy_interface_t value 612 * @possible_interfaces: bitmap if interface modes that the attached PHY 613 * will switch between depending on media speed. 614 * @skb: Netlink message for cable diagnostics 615 * @nest: Netlink nest used for cable diagnostics 616 * @ehdr: nNtlink header for cable diagnostics 617 * @phy_led_triggers: Array of LED triggers 618 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 619 * @led_link_trigger: LED trigger for link up/down 620 * @last_triggered: last LED trigger for link speed 621 * @leds: list of PHY LED structures 622 * @master_slave_set: User requested master/slave configuration 623 * @master_slave_get: Current master/slave advertisement 624 * @master_slave_state: Current master/slave configuration 625 * @mii_ts: Pointer to time stamper callbacks 626 * @psec: Pointer to Power Sourcing Equipment control struct 627 * @lock: Mutex for serialization access to PHY 628 * @state_queue: Work queue for state machine 629 * @link_down_events: Number of times link was lost 630 * @shared: Pointer to private data shared by phys in one package 631 * @priv: Pointer to driver private data 632 * 633 * interrupts currently only supports enabled or disabled, 634 * but could be changed in the future to support enabling 635 * and disabling specific interrupts 636 * 637 * Contains some infrastructure for polling and interrupt 638 * handling, as well as handling shifts in PHY hardware state 639 */ 640 struct phy_device { 641 struct mdio_device mdio; 642 643 /* Information about the PHY type */ 644 /* And management functions */ 645 const struct phy_driver *drv; 646 647 struct device_link *devlink; 648 649 u32 phyindex; 650 u32 phy_id; 651 652 struct phy_c45_device_ids c45_ids; 653 unsigned is_c45:1; 654 unsigned is_internal:1; 655 unsigned is_pseudo_fixed_link:1; 656 unsigned is_gigabit_capable:1; 657 unsigned has_fixups:1; 658 unsigned suspended:1; 659 unsigned suspended_by_mdio_bus:1; 660 unsigned sysfs_links:1; 661 unsigned loopback_enabled:1; 662 unsigned downshifted_rate:1; 663 unsigned is_on_sfp_module:1; 664 unsigned mac_managed_pm:1; 665 unsigned wol_enabled:1; 666 667 unsigned autoneg:1; 668 /* The most recently read link state */ 669 unsigned link:1; 670 unsigned autoneg_complete:1; 671 672 /* Interrupts are enabled */ 673 unsigned interrupts:1; 674 unsigned irq_suspended:1; 675 unsigned irq_rerun:1; 676 677 unsigned default_timestamp:1; 678 679 int rate_matching; 680 681 enum phy_state state; 682 683 u32 dev_flags; 684 685 phy_interface_t interface; 686 DECLARE_PHY_INTERFACE_MASK(possible_interfaces); 687 688 /* 689 * forced speed & duplex (no autoneg) 690 * partner speed & duplex & pause (autoneg) 691 */ 692 int speed; 693 int duplex; 694 int port; 695 int pause; 696 int asym_pause; 697 u8 master_slave_get; 698 u8 master_slave_set; 699 u8 master_slave_state; 700 701 /* Union of PHY and Attached devices' supported link modes */ 702 /* See ethtool.h for more info */ 703 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 704 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 705 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 706 /* used with phy_speed_down */ 707 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 708 /* used for eee validation and configuration*/ 709 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee); 710 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee); 711 /* Energy efficient ethernet modes which should be prohibited */ 712 __ETHTOOL_DECLARE_LINK_MODE_MASK(eee_disabled_modes); 713 bool enable_tx_lpi; 714 bool eee_active; 715 struct eee_config eee_cfg; 716 717 /* Host supported PHY interface types. Should be ignored if empty. */ 718 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 719 720 #ifdef CONFIG_LED_TRIGGER_PHY 721 struct phy_led_trigger *phy_led_triggers; 722 unsigned int phy_num_led_triggers; 723 struct phy_led_trigger *last_triggered; 724 725 struct phy_led_trigger *led_link_trigger; 726 #endif 727 struct list_head leds; 728 729 /* 730 * Interrupt number for this PHY 731 * -1 means no interrupt 732 */ 733 int irq; 734 735 /* private data pointer */ 736 /* For use by PHYs to maintain extra state */ 737 void *priv; 738 739 /* shared data pointer */ 740 /* For use by PHYs inside the same package that need a shared state. */ 741 struct phy_package_shared *shared; 742 743 /* Reporting cable test results */ 744 struct sk_buff *skb; 745 void *ehdr; 746 struct nlattr *nest; 747 748 /* Interrupt and Polling infrastructure */ 749 struct delayed_work state_queue; 750 751 struct mutex lock; 752 753 /* This may be modified under the rtnl lock */ 754 bool sfp_bus_attached; 755 struct sfp_bus *sfp_bus; 756 struct phylink *phylink; 757 struct net_device *attached_dev; 758 struct mii_timestamper *mii_ts; 759 struct pse_control *psec; 760 761 u8 mdix; 762 u8 mdix_ctrl; 763 764 int pma_extable; 765 766 unsigned int link_down_events; 767 768 void (*phy_link_change)(struct phy_device *phydev, bool up); 769 void (*adjust_link)(struct net_device *dev); 770 771 #if IS_ENABLED(CONFIG_MACSEC) 772 /* MACsec management functions */ 773 const struct macsec_ops *macsec_ops; 774 #endif 775 }; 776 777 /* Generic phy_device::dev_flags */ 778 #define PHY_F_NO_IRQ 0x80000000 779 #define PHY_F_RXC_ALWAYS_ON 0x40000000 780 781 static inline struct phy_device *to_phy_device(const struct device *dev) 782 { 783 return container_of(to_mdio_device(dev), struct phy_device, mdio); 784 } 785 786 /** 787 * struct phy_tdr_config - Configuration of a TDR raw test 788 * 789 * @first: Distance for first data collection point 790 * @last: Distance for last data collection point 791 * @step: Step between data collection points 792 * @pair: Bitmap of cable pairs to collect data for 793 * 794 * A structure containing possible configuration parameters 795 * for a TDR cable test. The driver does not need to implement 796 * all the parameters, but should report what is actually used. 797 * All distances are in centimeters. 798 */ 799 struct phy_tdr_config { 800 u32 first; 801 u32 last; 802 u32 step; 803 s8 pair; 804 }; 805 #define PHY_PAIR_ALL -1 806 807 /** 808 * enum link_inband_signalling - in-band signalling modes that are supported 809 * 810 * @LINK_INBAND_DISABLE: in-band signalling can be disabled 811 * @LINK_INBAND_ENABLE: in-band signalling can be enabled without bypass 812 * @LINK_INBAND_BYPASS: in-band signalling can be enabled with bypass 813 * 814 * The possible and required bits can only be used if the valid bit is set. 815 * If possible is clear, that means inband signalling can not be used. 816 * Required is only valid when possible is set, and means that inband 817 * signalling must be used. 818 */ 819 enum link_inband_signalling { 820 LINK_INBAND_DISABLE = BIT(0), 821 LINK_INBAND_ENABLE = BIT(1), 822 LINK_INBAND_BYPASS = BIT(2), 823 }; 824 825 /** 826 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 827 * Avoidance) Reconciliation Sublayer. 828 * 829 * @version: read-only PLCA register map version. -1 = not available. Ignored 830 * when setting the configuration. Format is the same as reported by the PLCA 831 * IDVER register (31.CA00). -1 = not available. 832 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 833 * set. 0 = disabled, anything else = enabled. 834 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 835 * Allowed values [0 .. 254]. 255 = node disabled. 836 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 837 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 838 * set. Allowed values [1 .. 255]. 839 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 840 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 841 * more details. The to_timer shall be set equal over all nodes. 842 * -1 = not available / don't set. Allowed values [0 .. 255]. 843 * @burst_cnt: controls how many additional frames a node is allowed to send in 844 * single transmit opportunity (TO). The default value of 0 means that the 845 * node is allowed exactly one frame per TO. A value of 1 allows two frames 846 * per TO, and so on. -1 = not available / don't set. 847 * Allowed values [0 .. 255]. 848 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 849 * frame before interrupting the burst. This value should be set to a value 850 * greater than the MAC inter-packet gap (which is typically 96 bits). 851 * -1 = not available / don't set. Allowed values [0 .. 255]. 852 * 853 * A structure containing configuration parameters for setting/getting the PLCA 854 * RS configuration. The driver does not need to implement all the parameters, 855 * but should report what is actually used. 856 */ 857 struct phy_plca_cfg { 858 int version; 859 int enabled; 860 int node_id; 861 int node_cnt; 862 int to_tmr; 863 int burst_cnt; 864 int burst_tmr; 865 }; 866 867 /** 868 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 869 * Avoidance) Reconciliation Sublayer. 870 * 871 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 872 * register(31.CA03), indicating BEACON activity. 873 * 874 * A structure containing status information of the PLCA RS configuration. 875 * The driver does not need to implement all the parameters, but should report 876 * what is actually used. 877 */ 878 struct phy_plca_status { 879 bool pst; 880 }; 881 882 /* Modes for PHY LED configuration */ 883 enum phy_led_modes { 884 PHY_LED_ACTIVE_HIGH = 0, 885 PHY_LED_ACTIVE_LOW = 1, 886 PHY_LED_INACTIVE_HIGH_IMPEDANCE = 2, 887 888 /* keep it last */ 889 __PHY_LED_MODES_NUM, 890 }; 891 892 /** 893 * struct phy_led: An LED driven by the PHY 894 * 895 * @list: List of LEDs 896 * @phydev: PHY this LED is attached to 897 * @led_cdev: Standard LED class structure 898 * @index: Number of the LED 899 */ 900 struct phy_led { 901 struct list_head list; 902 struct phy_device *phydev; 903 struct led_classdev led_cdev; 904 u8 index; 905 }; 906 907 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev) 908 909 /** 910 * struct phy_driver - Driver structure for a particular PHY type 911 * 912 * @mdiodrv: Data common to all MDIO devices 913 * @phy_id: The result of reading the UID registers of this PHY 914 * type, and ANDing them with the phy_id_mask. This driver 915 * only works for PHYs with IDs which match this field 916 * @name: The friendly name of this PHY type 917 * @phy_id_mask: Defines the important bits of the phy_id 918 * @features: A mandatory list of features (speed, duplex, etc) 919 * supported by this PHY 920 * @flags: A bitfield defining certain other features this PHY 921 * supports (like interrupts) 922 * @driver_data: Static driver data 923 * 924 * All functions are optional. If config_aneg or read_status 925 * are not implemented, the phy core uses the genphy versions. 926 * Note that none of these functions should be called from 927 * interrupt time. The goal is for the bus read/write functions 928 * to be able to block when the bus transaction is happening, 929 * and be freed up by an interrupt (The MPC85xx has this ability, 930 * though it is not currently supported in the driver). 931 */ 932 struct phy_driver { 933 struct mdio_driver_common mdiodrv; 934 u32 phy_id; 935 char *name; 936 u32 phy_id_mask; 937 const unsigned long * const features; 938 u32 flags; 939 const void *driver_data; 940 941 /** 942 * @soft_reset: Called to issue a PHY software reset 943 */ 944 int (*soft_reset)(struct phy_device *phydev); 945 946 /** 947 * @config_init: Called to initialize the PHY, 948 * including after a reset 949 */ 950 int (*config_init)(struct phy_device *phydev); 951 952 /** 953 * @probe: Called during discovery. Used to set 954 * up device-specific structures, if any 955 */ 956 int (*probe)(struct phy_device *phydev); 957 958 /** 959 * @get_features: Probe the hardware to determine what 960 * abilities it has. Should only set phydev->supported. 961 */ 962 int (*get_features)(struct phy_device *phydev); 963 964 /** 965 * @inband_caps: query whether in-band is supported for the given PHY 966 * interface mode. Returns a bitmask of bits defined by enum 967 * link_inband_signalling. 968 */ 969 unsigned int (*inband_caps)(struct phy_device *phydev, 970 phy_interface_t interface); 971 972 /** 973 * @config_inband: configure in-band mode for the PHY 974 */ 975 int (*config_inband)(struct phy_device *phydev, unsigned int modes); 976 977 /** 978 * @get_rate_matching: Get the supported type of rate matching for a 979 * particular phy interface. This is used by phy consumers to determine 980 * whether to advertise lower-speed modes for that interface. It is 981 * assumed that if a rate matching mode is supported on an interface, 982 * then that interface's rate can be adapted to all slower link speeds 983 * supported by the phy. If the interface is not supported, this should 984 * return %RATE_MATCH_NONE. 985 */ 986 int (*get_rate_matching)(struct phy_device *phydev, 987 phy_interface_t iface); 988 989 /* PHY Power Management */ 990 /** @suspend: Suspend the hardware, saving state if needed */ 991 int (*suspend)(struct phy_device *phydev); 992 /** @resume: Resume the hardware, restoring state if needed */ 993 int (*resume)(struct phy_device *phydev); 994 995 /** 996 * @config_aneg: Configures the advertisement and resets 997 * autonegotiation if phydev->autoneg is on, 998 * forces the speed to the current settings in phydev 999 * if phydev->autoneg is off 1000 */ 1001 int (*config_aneg)(struct phy_device *phydev); 1002 1003 /** @aneg_done: Determines the auto negotiation result */ 1004 int (*aneg_done)(struct phy_device *phydev); 1005 1006 /** @read_status: Determines the negotiated speed and duplex */ 1007 int (*read_status)(struct phy_device *phydev); 1008 1009 /** 1010 * @config_intr: Enables or disables interrupts. 1011 * It should also clear any pending interrupts prior to enabling the 1012 * IRQs and after disabling them. 1013 */ 1014 int (*config_intr)(struct phy_device *phydev); 1015 1016 /** @handle_interrupt: Override default interrupt handling */ 1017 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 1018 1019 /** @remove: Clears up any memory if needed */ 1020 void (*remove)(struct phy_device *phydev); 1021 1022 /** 1023 * @match_phy_device: Returns true if this is a suitable 1024 * driver for the given phydev. If NULL, matching is based on 1025 * phy_id and phy_id_mask. 1026 */ 1027 int (*match_phy_device)(struct phy_device *phydev); 1028 1029 /** 1030 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 1031 * register changes to enable Wake on LAN, so set_wol is 1032 * provided to be called in the ethernet driver's set_wol 1033 * function. 1034 */ 1035 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1036 1037 /** 1038 * @get_wol: See set_wol, but for checking whether Wake on LAN 1039 * is enabled. 1040 */ 1041 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1042 1043 /** 1044 * @link_change_notify: Called to inform a PHY device driver 1045 * when the core is about to change the link state. This 1046 * callback is supposed to be used as fixup hook for drivers 1047 * that need to take action when the link state 1048 * changes. Drivers are by no means allowed to mess with the 1049 * PHY device structure in their implementations. 1050 */ 1051 void (*link_change_notify)(struct phy_device *dev); 1052 1053 /** 1054 * @read_mmd: PHY specific driver override for reading a MMD 1055 * register. This function is optional for PHY specific 1056 * drivers. When not provided, the default MMD read function 1057 * will be used by phy_read_mmd(), which will use either a 1058 * direct read for Clause 45 PHYs or an indirect read for 1059 * Clause 22 PHYs. devnum is the MMD device number within the 1060 * PHY device, regnum is the register within the selected MMD 1061 * device. 1062 */ 1063 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 1064 1065 /** 1066 * @write_mmd: PHY specific driver override for writing a MMD 1067 * register. This function is optional for PHY specific 1068 * drivers. When not provided, the default MMD write function 1069 * will be used by phy_write_mmd(), which will use either a 1070 * direct write for Clause 45 PHYs, or an indirect write for 1071 * Clause 22 PHYs. devnum is the MMD device number within the 1072 * PHY device, regnum is the register within the selected MMD 1073 * device. val is the value to be written. 1074 */ 1075 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 1076 u16 val); 1077 1078 /** @read_page: Return the current PHY register page number */ 1079 int (*read_page)(struct phy_device *dev); 1080 /** @write_page: Set the current PHY register page number */ 1081 int (*write_page)(struct phy_device *dev, int page); 1082 1083 /** 1084 * @module_info: Get the size and type of the eeprom contained 1085 * within a plug-in module 1086 */ 1087 int (*module_info)(struct phy_device *dev, 1088 struct ethtool_modinfo *modinfo); 1089 1090 /** 1091 * @module_eeprom: Get the eeprom information from the plug-in 1092 * module 1093 */ 1094 int (*module_eeprom)(struct phy_device *dev, 1095 struct ethtool_eeprom *ee, u8 *data); 1096 1097 /** @cable_test_start: Start a cable test */ 1098 int (*cable_test_start)(struct phy_device *dev); 1099 1100 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1101 int (*cable_test_tdr_start)(struct phy_device *dev, 1102 const struct phy_tdr_config *config); 1103 1104 /** 1105 * @cable_test_get_status: Once per second, or on interrupt, 1106 * request the status of the test. 1107 */ 1108 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1109 1110 /* Get statistics from the PHY using ethtool */ 1111 /** 1112 * @get_phy_stats: Retrieve PHY statistics. 1113 * @dev: The PHY device for which the statistics are retrieved. 1114 * @eth_stats: structure where Ethernet PHY stats will be stored. 1115 * @stats: structure where additional PHY-specific stats will be stored. 1116 * 1117 * Retrieves the supported PHY statistics and populates the provided 1118 * structures. The input structures are pre-initialized with 1119 * `ETHTOOL_STAT_NOT_SET`, and the driver must only modify members 1120 * corresponding to supported statistics. Unmodified members will remain 1121 * set to `ETHTOOL_STAT_NOT_SET` and will not be returned to userspace. 1122 */ 1123 void (*get_phy_stats)(struct phy_device *dev, 1124 struct ethtool_eth_phy_stats *eth_stats, 1125 struct ethtool_phy_stats *stats); 1126 1127 /** 1128 * @get_link_stats: Retrieve link statistics. 1129 * @dev: The PHY device for which the statistics are retrieved. 1130 * @link_stats: structure where link-specific stats will be stored. 1131 * 1132 * Retrieves link-related statistics for the given PHY device. The input 1133 * structure is pre-initialized with `ETHTOOL_STAT_NOT_SET`, and the 1134 * driver must only modify members corresponding to supported 1135 * statistics. Unmodified members will remain set to 1136 * `ETHTOOL_STAT_NOT_SET` and will not be returned to userspace. 1137 */ 1138 void (*get_link_stats)(struct phy_device *dev, 1139 struct ethtool_link_ext_stats *link_stats); 1140 1141 /** 1142 * @update_stats: Trigger periodic statistics updates. 1143 * @dev: The PHY device for which statistics updates are triggered. 1144 * 1145 * Periodically gathers statistics from the PHY device to update locally 1146 * maintained 64-bit counters. This is necessary for PHYs that implement 1147 * reduced-width counters (e.g., 16-bit or 32-bit) which can overflow 1148 * more frequently compared to 64-bit counters. By invoking this 1149 * callback, drivers can fetch the current counter values, handle 1150 * overflow detection, and accumulate the results into local 64-bit 1151 * counters for accurate reporting through the `get_phy_stats` and 1152 * `get_link_stats` interfaces. 1153 * 1154 * Return: 0 on success or a negative error code on failure. 1155 */ 1156 int (*update_stats)(struct phy_device *dev); 1157 1158 /** @get_sset_count: Number of statistic counters */ 1159 int (*get_sset_count)(struct phy_device *dev); 1160 /** @get_strings: Names of the statistic counters */ 1161 void (*get_strings)(struct phy_device *dev, u8 *data); 1162 /** @get_stats: Return the statistic counter values */ 1163 void (*get_stats)(struct phy_device *dev, 1164 struct ethtool_stats *stats, u64 *data); 1165 1166 /* Get and Set PHY tunables */ 1167 /** @get_tunable: Return the value of a tunable */ 1168 int (*get_tunable)(struct phy_device *dev, 1169 struct ethtool_tunable *tuna, void *data); 1170 /** @set_tunable: Set the value of a tunable */ 1171 int (*set_tunable)(struct phy_device *dev, 1172 struct ethtool_tunable *tuna, 1173 const void *data); 1174 /** @set_loopback: Set the loopback mood of the PHY */ 1175 int (*set_loopback)(struct phy_device *dev, bool enable); 1176 /** @get_sqi: Get the signal quality indication */ 1177 int (*get_sqi)(struct phy_device *dev); 1178 /** @get_sqi_max: Get the maximum signal quality indication */ 1179 int (*get_sqi_max)(struct phy_device *dev); 1180 1181 /* PLCA RS interface */ 1182 /** @get_plca_cfg: Return the current PLCA configuration */ 1183 int (*get_plca_cfg)(struct phy_device *dev, 1184 struct phy_plca_cfg *plca_cfg); 1185 /** @set_plca_cfg: Set the PLCA configuration */ 1186 int (*set_plca_cfg)(struct phy_device *dev, 1187 const struct phy_plca_cfg *plca_cfg); 1188 /** @get_plca_status: Return the current PLCA status info */ 1189 int (*get_plca_status)(struct phy_device *dev, 1190 struct phy_plca_status *plca_st); 1191 1192 /** 1193 * @led_brightness_set: Set a PHY LED brightness. Index 1194 * indicates which of the PHYs led should be set. Value 1195 * follows the standard LED class meaning, e.g. LED_OFF, 1196 * LED_HALF, LED_FULL. 1197 */ 1198 int (*led_brightness_set)(struct phy_device *dev, 1199 u8 index, enum led_brightness value); 1200 1201 /** 1202 * @led_blink_set: Set a PHY LED blinking. Index indicates 1203 * which of the PHYs led should be configured to blink. Delays 1204 * are in milliseconds and if both are zero then a sensible 1205 * default should be chosen. The call should adjust the 1206 * timings in that case and if it can't match the values 1207 * specified exactly. 1208 */ 1209 int (*led_blink_set)(struct phy_device *dev, u8 index, 1210 unsigned long *delay_on, 1211 unsigned long *delay_off); 1212 /** 1213 * @led_hw_is_supported: Can the HW support the given rules. 1214 * @dev: PHY device which has the LED 1215 * @index: Which LED of the PHY device 1216 * @rules The core is interested in these rules 1217 * 1218 * Return 0 if yes, -EOPNOTSUPP if not, or an error code. 1219 */ 1220 int (*led_hw_is_supported)(struct phy_device *dev, u8 index, 1221 unsigned long rules); 1222 /** 1223 * @led_hw_control_set: Set the HW to control the LED 1224 * @dev: PHY device which has the LED 1225 * @index: Which LED of the PHY device 1226 * @rules The rules used to control the LED 1227 * 1228 * Returns 0, or a an error code. 1229 */ 1230 int (*led_hw_control_set)(struct phy_device *dev, u8 index, 1231 unsigned long rules); 1232 /** 1233 * @led_hw_control_get: Get how the HW is controlling the LED 1234 * @dev: PHY device which has the LED 1235 * @index: Which LED of the PHY device 1236 * @rules Pointer to the rules used to control the LED 1237 * 1238 * Set *@rules to how the HW is currently blinking. Returns 0 1239 * on success, or a error code if the current blinking cannot 1240 * be represented in rules, or some other error happens. 1241 */ 1242 int (*led_hw_control_get)(struct phy_device *dev, u8 index, 1243 unsigned long *rules); 1244 1245 /** 1246 * @led_polarity_set: Set the LED polarity modes 1247 * @dev: PHY device which has the LED 1248 * @index: Which LED of the PHY device 1249 * @modes: bitmap of LED polarity modes 1250 * 1251 * Configure LED with all the required polarity modes in @modes 1252 * to make it correctly turn ON or OFF. 1253 * 1254 * Returns 0, or an error code. 1255 */ 1256 int (*led_polarity_set)(struct phy_device *dev, int index, 1257 unsigned long modes); 1258 1259 /** 1260 * @get_next_update_time: Get the time until the next update event 1261 * @dev: PHY device 1262 * 1263 * Callback to determine the time (in jiffies) until the next 1264 * update event for the PHY state machine. Allows PHY drivers to 1265 * dynamically adjust polling intervals based on link state or other 1266 * conditions. 1267 * 1268 * Returns the time in jiffies until the next update event. 1269 */ 1270 unsigned int (*get_next_update_time)(struct phy_device *dev); 1271 }; 1272 #define to_phy_driver(d) container_of_const(to_mdio_common_driver(d), \ 1273 struct phy_driver, mdiodrv) 1274 1275 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 1276 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 1277 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 1278 1279 /** 1280 * phy_id_compare - compare @id1 with @id2 taking account of @mask 1281 * @id1: first PHY ID 1282 * @id2: second PHY ID 1283 * @mask: the PHY ID mask, set bits are significant in matching 1284 * 1285 * Return true if the bits from @id1 and @id2 specified by @mask match. 1286 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask). 1287 */ 1288 static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask) 1289 { 1290 return !((id1 ^ id2) & mask); 1291 } 1292 1293 /** 1294 * phydev_id_compare - compare @id with the PHY's Clause 22 ID 1295 * @phydev: the PHY device 1296 * @id: the PHY ID to be matched 1297 * 1298 * Compare the @phydev clause 22 ID with the provided @id and return true or 1299 * false depending whether it matches, using the bound driver mask. The 1300 * @phydev must be bound to a driver. 1301 */ 1302 static inline bool phydev_id_compare(struct phy_device *phydev, u32 id) 1303 { 1304 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask); 1305 } 1306 1307 const char *phy_speed_to_str(int speed); 1308 const char *phy_duplex_to_str(unsigned int duplex); 1309 const char *phy_rate_matching_to_str(int rate_matching); 1310 1311 int phy_interface_num_ports(phy_interface_t interface); 1312 1313 /* A structure for mapping a particular speed and duplex 1314 * combination to a particular SUPPORTED and ADVERTISED value 1315 */ 1316 struct phy_setting { 1317 u32 speed; 1318 u8 duplex; 1319 u8 bit; 1320 }; 1321 1322 const struct phy_setting * 1323 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 1324 bool exact); 1325 size_t phy_speeds(unsigned int *speeds, size_t size, 1326 unsigned long *mask); 1327 1328 /** 1329 * phy_is_started - Convenience function to check whether PHY is started 1330 * @phydev: The phy_device struct 1331 */ 1332 static inline bool phy_is_started(struct phy_device *phydev) 1333 { 1334 return phydev->state >= PHY_UP; 1335 } 1336 1337 /** 1338 * phy_disable_eee_mode - Don't advertise an EEE mode. 1339 * @phydev: The phy_device struct 1340 * @link_mode: The EEE mode to be disabled 1341 */ 1342 static inline void phy_disable_eee_mode(struct phy_device *phydev, u32 link_mode) 1343 { 1344 WARN_ON(phy_is_started(phydev)); 1345 1346 linkmode_set_bit(link_mode, phydev->eee_disabled_modes); 1347 linkmode_clear_bit(link_mode, phydev->advertising_eee); 1348 } 1349 1350 void phy_resolve_aneg_pause(struct phy_device *phydev); 1351 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1352 1353 /** 1354 * phy_read - Convenience function for reading a given PHY register 1355 * @phydev: the phy_device struct 1356 * @regnum: register number to read 1357 * 1358 * NOTE: MUST NOT be called from interrupt context, 1359 * because the bus read/write functions may wait for an interrupt 1360 * to conclude the operation. 1361 */ 1362 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1363 { 1364 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1365 } 1366 1367 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1368 timeout_us, sleep_before_read) \ 1369 ({ \ 1370 int __ret, __val; \ 1371 __ret = read_poll_timeout(__val = phy_read, val, \ 1372 __val < 0 || (cond), \ 1373 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1374 if (__val < 0) \ 1375 __ret = __val; \ 1376 if (__ret) \ 1377 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1378 __ret; \ 1379 }) 1380 1381 /** 1382 * __phy_read - convenience function for reading a given PHY register 1383 * @phydev: the phy_device struct 1384 * @regnum: register number to read 1385 * 1386 * The caller must have taken the MDIO bus lock. 1387 */ 1388 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1389 { 1390 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1391 } 1392 1393 /** 1394 * phy_write - Convenience function for writing a given PHY register 1395 * @phydev: the phy_device struct 1396 * @regnum: register number to write 1397 * @val: value to write to @regnum 1398 * 1399 * NOTE: MUST NOT be called from interrupt context, 1400 * because the bus read/write functions may wait for an interrupt 1401 * to conclude the operation. 1402 */ 1403 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1404 { 1405 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1406 } 1407 1408 /** 1409 * __phy_write - Convenience function for writing a given PHY register 1410 * @phydev: the phy_device struct 1411 * @regnum: register number to write 1412 * @val: value to write to @regnum 1413 * 1414 * The caller must have taken the MDIO bus lock. 1415 */ 1416 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1417 { 1418 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1419 val); 1420 } 1421 1422 /** 1423 * __phy_modify_changed() - Convenience function for modifying a PHY register 1424 * @phydev: a pointer to a &struct phy_device 1425 * @regnum: register number 1426 * @mask: bit mask of bits to clear 1427 * @set: bit mask of bits to set 1428 * 1429 * Unlocked helper function which allows a PHY register to be modified as 1430 * new register value = (old register value & ~mask) | set 1431 * 1432 * Returns negative errno, 0 if there was no change, and 1 in case of change 1433 */ 1434 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1435 u16 mask, u16 set) 1436 { 1437 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1438 regnum, mask, set); 1439 } 1440 1441 /* 1442 * phy_read_mmd - Convenience function for reading a register 1443 * from an MMD on a given PHY. 1444 */ 1445 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1446 1447 /** 1448 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1449 * condition is met or a timeout occurs 1450 * 1451 * @phydev: The phy_device struct 1452 * @devaddr: The MMD to read from 1453 * @regnum: The register on the MMD to read 1454 * @val: Variable to read the register into 1455 * @cond: Break condition (usually involving @val) 1456 * @sleep_us: Maximum time to sleep between reads in us (0 tight-loops). Please 1457 * read usleep_range() function description for details and 1458 * limitations. 1459 * @timeout_us: Timeout in us, 0 means never timeout 1460 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1461 * 1462 * Returns: 0 on success and -ETIMEDOUT upon a timeout. In either 1463 * case, the last read value at @args is stored in @val. Must not 1464 * be called from atomic context if sleep_us or timeout_us are used. 1465 */ 1466 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1467 sleep_us, timeout_us, sleep_before_read) \ 1468 ({ \ 1469 int __ret, __val; \ 1470 __ret = read_poll_timeout(__val = phy_read_mmd, val, \ 1471 __val < 0 || (cond), \ 1472 sleep_us, timeout_us, sleep_before_read, \ 1473 phydev, devaddr, regnum); \ 1474 if (__val < 0) \ 1475 __ret = __val; \ 1476 if (__ret) \ 1477 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1478 __ret; \ 1479 }) 1480 1481 /* 1482 * __phy_read_mmd - Convenience function for reading a register 1483 * from an MMD on a given PHY. 1484 */ 1485 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1486 1487 /* 1488 * phy_write_mmd - Convenience function for writing a register 1489 * on an MMD on a given PHY. 1490 */ 1491 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1492 1493 /* 1494 * __phy_write_mmd - Convenience function for writing a register 1495 * on an MMD on a given PHY. 1496 */ 1497 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1498 1499 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1500 u16 set); 1501 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1502 u16 set); 1503 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1504 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1505 1506 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1507 u16 mask, u16 set); 1508 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1509 u16 mask, u16 set); 1510 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1511 u16 mask, u16 set); 1512 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1513 u16 mask, u16 set); 1514 1515 /** 1516 * __phy_set_bits - Convenience function for setting bits in a PHY register 1517 * @phydev: the phy_device struct 1518 * @regnum: register number to write 1519 * @val: bits to set 1520 * 1521 * The caller must have taken the MDIO bus lock. 1522 */ 1523 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1524 { 1525 return __phy_modify(phydev, regnum, 0, val); 1526 } 1527 1528 /** 1529 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1530 * @phydev: the phy_device struct 1531 * @regnum: register number to write 1532 * @val: bits to clear 1533 * 1534 * The caller must have taken the MDIO bus lock. 1535 */ 1536 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1537 u16 val) 1538 { 1539 return __phy_modify(phydev, regnum, val, 0); 1540 } 1541 1542 /** 1543 * phy_set_bits - Convenience function for setting bits in a PHY register 1544 * @phydev: the phy_device struct 1545 * @regnum: register number to write 1546 * @val: bits to set 1547 */ 1548 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1549 { 1550 return phy_modify(phydev, regnum, 0, val); 1551 } 1552 1553 /** 1554 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1555 * @phydev: the phy_device struct 1556 * @regnum: register number to write 1557 * @val: bits to clear 1558 */ 1559 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1560 { 1561 return phy_modify(phydev, regnum, val, 0); 1562 } 1563 1564 /** 1565 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1566 * on MMD 1567 * @phydev: the phy_device struct 1568 * @devad: the MMD containing register to modify 1569 * @regnum: register number to modify 1570 * @val: bits to set 1571 * 1572 * The caller must have taken the MDIO bus lock. 1573 */ 1574 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1575 u32 regnum, u16 val) 1576 { 1577 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1578 } 1579 1580 /** 1581 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1582 * on MMD 1583 * @phydev: the phy_device struct 1584 * @devad: the MMD containing register to modify 1585 * @regnum: register number to modify 1586 * @val: bits to clear 1587 * 1588 * The caller must have taken the MDIO bus lock. 1589 */ 1590 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1591 u32 regnum, u16 val) 1592 { 1593 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1594 } 1595 1596 /** 1597 * phy_set_bits_mmd - Convenience function for setting bits in a register 1598 * on MMD 1599 * @phydev: the phy_device struct 1600 * @devad: the MMD containing register to modify 1601 * @regnum: register number to modify 1602 * @val: bits to set 1603 */ 1604 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1605 u32 regnum, u16 val) 1606 { 1607 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1608 } 1609 1610 /** 1611 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1612 * on MMD 1613 * @phydev: the phy_device struct 1614 * @devad: the MMD containing register to modify 1615 * @regnum: register number to modify 1616 * @val: bits to clear 1617 */ 1618 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1619 u32 regnum, u16 val) 1620 { 1621 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1622 } 1623 1624 /** 1625 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1626 * @phydev: the phy_device struct 1627 * 1628 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1629 * PHY_MAC_INTERRUPT 1630 */ 1631 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1632 { 1633 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1634 } 1635 1636 /** 1637 * phy_polling_mode - Convenience function for testing whether polling is 1638 * used to detect PHY status changes 1639 * @phydev: the phy_device struct 1640 */ 1641 static inline bool phy_polling_mode(struct phy_device *phydev) 1642 { 1643 if (phydev->state == PHY_CABLETEST) 1644 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1645 return true; 1646 1647 if (phydev->drv->update_stats) 1648 return true; 1649 1650 return phydev->irq == PHY_POLL; 1651 } 1652 1653 /** 1654 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1655 * @phydev: the phy_device struct 1656 */ 1657 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1658 { 1659 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1660 } 1661 1662 /** 1663 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1664 * @phydev: the phy_device struct 1665 */ 1666 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1667 { 1668 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1669 } 1670 1671 /** 1672 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1673 * PTP hardware clock capabilities. 1674 * @phydev: the phy_device struct 1675 */ 1676 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1677 { 1678 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1679 } 1680 1681 /** 1682 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1683 * @phydev: the phy_device struct 1684 */ 1685 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1686 { 1687 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1688 } 1689 1690 static inline int phy_hwtstamp(struct phy_device *phydev, 1691 struct kernel_hwtstamp_config *cfg, 1692 struct netlink_ext_ack *extack) 1693 { 1694 return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack); 1695 } 1696 1697 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1698 int type) 1699 { 1700 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1701 } 1702 1703 static inline int phy_ts_info(struct phy_device *phydev, 1704 struct kernel_ethtool_ts_info *tsinfo) 1705 { 1706 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1707 } 1708 1709 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1710 int type) 1711 { 1712 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1713 } 1714 1715 /** 1716 * phy_is_default_hwtstamp - Is the PHY hwtstamp the default timestamp 1717 * @phydev: Pointer to phy_device 1718 * 1719 * This is used to get default timestamping device taking into account 1720 * the new API choice, which is selecting the timestamping from MAC by 1721 * default if the phydev does not have default_timestamp flag enabled. 1722 * 1723 * Return: True if phy is the default hw timestamp, false otherwise. 1724 */ 1725 static inline bool phy_is_default_hwtstamp(struct phy_device *phydev) 1726 { 1727 return phy_has_hwtstamp(phydev) && phydev->default_timestamp; 1728 } 1729 1730 /** 1731 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1732 * @phydev: the phy_device struct 1733 */ 1734 static inline bool phy_on_sfp(struct phy_device *phydev) 1735 { 1736 return phydev->is_on_sfp_module; 1737 } 1738 1739 /** 1740 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1741 * PHY interface mode is RGMII (all variants) 1742 * @mode: the &phy_interface_t enum 1743 */ 1744 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1745 { 1746 return mode >= PHY_INTERFACE_MODE_RGMII && 1747 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1748 }; 1749 1750 /** 1751 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1752 * negotiation 1753 * @mode: one of &enum phy_interface_t 1754 * 1755 * Returns true if the PHY interface mode uses the 16-bit negotiation 1756 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1757 */ 1758 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1759 { 1760 return mode == PHY_INTERFACE_MODE_1000BASEX || 1761 mode == PHY_INTERFACE_MODE_2500BASEX; 1762 } 1763 1764 /** 1765 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1766 * is RGMII (all variants) 1767 * @phydev: the phy_device struct 1768 */ 1769 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1770 { 1771 return phy_interface_mode_is_rgmii(phydev->interface); 1772 }; 1773 1774 /** 1775 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1776 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1777 * @phydev: the phy_device struct 1778 */ 1779 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1780 { 1781 return phydev->is_pseudo_fixed_link; 1782 } 1783 1784 int phy_save_page(struct phy_device *phydev); 1785 int phy_select_page(struct phy_device *phydev, int page); 1786 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1787 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1788 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1789 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1790 u16 mask, u16 set); 1791 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1792 u16 mask, u16 set); 1793 1794 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1795 bool is_c45, 1796 struct phy_c45_device_ids *c45_ids); 1797 #if IS_ENABLED(CONFIG_PHYLIB) 1798 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1799 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1800 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1801 struct phy_device *device_phy_find_device(struct device *dev); 1802 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode); 1803 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1804 int phy_device_register(struct phy_device *phy); 1805 void phy_device_free(struct phy_device *phydev); 1806 #else 1807 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1808 { 1809 return 0; 1810 } 1811 static inline 1812 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1813 { 1814 return 0; 1815 } 1816 1817 static inline 1818 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1819 { 1820 return NULL; 1821 } 1822 1823 static inline struct phy_device *device_phy_find_device(struct device *dev) 1824 { 1825 return NULL; 1826 } 1827 1828 static inline 1829 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1830 { 1831 return NULL; 1832 } 1833 1834 static inline 1835 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1836 { 1837 return NULL; 1838 } 1839 1840 static inline int phy_device_register(struct phy_device *phy) 1841 { 1842 return 0; 1843 } 1844 1845 static inline void phy_device_free(struct phy_device *phydev) { } 1846 #endif /* CONFIG_PHYLIB */ 1847 void phy_device_remove(struct phy_device *phydev); 1848 int phy_get_c45_ids(struct phy_device *phydev); 1849 int phy_init_hw(struct phy_device *phydev); 1850 int phy_suspend(struct phy_device *phydev); 1851 int phy_resume(struct phy_device *phydev); 1852 int __phy_resume(struct phy_device *phydev); 1853 int phy_loopback(struct phy_device *phydev, bool enable); 1854 int phy_sfp_connect_phy(void *upstream, struct phy_device *phy); 1855 void phy_sfp_disconnect_phy(void *upstream, struct phy_device *phy); 1856 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1857 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1858 int phy_sfp_probe(struct phy_device *phydev, 1859 const struct sfp_upstream_ops *ops); 1860 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1861 phy_interface_t interface); 1862 struct phy_device *phy_find_first(struct mii_bus *bus); 1863 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1864 u32 flags, phy_interface_t interface); 1865 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1866 void (*handler)(struct net_device *), 1867 phy_interface_t interface); 1868 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1869 void (*handler)(struct net_device *), 1870 phy_interface_t interface); 1871 void phy_disconnect(struct phy_device *phydev); 1872 void phy_detach(struct phy_device *phydev); 1873 void phy_start(struct phy_device *phydev); 1874 void phy_stop(struct phy_device *phydev); 1875 int phy_config_aneg(struct phy_device *phydev); 1876 int _phy_start_aneg(struct phy_device *phydev); 1877 int phy_start_aneg(struct phy_device *phydev); 1878 int phy_aneg_done(struct phy_device *phydev); 1879 unsigned int phy_inband_caps(struct phy_device *phydev, 1880 phy_interface_t interface); 1881 int phy_config_inband(struct phy_device *phydev, unsigned int modes); 1882 int phy_speed_down(struct phy_device *phydev, bool sync); 1883 int phy_speed_up(struct phy_device *phydev); 1884 bool phy_check_valid(int speed, int duplex, unsigned long *features); 1885 1886 int phy_restart_aneg(struct phy_device *phydev); 1887 int phy_reset_after_clk_enable(struct phy_device *phydev); 1888 1889 #if IS_ENABLED(CONFIG_PHYLIB) 1890 int phy_start_cable_test(struct phy_device *phydev, 1891 struct netlink_ext_ack *extack); 1892 int phy_start_cable_test_tdr(struct phy_device *phydev, 1893 struct netlink_ext_ack *extack, 1894 const struct phy_tdr_config *config); 1895 #else 1896 static inline 1897 int phy_start_cable_test(struct phy_device *phydev, 1898 struct netlink_ext_ack *extack) 1899 { 1900 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1901 return -EOPNOTSUPP; 1902 } 1903 static inline 1904 int phy_start_cable_test_tdr(struct phy_device *phydev, 1905 struct netlink_ext_ack *extack, 1906 const struct phy_tdr_config *config) 1907 { 1908 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1909 return -EOPNOTSUPP; 1910 } 1911 #endif 1912 1913 static inline void phy_device_reset(struct phy_device *phydev, int value) 1914 { 1915 mdio_device_reset(&phydev->mdio, value); 1916 } 1917 1918 #define phydev_err(_phydev, format, args...) \ 1919 dev_err(&_phydev->mdio.dev, format, ##args) 1920 1921 #define phydev_err_probe(_phydev, err, format, args...) \ 1922 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1923 1924 #define phydev_info(_phydev, format, args...) \ 1925 dev_info(&_phydev->mdio.dev, format, ##args) 1926 1927 #define phydev_warn(_phydev, format, args...) \ 1928 dev_warn(&_phydev->mdio.dev, format, ##args) 1929 1930 #define phydev_dbg(_phydev, format, args...) \ 1931 dev_dbg(&_phydev->mdio.dev, format, ##args) 1932 1933 static inline const char *phydev_name(const struct phy_device *phydev) 1934 { 1935 return dev_name(&phydev->mdio.dev); 1936 } 1937 1938 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1939 { 1940 mutex_lock(&phydev->mdio.bus->mdio_lock); 1941 } 1942 1943 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1944 { 1945 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1946 } 1947 1948 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1949 __printf(2, 3); 1950 char *phy_attached_info_irq(struct phy_device *phydev) 1951 __malloc; 1952 void phy_attached_info(struct phy_device *phydev); 1953 1954 /* Clause 22 PHY */ 1955 int genphy_read_abilities(struct phy_device *phydev); 1956 int genphy_setup_forced(struct phy_device *phydev); 1957 int genphy_restart_aneg(struct phy_device *phydev); 1958 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1959 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1960 int genphy_aneg_done(struct phy_device *phydev); 1961 int genphy_update_link(struct phy_device *phydev); 1962 int genphy_read_lpa(struct phy_device *phydev); 1963 int genphy_read_status_fixed(struct phy_device *phydev); 1964 int genphy_read_status(struct phy_device *phydev); 1965 int genphy_read_master_slave(struct phy_device *phydev); 1966 int genphy_suspend(struct phy_device *phydev); 1967 int genphy_resume(struct phy_device *phydev); 1968 int genphy_loopback(struct phy_device *phydev, bool enable); 1969 int genphy_soft_reset(struct phy_device *phydev); 1970 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1971 1972 static inline int genphy_config_aneg(struct phy_device *phydev) 1973 { 1974 return __genphy_config_aneg(phydev, false); 1975 } 1976 1977 static inline int genphy_no_config_intr(struct phy_device *phydev) 1978 { 1979 return 0; 1980 } 1981 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1982 u16 regnum); 1983 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1984 u16 regnum, u16 val); 1985 1986 /* Clause 37 */ 1987 int genphy_c37_config_aneg(struct phy_device *phydev); 1988 int genphy_c37_read_status(struct phy_device *phydev, bool *changed); 1989 1990 /* Clause 45 PHY */ 1991 int genphy_c45_restart_aneg(struct phy_device *phydev); 1992 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1993 int genphy_c45_aneg_done(struct phy_device *phydev); 1994 int genphy_c45_read_link(struct phy_device *phydev); 1995 int genphy_c45_read_lpa(struct phy_device *phydev); 1996 int genphy_c45_read_pma(struct phy_device *phydev); 1997 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1998 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 1999 int genphy_c45_an_config_aneg(struct phy_device *phydev); 2000 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 2001 int genphy_c45_read_mdix(struct phy_device *phydev); 2002 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 2003 int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev); 2004 int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev); 2005 int genphy_c45_read_eee_abilities(struct phy_device *phydev); 2006 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 2007 int genphy_c45_read_status(struct phy_device *phydev); 2008 int genphy_c45_baset1_read_status(struct phy_device *phydev); 2009 int genphy_c45_config_aneg(struct phy_device *phydev); 2010 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 2011 int genphy_c45_pma_resume(struct phy_device *phydev); 2012 int genphy_c45_pma_suspend(struct phy_device *phydev); 2013 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 2014 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 2015 struct phy_plca_cfg *plca_cfg); 2016 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 2017 const struct phy_plca_cfg *plca_cfg); 2018 int genphy_c45_plca_get_status(struct phy_device *phydev, 2019 struct phy_plca_status *plca_st); 2020 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *lp); 2021 int genphy_c45_ethtool_get_eee(struct phy_device *phydev, 2022 struct ethtool_keee *data); 2023 int genphy_c45_ethtool_set_eee(struct phy_device *phydev, 2024 struct ethtool_keee *data); 2025 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev); 2026 2027 /* Generic C45 PHY driver */ 2028 extern struct phy_driver genphy_c45_driver; 2029 2030 /* The gen10g_* functions are the old Clause 45 stub */ 2031 int gen10g_config_aneg(struct phy_device *phydev); 2032 2033 static inline int phy_read_status(struct phy_device *phydev) 2034 { 2035 if (!phydev->drv) 2036 return -EIO; 2037 2038 if (phydev->drv->read_status) 2039 return phydev->drv->read_status(phydev); 2040 else 2041 return genphy_read_status(phydev); 2042 } 2043 2044 void phy_driver_unregister(struct phy_driver *drv); 2045 void phy_drivers_unregister(struct phy_driver *drv, int n); 2046 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 2047 int phy_drivers_register(struct phy_driver *new_driver, int n, 2048 struct module *owner); 2049 void phy_error(struct phy_device *phydev); 2050 void phy_state_machine(struct work_struct *work); 2051 void phy_trigger_machine(struct phy_device *phydev); 2052 void phy_mac_interrupt(struct phy_device *phydev); 2053 void phy_start_machine(struct phy_device *phydev); 2054 void phy_stop_machine(struct phy_device *phydev); 2055 void phy_ethtool_ksettings_get(struct phy_device *phydev, 2056 struct ethtool_link_ksettings *cmd); 2057 int phy_ethtool_ksettings_set(struct phy_device *phydev, 2058 const struct ethtool_link_ksettings *cmd); 2059 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 2060 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 2061 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 2062 int phy_disable_interrupts(struct phy_device *phydev); 2063 void phy_request_interrupt(struct phy_device *phydev); 2064 void phy_free_interrupt(struct phy_device *phydev); 2065 void phy_print_status(struct phy_device *phydev); 2066 int phy_get_rate_matching(struct phy_device *phydev, 2067 phy_interface_t iface); 2068 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 2069 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 2070 void phy_advertise_supported(struct phy_device *phydev); 2071 void phy_advertise_eee_all(struct phy_device *phydev); 2072 void phy_support_sym_pause(struct phy_device *phydev); 2073 void phy_support_asym_pause(struct phy_device *phydev); 2074 void phy_support_eee(struct phy_device *phydev); 2075 void phy_disable_eee(struct phy_device *phydev); 2076 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 2077 bool autoneg); 2078 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 2079 bool phy_validate_pause(struct phy_device *phydev, 2080 struct ethtool_pauseparam *pp); 2081 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 2082 2083 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 2084 const int *delay_values, int size, bool is_rx); 2085 2086 int phy_get_tx_amplitude_gain(struct phy_device *phydev, struct device *dev, 2087 enum ethtool_link_mode_bit_indices linkmode, 2088 u32 *val); 2089 2090 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 2091 bool *tx_pause, bool *rx_pause); 2092 2093 int phy_register_fixup_for_id(const char *bus_id, 2094 int (*run)(struct phy_device *)); 2095 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 2096 int (*run)(struct phy_device *)); 2097 2098 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 2099 int phy_unregister_fixup_for_id(const char *bus_id); 2100 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 2101 2102 int phy_eee_tx_clock_stop_capable(struct phy_device *phydev); 2103 int phy_eee_rx_clock_stop(struct phy_device *phydev, bool clk_stop_enable); 2104 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 2105 int phy_get_eee_err(struct phy_device *phydev); 2106 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data); 2107 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_keee *data); 2108 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 2109 void phy_ethtool_get_wol(struct phy_device *phydev, 2110 struct ethtool_wolinfo *wol); 2111 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 2112 struct ethtool_link_ksettings *cmd); 2113 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 2114 const struct ethtool_link_ksettings *cmd); 2115 int phy_ethtool_nway_reset(struct net_device *ndev); 2116 int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size); 2117 int of_phy_package_join(struct phy_device *phydev, size_t priv_size); 2118 void phy_package_leave(struct phy_device *phydev); 2119 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 2120 int base_addr, size_t priv_size); 2121 int devm_of_phy_package_join(struct device *dev, struct phy_device *phydev, 2122 size_t priv_size); 2123 2124 int __init mdio_bus_init(void); 2125 void mdio_bus_exit(void); 2126 2127 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 2128 int phy_ethtool_get_sset_count(struct phy_device *phydev); 2129 int phy_ethtool_get_stats(struct phy_device *phydev, 2130 struct ethtool_stats *stats, u64 *data); 2131 2132 void __phy_ethtool_get_phy_stats(struct phy_device *phydev, 2133 struct ethtool_eth_phy_stats *phy_stats, 2134 struct ethtool_phy_stats *phydev_stats); 2135 void __phy_ethtool_get_link_ext_stats(struct phy_device *phydev, 2136 struct ethtool_link_ext_stats *link_stats); 2137 2138 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 2139 struct phy_plca_cfg *plca_cfg); 2140 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 2141 const struct phy_plca_cfg *plca_cfg, 2142 struct netlink_ext_ack *extack); 2143 int phy_ethtool_get_plca_status(struct phy_device *phydev, 2144 struct phy_plca_status *plca_st); 2145 2146 int __phy_hwtstamp_get(struct phy_device *phydev, 2147 struct kernel_hwtstamp_config *config); 2148 int __phy_hwtstamp_set(struct phy_device *phydev, 2149 struct kernel_hwtstamp_config *config, 2150 struct netlink_ext_ack *extack); 2151 2152 static inline int phy_package_address(struct phy_device *phydev, 2153 unsigned int addr_offset) 2154 { 2155 struct phy_package_shared *shared = phydev->shared; 2156 u8 base_addr = shared->base_addr; 2157 2158 if (addr_offset >= PHY_MAX_ADDR - base_addr) 2159 return -EIO; 2160 2161 /* we know that addr will be in the range 0..31 and thus the 2162 * implicit cast to a signed int is not a problem. 2163 */ 2164 return base_addr + addr_offset; 2165 } 2166 2167 static inline int phy_package_read(struct phy_device *phydev, 2168 unsigned int addr_offset, u32 regnum) 2169 { 2170 int addr = phy_package_address(phydev, addr_offset); 2171 2172 if (addr < 0) 2173 return addr; 2174 2175 return mdiobus_read(phydev->mdio.bus, addr, regnum); 2176 } 2177 2178 static inline int __phy_package_read(struct phy_device *phydev, 2179 unsigned int addr_offset, u32 regnum) 2180 { 2181 int addr = phy_package_address(phydev, addr_offset); 2182 2183 if (addr < 0) 2184 return addr; 2185 2186 return __mdiobus_read(phydev->mdio.bus, addr, regnum); 2187 } 2188 2189 static inline int phy_package_write(struct phy_device *phydev, 2190 unsigned int addr_offset, u32 regnum, 2191 u16 val) 2192 { 2193 int addr = phy_package_address(phydev, addr_offset); 2194 2195 if (addr < 0) 2196 return addr; 2197 2198 return mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2199 } 2200 2201 static inline int __phy_package_write(struct phy_device *phydev, 2202 unsigned int addr_offset, u32 regnum, 2203 u16 val) 2204 { 2205 int addr = phy_package_address(phydev, addr_offset); 2206 2207 if (addr < 0) 2208 return addr; 2209 2210 return __mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2211 } 2212 2213 int __phy_package_read_mmd(struct phy_device *phydev, 2214 unsigned int addr_offset, int devad, 2215 u32 regnum); 2216 2217 int phy_package_read_mmd(struct phy_device *phydev, 2218 unsigned int addr_offset, int devad, 2219 u32 regnum); 2220 2221 int __phy_package_write_mmd(struct phy_device *phydev, 2222 unsigned int addr_offset, int devad, 2223 u32 regnum, u16 val); 2224 2225 int phy_package_write_mmd(struct phy_device *phydev, 2226 unsigned int addr_offset, int devad, 2227 u32 regnum, u16 val); 2228 2229 static inline bool __phy_package_set_once(struct phy_device *phydev, 2230 unsigned int b) 2231 { 2232 struct phy_package_shared *shared = phydev->shared; 2233 2234 if (!shared) 2235 return false; 2236 2237 return !test_and_set_bit(b, &shared->flags); 2238 } 2239 2240 static inline bool phy_package_init_once(struct phy_device *phydev) 2241 { 2242 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 2243 } 2244 2245 static inline bool phy_package_probe_once(struct phy_device *phydev) 2246 { 2247 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 2248 } 2249 2250 extern const struct bus_type mdio_bus_type; 2251 2252 struct mdio_board_info { 2253 const char *bus_id; 2254 char modalias[MDIO_NAME_SIZE]; 2255 int mdio_addr; 2256 const void *platform_data; 2257 }; 2258 2259 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 2260 int mdiobus_register_board_info(const struct mdio_board_info *info, 2261 unsigned int n); 2262 #else 2263 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 2264 unsigned int n) 2265 { 2266 return 0; 2267 } 2268 #endif 2269 2270 2271 /** 2272 * phy_module_driver() - Helper macro for registering PHY drivers 2273 * @__phy_drivers: array of PHY drivers to register 2274 * @__count: Numbers of members in array 2275 * 2276 * Helper macro for PHY drivers which do not do anything special in module 2277 * init/exit. Each module may only use this macro once, and calling it 2278 * replaces module_init() and module_exit(). 2279 */ 2280 #define phy_module_driver(__phy_drivers, __count) \ 2281 static int __init phy_module_init(void) \ 2282 { \ 2283 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 2284 } \ 2285 module_init(phy_module_init); \ 2286 static void __exit phy_module_exit(void) \ 2287 { \ 2288 phy_drivers_unregister(__phy_drivers, __count); \ 2289 } \ 2290 module_exit(phy_module_exit) 2291 2292 #define module_phy_driver(__phy_drivers) \ 2293 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 2294 2295 bool phy_driver_is_genphy(struct phy_device *phydev); 2296 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 2297 2298 #endif /* __PHY_H */ 2299