1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/linkmode.h> 18 #include <linux/netlink.h> 19 #include <linux/mdio.h> 20 #include <linux/mii.h> 21 #include <linux/mii_timestamper.h> 22 #include <linux/module.h> 23 #include <linux/timer.h> 24 #include <linux/workqueue.h> 25 #include <linux/mod_devicetable.h> 26 #include <linux/u64_stats_sync.h> 27 #include <linux/irqreturn.h> 28 #include <linux/iopoll.h> 29 #include <linux/refcount.h> 30 31 #include <linux/atomic.h> 32 33 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 34 SUPPORTED_TP | \ 35 SUPPORTED_MII) 36 37 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 38 SUPPORTED_10baseT_Full) 39 40 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 41 SUPPORTED_100baseT_Full) 42 43 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 44 SUPPORTED_1000baseT_Full) 45 46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 54 55 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 56 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 57 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 58 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 59 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 60 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 61 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 62 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 63 64 extern const int phy_basic_ports_array[3]; 65 extern const int phy_fibre_port_array[1]; 66 extern const int phy_all_ports_features_array[7]; 67 extern const int phy_10_100_features_array[4]; 68 extern const int phy_basic_t1_features_array[3]; 69 extern const int phy_gbit_features_array[2]; 70 extern const int phy_10gbit_features_array[1]; 71 72 /* 73 * Set phydev->irq to PHY_POLL if interrupts are not supported, 74 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 75 * the attached MAC driver handles the interrupt 76 */ 77 #define PHY_POLL -1 78 #define PHY_MAC_INTERRUPT -2 79 80 #define PHY_IS_INTERNAL 0x00000001 81 #define PHY_RST_AFTER_CLK_EN 0x00000002 82 #define PHY_POLL_CABLE_TEST 0x00000004 83 #define MDIO_DEVICE_IS_PHY 0x80000000 84 85 /** 86 * enum phy_interface_t - Interface Mode definitions 87 * 88 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 89 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 90 * @PHY_INTERFACE_MODE_MII: Media-independent interface 91 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 92 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 93 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 94 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 95 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 96 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 97 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 98 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 99 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 100 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 101 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 102 * @PHY_INTERFACE_MODE_SMII: Serial MII 103 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 104 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 105 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 106 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 107 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 108 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 109 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 110 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 111 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 112 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 113 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 114 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 115 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 116 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 117 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 118 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 119 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 120 * @PHY_INTERFACE_MODE_MAX: Book keeping 121 * 122 * Describes the interface between the MAC and PHY. 123 */ 124 typedef enum { 125 PHY_INTERFACE_MODE_NA, 126 PHY_INTERFACE_MODE_INTERNAL, 127 PHY_INTERFACE_MODE_MII, 128 PHY_INTERFACE_MODE_GMII, 129 PHY_INTERFACE_MODE_SGMII, 130 PHY_INTERFACE_MODE_TBI, 131 PHY_INTERFACE_MODE_REVMII, 132 PHY_INTERFACE_MODE_RMII, 133 PHY_INTERFACE_MODE_REVRMII, 134 PHY_INTERFACE_MODE_RGMII, 135 PHY_INTERFACE_MODE_RGMII_ID, 136 PHY_INTERFACE_MODE_RGMII_RXID, 137 PHY_INTERFACE_MODE_RGMII_TXID, 138 PHY_INTERFACE_MODE_RTBI, 139 PHY_INTERFACE_MODE_SMII, 140 PHY_INTERFACE_MODE_XGMII, 141 PHY_INTERFACE_MODE_XLGMII, 142 PHY_INTERFACE_MODE_MOCA, 143 PHY_INTERFACE_MODE_QSGMII, 144 PHY_INTERFACE_MODE_TRGMII, 145 PHY_INTERFACE_MODE_100BASEX, 146 PHY_INTERFACE_MODE_1000BASEX, 147 PHY_INTERFACE_MODE_2500BASEX, 148 PHY_INTERFACE_MODE_5GBASER, 149 PHY_INTERFACE_MODE_RXAUI, 150 PHY_INTERFACE_MODE_XAUI, 151 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 152 PHY_INTERFACE_MODE_10GBASER, 153 PHY_INTERFACE_MODE_25GBASER, 154 PHY_INTERFACE_MODE_USXGMII, 155 /* 10GBASE-KR - with Clause 73 AN */ 156 PHY_INTERFACE_MODE_10GKR, 157 PHY_INTERFACE_MODE_QUSGMII, 158 PHY_INTERFACE_MODE_1000BASEKX, 159 PHY_INTERFACE_MODE_MAX, 160 } phy_interface_t; 161 162 /* PHY interface mode bitmap handling */ 163 #define DECLARE_PHY_INTERFACE_MASK(name) \ 164 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 165 166 static inline void phy_interface_zero(unsigned long *intf) 167 { 168 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 169 } 170 171 static inline bool phy_interface_empty(const unsigned long *intf) 172 { 173 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 174 } 175 176 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 177 const unsigned long *b) 178 { 179 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 180 } 181 182 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 183 const unsigned long *b) 184 { 185 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 186 } 187 188 static inline void phy_interface_set_rgmii(unsigned long *intf) 189 { 190 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 191 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 192 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 193 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 194 } 195 196 /* 197 * phy_supported_speeds - return all speeds currently supported by a PHY device 198 */ 199 unsigned int phy_supported_speeds(struct phy_device *phy, 200 unsigned int *speeds, 201 unsigned int size); 202 203 /** 204 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 205 * @interface: enum phy_interface_t value 206 * 207 * Description: maps enum &phy_interface_t defined in this file 208 * into the device tree binding of 'phy-mode', so that Ethernet 209 * device driver can get PHY interface from device tree. 210 */ 211 static inline const char *phy_modes(phy_interface_t interface) 212 { 213 switch (interface) { 214 case PHY_INTERFACE_MODE_NA: 215 return ""; 216 case PHY_INTERFACE_MODE_INTERNAL: 217 return "internal"; 218 case PHY_INTERFACE_MODE_MII: 219 return "mii"; 220 case PHY_INTERFACE_MODE_GMII: 221 return "gmii"; 222 case PHY_INTERFACE_MODE_SGMII: 223 return "sgmii"; 224 case PHY_INTERFACE_MODE_TBI: 225 return "tbi"; 226 case PHY_INTERFACE_MODE_REVMII: 227 return "rev-mii"; 228 case PHY_INTERFACE_MODE_RMII: 229 return "rmii"; 230 case PHY_INTERFACE_MODE_REVRMII: 231 return "rev-rmii"; 232 case PHY_INTERFACE_MODE_RGMII: 233 return "rgmii"; 234 case PHY_INTERFACE_MODE_RGMII_ID: 235 return "rgmii-id"; 236 case PHY_INTERFACE_MODE_RGMII_RXID: 237 return "rgmii-rxid"; 238 case PHY_INTERFACE_MODE_RGMII_TXID: 239 return "rgmii-txid"; 240 case PHY_INTERFACE_MODE_RTBI: 241 return "rtbi"; 242 case PHY_INTERFACE_MODE_SMII: 243 return "smii"; 244 case PHY_INTERFACE_MODE_XGMII: 245 return "xgmii"; 246 case PHY_INTERFACE_MODE_XLGMII: 247 return "xlgmii"; 248 case PHY_INTERFACE_MODE_MOCA: 249 return "moca"; 250 case PHY_INTERFACE_MODE_QSGMII: 251 return "qsgmii"; 252 case PHY_INTERFACE_MODE_TRGMII: 253 return "trgmii"; 254 case PHY_INTERFACE_MODE_1000BASEX: 255 return "1000base-x"; 256 case PHY_INTERFACE_MODE_1000BASEKX: 257 return "1000base-kx"; 258 case PHY_INTERFACE_MODE_2500BASEX: 259 return "2500base-x"; 260 case PHY_INTERFACE_MODE_5GBASER: 261 return "5gbase-r"; 262 case PHY_INTERFACE_MODE_RXAUI: 263 return "rxaui"; 264 case PHY_INTERFACE_MODE_XAUI: 265 return "xaui"; 266 case PHY_INTERFACE_MODE_10GBASER: 267 return "10gbase-r"; 268 case PHY_INTERFACE_MODE_25GBASER: 269 return "25gbase-r"; 270 case PHY_INTERFACE_MODE_USXGMII: 271 return "usxgmii"; 272 case PHY_INTERFACE_MODE_10GKR: 273 return "10gbase-kr"; 274 case PHY_INTERFACE_MODE_100BASEX: 275 return "100base-x"; 276 case PHY_INTERFACE_MODE_QUSGMII: 277 return "qusgmii"; 278 default: 279 return "unknown"; 280 } 281 } 282 283 284 #define PHY_INIT_TIMEOUT 100000 285 #define PHY_FORCE_TIMEOUT 10 286 287 #define PHY_MAX_ADDR 32 288 289 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 290 #define PHY_ID_FMT "%s:%02x" 291 292 #define MII_BUS_ID_SIZE 61 293 294 struct device; 295 struct phylink; 296 struct sfp_bus; 297 struct sfp_upstream_ops; 298 struct sk_buff; 299 300 /** 301 * struct mdio_bus_stats - Statistics counters for MDIO busses 302 * @transfers: Total number of transfers, i.e. @writes + @reads 303 * @errors: Number of MDIO transfers that returned an error 304 * @writes: Number of write transfers 305 * @reads: Number of read transfers 306 * @syncp: Synchronisation for incrementing statistics 307 */ 308 struct mdio_bus_stats { 309 u64_stats_t transfers; 310 u64_stats_t errors; 311 u64_stats_t writes; 312 u64_stats_t reads; 313 /* Must be last, add new statistics above */ 314 struct u64_stats_sync syncp; 315 }; 316 317 /** 318 * struct phy_package_shared - Shared information in PHY packages 319 * @addr: Common PHY address used to combine PHYs in one package 320 * @refcnt: Number of PHYs connected to this shared data 321 * @flags: Initialization of PHY package 322 * @priv_size: Size of the shared private data @priv 323 * @priv: Driver private data shared across a PHY package 324 * 325 * Represents a shared structure between different phydev's in the same 326 * package, for example a quad PHY. See phy_package_join() and 327 * phy_package_leave(). 328 */ 329 struct phy_package_shared { 330 int addr; 331 refcount_t refcnt; 332 unsigned long flags; 333 size_t priv_size; 334 335 /* private data pointer */ 336 /* note that this pointer is shared between different phydevs and 337 * the user has to take care of appropriate locking. It is allocated 338 * and freed automatically by phy_package_join() and 339 * phy_package_leave(). 340 */ 341 void *priv; 342 }; 343 344 /* used as bit number in atomic bitops */ 345 #define PHY_SHARED_F_INIT_DONE 0 346 #define PHY_SHARED_F_PROBE_DONE 1 347 348 /** 349 * struct mii_bus - Represents an MDIO bus 350 * 351 * @owner: Who owns this device 352 * @name: User friendly name for this MDIO device, or driver name 353 * @id: Unique identifier for this bus, typical from bus hierarchy 354 * @priv: Driver private data 355 * 356 * The Bus class for PHYs. Devices which provide access to 357 * PHYs should register using this structure 358 */ 359 struct mii_bus { 360 struct module *owner; 361 const char *name; 362 char id[MII_BUS_ID_SIZE]; 363 void *priv; 364 /** @read: Perform a read transfer on the bus */ 365 int (*read)(struct mii_bus *bus, int addr, int regnum); 366 /** @write: Perform a write transfer on the bus */ 367 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 368 /** @reset: Perform a reset of the bus */ 369 int (*reset)(struct mii_bus *bus); 370 371 /** @stats: Statistic counters per device on the bus */ 372 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 373 374 /** 375 * @mdio_lock: A lock to ensure that only one thing can read/write 376 * the MDIO bus at a time 377 */ 378 struct mutex mdio_lock; 379 380 /** @parent: Parent device of this bus */ 381 struct device *parent; 382 /** @state: State of bus structure */ 383 enum { 384 MDIOBUS_ALLOCATED = 1, 385 MDIOBUS_REGISTERED, 386 MDIOBUS_UNREGISTERED, 387 MDIOBUS_RELEASED, 388 } state; 389 390 /** @dev: Kernel device representation */ 391 struct device dev; 392 393 /** @mdio_map: list of all MDIO devices on bus */ 394 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 395 396 /** @phy_mask: PHY addresses to be ignored when probing */ 397 u32 phy_mask; 398 399 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 400 u32 phy_ignore_ta_mask; 401 402 /** 403 * @irq: An array of interrupts, each PHY's interrupt at the index 404 * matching its address 405 */ 406 int irq[PHY_MAX_ADDR]; 407 408 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 409 int reset_delay_us; 410 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 411 int reset_post_delay_us; 412 /** @reset_gpiod: Reset GPIO descriptor pointer */ 413 struct gpio_desc *reset_gpiod; 414 415 /** @probe_capabilities: bus capabilities, used for probing */ 416 enum { 417 MDIOBUS_NO_CAP = 0, 418 MDIOBUS_C22, 419 MDIOBUS_C45, 420 MDIOBUS_C22_C45, 421 } probe_capabilities; 422 423 /** @shared_lock: protect access to the shared element */ 424 struct mutex shared_lock; 425 426 /** @shared: shared state across different PHYs */ 427 struct phy_package_shared *shared[PHY_MAX_ADDR]; 428 }; 429 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 430 431 struct mii_bus *mdiobus_alloc_size(size_t size); 432 433 /** 434 * mdiobus_alloc - Allocate an MDIO bus structure 435 * 436 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 437 * for the driver to register the bus. 438 */ 439 static inline struct mii_bus *mdiobus_alloc(void) 440 { 441 return mdiobus_alloc_size(0); 442 } 443 444 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 445 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 446 struct module *owner); 447 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 448 #define devm_mdiobus_register(dev, bus) \ 449 __devm_mdiobus_register(dev, bus, THIS_MODULE) 450 451 void mdiobus_unregister(struct mii_bus *bus); 452 void mdiobus_free(struct mii_bus *bus); 453 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 454 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 455 { 456 return devm_mdiobus_alloc_size(dev, 0); 457 } 458 459 struct mii_bus *mdio_find_bus(const char *mdio_name); 460 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); 461 462 #define PHY_INTERRUPT_DISABLED false 463 #define PHY_INTERRUPT_ENABLED true 464 465 /** 466 * enum phy_state - PHY state machine states: 467 * 468 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 469 * should be called if and only if the PHY is in this state, 470 * given that the PHY device exists. 471 * - PHY driver probe function will set the state to @PHY_READY 472 * 473 * @PHY_READY: PHY is ready to send and receive packets, but the 474 * controller is not. By default, PHYs which do not implement 475 * probe will be set to this state by phy_probe(). 476 * - start will set the state to UP 477 * 478 * @PHY_UP: The PHY and attached device are ready to do work. 479 * Interrupts should be started here. 480 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 481 * 482 * @PHY_NOLINK: PHY is up, but not currently plugged in. 483 * - irq or timer will set @PHY_RUNNING if link comes back 484 * - phy_stop moves to @PHY_HALTED 485 * 486 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 487 * and/or receiving packets 488 * - irq or timer will set @PHY_NOLINK if link goes down 489 * - phy_stop moves to @PHY_HALTED 490 * 491 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 492 * is not expected to work, carrier will be indicated as down. PHY will be 493 * poll once per second, or on interrupt for it current state. 494 * Once complete, move to UP to restart the PHY. 495 * - phy_stop aborts the running test and moves to @PHY_HALTED 496 * 497 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or 498 * PHY is in an error state. 499 * - phy_start moves to @PHY_UP 500 */ 501 enum phy_state { 502 PHY_DOWN = 0, 503 PHY_READY, 504 PHY_HALTED, 505 PHY_UP, 506 PHY_RUNNING, 507 PHY_NOLINK, 508 PHY_CABLETEST, 509 }; 510 511 #define MDIO_MMD_NUM 32 512 513 /** 514 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 515 * @devices_in_package: IEEE 802.3 devices in package register value. 516 * @mmds_present: bit vector of MMDs present. 517 * @device_ids: The device identifer for each present device. 518 */ 519 struct phy_c45_device_ids { 520 u32 devices_in_package; 521 u32 mmds_present; 522 u32 device_ids[MDIO_MMD_NUM]; 523 }; 524 525 struct macsec_context; 526 struct macsec_ops; 527 528 /** 529 * struct phy_device - An instance of a PHY 530 * 531 * @mdio: MDIO bus this PHY is on 532 * @drv: Pointer to the driver for this PHY instance 533 * @phy_id: UID for this device found during discovery 534 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 535 * @is_c45: Set to true if this PHY uses clause 45 addressing. 536 * @is_internal: Set to true if this PHY is internal to a MAC. 537 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 538 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 539 * @has_fixups: Set to true if this PHY has fixups/quirks. 540 * @suspended: Set to true if this PHY has been suspended successfully. 541 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 542 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 543 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 544 * @downshifted_rate: Set true if link speed has been downshifted. 545 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 546 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 547 * @state: State of the PHY for management purposes 548 * @dev_flags: Device-specific flags used by the PHY driver. 549 * 550 * - Bits [15:0] are free to use by the PHY driver to communicate 551 * driver specific behavior. 552 * - Bits [23:16] are currently reserved for future use. 553 * - Bits [31:24] are reserved for defining generic 554 * PHY driver behavior. 555 * @irq: IRQ number of the PHY's interrupt (-1 if none) 556 * @phy_timer: The timer for handling the state machine 557 * @phylink: Pointer to phylink instance for this PHY 558 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 559 * @sfp_bus: SFP bus attached to this PHY's fiber port 560 * @attached_dev: The attached enet driver's device instance ptr 561 * @adjust_link: Callback for the enet controller to respond to changes: in the 562 * link state. 563 * @phy_link_change: Callback for phylink for notification of link change 564 * @macsec_ops: MACsec offloading ops. 565 * 566 * @speed: Current link speed 567 * @duplex: Current duplex 568 * @port: Current port 569 * @pause: Current pause 570 * @asym_pause: Current asymmetric pause 571 * @supported: Combined MAC/PHY supported linkmodes 572 * @advertising: Currently advertised linkmodes 573 * @adv_old: Saved advertised while power saving for WoL 574 * @lp_advertising: Current link partner advertised linkmodes 575 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 576 * @autoneg: Flag autoneg being used 577 * @link: Current link state 578 * @autoneg_complete: Flag auto negotiation of the link has completed 579 * @mdix: Current crossover 580 * @mdix_ctrl: User setting of crossover 581 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 582 * @interrupts: Flag interrupts have been enabled 583 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 584 * handling shall be postponed until PHY has resumed 585 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 586 * requiring a rerun of the interrupt handler after resume 587 * @interface: enum phy_interface_t value 588 * @skb: Netlink message for cable diagnostics 589 * @nest: Netlink nest used for cable diagnostics 590 * @ehdr: nNtlink header for cable diagnostics 591 * @phy_led_triggers: Array of LED triggers 592 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 593 * @led_link_trigger: LED trigger for link up/down 594 * @last_triggered: last LED trigger for link speed 595 * @master_slave_set: User requested master/slave configuration 596 * @master_slave_get: Current master/slave advertisement 597 * @master_slave_state: Current master/slave configuration 598 * @mii_ts: Pointer to time stamper callbacks 599 * @lock: Mutex for serialization access to PHY 600 * @state_queue: Work queue for state machine 601 * @shared: Pointer to private data shared by phys in one package 602 * @priv: Pointer to driver private data 603 * 604 * interrupts currently only supports enabled or disabled, 605 * but could be changed in the future to support enabling 606 * and disabling specific interrupts 607 * 608 * Contains some infrastructure for polling and interrupt 609 * handling, as well as handling shifts in PHY hardware state 610 */ 611 struct phy_device { 612 struct mdio_device mdio; 613 614 /* Information about the PHY type */ 615 /* And management functions */ 616 struct phy_driver *drv; 617 618 u32 phy_id; 619 620 struct phy_c45_device_ids c45_ids; 621 unsigned is_c45:1; 622 unsigned is_internal:1; 623 unsigned is_pseudo_fixed_link:1; 624 unsigned is_gigabit_capable:1; 625 unsigned has_fixups:1; 626 unsigned suspended:1; 627 unsigned suspended_by_mdio_bus:1; 628 unsigned sysfs_links:1; 629 unsigned loopback_enabled:1; 630 unsigned downshifted_rate:1; 631 unsigned is_on_sfp_module:1; 632 unsigned mac_managed_pm:1; 633 634 unsigned autoneg:1; 635 /* The most recently read link state */ 636 unsigned link:1; 637 unsigned autoneg_complete:1; 638 639 /* Interrupts are enabled */ 640 unsigned interrupts:1; 641 unsigned irq_suspended:1; 642 unsigned irq_rerun:1; 643 644 enum phy_state state; 645 646 u32 dev_flags; 647 648 phy_interface_t interface; 649 650 /* 651 * forced speed & duplex (no autoneg) 652 * partner speed & duplex & pause (autoneg) 653 */ 654 int speed; 655 int duplex; 656 int port; 657 int pause; 658 int asym_pause; 659 u8 master_slave_get; 660 u8 master_slave_set; 661 u8 master_slave_state; 662 663 /* Union of PHY and Attached devices' supported link modes */ 664 /* See ethtool.h for more info */ 665 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 666 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 667 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 668 /* used with phy_speed_down */ 669 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 670 671 /* Energy efficient ethernet modes which should be prohibited */ 672 u32 eee_broken_modes; 673 674 #ifdef CONFIG_LED_TRIGGER_PHY 675 struct phy_led_trigger *phy_led_triggers; 676 unsigned int phy_num_led_triggers; 677 struct phy_led_trigger *last_triggered; 678 679 struct phy_led_trigger *led_link_trigger; 680 #endif 681 682 /* 683 * Interrupt number for this PHY 684 * -1 means no interrupt 685 */ 686 int irq; 687 688 /* private data pointer */ 689 /* For use by PHYs to maintain extra state */ 690 void *priv; 691 692 /* shared data pointer */ 693 /* For use by PHYs inside the same package that need a shared state. */ 694 struct phy_package_shared *shared; 695 696 /* Reporting cable test results */ 697 struct sk_buff *skb; 698 void *ehdr; 699 struct nlattr *nest; 700 701 /* Interrupt and Polling infrastructure */ 702 struct delayed_work state_queue; 703 704 struct mutex lock; 705 706 /* This may be modified under the rtnl lock */ 707 bool sfp_bus_attached; 708 struct sfp_bus *sfp_bus; 709 struct phylink *phylink; 710 struct net_device *attached_dev; 711 struct mii_timestamper *mii_ts; 712 713 u8 mdix; 714 u8 mdix_ctrl; 715 716 int pma_extable; 717 718 void (*phy_link_change)(struct phy_device *phydev, bool up); 719 void (*adjust_link)(struct net_device *dev); 720 721 #if IS_ENABLED(CONFIG_MACSEC) 722 /* MACsec management functions */ 723 const struct macsec_ops *macsec_ops; 724 #endif 725 }; 726 727 static inline struct phy_device *to_phy_device(const struct device *dev) 728 { 729 return container_of(to_mdio_device(dev), struct phy_device, mdio); 730 } 731 732 /** 733 * struct phy_tdr_config - Configuration of a TDR raw test 734 * 735 * @first: Distance for first data collection point 736 * @last: Distance for last data collection point 737 * @step: Step between data collection points 738 * @pair: Bitmap of cable pairs to collect data for 739 * 740 * A structure containing possible configuration parameters 741 * for a TDR cable test. The driver does not need to implement 742 * all the parameters, but should report what is actually used. 743 * All distances are in centimeters. 744 */ 745 struct phy_tdr_config { 746 u32 first; 747 u32 last; 748 u32 step; 749 s8 pair; 750 }; 751 #define PHY_PAIR_ALL -1 752 753 /** 754 * struct phy_driver - Driver structure for a particular PHY type 755 * 756 * @mdiodrv: Data common to all MDIO devices 757 * @phy_id: The result of reading the UID registers of this PHY 758 * type, and ANDing them with the phy_id_mask. This driver 759 * only works for PHYs with IDs which match this field 760 * @name: The friendly name of this PHY type 761 * @phy_id_mask: Defines the important bits of the phy_id 762 * @features: A mandatory list of features (speed, duplex, etc) 763 * supported by this PHY 764 * @flags: A bitfield defining certain other features this PHY 765 * supports (like interrupts) 766 * @driver_data: Static driver data 767 * 768 * All functions are optional. If config_aneg or read_status 769 * are not implemented, the phy core uses the genphy versions. 770 * Note that none of these functions should be called from 771 * interrupt time. The goal is for the bus read/write functions 772 * to be able to block when the bus transaction is happening, 773 * and be freed up by an interrupt (The MPC85xx has this ability, 774 * though it is not currently supported in the driver). 775 */ 776 struct phy_driver { 777 struct mdio_driver_common mdiodrv; 778 u32 phy_id; 779 char *name; 780 u32 phy_id_mask; 781 const unsigned long * const features; 782 u32 flags; 783 const void *driver_data; 784 785 /** 786 * @soft_reset: Called to issue a PHY software reset 787 */ 788 int (*soft_reset)(struct phy_device *phydev); 789 790 /** 791 * @config_init: Called to initialize the PHY, 792 * including after a reset 793 */ 794 int (*config_init)(struct phy_device *phydev); 795 796 /** 797 * @probe: Called during discovery. Used to set 798 * up device-specific structures, if any 799 */ 800 int (*probe)(struct phy_device *phydev); 801 802 /** 803 * @get_features: Probe the hardware to determine what 804 * abilities it has. Should only set phydev->supported. 805 */ 806 int (*get_features)(struct phy_device *phydev); 807 808 /* PHY Power Management */ 809 /** @suspend: Suspend the hardware, saving state if needed */ 810 int (*suspend)(struct phy_device *phydev); 811 /** @resume: Resume the hardware, restoring state if needed */ 812 int (*resume)(struct phy_device *phydev); 813 814 /** 815 * @config_aneg: Configures the advertisement and resets 816 * autonegotiation if phydev->autoneg is on, 817 * forces the speed to the current settings in phydev 818 * if phydev->autoneg is off 819 */ 820 int (*config_aneg)(struct phy_device *phydev); 821 822 /** @aneg_done: Determines the auto negotiation result */ 823 int (*aneg_done)(struct phy_device *phydev); 824 825 /** @read_status: Determines the negotiated speed and duplex */ 826 int (*read_status)(struct phy_device *phydev); 827 828 /** 829 * @config_intr: Enables or disables interrupts. 830 * It should also clear any pending interrupts prior to enabling the 831 * IRQs and after disabling them. 832 */ 833 int (*config_intr)(struct phy_device *phydev); 834 835 /** @handle_interrupt: Override default interrupt handling */ 836 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 837 838 /** @remove: Clears up any memory if needed */ 839 void (*remove)(struct phy_device *phydev); 840 841 /** 842 * @match_phy_device: Returns true if this is a suitable 843 * driver for the given phydev. If NULL, matching is based on 844 * phy_id and phy_id_mask. 845 */ 846 int (*match_phy_device)(struct phy_device *phydev); 847 848 /** 849 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 850 * register changes to enable Wake on LAN, so set_wol is 851 * provided to be called in the ethernet driver's set_wol 852 * function. 853 */ 854 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 855 856 /** 857 * @get_wol: See set_wol, but for checking whether Wake on LAN 858 * is enabled. 859 */ 860 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 861 862 /** 863 * @link_change_notify: Called to inform a PHY device driver 864 * when the core is about to change the link state. This 865 * callback is supposed to be used as fixup hook for drivers 866 * that need to take action when the link state 867 * changes. Drivers are by no means allowed to mess with the 868 * PHY device structure in their implementations. 869 */ 870 void (*link_change_notify)(struct phy_device *dev); 871 872 /** 873 * @read_mmd: PHY specific driver override for reading a MMD 874 * register. This function is optional for PHY specific 875 * drivers. When not provided, the default MMD read function 876 * will be used by phy_read_mmd(), which will use either a 877 * direct read for Clause 45 PHYs or an indirect read for 878 * Clause 22 PHYs. devnum is the MMD device number within the 879 * PHY device, regnum is the register within the selected MMD 880 * device. 881 */ 882 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 883 884 /** 885 * @write_mmd: PHY specific driver override for writing a MMD 886 * register. This function is optional for PHY specific 887 * drivers. When not provided, the default MMD write function 888 * will be used by phy_write_mmd(), which will use either a 889 * direct write for Clause 45 PHYs, or an indirect write for 890 * Clause 22 PHYs. devnum is the MMD device number within the 891 * PHY device, regnum is the register within the selected MMD 892 * device. val is the value to be written. 893 */ 894 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 895 u16 val); 896 897 /** @read_page: Return the current PHY register page number */ 898 int (*read_page)(struct phy_device *dev); 899 /** @write_page: Set the current PHY register page number */ 900 int (*write_page)(struct phy_device *dev, int page); 901 902 /** 903 * @module_info: Get the size and type of the eeprom contained 904 * within a plug-in module 905 */ 906 int (*module_info)(struct phy_device *dev, 907 struct ethtool_modinfo *modinfo); 908 909 /** 910 * @module_eeprom: Get the eeprom information from the plug-in 911 * module 912 */ 913 int (*module_eeprom)(struct phy_device *dev, 914 struct ethtool_eeprom *ee, u8 *data); 915 916 /** @cable_test_start: Start a cable test */ 917 int (*cable_test_start)(struct phy_device *dev); 918 919 /** @cable_test_tdr_start: Start a raw TDR cable test */ 920 int (*cable_test_tdr_start)(struct phy_device *dev, 921 const struct phy_tdr_config *config); 922 923 /** 924 * @cable_test_get_status: Once per second, or on interrupt, 925 * request the status of the test. 926 */ 927 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 928 929 /* Get statistics from the PHY using ethtool */ 930 /** @get_sset_count: Number of statistic counters */ 931 int (*get_sset_count)(struct phy_device *dev); 932 /** @get_strings: Names of the statistic counters */ 933 void (*get_strings)(struct phy_device *dev, u8 *data); 934 /** @get_stats: Return the statistic counter values */ 935 void (*get_stats)(struct phy_device *dev, 936 struct ethtool_stats *stats, u64 *data); 937 938 /* Get and Set PHY tunables */ 939 /** @get_tunable: Return the value of a tunable */ 940 int (*get_tunable)(struct phy_device *dev, 941 struct ethtool_tunable *tuna, void *data); 942 /** @set_tunable: Set the value of a tunable */ 943 int (*set_tunable)(struct phy_device *dev, 944 struct ethtool_tunable *tuna, 945 const void *data); 946 /** @set_loopback: Set the loopback mood of the PHY */ 947 int (*set_loopback)(struct phy_device *dev, bool enable); 948 /** @get_sqi: Get the signal quality indication */ 949 int (*get_sqi)(struct phy_device *dev); 950 /** @get_sqi_max: Get the maximum signal quality indication */ 951 int (*get_sqi_max)(struct phy_device *dev); 952 }; 953 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 954 struct phy_driver, mdiodrv) 955 956 #define PHY_ANY_ID "MATCH ANY PHY" 957 #define PHY_ANY_UID 0xffffffff 958 959 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 960 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 961 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 962 963 /* A Structure for boards to register fixups with the PHY Lib */ 964 struct phy_fixup { 965 struct list_head list; 966 char bus_id[MII_BUS_ID_SIZE + 3]; 967 u32 phy_uid; 968 u32 phy_uid_mask; 969 int (*run)(struct phy_device *phydev); 970 }; 971 972 const char *phy_speed_to_str(int speed); 973 const char *phy_duplex_to_str(unsigned int duplex); 974 975 int phy_interface_num_ports(phy_interface_t interface); 976 977 /* A structure for mapping a particular speed and duplex 978 * combination to a particular SUPPORTED and ADVERTISED value 979 */ 980 struct phy_setting { 981 u32 speed; 982 u8 duplex; 983 u8 bit; 984 }; 985 986 const struct phy_setting * 987 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 988 bool exact); 989 size_t phy_speeds(unsigned int *speeds, size_t size, 990 unsigned long *mask); 991 void of_set_phy_supported(struct phy_device *phydev); 992 void of_set_phy_eee_broken(struct phy_device *phydev); 993 int phy_speed_down_core(struct phy_device *phydev); 994 995 /** 996 * phy_is_started - Convenience function to check whether PHY is started 997 * @phydev: The phy_device struct 998 */ 999 static inline bool phy_is_started(struct phy_device *phydev) 1000 { 1001 return phydev->state >= PHY_UP; 1002 } 1003 1004 void phy_resolve_aneg_pause(struct phy_device *phydev); 1005 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1006 void phy_check_downshift(struct phy_device *phydev); 1007 1008 /** 1009 * phy_read - Convenience function for reading a given PHY register 1010 * @phydev: the phy_device struct 1011 * @regnum: register number to read 1012 * 1013 * NOTE: MUST NOT be called from interrupt context, 1014 * because the bus read/write functions may wait for an interrupt 1015 * to conclude the operation. 1016 */ 1017 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1018 { 1019 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1020 } 1021 1022 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1023 timeout_us, sleep_before_read) \ 1024 ({ \ 1025 int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \ 1026 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1027 if (val < 0) \ 1028 __ret = val; \ 1029 if (__ret) \ 1030 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1031 __ret; \ 1032 }) 1033 1034 1035 /** 1036 * __phy_read - convenience function for reading a given PHY register 1037 * @phydev: the phy_device struct 1038 * @regnum: register number to read 1039 * 1040 * The caller must have taken the MDIO bus lock. 1041 */ 1042 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1043 { 1044 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1045 } 1046 1047 /** 1048 * phy_write - Convenience function for writing a given PHY register 1049 * @phydev: the phy_device struct 1050 * @regnum: register number to write 1051 * @val: value to write to @regnum 1052 * 1053 * NOTE: MUST NOT be called from interrupt context, 1054 * because the bus read/write functions may wait for an interrupt 1055 * to conclude the operation. 1056 */ 1057 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1058 { 1059 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1060 } 1061 1062 /** 1063 * __phy_write - Convenience function for writing a given PHY register 1064 * @phydev: the phy_device struct 1065 * @regnum: register number to write 1066 * @val: value to write to @regnum 1067 * 1068 * The caller must have taken the MDIO bus lock. 1069 */ 1070 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1071 { 1072 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1073 val); 1074 } 1075 1076 /** 1077 * __phy_modify_changed() - Convenience function for modifying a PHY register 1078 * @phydev: a pointer to a &struct phy_device 1079 * @regnum: register number 1080 * @mask: bit mask of bits to clear 1081 * @set: bit mask of bits to set 1082 * 1083 * Unlocked helper function which allows a PHY register to be modified as 1084 * new register value = (old register value & ~mask) | set 1085 * 1086 * Returns negative errno, 0 if there was no change, and 1 in case of change 1087 */ 1088 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1089 u16 mask, u16 set) 1090 { 1091 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1092 regnum, mask, set); 1093 } 1094 1095 /* 1096 * phy_read_mmd - Convenience function for reading a register 1097 * from an MMD on a given PHY. 1098 */ 1099 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1100 1101 /** 1102 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1103 * condition is met or a timeout occurs 1104 * 1105 * @phydev: The phy_device struct 1106 * @devaddr: The MMD to read from 1107 * @regnum: The register on the MMD to read 1108 * @val: Variable to read the register into 1109 * @cond: Break condition (usually involving @val) 1110 * @sleep_us: Maximum time to sleep between reads in us (0 1111 * tight-loops). Should be less than ~20ms since usleep_range 1112 * is used (see Documentation/timers/timers-howto.rst). 1113 * @timeout_us: Timeout in us, 0 means never timeout 1114 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1115 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either 1116 * case, the last read value at @args is stored in @val. Must not 1117 * be called from atomic context if sleep_us or timeout_us are used. 1118 */ 1119 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1120 sleep_us, timeout_us, sleep_before_read) \ 1121 ({ \ 1122 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \ 1123 sleep_us, timeout_us, sleep_before_read, \ 1124 phydev, devaddr, regnum); \ 1125 if (val < 0) \ 1126 __ret = val; \ 1127 if (__ret) \ 1128 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1129 __ret; \ 1130 }) 1131 1132 /* 1133 * __phy_read_mmd - Convenience function for reading a register 1134 * from an MMD on a given PHY. 1135 */ 1136 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1137 1138 /* 1139 * phy_write_mmd - Convenience function for writing a register 1140 * on an MMD on a given PHY. 1141 */ 1142 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1143 1144 /* 1145 * __phy_write_mmd - Convenience function for writing a register 1146 * on an MMD on a given PHY. 1147 */ 1148 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1149 1150 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1151 u16 set); 1152 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1153 u16 set); 1154 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1155 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1156 1157 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1158 u16 mask, u16 set); 1159 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1160 u16 mask, u16 set); 1161 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1162 u16 mask, u16 set); 1163 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1164 u16 mask, u16 set); 1165 1166 /** 1167 * __phy_set_bits - Convenience function for setting bits in a PHY register 1168 * @phydev: the phy_device struct 1169 * @regnum: register number to write 1170 * @val: bits to set 1171 * 1172 * The caller must have taken the MDIO bus lock. 1173 */ 1174 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1175 { 1176 return __phy_modify(phydev, regnum, 0, val); 1177 } 1178 1179 /** 1180 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1181 * @phydev: the phy_device struct 1182 * @regnum: register number to write 1183 * @val: bits to clear 1184 * 1185 * The caller must have taken the MDIO bus lock. 1186 */ 1187 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1188 u16 val) 1189 { 1190 return __phy_modify(phydev, regnum, val, 0); 1191 } 1192 1193 /** 1194 * phy_set_bits - Convenience function for setting bits in a PHY register 1195 * @phydev: the phy_device struct 1196 * @regnum: register number to write 1197 * @val: bits to set 1198 */ 1199 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1200 { 1201 return phy_modify(phydev, regnum, 0, val); 1202 } 1203 1204 /** 1205 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1206 * @phydev: the phy_device struct 1207 * @regnum: register number to write 1208 * @val: bits to clear 1209 */ 1210 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1211 { 1212 return phy_modify(phydev, regnum, val, 0); 1213 } 1214 1215 /** 1216 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1217 * on MMD 1218 * @phydev: the phy_device struct 1219 * @devad: the MMD containing register to modify 1220 * @regnum: register number to modify 1221 * @val: bits to set 1222 * 1223 * The caller must have taken the MDIO bus lock. 1224 */ 1225 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1226 u32 regnum, u16 val) 1227 { 1228 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1229 } 1230 1231 /** 1232 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1233 * on MMD 1234 * @phydev: the phy_device struct 1235 * @devad: the MMD containing register to modify 1236 * @regnum: register number to modify 1237 * @val: bits to clear 1238 * 1239 * The caller must have taken the MDIO bus lock. 1240 */ 1241 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1242 u32 regnum, u16 val) 1243 { 1244 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1245 } 1246 1247 /** 1248 * phy_set_bits_mmd - Convenience function for setting bits in a register 1249 * on MMD 1250 * @phydev: the phy_device struct 1251 * @devad: the MMD containing register to modify 1252 * @regnum: register number to modify 1253 * @val: bits to set 1254 */ 1255 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1256 u32 regnum, u16 val) 1257 { 1258 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1259 } 1260 1261 /** 1262 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1263 * on MMD 1264 * @phydev: the phy_device struct 1265 * @devad: the MMD containing register to modify 1266 * @regnum: register number to modify 1267 * @val: bits to clear 1268 */ 1269 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1270 u32 regnum, u16 val) 1271 { 1272 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1273 } 1274 1275 /** 1276 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1277 * @phydev: the phy_device struct 1278 * 1279 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1280 * PHY_MAC_INTERRUPT 1281 */ 1282 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1283 { 1284 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1285 } 1286 1287 /** 1288 * phy_polling_mode - Convenience function for testing whether polling is 1289 * used to detect PHY status changes 1290 * @phydev: the phy_device struct 1291 */ 1292 static inline bool phy_polling_mode(struct phy_device *phydev) 1293 { 1294 if (phydev->state == PHY_CABLETEST) 1295 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1296 return true; 1297 1298 return phydev->irq == PHY_POLL; 1299 } 1300 1301 /** 1302 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1303 * @phydev: the phy_device struct 1304 */ 1305 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1306 { 1307 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1308 } 1309 1310 /** 1311 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1312 * @phydev: the phy_device struct 1313 */ 1314 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1315 { 1316 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1317 } 1318 1319 /** 1320 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1321 * PTP hardware clock capabilities. 1322 * @phydev: the phy_device struct 1323 */ 1324 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1325 { 1326 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1327 } 1328 1329 /** 1330 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1331 * @phydev: the phy_device struct 1332 */ 1333 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1334 { 1335 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1336 } 1337 1338 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) 1339 { 1340 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); 1341 } 1342 1343 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1344 int type) 1345 { 1346 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1347 } 1348 1349 static inline int phy_ts_info(struct phy_device *phydev, 1350 struct ethtool_ts_info *tsinfo) 1351 { 1352 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1353 } 1354 1355 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1356 int type) 1357 { 1358 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1359 } 1360 1361 /** 1362 * phy_is_internal - Convenience function for testing if a PHY is internal 1363 * @phydev: the phy_device struct 1364 */ 1365 static inline bool phy_is_internal(struct phy_device *phydev) 1366 { 1367 return phydev->is_internal; 1368 } 1369 1370 /** 1371 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1372 * @phydev: the phy_device struct 1373 */ 1374 static inline bool phy_on_sfp(struct phy_device *phydev) 1375 { 1376 return phydev->is_on_sfp_module; 1377 } 1378 1379 /** 1380 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1381 * PHY interface mode is RGMII (all variants) 1382 * @mode: the &phy_interface_t enum 1383 */ 1384 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1385 { 1386 return mode >= PHY_INTERFACE_MODE_RGMII && 1387 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1388 }; 1389 1390 /** 1391 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1392 * negotiation 1393 * @mode: one of &enum phy_interface_t 1394 * 1395 * Returns true if the PHY interface mode uses the 16-bit negotiation 1396 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1397 */ 1398 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1399 { 1400 return mode == PHY_INTERFACE_MODE_1000BASEX || 1401 mode == PHY_INTERFACE_MODE_2500BASEX; 1402 } 1403 1404 /** 1405 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1406 * is RGMII (all variants) 1407 * @phydev: the phy_device struct 1408 */ 1409 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1410 { 1411 return phy_interface_mode_is_rgmii(phydev->interface); 1412 }; 1413 1414 /** 1415 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1416 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1417 * @phydev: the phy_device struct 1418 */ 1419 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1420 { 1421 return phydev->is_pseudo_fixed_link; 1422 } 1423 1424 int phy_save_page(struct phy_device *phydev); 1425 int phy_select_page(struct phy_device *phydev, int page); 1426 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1427 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1428 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1429 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1430 u16 mask, u16 set); 1431 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1432 u16 mask, u16 set); 1433 1434 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1435 bool is_c45, 1436 struct phy_c45_device_ids *c45_ids); 1437 #if IS_ENABLED(CONFIG_PHYLIB) 1438 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1439 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1440 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1441 struct phy_device *device_phy_find_device(struct device *dev); 1442 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode); 1443 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1444 int phy_device_register(struct phy_device *phy); 1445 void phy_device_free(struct phy_device *phydev); 1446 #else 1447 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1448 { 1449 return 0; 1450 } 1451 static inline 1452 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1453 { 1454 return 0; 1455 } 1456 1457 static inline 1458 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1459 { 1460 return NULL; 1461 } 1462 1463 static inline struct phy_device *device_phy_find_device(struct device *dev) 1464 { 1465 return NULL; 1466 } 1467 1468 static inline 1469 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1470 { 1471 return NULL; 1472 } 1473 1474 static inline 1475 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1476 { 1477 return NULL; 1478 } 1479 1480 static inline int phy_device_register(struct phy_device *phy) 1481 { 1482 return 0; 1483 } 1484 1485 static inline void phy_device_free(struct phy_device *phydev) { } 1486 #endif /* CONFIG_PHYLIB */ 1487 void phy_device_remove(struct phy_device *phydev); 1488 int phy_get_c45_ids(struct phy_device *phydev); 1489 int phy_init_hw(struct phy_device *phydev); 1490 int phy_suspend(struct phy_device *phydev); 1491 int phy_resume(struct phy_device *phydev); 1492 int __phy_resume(struct phy_device *phydev); 1493 int phy_loopback(struct phy_device *phydev, bool enable); 1494 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1495 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1496 int phy_sfp_probe(struct phy_device *phydev, 1497 const struct sfp_upstream_ops *ops); 1498 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1499 phy_interface_t interface); 1500 struct phy_device *phy_find_first(struct mii_bus *bus); 1501 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1502 u32 flags, phy_interface_t interface); 1503 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1504 void (*handler)(struct net_device *), 1505 phy_interface_t interface); 1506 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1507 void (*handler)(struct net_device *), 1508 phy_interface_t interface); 1509 void phy_disconnect(struct phy_device *phydev); 1510 void phy_detach(struct phy_device *phydev); 1511 void phy_start(struct phy_device *phydev); 1512 void phy_stop(struct phy_device *phydev); 1513 int phy_config_aneg(struct phy_device *phydev); 1514 int phy_start_aneg(struct phy_device *phydev); 1515 int phy_aneg_done(struct phy_device *phydev); 1516 int phy_speed_down(struct phy_device *phydev, bool sync); 1517 int phy_speed_up(struct phy_device *phydev); 1518 1519 int phy_restart_aneg(struct phy_device *phydev); 1520 int phy_reset_after_clk_enable(struct phy_device *phydev); 1521 1522 #if IS_ENABLED(CONFIG_PHYLIB) 1523 int phy_start_cable_test(struct phy_device *phydev, 1524 struct netlink_ext_ack *extack); 1525 int phy_start_cable_test_tdr(struct phy_device *phydev, 1526 struct netlink_ext_ack *extack, 1527 const struct phy_tdr_config *config); 1528 #else 1529 static inline 1530 int phy_start_cable_test(struct phy_device *phydev, 1531 struct netlink_ext_ack *extack) 1532 { 1533 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1534 return -EOPNOTSUPP; 1535 } 1536 static inline 1537 int phy_start_cable_test_tdr(struct phy_device *phydev, 1538 struct netlink_ext_ack *extack, 1539 const struct phy_tdr_config *config) 1540 { 1541 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1542 return -EOPNOTSUPP; 1543 } 1544 #endif 1545 1546 int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result); 1547 int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair, 1548 u16 cm); 1549 1550 static inline void phy_device_reset(struct phy_device *phydev, int value) 1551 { 1552 mdio_device_reset(&phydev->mdio, value); 1553 } 1554 1555 #define phydev_err(_phydev, format, args...) \ 1556 dev_err(&_phydev->mdio.dev, format, ##args) 1557 1558 #define phydev_err_probe(_phydev, err, format, args...) \ 1559 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1560 1561 #define phydev_info(_phydev, format, args...) \ 1562 dev_info(&_phydev->mdio.dev, format, ##args) 1563 1564 #define phydev_warn(_phydev, format, args...) \ 1565 dev_warn(&_phydev->mdio.dev, format, ##args) 1566 1567 #define phydev_dbg(_phydev, format, args...) \ 1568 dev_dbg(&_phydev->mdio.dev, format, ##args) 1569 1570 static inline const char *phydev_name(const struct phy_device *phydev) 1571 { 1572 return dev_name(&phydev->mdio.dev); 1573 } 1574 1575 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1576 { 1577 mutex_lock(&phydev->mdio.bus->mdio_lock); 1578 } 1579 1580 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1581 { 1582 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1583 } 1584 1585 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1586 __printf(2, 3); 1587 char *phy_attached_info_irq(struct phy_device *phydev) 1588 __malloc; 1589 void phy_attached_info(struct phy_device *phydev); 1590 1591 /* Clause 22 PHY */ 1592 int genphy_read_abilities(struct phy_device *phydev); 1593 int genphy_setup_forced(struct phy_device *phydev); 1594 int genphy_restart_aneg(struct phy_device *phydev); 1595 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1596 int genphy_config_eee_advert(struct phy_device *phydev); 1597 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1598 int genphy_aneg_done(struct phy_device *phydev); 1599 int genphy_update_link(struct phy_device *phydev); 1600 int genphy_read_lpa(struct phy_device *phydev); 1601 int genphy_read_status_fixed(struct phy_device *phydev); 1602 int genphy_read_status(struct phy_device *phydev); 1603 int genphy_read_master_slave(struct phy_device *phydev); 1604 int genphy_suspend(struct phy_device *phydev); 1605 int genphy_resume(struct phy_device *phydev); 1606 int genphy_loopback(struct phy_device *phydev, bool enable); 1607 int genphy_soft_reset(struct phy_device *phydev); 1608 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1609 1610 static inline int genphy_config_aneg(struct phy_device *phydev) 1611 { 1612 return __genphy_config_aneg(phydev, false); 1613 } 1614 1615 static inline int genphy_no_config_intr(struct phy_device *phydev) 1616 { 1617 return 0; 1618 } 1619 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1620 u16 regnum); 1621 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1622 u16 regnum, u16 val); 1623 1624 /* Clause 37 */ 1625 int genphy_c37_config_aneg(struct phy_device *phydev); 1626 int genphy_c37_read_status(struct phy_device *phydev); 1627 1628 /* Clause 45 PHY */ 1629 int genphy_c45_restart_aneg(struct phy_device *phydev); 1630 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1631 int genphy_c45_aneg_done(struct phy_device *phydev); 1632 int genphy_c45_read_link(struct phy_device *phydev); 1633 int genphy_c45_read_lpa(struct phy_device *phydev); 1634 int genphy_c45_read_pma(struct phy_device *phydev); 1635 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1636 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 1637 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1638 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1639 int genphy_c45_read_mdix(struct phy_device *phydev); 1640 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1641 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 1642 int genphy_c45_read_status(struct phy_device *phydev); 1643 int genphy_c45_baset1_read_status(struct phy_device *phydev); 1644 int genphy_c45_config_aneg(struct phy_device *phydev); 1645 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1646 int genphy_c45_pma_resume(struct phy_device *phydev); 1647 int genphy_c45_pma_suspend(struct phy_device *phydev); 1648 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 1649 1650 /* Generic C45 PHY driver */ 1651 extern struct phy_driver genphy_c45_driver; 1652 1653 /* The gen10g_* functions are the old Clause 45 stub */ 1654 int gen10g_config_aneg(struct phy_device *phydev); 1655 1656 static inline int phy_read_status(struct phy_device *phydev) 1657 { 1658 if (!phydev->drv) 1659 return -EIO; 1660 1661 if (phydev->drv->read_status) 1662 return phydev->drv->read_status(phydev); 1663 else 1664 return genphy_read_status(phydev); 1665 } 1666 1667 void phy_driver_unregister(struct phy_driver *drv); 1668 void phy_drivers_unregister(struct phy_driver *drv, int n); 1669 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1670 int phy_drivers_register(struct phy_driver *new_driver, int n, 1671 struct module *owner); 1672 void phy_error(struct phy_device *phydev); 1673 void phy_state_machine(struct work_struct *work); 1674 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1675 void phy_trigger_machine(struct phy_device *phydev); 1676 void phy_mac_interrupt(struct phy_device *phydev); 1677 void phy_start_machine(struct phy_device *phydev); 1678 void phy_stop_machine(struct phy_device *phydev); 1679 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1680 struct ethtool_link_ksettings *cmd); 1681 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1682 const struct ethtool_link_ksettings *cmd); 1683 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1684 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1685 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1686 int phy_disable_interrupts(struct phy_device *phydev); 1687 void phy_request_interrupt(struct phy_device *phydev); 1688 void phy_free_interrupt(struct phy_device *phydev); 1689 void phy_print_status(struct phy_device *phydev); 1690 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1691 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1692 void phy_advertise_supported(struct phy_device *phydev); 1693 void phy_support_sym_pause(struct phy_device *phydev); 1694 void phy_support_asym_pause(struct phy_device *phydev); 1695 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1696 bool autoneg); 1697 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1698 bool phy_validate_pause(struct phy_device *phydev, 1699 struct ethtool_pauseparam *pp); 1700 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1701 1702 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 1703 const int *delay_values, int size, bool is_rx); 1704 1705 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1706 bool *tx_pause, bool *rx_pause); 1707 1708 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1709 int (*run)(struct phy_device *)); 1710 int phy_register_fixup_for_id(const char *bus_id, 1711 int (*run)(struct phy_device *)); 1712 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1713 int (*run)(struct phy_device *)); 1714 1715 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1716 int phy_unregister_fixup_for_id(const char *bus_id); 1717 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1718 1719 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1720 int phy_get_eee_err(struct phy_device *phydev); 1721 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1722 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1723 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1724 void phy_ethtool_get_wol(struct phy_device *phydev, 1725 struct ethtool_wolinfo *wol); 1726 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1727 struct ethtool_link_ksettings *cmd); 1728 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1729 const struct ethtool_link_ksettings *cmd); 1730 int phy_ethtool_nway_reset(struct net_device *ndev); 1731 int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size); 1732 void phy_package_leave(struct phy_device *phydev); 1733 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 1734 int addr, size_t priv_size); 1735 1736 #if IS_ENABLED(CONFIG_PHYLIB) 1737 int __init mdio_bus_init(void); 1738 void mdio_bus_exit(void); 1739 #endif 1740 1741 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 1742 int phy_ethtool_get_sset_count(struct phy_device *phydev); 1743 int phy_ethtool_get_stats(struct phy_device *phydev, 1744 struct ethtool_stats *stats, u64 *data); 1745 1746 static inline int phy_package_read(struct phy_device *phydev, u32 regnum) 1747 { 1748 struct phy_package_shared *shared = phydev->shared; 1749 1750 if (!shared) 1751 return -EIO; 1752 1753 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1754 } 1755 1756 static inline int __phy_package_read(struct phy_device *phydev, u32 regnum) 1757 { 1758 struct phy_package_shared *shared = phydev->shared; 1759 1760 if (!shared) 1761 return -EIO; 1762 1763 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1764 } 1765 1766 static inline int phy_package_write(struct phy_device *phydev, 1767 u32 regnum, u16 val) 1768 { 1769 struct phy_package_shared *shared = phydev->shared; 1770 1771 if (!shared) 1772 return -EIO; 1773 1774 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1775 } 1776 1777 static inline int __phy_package_write(struct phy_device *phydev, 1778 u32 regnum, u16 val) 1779 { 1780 struct phy_package_shared *shared = phydev->shared; 1781 1782 if (!shared) 1783 return -EIO; 1784 1785 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1786 } 1787 1788 static inline bool __phy_package_set_once(struct phy_device *phydev, 1789 unsigned int b) 1790 { 1791 struct phy_package_shared *shared = phydev->shared; 1792 1793 if (!shared) 1794 return false; 1795 1796 return !test_and_set_bit(b, &shared->flags); 1797 } 1798 1799 static inline bool phy_package_init_once(struct phy_device *phydev) 1800 { 1801 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 1802 } 1803 1804 static inline bool phy_package_probe_once(struct phy_device *phydev) 1805 { 1806 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 1807 } 1808 1809 extern struct bus_type mdio_bus_type; 1810 1811 struct mdio_board_info { 1812 const char *bus_id; 1813 char modalias[MDIO_NAME_SIZE]; 1814 int mdio_addr; 1815 const void *platform_data; 1816 }; 1817 1818 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1819 int mdiobus_register_board_info(const struct mdio_board_info *info, 1820 unsigned int n); 1821 #else 1822 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1823 unsigned int n) 1824 { 1825 return 0; 1826 } 1827 #endif 1828 1829 1830 /** 1831 * phy_module_driver() - Helper macro for registering PHY drivers 1832 * @__phy_drivers: array of PHY drivers to register 1833 * @__count: Numbers of members in array 1834 * 1835 * Helper macro for PHY drivers which do not do anything special in module 1836 * init/exit. Each module may only use this macro once, and calling it 1837 * replaces module_init() and module_exit(). 1838 */ 1839 #define phy_module_driver(__phy_drivers, __count) \ 1840 static int __init phy_module_init(void) \ 1841 { \ 1842 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 1843 } \ 1844 module_init(phy_module_init); \ 1845 static void __exit phy_module_exit(void) \ 1846 { \ 1847 phy_drivers_unregister(__phy_drivers, __count); \ 1848 } \ 1849 module_exit(phy_module_exit) 1850 1851 #define module_phy_driver(__phy_drivers) \ 1852 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 1853 1854 bool phy_driver_is_genphy(struct phy_device *phydev); 1855 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 1856 1857 #endif /* __PHY_H */ 1858