1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/leds.h> 18 #include <linux/linkmode.h> 19 #include <linux/netlink.h> 20 #include <linux/mdio.h> 21 #include <linux/mii.h> 22 #include <linux/mii_timestamper.h> 23 #include <linux/module.h> 24 #include <linux/timer.h> 25 #include <linux/workqueue.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/u64_stats_sync.h> 28 #include <linux/irqreturn.h> 29 #include <linux/iopoll.h> 30 #include <linux/refcount.h> 31 32 #include <linux/atomic.h> 33 34 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 35 SUPPORTED_TP | \ 36 SUPPORTED_MII) 37 38 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 39 SUPPORTED_10baseT_Full) 40 41 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 42 SUPPORTED_100baseT_Full) 43 44 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 45 SUPPORTED_1000baseT_Full) 46 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 54 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 55 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 56 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init; 57 58 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 59 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 60 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 61 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 62 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 63 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 64 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 65 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 66 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 67 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features) 68 69 extern const int phy_basic_ports_array[3]; 70 extern const int phy_fibre_port_array[1]; 71 extern const int phy_all_ports_features_array[7]; 72 extern const int phy_10_100_features_array[4]; 73 extern const int phy_basic_t1_features_array[3]; 74 extern const int phy_basic_t1s_p2mp_features_array[2]; 75 extern const int phy_gbit_features_array[2]; 76 extern const int phy_10gbit_features_array[1]; 77 78 /* 79 * Set phydev->irq to PHY_POLL if interrupts are not supported, 80 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 81 * the attached MAC driver handles the interrupt 82 */ 83 #define PHY_POLL -1 84 #define PHY_MAC_INTERRUPT -2 85 86 #define PHY_IS_INTERNAL 0x00000001 87 #define PHY_RST_AFTER_CLK_EN 0x00000002 88 #define PHY_POLL_CABLE_TEST 0x00000004 89 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008 90 #define MDIO_DEVICE_IS_PHY 0x80000000 91 92 /** 93 * enum phy_interface_t - Interface Mode definitions 94 * 95 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 96 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 97 * @PHY_INTERFACE_MODE_MII: Media-independent interface 98 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 99 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 100 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 101 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 102 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 103 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 104 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 105 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 106 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 107 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 108 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 109 * @PHY_INTERFACE_MODE_SMII: Serial MII 110 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 111 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 112 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 113 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII 114 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 115 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 116 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 117 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 118 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 119 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 120 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 121 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 122 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 123 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 124 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 125 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 126 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 127 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 128 * @PHY_INTERFACE_MODE_MAX: Book keeping 129 * 130 * Describes the interface between the MAC and PHY. 131 */ 132 typedef enum { 133 PHY_INTERFACE_MODE_NA, 134 PHY_INTERFACE_MODE_INTERNAL, 135 PHY_INTERFACE_MODE_MII, 136 PHY_INTERFACE_MODE_GMII, 137 PHY_INTERFACE_MODE_SGMII, 138 PHY_INTERFACE_MODE_TBI, 139 PHY_INTERFACE_MODE_REVMII, 140 PHY_INTERFACE_MODE_RMII, 141 PHY_INTERFACE_MODE_REVRMII, 142 PHY_INTERFACE_MODE_RGMII, 143 PHY_INTERFACE_MODE_RGMII_ID, 144 PHY_INTERFACE_MODE_RGMII_RXID, 145 PHY_INTERFACE_MODE_RGMII_TXID, 146 PHY_INTERFACE_MODE_RTBI, 147 PHY_INTERFACE_MODE_SMII, 148 PHY_INTERFACE_MODE_XGMII, 149 PHY_INTERFACE_MODE_XLGMII, 150 PHY_INTERFACE_MODE_MOCA, 151 PHY_INTERFACE_MODE_PSGMII, 152 PHY_INTERFACE_MODE_QSGMII, 153 PHY_INTERFACE_MODE_TRGMII, 154 PHY_INTERFACE_MODE_100BASEX, 155 PHY_INTERFACE_MODE_1000BASEX, 156 PHY_INTERFACE_MODE_2500BASEX, 157 PHY_INTERFACE_MODE_5GBASER, 158 PHY_INTERFACE_MODE_RXAUI, 159 PHY_INTERFACE_MODE_XAUI, 160 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 161 PHY_INTERFACE_MODE_10GBASER, 162 PHY_INTERFACE_MODE_25GBASER, 163 PHY_INTERFACE_MODE_USXGMII, 164 /* 10GBASE-KR - with Clause 73 AN */ 165 PHY_INTERFACE_MODE_10GKR, 166 PHY_INTERFACE_MODE_QUSGMII, 167 PHY_INTERFACE_MODE_1000BASEKX, 168 PHY_INTERFACE_MODE_MAX, 169 } phy_interface_t; 170 171 /* PHY interface mode bitmap handling */ 172 #define DECLARE_PHY_INTERFACE_MASK(name) \ 173 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 174 175 static inline void phy_interface_zero(unsigned long *intf) 176 { 177 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 178 } 179 180 static inline bool phy_interface_empty(const unsigned long *intf) 181 { 182 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 183 } 184 185 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 186 const unsigned long *b) 187 { 188 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 189 } 190 191 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 192 const unsigned long *b) 193 { 194 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 195 } 196 197 static inline void phy_interface_set_rgmii(unsigned long *intf) 198 { 199 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 200 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 201 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 202 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 203 } 204 205 /* 206 * phy_supported_speeds - return all speeds currently supported by a PHY device 207 */ 208 unsigned int phy_supported_speeds(struct phy_device *phy, 209 unsigned int *speeds, 210 unsigned int size); 211 212 /** 213 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 214 * @interface: enum phy_interface_t value 215 * 216 * Description: maps enum &phy_interface_t defined in this file 217 * into the device tree binding of 'phy-mode', so that Ethernet 218 * device driver can get PHY interface from device tree. 219 */ 220 static inline const char *phy_modes(phy_interface_t interface) 221 { 222 switch (interface) { 223 case PHY_INTERFACE_MODE_NA: 224 return ""; 225 case PHY_INTERFACE_MODE_INTERNAL: 226 return "internal"; 227 case PHY_INTERFACE_MODE_MII: 228 return "mii"; 229 case PHY_INTERFACE_MODE_GMII: 230 return "gmii"; 231 case PHY_INTERFACE_MODE_SGMII: 232 return "sgmii"; 233 case PHY_INTERFACE_MODE_TBI: 234 return "tbi"; 235 case PHY_INTERFACE_MODE_REVMII: 236 return "rev-mii"; 237 case PHY_INTERFACE_MODE_RMII: 238 return "rmii"; 239 case PHY_INTERFACE_MODE_REVRMII: 240 return "rev-rmii"; 241 case PHY_INTERFACE_MODE_RGMII: 242 return "rgmii"; 243 case PHY_INTERFACE_MODE_RGMII_ID: 244 return "rgmii-id"; 245 case PHY_INTERFACE_MODE_RGMII_RXID: 246 return "rgmii-rxid"; 247 case PHY_INTERFACE_MODE_RGMII_TXID: 248 return "rgmii-txid"; 249 case PHY_INTERFACE_MODE_RTBI: 250 return "rtbi"; 251 case PHY_INTERFACE_MODE_SMII: 252 return "smii"; 253 case PHY_INTERFACE_MODE_XGMII: 254 return "xgmii"; 255 case PHY_INTERFACE_MODE_XLGMII: 256 return "xlgmii"; 257 case PHY_INTERFACE_MODE_MOCA: 258 return "moca"; 259 case PHY_INTERFACE_MODE_PSGMII: 260 return "psgmii"; 261 case PHY_INTERFACE_MODE_QSGMII: 262 return "qsgmii"; 263 case PHY_INTERFACE_MODE_TRGMII: 264 return "trgmii"; 265 case PHY_INTERFACE_MODE_1000BASEX: 266 return "1000base-x"; 267 case PHY_INTERFACE_MODE_1000BASEKX: 268 return "1000base-kx"; 269 case PHY_INTERFACE_MODE_2500BASEX: 270 return "2500base-x"; 271 case PHY_INTERFACE_MODE_5GBASER: 272 return "5gbase-r"; 273 case PHY_INTERFACE_MODE_RXAUI: 274 return "rxaui"; 275 case PHY_INTERFACE_MODE_XAUI: 276 return "xaui"; 277 case PHY_INTERFACE_MODE_10GBASER: 278 return "10gbase-r"; 279 case PHY_INTERFACE_MODE_25GBASER: 280 return "25gbase-r"; 281 case PHY_INTERFACE_MODE_USXGMII: 282 return "usxgmii"; 283 case PHY_INTERFACE_MODE_10GKR: 284 return "10gbase-kr"; 285 case PHY_INTERFACE_MODE_100BASEX: 286 return "100base-x"; 287 case PHY_INTERFACE_MODE_QUSGMII: 288 return "qusgmii"; 289 default: 290 return "unknown"; 291 } 292 } 293 294 #define PHY_INIT_TIMEOUT 100000 295 #define PHY_FORCE_TIMEOUT 10 296 297 #define PHY_MAX_ADDR 32 298 299 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 300 #define PHY_ID_FMT "%s:%02x" 301 302 #define MII_BUS_ID_SIZE 61 303 304 struct device; 305 struct kernel_hwtstamp_config; 306 struct phylink; 307 struct sfp_bus; 308 struct sfp_upstream_ops; 309 struct sk_buff; 310 311 /** 312 * struct mdio_bus_stats - Statistics counters for MDIO busses 313 * @transfers: Total number of transfers, i.e. @writes + @reads 314 * @errors: Number of MDIO transfers that returned an error 315 * @writes: Number of write transfers 316 * @reads: Number of read transfers 317 * @syncp: Synchronisation for incrementing statistics 318 */ 319 struct mdio_bus_stats { 320 u64_stats_t transfers; 321 u64_stats_t errors; 322 u64_stats_t writes; 323 u64_stats_t reads; 324 /* Must be last, add new statistics above */ 325 struct u64_stats_sync syncp; 326 }; 327 328 /** 329 * struct phy_package_shared - Shared information in PHY packages 330 * @base_addr: Base PHY address of PHY package used to combine PHYs 331 * in one package and for offset calculation of phy_package_read/write 332 * @refcnt: Number of PHYs connected to this shared data 333 * @flags: Initialization of PHY package 334 * @priv_size: Size of the shared private data @priv 335 * @priv: Driver private data shared across a PHY package 336 * 337 * Represents a shared structure between different phydev's in the same 338 * package, for example a quad PHY. See phy_package_join() and 339 * phy_package_leave(). 340 */ 341 struct phy_package_shared { 342 u8 base_addr; 343 refcount_t refcnt; 344 unsigned long flags; 345 size_t priv_size; 346 347 /* private data pointer */ 348 /* note that this pointer is shared between different phydevs and 349 * the user has to take care of appropriate locking. It is allocated 350 * and freed automatically by phy_package_join() and 351 * phy_package_leave(). 352 */ 353 void *priv; 354 }; 355 356 /* used as bit number in atomic bitops */ 357 #define PHY_SHARED_F_INIT_DONE 0 358 #define PHY_SHARED_F_PROBE_DONE 1 359 360 /** 361 * struct mii_bus - Represents an MDIO bus 362 * 363 * @owner: Who owns this device 364 * @name: User friendly name for this MDIO device, or driver name 365 * @id: Unique identifier for this bus, typical from bus hierarchy 366 * @priv: Driver private data 367 * 368 * The Bus class for PHYs. Devices which provide access to 369 * PHYs should register using this structure 370 */ 371 struct mii_bus { 372 struct module *owner; 373 const char *name; 374 char id[MII_BUS_ID_SIZE]; 375 void *priv; 376 /** @read: Perform a read transfer on the bus */ 377 int (*read)(struct mii_bus *bus, int addr, int regnum); 378 /** @write: Perform a write transfer on the bus */ 379 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 380 /** @read_c45: Perform a C45 read transfer on the bus */ 381 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 382 /** @write_c45: Perform a C45 write transfer on the bus */ 383 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 384 int regnum, u16 val); 385 /** @reset: Perform a reset of the bus */ 386 int (*reset)(struct mii_bus *bus); 387 388 /** @stats: Statistic counters per device on the bus */ 389 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 390 391 /** 392 * @mdio_lock: A lock to ensure that only one thing can read/write 393 * the MDIO bus at a time 394 */ 395 struct mutex mdio_lock; 396 397 /** @parent: Parent device of this bus */ 398 struct device *parent; 399 /** @state: State of bus structure */ 400 enum { 401 MDIOBUS_ALLOCATED = 1, 402 MDIOBUS_REGISTERED, 403 MDIOBUS_UNREGISTERED, 404 MDIOBUS_RELEASED, 405 } state; 406 407 /** @dev: Kernel device representation */ 408 struct device dev; 409 410 /** @mdio_map: list of all MDIO devices on bus */ 411 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 412 413 /** @phy_mask: PHY addresses to be ignored when probing */ 414 u32 phy_mask; 415 416 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 417 u32 phy_ignore_ta_mask; 418 419 /** 420 * @irq: An array of interrupts, each PHY's interrupt at the index 421 * matching its address 422 */ 423 int irq[PHY_MAX_ADDR]; 424 425 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 426 int reset_delay_us; 427 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 428 int reset_post_delay_us; 429 /** @reset_gpiod: Reset GPIO descriptor pointer */ 430 struct gpio_desc *reset_gpiod; 431 432 /** @shared_lock: protect access to the shared element */ 433 struct mutex shared_lock; 434 435 /** @shared: shared state across different PHYs */ 436 struct phy_package_shared *shared[PHY_MAX_ADDR]; 437 438 /** @__unregister_callback: called at the last step of unregistration */ 439 void (*__unregister_callback)(struct mii_bus *bus); 440 }; 441 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 442 443 struct mii_bus *mdiobus_alloc_size(size_t size); 444 445 /** 446 * mdiobus_alloc - Allocate an MDIO bus structure 447 * 448 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 449 * for the driver to register the bus. 450 */ 451 static inline struct mii_bus *mdiobus_alloc(void) 452 { 453 return mdiobus_alloc_size(0); 454 } 455 456 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 457 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 458 struct module *owner); 459 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 460 #define devm_mdiobus_register(dev, bus) \ 461 __devm_mdiobus_register(dev, bus, THIS_MODULE) 462 463 void mdiobus_unregister(struct mii_bus *bus); 464 void mdiobus_free(struct mii_bus *bus); 465 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 466 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 467 { 468 return devm_mdiobus_alloc_size(dev, 0); 469 } 470 471 struct mii_bus *mdio_find_bus(const char *mdio_name); 472 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); 473 474 #define PHY_INTERRUPT_DISABLED false 475 #define PHY_INTERRUPT_ENABLED true 476 477 /** 478 * enum phy_state - PHY state machine states: 479 * 480 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 481 * should be called if and only if the PHY is in this state, 482 * given that the PHY device exists. 483 * - PHY driver probe function will set the state to @PHY_READY 484 * 485 * @PHY_READY: PHY is ready to send and receive packets, but the 486 * controller is not. By default, PHYs which do not implement 487 * probe will be set to this state by phy_probe(). 488 * - start will set the state to UP 489 * 490 * @PHY_UP: The PHY and attached device are ready to do work. 491 * Interrupts should be started here. 492 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 493 * 494 * @PHY_NOLINK: PHY is up, but not currently plugged in. 495 * - irq or timer will set @PHY_RUNNING if link comes back 496 * - phy_stop moves to @PHY_HALTED 497 * 498 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 499 * and/or receiving packets 500 * - irq or timer will set @PHY_NOLINK if link goes down 501 * - phy_stop moves to @PHY_HALTED 502 * 503 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 504 * is not expected to work, carrier will be indicated as down. PHY will be 505 * poll once per second, or on interrupt for it current state. 506 * Once complete, move to UP to restart the PHY. 507 * - phy_stop aborts the running test and moves to @PHY_HALTED 508 * 509 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. 510 * - phy_start moves to @PHY_UP 511 * 512 * @PHY_ERROR: PHY is up, but is in an error state. 513 * - phy_stop moves to @PHY_HALTED 514 */ 515 enum phy_state { 516 PHY_DOWN = 0, 517 PHY_READY, 518 PHY_HALTED, 519 PHY_ERROR, 520 PHY_UP, 521 PHY_RUNNING, 522 PHY_NOLINK, 523 PHY_CABLETEST, 524 }; 525 526 #define MDIO_MMD_NUM 32 527 528 /** 529 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 530 * @devices_in_package: IEEE 802.3 devices in package register value. 531 * @mmds_present: bit vector of MMDs present. 532 * @device_ids: The device identifer for each present device. 533 */ 534 struct phy_c45_device_ids { 535 u32 devices_in_package; 536 u32 mmds_present; 537 u32 device_ids[MDIO_MMD_NUM]; 538 }; 539 540 struct macsec_context; 541 struct macsec_ops; 542 543 /** 544 * struct phy_device - An instance of a PHY 545 * 546 * @mdio: MDIO bus this PHY is on 547 * @drv: Pointer to the driver for this PHY instance 548 * @devlink: Create a link between phy dev and mac dev, if the external phy 549 * used by current mac interface is managed by another mac interface. 550 * @phy_id: UID for this device found during discovery 551 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 552 * @is_c45: Set to true if this PHY uses clause 45 addressing. 553 * @is_internal: Set to true if this PHY is internal to a MAC. 554 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 555 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 556 * @has_fixups: Set to true if this PHY has fixups/quirks. 557 * @suspended: Set to true if this PHY has been suspended successfully. 558 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 559 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 560 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 561 * @downshifted_rate: Set true if link speed has been downshifted. 562 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 563 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 564 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN 565 * enabled. 566 * @state: State of the PHY for management purposes 567 * @dev_flags: Device-specific flags used by the PHY driver. 568 * 569 * - Bits [15:0] are free to use by the PHY driver to communicate 570 * driver specific behavior. 571 * - Bits [23:16] are currently reserved for future use. 572 * - Bits [31:24] are reserved for defining generic 573 * PHY driver behavior. 574 * @irq: IRQ number of the PHY's interrupt (-1 if none) 575 * @phy_timer: The timer for handling the state machine 576 * @phylink: Pointer to phylink instance for this PHY 577 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 578 * @sfp_bus: SFP bus attached to this PHY's fiber port 579 * @attached_dev: The attached enet driver's device instance ptr 580 * @adjust_link: Callback for the enet controller to respond to changes: in the 581 * link state. 582 * @phy_link_change: Callback for phylink for notification of link change 583 * @macsec_ops: MACsec offloading ops. 584 * 585 * @speed: Current link speed 586 * @duplex: Current duplex 587 * @port: Current port 588 * @pause: Current pause 589 * @asym_pause: Current asymmetric pause 590 * @supported: Combined MAC/PHY supported linkmodes 591 * @advertising: Currently advertised linkmodes 592 * @adv_old: Saved advertised while power saving for WoL 593 * @supported_eee: supported PHY EEE linkmodes 594 * @advertising_eee: Currently advertised EEE linkmodes 595 * @eee_enabled: Flag indicating whether the EEE feature is enabled 596 * @lp_advertising: Current link partner advertised linkmodes 597 * @host_interfaces: PHY interface modes supported by host 598 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 599 * @autoneg: Flag autoneg being used 600 * @rate_matching: Current rate matching mode 601 * @link: Current link state 602 * @autoneg_complete: Flag auto negotiation of the link has completed 603 * @mdix: Current crossover 604 * @mdix_ctrl: User setting of crossover 605 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 606 * @interrupts: Flag interrupts have been enabled 607 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 608 * handling shall be postponed until PHY has resumed 609 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 610 * requiring a rerun of the interrupt handler after resume 611 * @interface: enum phy_interface_t value 612 * @possible_interfaces: bitmap if interface modes that the attached PHY 613 * will switch between depending on media speed. 614 * @skb: Netlink message for cable diagnostics 615 * @nest: Netlink nest used for cable diagnostics 616 * @ehdr: nNtlink header for cable diagnostics 617 * @phy_led_triggers: Array of LED triggers 618 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 619 * @led_link_trigger: LED trigger for link up/down 620 * @last_triggered: last LED trigger for link speed 621 * @leds: list of PHY LED structures 622 * @master_slave_set: User requested master/slave configuration 623 * @master_slave_get: Current master/slave advertisement 624 * @master_slave_state: Current master/slave configuration 625 * @mii_ts: Pointer to time stamper callbacks 626 * @psec: Pointer to Power Sourcing Equipment control struct 627 * @lock: Mutex for serialization access to PHY 628 * @state_queue: Work queue for state machine 629 * @link_down_events: Number of times link was lost 630 * @shared: Pointer to private data shared by phys in one package 631 * @priv: Pointer to driver private data 632 * 633 * interrupts currently only supports enabled or disabled, 634 * but could be changed in the future to support enabling 635 * and disabling specific interrupts 636 * 637 * Contains some infrastructure for polling and interrupt 638 * handling, as well as handling shifts in PHY hardware state 639 */ 640 struct phy_device { 641 struct mdio_device mdio; 642 643 /* Information about the PHY type */ 644 /* And management functions */ 645 struct phy_driver *drv; 646 647 struct device_link *devlink; 648 649 u32 phy_id; 650 651 struct phy_c45_device_ids c45_ids; 652 unsigned is_c45:1; 653 unsigned is_internal:1; 654 unsigned is_pseudo_fixed_link:1; 655 unsigned is_gigabit_capable:1; 656 unsigned has_fixups:1; 657 unsigned suspended:1; 658 unsigned suspended_by_mdio_bus:1; 659 unsigned sysfs_links:1; 660 unsigned loopback_enabled:1; 661 unsigned downshifted_rate:1; 662 unsigned is_on_sfp_module:1; 663 unsigned mac_managed_pm:1; 664 unsigned wol_enabled:1; 665 666 unsigned autoneg:1; 667 /* The most recently read link state */ 668 unsigned link:1; 669 unsigned autoneg_complete:1; 670 671 /* Interrupts are enabled */ 672 unsigned interrupts:1; 673 unsigned irq_suspended:1; 674 unsigned irq_rerun:1; 675 676 int rate_matching; 677 678 enum phy_state state; 679 680 u32 dev_flags; 681 682 phy_interface_t interface; 683 DECLARE_PHY_INTERFACE_MASK(possible_interfaces); 684 685 /* 686 * forced speed & duplex (no autoneg) 687 * partner speed & duplex & pause (autoneg) 688 */ 689 int speed; 690 int duplex; 691 int port; 692 int pause; 693 int asym_pause; 694 u8 master_slave_get; 695 u8 master_slave_set; 696 u8 master_slave_state; 697 698 /* Union of PHY and Attached devices' supported link modes */ 699 /* See ethtool.h for more info */ 700 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 701 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 702 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 703 /* used with phy_speed_down */ 704 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 705 /* used for eee validation */ 706 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee); 707 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee); 708 bool eee_enabled; 709 710 /* Host supported PHY interface types. Should be ignored if empty. */ 711 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 712 713 /* Energy efficient ethernet modes which should be prohibited */ 714 u32 eee_broken_modes; 715 716 #ifdef CONFIG_LED_TRIGGER_PHY 717 struct phy_led_trigger *phy_led_triggers; 718 unsigned int phy_num_led_triggers; 719 struct phy_led_trigger *last_triggered; 720 721 struct phy_led_trigger *led_link_trigger; 722 #endif 723 struct list_head leds; 724 725 /* 726 * Interrupt number for this PHY 727 * -1 means no interrupt 728 */ 729 int irq; 730 731 /* private data pointer */ 732 /* For use by PHYs to maintain extra state */ 733 void *priv; 734 735 /* shared data pointer */ 736 /* For use by PHYs inside the same package that need a shared state. */ 737 struct phy_package_shared *shared; 738 739 /* Reporting cable test results */ 740 struct sk_buff *skb; 741 void *ehdr; 742 struct nlattr *nest; 743 744 /* Interrupt and Polling infrastructure */ 745 struct delayed_work state_queue; 746 747 struct mutex lock; 748 749 /* This may be modified under the rtnl lock */ 750 bool sfp_bus_attached; 751 struct sfp_bus *sfp_bus; 752 struct phylink *phylink; 753 struct net_device *attached_dev; 754 struct mii_timestamper *mii_ts; 755 struct pse_control *psec; 756 757 u8 mdix; 758 u8 mdix_ctrl; 759 760 int pma_extable; 761 762 unsigned int link_down_events; 763 764 void (*phy_link_change)(struct phy_device *phydev, bool up); 765 void (*adjust_link)(struct net_device *dev); 766 767 #if IS_ENABLED(CONFIG_MACSEC) 768 /* MACsec management functions */ 769 const struct macsec_ops *macsec_ops; 770 #endif 771 }; 772 773 /* Generic phy_device::dev_flags */ 774 #define PHY_F_NO_IRQ 0x80000000 775 776 static inline struct phy_device *to_phy_device(const struct device *dev) 777 { 778 return container_of(to_mdio_device(dev), struct phy_device, mdio); 779 } 780 781 /** 782 * struct phy_tdr_config - Configuration of a TDR raw test 783 * 784 * @first: Distance for first data collection point 785 * @last: Distance for last data collection point 786 * @step: Step between data collection points 787 * @pair: Bitmap of cable pairs to collect data for 788 * 789 * A structure containing possible configuration parameters 790 * for a TDR cable test. The driver does not need to implement 791 * all the parameters, but should report what is actually used. 792 * All distances are in centimeters. 793 */ 794 struct phy_tdr_config { 795 u32 first; 796 u32 last; 797 u32 step; 798 s8 pair; 799 }; 800 #define PHY_PAIR_ALL -1 801 802 /** 803 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 804 * Avoidance) Reconciliation Sublayer. 805 * 806 * @version: read-only PLCA register map version. -1 = not available. Ignored 807 * when setting the configuration. Format is the same as reported by the PLCA 808 * IDVER register (31.CA00). -1 = not available. 809 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 810 * set. 0 = disabled, anything else = enabled. 811 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 812 * Allowed values [0 .. 254]. 255 = node disabled. 813 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 814 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 815 * set. Allowed values [1 .. 255]. 816 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 817 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 818 * more details. The to_timer shall be set equal over all nodes. 819 * -1 = not available / don't set. Allowed values [0 .. 255]. 820 * @burst_cnt: controls how many additional frames a node is allowed to send in 821 * single transmit opportunity (TO). The default value of 0 means that the 822 * node is allowed exactly one frame per TO. A value of 1 allows two frames 823 * per TO, and so on. -1 = not available / don't set. 824 * Allowed values [0 .. 255]. 825 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 826 * frame before interrupting the burst. This value should be set to a value 827 * greater than the MAC inter-packet gap (which is typically 96 bits). 828 * -1 = not available / don't set. Allowed values [0 .. 255]. 829 * 830 * A structure containing configuration parameters for setting/getting the PLCA 831 * RS configuration. The driver does not need to implement all the parameters, 832 * but should report what is actually used. 833 */ 834 struct phy_plca_cfg { 835 int version; 836 int enabled; 837 int node_id; 838 int node_cnt; 839 int to_tmr; 840 int burst_cnt; 841 int burst_tmr; 842 }; 843 844 /** 845 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 846 * Avoidance) Reconciliation Sublayer. 847 * 848 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 849 * register(31.CA03), indicating BEACON activity. 850 * 851 * A structure containing status information of the PLCA RS configuration. 852 * The driver does not need to implement all the parameters, but should report 853 * what is actually used. 854 */ 855 struct phy_plca_status { 856 bool pst; 857 }; 858 859 /** 860 * struct phy_led: An LED driven by the PHY 861 * 862 * @list: List of LEDs 863 * @phydev: PHY this LED is attached to 864 * @led_cdev: Standard LED class structure 865 * @index: Number of the LED 866 */ 867 struct phy_led { 868 struct list_head list; 869 struct phy_device *phydev; 870 struct led_classdev led_cdev; 871 u8 index; 872 }; 873 874 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev) 875 876 /** 877 * struct phy_driver - Driver structure for a particular PHY type 878 * 879 * @mdiodrv: Data common to all MDIO devices 880 * @phy_id: The result of reading the UID registers of this PHY 881 * type, and ANDing them with the phy_id_mask. This driver 882 * only works for PHYs with IDs which match this field 883 * @name: The friendly name of this PHY type 884 * @phy_id_mask: Defines the important bits of the phy_id 885 * @features: A mandatory list of features (speed, duplex, etc) 886 * supported by this PHY 887 * @flags: A bitfield defining certain other features this PHY 888 * supports (like interrupts) 889 * @driver_data: Static driver data 890 * 891 * All functions are optional. If config_aneg or read_status 892 * are not implemented, the phy core uses the genphy versions. 893 * Note that none of these functions should be called from 894 * interrupt time. The goal is for the bus read/write functions 895 * to be able to block when the bus transaction is happening, 896 * and be freed up by an interrupt (The MPC85xx has this ability, 897 * though it is not currently supported in the driver). 898 */ 899 struct phy_driver { 900 struct mdio_driver_common mdiodrv; 901 u32 phy_id; 902 char *name; 903 u32 phy_id_mask; 904 const unsigned long * const features; 905 u32 flags; 906 const void *driver_data; 907 908 /** 909 * @soft_reset: Called to issue a PHY software reset 910 */ 911 int (*soft_reset)(struct phy_device *phydev); 912 913 /** 914 * @config_init: Called to initialize the PHY, 915 * including after a reset 916 */ 917 int (*config_init)(struct phy_device *phydev); 918 919 /** 920 * @probe: Called during discovery. Used to set 921 * up device-specific structures, if any 922 */ 923 int (*probe)(struct phy_device *phydev); 924 925 /** 926 * @get_features: Probe the hardware to determine what 927 * abilities it has. Should only set phydev->supported. 928 */ 929 int (*get_features)(struct phy_device *phydev); 930 931 /** 932 * @get_rate_matching: Get the supported type of rate matching for a 933 * particular phy interface. This is used by phy consumers to determine 934 * whether to advertise lower-speed modes for that interface. It is 935 * assumed that if a rate matching mode is supported on an interface, 936 * then that interface's rate can be adapted to all slower link speeds 937 * supported by the phy. If the interface is not supported, this should 938 * return %RATE_MATCH_NONE. 939 */ 940 int (*get_rate_matching)(struct phy_device *phydev, 941 phy_interface_t iface); 942 943 /* PHY Power Management */ 944 /** @suspend: Suspend the hardware, saving state if needed */ 945 int (*suspend)(struct phy_device *phydev); 946 /** @resume: Resume the hardware, restoring state if needed */ 947 int (*resume)(struct phy_device *phydev); 948 949 /** 950 * @config_aneg: Configures the advertisement and resets 951 * autonegotiation if phydev->autoneg is on, 952 * forces the speed to the current settings in phydev 953 * if phydev->autoneg is off 954 */ 955 int (*config_aneg)(struct phy_device *phydev); 956 957 /** @aneg_done: Determines the auto negotiation result */ 958 int (*aneg_done)(struct phy_device *phydev); 959 960 /** @read_status: Determines the negotiated speed and duplex */ 961 int (*read_status)(struct phy_device *phydev); 962 963 /** 964 * @config_intr: Enables or disables interrupts. 965 * It should also clear any pending interrupts prior to enabling the 966 * IRQs and after disabling them. 967 */ 968 int (*config_intr)(struct phy_device *phydev); 969 970 /** @handle_interrupt: Override default interrupt handling */ 971 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 972 973 /** @remove: Clears up any memory if needed */ 974 void (*remove)(struct phy_device *phydev); 975 976 /** 977 * @match_phy_device: Returns true if this is a suitable 978 * driver for the given phydev. If NULL, matching is based on 979 * phy_id and phy_id_mask. 980 */ 981 int (*match_phy_device)(struct phy_device *phydev); 982 983 /** 984 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 985 * register changes to enable Wake on LAN, so set_wol is 986 * provided to be called in the ethernet driver's set_wol 987 * function. 988 */ 989 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 990 991 /** 992 * @get_wol: See set_wol, but for checking whether Wake on LAN 993 * is enabled. 994 */ 995 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 996 997 /** 998 * @link_change_notify: Called to inform a PHY device driver 999 * when the core is about to change the link state. This 1000 * callback is supposed to be used as fixup hook for drivers 1001 * that need to take action when the link state 1002 * changes. Drivers are by no means allowed to mess with the 1003 * PHY device structure in their implementations. 1004 */ 1005 void (*link_change_notify)(struct phy_device *dev); 1006 1007 /** 1008 * @read_mmd: PHY specific driver override for reading a MMD 1009 * register. This function is optional for PHY specific 1010 * drivers. When not provided, the default MMD read function 1011 * will be used by phy_read_mmd(), which will use either a 1012 * direct read for Clause 45 PHYs or an indirect read for 1013 * Clause 22 PHYs. devnum is the MMD device number within the 1014 * PHY device, regnum is the register within the selected MMD 1015 * device. 1016 */ 1017 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 1018 1019 /** 1020 * @write_mmd: PHY specific driver override for writing a MMD 1021 * register. This function is optional for PHY specific 1022 * drivers. When not provided, the default MMD write function 1023 * will be used by phy_write_mmd(), which will use either a 1024 * direct write for Clause 45 PHYs, or an indirect write for 1025 * Clause 22 PHYs. devnum is the MMD device number within the 1026 * PHY device, regnum is the register within the selected MMD 1027 * device. val is the value to be written. 1028 */ 1029 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 1030 u16 val); 1031 1032 /** @read_page: Return the current PHY register page number */ 1033 int (*read_page)(struct phy_device *dev); 1034 /** @write_page: Set the current PHY register page number */ 1035 int (*write_page)(struct phy_device *dev, int page); 1036 1037 /** 1038 * @module_info: Get the size and type of the eeprom contained 1039 * within a plug-in module 1040 */ 1041 int (*module_info)(struct phy_device *dev, 1042 struct ethtool_modinfo *modinfo); 1043 1044 /** 1045 * @module_eeprom: Get the eeprom information from the plug-in 1046 * module 1047 */ 1048 int (*module_eeprom)(struct phy_device *dev, 1049 struct ethtool_eeprom *ee, u8 *data); 1050 1051 /** @cable_test_start: Start a cable test */ 1052 int (*cable_test_start)(struct phy_device *dev); 1053 1054 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1055 int (*cable_test_tdr_start)(struct phy_device *dev, 1056 const struct phy_tdr_config *config); 1057 1058 /** 1059 * @cable_test_get_status: Once per second, or on interrupt, 1060 * request the status of the test. 1061 */ 1062 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1063 1064 /* Get statistics from the PHY using ethtool */ 1065 /** @get_sset_count: Number of statistic counters */ 1066 int (*get_sset_count)(struct phy_device *dev); 1067 /** @get_strings: Names of the statistic counters */ 1068 void (*get_strings)(struct phy_device *dev, u8 *data); 1069 /** @get_stats: Return the statistic counter values */ 1070 void (*get_stats)(struct phy_device *dev, 1071 struct ethtool_stats *stats, u64 *data); 1072 1073 /* Get and Set PHY tunables */ 1074 /** @get_tunable: Return the value of a tunable */ 1075 int (*get_tunable)(struct phy_device *dev, 1076 struct ethtool_tunable *tuna, void *data); 1077 /** @set_tunable: Set the value of a tunable */ 1078 int (*set_tunable)(struct phy_device *dev, 1079 struct ethtool_tunable *tuna, 1080 const void *data); 1081 /** @set_loopback: Set the loopback mood of the PHY */ 1082 int (*set_loopback)(struct phy_device *dev, bool enable); 1083 /** @get_sqi: Get the signal quality indication */ 1084 int (*get_sqi)(struct phy_device *dev); 1085 /** @get_sqi_max: Get the maximum signal quality indication */ 1086 int (*get_sqi_max)(struct phy_device *dev); 1087 1088 /* PLCA RS interface */ 1089 /** @get_plca_cfg: Return the current PLCA configuration */ 1090 int (*get_plca_cfg)(struct phy_device *dev, 1091 struct phy_plca_cfg *plca_cfg); 1092 /** @set_plca_cfg: Set the PLCA configuration */ 1093 int (*set_plca_cfg)(struct phy_device *dev, 1094 const struct phy_plca_cfg *plca_cfg); 1095 /** @get_plca_status: Return the current PLCA status info */ 1096 int (*get_plca_status)(struct phy_device *dev, 1097 struct phy_plca_status *plca_st); 1098 1099 /** 1100 * @led_brightness_set: Set a PHY LED brightness. Index 1101 * indicates which of the PHYs led should be set. Value 1102 * follows the standard LED class meaning, e.g. LED_OFF, 1103 * LED_HALF, LED_FULL. 1104 */ 1105 int (*led_brightness_set)(struct phy_device *dev, 1106 u8 index, enum led_brightness value); 1107 1108 /** 1109 * @led_blink_set: Set a PHY LED brightness. Index indicates 1110 * which of the PHYs led should be configured to blink. Delays 1111 * are in milliseconds and if both are zero then a sensible 1112 * default should be chosen. The call should adjust the 1113 * timings in that case and if it can't match the values 1114 * specified exactly. 1115 */ 1116 int (*led_blink_set)(struct phy_device *dev, u8 index, 1117 unsigned long *delay_on, 1118 unsigned long *delay_off); 1119 /** 1120 * @led_hw_is_supported: Can the HW support the given rules. 1121 * @dev: PHY device which has the LED 1122 * @index: Which LED of the PHY device 1123 * @rules The core is interested in these rules 1124 * 1125 * Return 0 if yes, -EOPNOTSUPP if not, or an error code. 1126 */ 1127 int (*led_hw_is_supported)(struct phy_device *dev, u8 index, 1128 unsigned long rules); 1129 /** 1130 * @led_hw_control_set: Set the HW to control the LED 1131 * @dev: PHY device which has the LED 1132 * @index: Which LED of the PHY device 1133 * @rules The rules used to control the LED 1134 * 1135 * Returns 0, or a an error code. 1136 */ 1137 int (*led_hw_control_set)(struct phy_device *dev, u8 index, 1138 unsigned long rules); 1139 /** 1140 * @led_hw_control_get: Get how the HW is controlling the LED 1141 * @dev: PHY device which has the LED 1142 * @index: Which LED of the PHY device 1143 * @rules Pointer to the rules used to control the LED 1144 * 1145 * Set *@rules to how the HW is currently blinking. Returns 0 1146 * on success, or a error code if the current blinking cannot 1147 * be represented in rules, or some other error happens. 1148 */ 1149 int (*led_hw_control_get)(struct phy_device *dev, u8 index, 1150 unsigned long *rules); 1151 1152 }; 1153 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 1154 struct phy_driver, mdiodrv) 1155 1156 #define PHY_ANY_ID "MATCH ANY PHY" 1157 #define PHY_ANY_UID 0xffffffff 1158 1159 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 1160 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 1161 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 1162 1163 /** 1164 * phy_id_compare - compare @id1 with @id2 taking account of @mask 1165 * @id1: first PHY ID 1166 * @id2: second PHY ID 1167 * @mask: the PHY ID mask, set bits are significant in matching 1168 * 1169 * Return true if the bits from @id1 and @id2 specified by @mask match. 1170 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask). 1171 */ 1172 static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask) 1173 { 1174 return !((id1 ^ id2) & mask); 1175 } 1176 1177 /** 1178 * phydev_id_compare - compare @id with the PHY's Clause 22 ID 1179 * @phydev: the PHY device 1180 * @id: the PHY ID to be matched 1181 * 1182 * Compare the @phydev clause 22 ID with the provided @id and return true or 1183 * false depending whether it matches, using the bound driver mask. The 1184 * @phydev must be bound to a driver. 1185 */ 1186 static inline bool phydev_id_compare(struct phy_device *phydev, u32 id) 1187 { 1188 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask); 1189 } 1190 1191 /* A Structure for boards to register fixups with the PHY Lib */ 1192 struct phy_fixup { 1193 struct list_head list; 1194 char bus_id[MII_BUS_ID_SIZE + 3]; 1195 u32 phy_uid; 1196 u32 phy_uid_mask; 1197 int (*run)(struct phy_device *phydev); 1198 }; 1199 1200 const char *phy_speed_to_str(int speed); 1201 const char *phy_duplex_to_str(unsigned int duplex); 1202 const char *phy_rate_matching_to_str(int rate_matching); 1203 1204 int phy_interface_num_ports(phy_interface_t interface); 1205 1206 /* A structure for mapping a particular speed and duplex 1207 * combination to a particular SUPPORTED and ADVERTISED value 1208 */ 1209 struct phy_setting { 1210 u32 speed; 1211 u8 duplex; 1212 u8 bit; 1213 }; 1214 1215 const struct phy_setting * 1216 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 1217 bool exact); 1218 size_t phy_speeds(unsigned int *speeds, size_t size, 1219 unsigned long *mask); 1220 void of_set_phy_supported(struct phy_device *phydev); 1221 void of_set_phy_eee_broken(struct phy_device *phydev); 1222 int phy_speed_down_core(struct phy_device *phydev); 1223 1224 /** 1225 * phy_is_started - Convenience function to check whether PHY is started 1226 * @phydev: The phy_device struct 1227 */ 1228 static inline bool phy_is_started(struct phy_device *phydev) 1229 { 1230 return phydev->state >= PHY_UP; 1231 } 1232 1233 void phy_resolve_aneg_pause(struct phy_device *phydev); 1234 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1235 void phy_check_downshift(struct phy_device *phydev); 1236 1237 /** 1238 * phy_read - Convenience function for reading a given PHY register 1239 * @phydev: the phy_device struct 1240 * @regnum: register number to read 1241 * 1242 * NOTE: MUST NOT be called from interrupt context, 1243 * because the bus read/write functions may wait for an interrupt 1244 * to conclude the operation. 1245 */ 1246 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1247 { 1248 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1249 } 1250 1251 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1252 timeout_us, sleep_before_read) \ 1253 ({ \ 1254 int __ret, __val; \ 1255 __ret = read_poll_timeout(__val = phy_read, val, \ 1256 __val < 0 || (cond), \ 1257 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1258 if (__val < 0) \ 1259 __ret = __val; \ 1260 if (__ret) \ 1261 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1262 __ret; \ 1263 }) 1264 1265 /** 1266 * __phy_read - convenience function for reading a given PHY register 1267 * @phydev: the phy_device struct 1268 * @regnum: register number to read 1269 * 1270 * The caller must have taken the MDIO bus lock. 1271 */ 1272 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1273 { 1274 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1275 } 1276 1277 /** 1278 * phy_write - Convenience function for writing a given PHY register 1279 * @phydev: the phy_device struct 1280 * @regnum: register number to write 1281 * @val: value to write to @regnum 1282 * 1283 * NOTE: MUST NOT be called from interrupt context, 1284 * because the bus read/write functions may wait for an interrupt 1285 * to conclude the operation. 1286 */ 1287 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1288 { 1289 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1290 } 1291 1292 /** 1293 * __phy_write - Convenience function for writing a given PHY register 1294 * @phydev: the phy_device struct 1295 * @regnum: register number to write 1296 * @val: value to write to @regnum 1297 * 1298 * The caller must have taken the MDIO bus lock. 1299 */ 1300 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1301 { 1302 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1303 val); 1304 } 1305 1306 /** 1307 * __phy_modify_changed() - Convenience function for modifying a PHY register 1308 * @phydev: a pointer to a &struct phy_device 1309 * @regnum: register number 1310 * @mask: bit mask of bits to clear 1311 * @set: bit mask of bits to set 1312 * 1313 * Unlocked helper function which allows a PHY register to be modified as 1314 * new register value = (old register value & ~mask) | set 1315 * 1316 * Returns negative errno, 0 if there was no change, and 1 in case of change 1317 */ 1318 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1319 u16 mask, u16 set) 1320 { 1321 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1322 regnum, mask, set); 1323 } 1324 1325 /* 1326 * phy_read_mmd - Convenience function for reading a register 1327 * from an MMD on a given PHY. 1328 */ 1329 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1330 1331 /** 1332 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1333 * condition is met or a timeout occurs 1334 * 1335 * @phydev: The phy_device struct 1336 * @devaddr: The MMD to read from 1337 * @regnum: The register on the MMD to read 1338 * @val: Variable to read the register into 1339 * @cond: Break condition (usually involving @val) 1340 * @sleep_us: Maximum time to sleep between reads in us (0 1341 * tight-loops). Should be less than ~20ms since usleep_range 1342 * is used (see Documentation/timers/timers-howto.rst). 1343 * @timeout_us: Timeout in us, 0 means never timeout 1344 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1345 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either 1346 * case, the last read value at @args is stored in @val. Must not 1347 * be called from atomic context if sleep_us or timeout_us are used. 1348 */ 1349 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1350 sleep_us, timeout_us, sleep_before_read) \ 1351 ({ \ 1352 int __ret, __val; \ 1353 __ret = read_poll_timeout(__val = phy_read_mmd, val, \ 1354 __val < 0 || (cond), \ 1355 sleep_us, timeout_us, sleep_before_read, \ 1356 phydev, devaddr, regnum); \ 1357 if (__val < 0) \ 1358 __ret = __val; \ 1359 if (__ret) \ 1360 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1361 __ret; \ 1362 }) 1363 1364 /* 1365 * __phy_read_mmd - Convenience function for reading a register 1366 * from an MMD on a given PHY. 1367 */ 1368 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1369 1370 /* 1371 * phy_write_mmd - Convenience function for writing a register 1372 * on an MMD on a given PHY. 1373 */ 1374 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1375 1376 /* 1377 * __phy_write_mmd - Convenience function for writing a register 1378 * on an MMD on a given PHY. 1379 */ 1380 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1381 1382 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1383 u16 set); 1384 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1385 u16 set); 1386 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1387 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1388 1389 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1390 u16 mask, u16 set); 1391 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1392 u16 mask, u16 set); 1393 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1394 u16 mask, u16 set); 1395 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1396 u16 mask, u16 set); 1397 1398 /** 1399 * __phy_set_bits - Convenience function for setting bits in a PHY register 1400 * @phydev: the phy_device struct 1401 * @regnum: register number to write 1402 * @val: bits to set 1403 * 1404 * The caller must have taken the MDIO bus lock. 1405 */ 1406 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1407 { 1408 return __phy_modify(phydev, regnum, 0, val); 1409 } 1410 1411 /** 1412 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1413 * @phydev: the phy_device struct 1414 * @regnum: register number to write 1415 * @val: bits to clear 1416 * 1417 * The caller must have taken the MDIO bus lock. 1418 */ 1419 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1420 u16 val) 1421 { 1422 return __phy_modify(phydev, regnum, val, 0); 1423 } 1424 1425 /** 1426 * phy_set_bits - Convenience function for setting bits in a PHY register 1427 * @phydev: the phy_device struct 1428 * @regnum: register number to write 1429 * @val: bits to set 1430 */ 1431 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1432 { 1433 return phy_modify(phydev, regnum, 0, val); 1434 } 1435 1436 /** 1437 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1438 * @phydev: the phy_device struct 1439 * @regnum: register number to write 1440 * @val: bits to clear 1441 */ 1442 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1443 { 1444 return phy_modify(phydev, regnum, val, 0); 1445 } 1446 1447 /** 1448 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1449 * on MMD 1450 * @phydev: the phy_device struct 1451 * @devad: the MMD containing register to modify 1452 * @regnum: register number to modify 1453 * @val: bits to set 1454 * 1455 * The caller must have taken the MDIO bus lock. 1456 */ 1457 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1458 u32 regnum, u16 val) 1459 { 1460 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1461 } 1462 1463 /** 1464 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1465 * on MMD 1466 * @phydev: the phy_device struct 1467 * @devad: the MMD containing register to modify 1468 * @regnum: register number to modify 1469 * @val: bits to clear 1470 * 1471 * The caller must have taken the MDIO bus lock. 1472 */ 1473 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1474 u32 regnum, u16 val) 1475 { 1476 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1477 } 1478 1479 /** 1480 * phy_set_bits_mmd - Convenience function for setting bits in a register 1481 * on MMD 1482 * @phydev: the phy_device struct 1483 * @devad: the MMD containing register to modify 1484 * @regnum: register number to modify 1485 * @val: bits to set 1486 */ 1487 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1488 u32 regnum, u16 val) 1489 { 1490 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1491 } 1492 1493 /** 1494 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1495 * on MMD 1496 * @phydev: the phy_device struct 1497 * @devad: the MMD containing register to modify 1498 * @regnum: register number to modify 1499 * @val: bits to clear 1500 */ 1501 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1502 u32 regnum, u16 val) 1503 { 1504 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1505 } 1506 1507 /** 1508 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1509 * @phydev: the phy_device struct 1510 * 1511 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1512 * PHY_MAC_INTERRUPT 1513 */ 1514 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1515 { 1516 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1517 } 1518 1519 /** 1520 * phy_polling_mode - Convenience function for testing whether polling is 1521 * used to detect PHY status changes 1522 * @phydev: the phy_device struct 1523 */ 1524 static inline bool phy_polling_mode(struct phy_device *phydev) 1525 { 1526 if (phydev->state == PHY_CABLETEST) 1527 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1528 return true; 1529 1530 return phydev->irq == PHY_POLL; 1531 } 1532 1533 /** 1534 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1535 * @phydev: the phy_device struct 1536 */ 1537 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1538 { 1539 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1540 } 1541 1542 /** 1543 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1544 * @phydev: the phy_device struct 1545 */ 1546 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1547 { 1548 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1549 } 1550 1551 /** 1552 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1553 * PTP hardware clock capabilities. 1554 * @phydev: the phy_device struct 1555 */ 1556 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1557 { 1558 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1559 } 1560 1561 /** 1562 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1563 * @phydev: the phy_device struct 1564 */ 1565 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1566 { 1567 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1568 } 1569 1570 static inline int phy_hwtstamp(struct phy_device *phydev, 1571 struct kernel_hwtstamp_config *cfg, 1572 struct netlink_ext_ack *extack) 1573 { 1574 return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack); 1575 } 1576 1577 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1578 int type) 1579 { 1580 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1581 } 1582 1583 static inline int phy_ts_info(struct phy_device *phydev, 1584 struct ethtool_ts_info *tsinfo) 1585 { 1586 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1587 } 1588 1589 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1590 int type) 1591 { 1592 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1593 } 1594 1595 /** 1596 * phy_is_internal - Convenience function for testing if a PHY is internal 1597 * @phydev: the phy_device struct 1598 */ 1599 static inline bool phy_is_internal(struct phy_device *phydev) 1600 { 1601 return phydev->is_internal; 1602 } 1603 1604 /** 1605 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1606 * @phydev: the phy_device struct 1607 */ 1608 static inline bool phy_on_sfp(struct phy_device *phydev) 1609 { 1610 return phydev->is_on_sfp_module; 1611 } 1612 1613 /** 1614 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1615 * PHY interface mode is RGMII (all variants) 1616 * @mode: the &phy_interface_t enum 1617 */ 1618 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1619 { 1620 return mode >= PHY_INTERFACE_MODE_RGMII && 1621 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1622 }; 1623 1624 /** 1625 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1626 * negotiation 1627 * @mode: one of &enum phy_interface_t 1628 * 1629 * Returns true if the PHY interface mode uses the 16-bit negotiation 1630 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1631 */ 1632 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1633 { 1634 return mode == PHY_INTERFACE_MODE_1000BASEX || 1635 mode == PHY_INTERFACE_MODE_2500BASEX; 1636 } 1637 1638 /** 1639 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1640 * is RGMII (all variants) 1641 * @phydev: the phy_device struct 1642 */ 1643 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1644 { 1645 return phy_interface_mode_is_rgmii(phydev->interface); 1646 }; 1647 1648 /** 1649 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1650 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1651 * @phydev: the phy_device struct 1652 */ 1653 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1654 { 1655 return phydev->is_pseudo_fixed_link; 1656 } 1657 1658 int phy_save_page(struct phy_device *phydev); 1659 int phy_select_page(struct phy_device *phydev, int page); 1660 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1661 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1662 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1663 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1664 u16 mask, u16 set); 1665 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1666 u16 mask, u16 set); 1667 1668 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1669 bool is_c45, 1670 struct phy_c45_device_ids *c45_ids); 1671 #if IS_ENABLED(CONFIG_PHYLIB) 1672 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1673 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1674 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1675 struct phy_device *device_phy_find_device(struct device *dev); 1676 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode); 1677 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1678 int phy_device_register(struct phy_device *phy); 1679 void phy_device_free(struct phy_device *phydev); 1680 #else 1681 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1682 { 1683 return 0; 1684 } 1685 static inline 1686 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1687 { 1688 return 0; 1689 } 1690 1691 static inline 1692 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1693 { 1694 return NULL; 1695 } 1696 1697 static inline struct phy_device *device_phy_find_device(struct device *dev) 1698 { 1699 return NULL; 1700 } 1701 1702 static inline 1703 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1704 { 1705 return NULL; 1706 } 1707 1708 static inline 1709 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1710 { 1711 return NULL; 1712 } 1713 1714 static inline int phy_device_register(struct phy_device *phy) 1715 { 1716 return 0; 1717 } 1718 1719 static inline void phy_device_free(struct phy_device *phydev) { } 1720 #endif /* CONFIG_PHYLIB */ 1721 void phy_device_remove(struct phy_device *phydev); 1722 int phy_get_c45_ids(struct phy_device *phydev); 1723 int phy_init_hw(struct phy_device *phydev); 1724 int phy_suspend(struct phy_device *phydev); 1725 int phy_resume(struct phy_device *phydev); 1726 int __phy_resume(struct phy_device *phydev); 1727 int phy_loopback(struct phy_device *phydev, bool enable); 1728 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1729 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1730 int phy_sfp_probe(struct phy_device *phydev, 1731 const struct sfp_upstream_ops *ops); 1732 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1733 phy_interface_t interface); 1734 struct phy_device *phy_find_first(struct mii_bus *bus); 1735 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1736 u32 flags, phy_interface_t interface); 1737 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1738 void (*handler)(struct net_device *), 1739 phy_interface_t interface); 1740 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1741 void (*handler)(struct net_device *), 1742 phy_interface_t interface); 1743 void phy_disconnect(struct phy_device *phydev); 1744 void phy_detach(struct phy_device *phydev); 1745 void phy_start(struct phy_device *phydev); 1746 void phy_stop(struct phy_device *phydev); 1747 int phy_config_aneg(struct phy_device *phydev); 1748 int _phy_start_aneg(struct phy_device *phydev); 1749 int phy_start_aneg(struct phy_device *phydev); 1750 int phy_aneg_done(struct phy_device *phydev); 1751 int phy_speed_down(struct phy_device *phydev, bool sync); 1752 int phy_speed_up(struct phy_device *phydev); 1753 bool phy_check_valid(int speed, int duplex, unsigned long *features); 1754 1755 int phy_restart_aneg(struct phy_device *phydev); 1756 int phy_reset_after_clk_enable(struct phy_device *phydev); 1757 1758 #if IS_ENABLED(CONFIG_PHYLIB) 1759 int phy_start_cable_test(struct phy_device *phydev, 1760 struct netlink_ext_ack *extack); 1761 int phy_start_cable_test_tdr(struct phy_device *phydev, 1762 struct netlink_ext_ack *extack, 1763 const struct phy_tdr_config *config); 1764 #else 1765 static inline 1766 int phy_start_cable_test(struct phy_device *phydev, 1767 struct netlink_ext_ack *extack) 1768 { 1769 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1770 return -EOPNOTSUPP; 1771 } 1772 static inline 1773 int phy_start_cable_test_tdr(struct phy_device *phydev, 1774 struct netlink_ext_ack *extack, 1775 const struct phy_tdr_config *config) 1776 { 1777 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1778 return -EOPNOTSUPP; 1779 } 1780 #endif 1781 1782 static inline void phy_device_reset(struct phy_device *phydev, int value) 1783 { 1784 mdio_device_reset(&phydev->mdio, value); 1785 } 1786 1787 #define phydev_err(_phydev, format, args...) \ 1788 dev_err(&_phydev->mdio.dev, format, ##args) 1789 1790 #define phydev_err_probe(_phydev, err, format, args...) \ 1791 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1792 1793 #define phydev_info(_phydev, format, args...) \ 1794 dev_info(&_phydev->mdio.dev, format, ##args) 1795 1796 #define phydev_warn(_phydev, format, args...) \ 1797 dev_warn(&_phydev->mdio.dev, format, ##args) 1798 1799 #define phydev_dbg(_phydev, format, args...) \ 1800 dev_dbg(&_phydev->mdio.dev, format, ##args) 1801 1802 static inline const char *phydev_name(const struct phy_device *phydev) 1803 { 1804 return dev_name(&phydev->mdio.dev); 1805 } 1806 1807 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1808 { 1809 mutex_lock(&phydev->mdio.bus->mdio_lock); 1810 } 1811 1812 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1813 { 1814 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1815 } 1816 1817 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1818 __printf(2, 3); 1819 char *phy_attached_info_irq(struct phy_device *phydev) 1820 __malloc; 1821 void phy_attached_info(struct phy_device *phydev); 1822 1823 /* Clause 22 PHY */ 1824 int genphy_read_abilities(struct phy_device *phydev); 1825 int genphy_setup_forced(struct phy_device *phydev); 1826 int genphy_restart_aneg(struct phy_device *phydev); 1827 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1828 int genphy_config_eee_advert(struct phy_device *phydev); 1829 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1830 int genphy_aneg_done(struct phy_device *phydev); 1831 int genphy_update_link(struct phy_device *phydev); 1832 int genphy_read_lpa(struct phy_device *phydev); 1833 int genphy_read_status_fixed(struct phy_device *phydev); 1834 int genphy_read_status(struct phy_device *phydev); 1835 int genphy_read_master_slave(struct phy_device *phydev); 1836 int genphy_suspend(struct phy_device *phydev); 1837 int genphy_resume(struct phy_device *phydev); 1838 int genphy_loopback(struct phy_device *phydev, bool enable); 1839 int genphy_soft_reset(struct phy_device *phydev); 1840 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1841 1842 static inline int genphy_config_aneg(struct phy_device *phydev) 1843 { 1844 return __genphy_config_aneg(phydev, false); 1845 } 1846 1847 static inline int genphy_no_config_intr(struct phy_device *phydev) 1848 { 1849 return 0; 1850 } 1851 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1852 u16 regnum); 1853 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1854 u16 regnum, u16 val); 1855 1856 /* Clause 37 */ 1857 int genphy_c37_config_aneg(struct phy_device *phydev); 1858 int genphy_c37_read_status(struct phy_device *phydev); 1859 1860 /* Clause 45 PHY */ 1861 int genphy_c45_restart_aneg(struct phy_device *phydev); 1862 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1863 int genphy_c45_aneg_done(struct phy_device *phydev); 1864 int genphy_c45_read_link(struct phy_device *phydev); 1865 int genphy_c45_read_lpa(struct phy_device *phydev); 1866 int genphy_c45_read_pma(struct phy_device *phydev); 1867 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1868 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 1869 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1870 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1871 int genphy_c45_read_mdix(struct phy_device *phydev); 1872 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1873 int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev); 1874 int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev); 1875 int genphy_c45_read_eee_abilities(struct phy_device *phydev); 1876 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 1877 int genphy_c45_read_status(struct phy_device *phydev); 1878 int genphy_c45_baset1_read_status(struct phy_device *phydev); 1879 int genphy_c45_config_aneg(struct phy_device *phydev); 1880 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1881 int genphy_c45_pma_resume(struct phy_device *phydev); 1882 int genphy_c45_pma_suspend(struct phy_device *phydev); 1883 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 1884 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 1885 struct phy_plca_cfg *plca_cfg); 1886 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 1887 const struct phy_plca_cfg *plca_cfg); 1888 int genphy_c45_plca_get_status(struct phy_device *phydev, 1889 struct phy_plca_status *plca_st); 1890 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv, 1891 unsigned long *lp, bool *is_enabled); 1892 int genphy_c45_ethtool_get_eee(struct phy_device *phydev, 1893 struct ethtool_eee *data); 1894 int genphy_c45_ethtool_set_eee(struct phy_device *phydev, 1895 struct ethtool_eee *data); 1896 int genphy_c45_write_eee_adv(struct phy_device *phydev, unsigned long *adv); 1897 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev); 1898 int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv); 1899 1900 /* Generic C45 PHY driver */ 1901 extern struct phy_driver genphy_c45_driver; 1902 1903 /* The gen10g_* functions are the old Clause 45 stub */ 1904 int gen10g_config_aneg(struct phy_device *phydev); 1905 1906 static inline int phy_read_status(struct phy_device *phydev) 1907 { 1908 if (!phydev->drv) 1909 return -EIO; 1910 1911 if (phydev->drv->read_status) 1912 return phydev->drv->read_status(phydev); 1913 else 1914 return genphy_read_status(phydev); 1915 } 1916 1917 void phy_driver_unregister(struct phy_driver *drv); 1918 void phy_drivers_unregister(struct phy_driver *drv, int n); 1919 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1920 int phy_drivers_register(struct phy_driver *new_driver, int n, 1921 struct module *owner); 1922 void phy_error(struct phy_device *phydev); 1923 void phy_state_machine(struct work_struct *work); 1924 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1925 void phy_trigger_machine(struct phy_device *phydev); 1926 void phy_mac_interrupt(struct phy_device *phydev); 1927 void phy_start_machine(struct phy_device *phydev); 1928 void phy_stop_machine(struct phy_device *phydev); 1929 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1930 struct ethtool_link_ksettings *cmd); 1931 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1932 const struct ethtool_link_ksettings *cmd); 1933 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1934 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1935 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1936 int phy_disable_interrupts(struct phy_device *phydev); 1937 void phy_request_interrupt(struct phy_device *phydev); 1938 void phy_free_interrupt(struct phy_device *phydev); 1939 void phy_print_status(struct phy_device *phydev); 1940 int phy_get_rate_matching(struct phy_device *phydev, 1941 phy_interface_t iface); 1942 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1943 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1944 void phy_advertise_supported(struct phy_device *phydev); 1945 void phy_support_sym_pause(struct phy_device *phydev); 1946 void phy_support_asym_pause(struct phy_device *phydev); 1947 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1948 bool autoneg); 1949 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1950 bool phy_validate_pause(struct phy_device *phydev, 1951 struct ethtool_pauseparam *pp); 1952 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1953 1954 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 1955 const int *delay_values, int size, bool is_rx); 1956 1957 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1958 bool *tx_pause, bool *rx_pause); 1959 1960 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1961 int (*run)(struct phy_device *)); 1962 int phy_register_fixup_for_id(const char *bus_id, 1963 int (*run)(struct phy_device *)); 1964 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1965 int (*run)(struct phy_device *)); 1966 1967 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1968 int phy_unregister_fixup_for_id(const char *bus_id); 1969 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1970 1971 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1972 int phy_get_eee_err(struct phy_device *phydev); 1973 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1974 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1975 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1976 void phy_ethtool_get_wol(struct phy_device *phydev, 1977 struct ethtool_wolinfo *wol); 1978 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1979 struct ethtool_link_ksettings *cmd); 1980 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1981 const struct ethtool_link_ksettings *cmd); 1982 int phy_ethtool_nway_reset(struct net_device *ndev); 1983 int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size); 1984 void phy_package_leave(struct phy_device *phydev); 1985 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 1986 int base_addr, size_t priv_size); 1987 1988 int __init mdio_bus_init(void); 1989 void mdio_bus_exit(void); 1990 1991 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 1992 int phy_ethtool_get_sset_count(struct phy_device *phydev); 1993 int phy_ethtool_get_stats(struct phy_device *phydev, 1994 struct ethtool_stats *stats, u64 *data); 1995 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 1996 struct phy_plca_cfg *plca_cfg); 1997 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 1998 const struct phy_plca_cfg *plca_cfg, 1999 struct netlink_ext_ack *extack); 2000 int phy_ethtool_get_plca_status(struct phy_device *phydev, 2001 struct phy_plca_status *plca_st); 2002 2003 int __phy_hwtstamp_get(struct phy_device *phydev, 2004 struct kernel_hwtstamp_config *config); 2005 int __phy_hwtstamp_set(struct phy_device *phydev, 2006 struct kernel_hwtstamp_config *config, 2007 struct netlink_ext_ack *extack); 2008 2009 static inline int phy_package_address(struct phy_device *phydev, 2010 unsigned int addr_offset) 2011 { 2012 struct phy_package_shared *shared = phydev->shared; 2013 u8 base_addr = shared->base_addr; 2014 2015 if (addr_offset >= PHY_MAX_ADDR - base_addr) 2016 return -EIO; 2017 2018 /* we know that addr will be in the range 0..31 and thus the 2019 * implicit cast to a signed int is not a problem. 2020 */ 2021 return base_addr + addr_offset; 2022 } 2023 2024 static inline int phy_package_read(struct phy_device *phydev, 2025 unsigned int addr_offset, u32 regnum) 2026 { 2027 int addr = phy_package_address(phydev, addr_offset); 2028 2029 if (addr < 0) 2030 return addr; 2031 2032 return mdiobus_read(phydev->mdio.bus, addr, regnum); 2033 } 2034 2035 static inline int __phy_package_read(struct phy_device *phydev, 2036 unsigned int addr_offset, u32 regnum) 2037 { 2038 int addr = phy_package_address(phydev, addr_offset); 2039 2040 if (addr < 0) 2041 return addr; 2042 2043 return __mdiobus_read(phydev->mdio.bus, addr, regnum); 2044 } 2045 2046 static inline int phy_package_write(struct phy_device *phydev, 2047 unsigned int addr_offset, u32 regnum, 2048 u16 val) 2049 { 2050 int addr = phy_package_address(phydev, addr_offset); 2051 2052 if (addr < 0) 2053 return addr; 2054 2055 return mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2056 } 2057 2058 static inline int __phy_package_write(struct phy_device *phydev, 2059 unsigned int addr_offset, u32 regnum, 2060 u16 val) 2061 { 2062 int addr = phy_package_address(phydev, addr_offset); 2063 2064 if (addr < 0) 2065 return addr; 2066 2067 return __mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2068 } 2069 2070 int __phy_package_read_mmd(struct phy_device *phydev, 2071 unsigned int addr_offset, int devad, 2072 u32 regnum); 2073 2074 int phy_package_read_mmd(struct phy_device *phydev, 2075 unsigned int addr_offset, int devad, 2076 u32 regnum); 2077 2078 int __phy_package_write_mmd(struct phy_device *phydev, 2079 unsigned int addr_offset, int devad, 2080 u32 regnum, u16 val); 2081 2082 int phy_package_write_mmd(struct phy_device *phydev, 2083 unsigned int addr_offset, int devad, 2084 u32 regnum, u16 val); 2085 2086 static inline bool __phy_package_set_once(struct phy_device *phydev, 2087 unsigned int b) 2088 { 2089 struct phy_package_shared *shared = phydev->shared; 2090 2091 if (!shared) 2092 return false; 2093 2094 return !test_and_set_bit(b, &shared->flags); 2095 } 2096 2097 static inline bool phy_package_init_once(struct phy_device *phydev) 2098 { 2099 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 2100 } 2101 2102 static inline bool phy_package_probe_once(struct phy_device *phydev) 2103 { 2104 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 2105 } 2106 2107 extern struct bus_type mdio_bus_type; 2108 2109 struct mdio_board_info { 2110 const char *bus_id; 2111 char modalias[MDIO_NAME_SIZE]; 2112 int mdio_addr; 2113 const void *platform_data; 2114 }; 2115 2116 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 2117 int mdiobus_register_board_info(const struct mdio_board_info *info, 2118 unsigned int n); 2119 #else 2120 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 2121 unsigned int n) 2122 { 2123 return 0; 2124 } 2125 #endif 2126 2127 2128 /** 2129 * phy_module_driver() - Helper macro for registering PHY drivers 2130 * @__phy_drivers: array of PHY drivers to register 2131 * @__count: Numbers of members in array 2132 * 2133 * Helper macro for PHY drivers which do not do anything special in module 2134 * init/exit. Each module may only use this macro once, and calling it 2135 * replaces module_init() and module_exit(). 2136 */ 2137 #define phy_module_driver(__phy_drivers, __count) \ 2138 static int __init phy_module_init(void) \ 2139 { \ 2140 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 2141 } \ 2142 module_init(phy_module_init); \ 2143 static void __exit phy_module_exit(void) \ 2144 { \ 2145 phy_drivers_unregister(__phy_drivers, __count); \ 2146 } \ 2147 module_exit(phy_module_exit) 2148 2149 #define module_phy_driver(__phy_drivers) \ 2150 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 2151 2152 bool phy_driver_is_genphy(struct phy_device *phydev); 2153 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 2154 2155 #endif /* __PHY_H */ 2156