1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/linkmode.h> 18 #include <linux/mdio.h> 19 #include <linux/mii.h> 20 #include <linux/mii_timestamper.h> 21 #include <linux/module.h> 22 #include <linux/timer.h> 23 #include <linux/workqueue.h> 24 #include <linux/mod_devicetable.h> 25 #include <linux/u64_stats_sync.h> 26 27 #include <linux/atomic.h> 28 29 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 30 SUPPORTED_TP | \ 31 SUPPORTED_MII) 32 33 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 34 SUPPORTED_10baseT_Full) 35 36 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 37 SUPPORTED_100baseT_Full) 38 39 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 40 SUPPORTED_1000baseT_Full) 41 42 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 43 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 44 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 45 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 50 51 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 52 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 53 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 54 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 55 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 56 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 57 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 58 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 59 60 extern const int phy_basic_ports_array[3]; 61 extern const int phy_fibre_port_array[1]; 62 extern const int phy_all_ports_features_array[7]; 63 extern const int phy_10_100_features_array[4]; 64 extern const int phy_basic_t1_features_array[2]; 65 extern const int phy_gbit_features_array[2]; 66 extern const int phy_10gbit_features_array[1]; 67 68 /* 69 * Set phydev->irq to PHY_POLL if interrupts are not supported, 70 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if 71 * the attached driver handles the interrupt 72 */ 73 #define PHY_POLL -1 74 #define PHY_IGNORE_INTERRUPT -2 75 76 #define PHY_IS_INTERNAL 0x00000001 77 #define PHY_RST_AFTER_CLK_EN 0x00000002 78 #define MDIO_DEVICE_IS_PHY 0x80000000 79 80 /* Interface Mode definitions */ 81 typedef enum { 82 PHY_INTERFACE_MODE_NA, 83 PHY_INTERFACE_MODE_INTERNAL, 84 PHY_INTERFACE_MODE_MII, 85 PHY_INTERFACE_MODE_GMII, 86 PHY_INTERFACE_MODE_SGMII, 87 PHY_INTERFACE_MODE_TBI, 88 PHY_INTERFACE_MODE_REVMII, 89 PHY_INTERFACE_MODE_RMII, 90 PHY_INTERFACE_MODE_RGMII, 91 PHY_INTERFACE_MODE_RGMII_ID, 92 PHY_INTERFACE_MODE_RGMII_RXID, 93 PHY_INTERFACE_MODE_RGMII_TXID, 94 PHY_INTERFACE_MODE_RTBI, 95 PHY_INTERFACE_MODE_SMII, 96 PHY_INTERFACE_MODE_XGMII, 97 PHY_INTERFACE_MODE_MOCA, 98 PHY_INTERFACE_MODE_QSGMII, 99 PHY_INTERFACE_MODE_TRGMII, 100 PHY_INTERFACE_MODE_1000BASEX, 101 PHY_INTERFACE_MODE_2500BASEX, 102 PHY_INTERFACE_MODE_RXAUI, 103 PHY_INTERFACE_MODE_XAUI, 104 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 105 PHY_INTERFACE_MODE_10GBASER, 106 PHY_INTERFACE_MODE_USXGMII, 107 /* 10GBASE-KR - with Clause 73 AN */ 108 PHY_INTERFACE_MODE_10GKR, 109 PHY_INTERFACE_MODE_MAX, 110 } phy_interface_t; 111 112 /** 113 * phy_supported_speeds - return all speeds currently supported by a phy device 114 * @phy: The phy device to return supported speeds of. 115 * @speeds: buffer to store supported speeds in. 116 * @size: size of speeds buffer. 117 * 118 * Description: Returns the number of supported speeds, and fills 119 * the speeds buffer with the supported speeds. If speeds buffer is 120 * too small to contain all currently supported speeds, will return as 121 * many speeds as can fit. 122 */ 123 unsigned int phy_supported_speeds(struct phy_device *phy, 124 unsigned int *speeds, 125 unsigned int size); 126 127 /** 128 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 129 * @interface: enum phy_interface_t value 130 * 131 * Description: maps 'enum phy_interface_t' defined in this file 132 * into the device tree binding of 'phy-mode', so that Ethernet 133 * device driver can get phy interface from device tree. 134 */ 135 static inline const char *phy_modes(phy_interface_t interface) 136 { 137 switch (interface) { 138 case PHY_INTERFACE_MODE_NA: 139 return ""; 140 case PHY_INTERFACE_MODE_INTERNAL: 141 return "internal"; 142 case PHY_INTERFACE_MODE_MII: 143 return "mii"; 144 case PHY_INTERFACE_MODE_GMII: 145 return "gmii"; 146 case PHY_INTERFACE_MODE_SGMII: 147 return "sgmii"; 148 case PHY_INTERFACE_MODE_TBI: 149 return "tbi"; 150 case PHY_INTERFACE_MODE_REVMII: 151 return "rev-mii"; 152 case PHY_INTERFACE_MODE_RMII: 153 return "rmii"; 154 case PHY_INTERFACE_MODE_RGMII: 155 return "rgmii"; 156 case PHY_INTERFACE_MODE_RGMII_ID: 157 return "rgmii-id"; 158 case PHY_INTERFACE_MODE_RGMII_RXID: 159 return "rgmii-rxid"; 160 case PHY_INTERFACE_MODE_RGMII_TXID: 161 return "rgmii-txid"; 162 case PHY_INTERFACE_MODE_RTBI: 163 return "rtbi"; 164 case PHY_INTERFACE_MODE_SMII: 165 return "smii"; 166 case PHY_INTERFACE_MODE_XGMII: 167 return "xgmii"; 168 case PHY_INTERFACE_MODE_MOCA: 169 return "moca"; 170 case PHY_INTERFACE_MODE_QSGMII: 171 return "qsgmii"; 172 case PHY_INTERFACE_MODE_TRGMII: 173 return "trgmii"; 174 case PHY_INTERFACE_MODE_1000BASEX: 175 return "1000base-x"; 176 case PHY_INTERFACE_MODE_2500BASEX: 177 return "2500base-x"; 178 case PHY_INTERFACE_MODE_RXAUI: 179 return "rxaui"; 180 case PHY_INTERFACE_MODE_XAUI: 181 return "xaui"; 182 case PHY_INTERFACE_MODE_10GBASER: 183 return "10gbase-r"; 184 case PHY_INTERFACE_MODE_USXGMII: 185 return "usxgmii"; 186 case PHY_INTERFACE_MODE_10GKR: 187 return "10gbase-kr"; 188 default: 189 return "unknown"; 190 } 191 } 192 193 194 #define PHY_INIT_TIMEOUT 100000 195 #define PHY_FORCE_TIMEOUT 10 196 197 #define PHY_MAX_ADDR 32 198 199 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 200 #define PHY_ID_FMT "%s:%02x" 201 202 #define MII_BUS_ID_SIZE 61 203 204 /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit 205 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */ 206 #define MII_ADDR_C45 (1<<30) 207 #define MII_DEVADDR_C45_SHIFT 16 208 #define MII_REGADDR_C45_MASK GENMASK(15, 0) 209 210 struct device; 211 struct phylink; 212 struct sfp_bus; 213 struct sfp_upstream_ops; 214 struct sk_buff; 215 216 struct mdio_bus_stats { 217 u64_stats_t transfers; 218 u64_stats_t errors; 219 u64_stats_t writes; 220 u64_stats_t reads; 221 /* Must be last, add new statistics above */ 222 struct u64_stats_sync syncp; 223 }; 224 225 /* 226 * The Bus class for PHYs. Devices which provide access to 227 * PHYs should register using this structure 228 */ 229 struct mii_bus { 230 struct module *owner; 231 const char *name; 232 char id[MII_BUS_ID_SIZE]; 233 void *priv; 234 int (*read)(struct mii_bus *bus, int addr, int regnum); 235 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 236 int (*reset)(struct mii_bus *bus); 237 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 238 239 /* 240 * A lock to ensure that only one thing can read/write 241 * the MDIO bus at a time 242 */ 243 struct mutex mdio_lock; 244 245 struct device *parent; 246 enum { 247 MDIOBUS_ALLOCATED = 1, 248 MDIOBUS_REGISTERED, 249 MDIOBUS_UNREGISTERED, 250 MDIOBUS_RELEASED, 251 } state; 252 struct device dev; 253 254 /* list of all PHYs on bus */ 255 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 256 257 /* PHY addresses to be ignored when probing */ 258 u32 phy_mask; 259 260 /* PHY addresses to ignore the TA/read failure */ 261 u32 phy_ignore_ta_mask; 262 263 /* 264 * An array of interrupts, each PHY's interrupt at the index 265 * matching its address 266 */ 267 int irq[PHY_MAX_ADDR]; 268 269 /* GPIO reset pulse width in microseconds */ 270 int reset_delay_us; 271 /* RESET GPIO descriptor pointer */ 272 struct gpio_desc *reset_gpiod; 273 }; 274 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 275 276 struct mii_bus *mdiobus_alloc_size(size_t); 277 static inline struct mii_bus *mdiobus_alloc(void) 278 { 279 return mdiobus_alloc_size(0); 280 } 281 282 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 283 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 284 void mdiobus_unregister(struct mii_bus *bus); 285 void mdiobus_free(struct mii_bus *bus); 286 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 287 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 288 { 289 return devm_mdiobus_alloc_size(dev, 0); 290 } 291 292 void devm_mdiobus_free(struct device *dev, struct mii_bus *bus); 293 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); 294 295 #define PHY_INTERRUPT_DISABLED false 296 #define PHY_INTERRUPT_ENABLED true 297 298 /* PHY state machine states: 299 * 300 * DOWN: PHY device and driver are not ready for anything. probe 301 * should be called if and only if the PHY is in this state, 302 * given that the PHY device exists. 303 * - PHY driver probe function will set the state to READY 304 * 305 * READY: PHY is ready to send and receive packets, but the 306 * controller is not. By default, PHYs which do not implement 307 * probe will be set to this state by phy_probe(). 308 * - start will set the state to UP 309 * 310 * UP: The PHY and attached device are ready to do work. 311 * Interrupts should be started here. 312 * - timer moves to NOLINK or RUNNING 313 * 314 * NOLINK: PHY is up, but not currently plugged in. 315 * - irq or timer will set RUNNING if link comes back 316 * - phy_stop moves to HALTED 317 * 318 * RUNNING: PHY is currently up, running, and possibly sending 319 * and/or receiving packets 320 * - irq or timer will set NOLINK if link goes down 321 * - phy_stop moves to HALTED 322 * 323 * HALTED: PHY is up, but no polling or interrupts are done. Or 324 * PHY is in an error state. 325 * - phy_start moves to UP 326 */ 327 enum phy_state { 328 PHY_DOWN = 0, 329 PHY_READY, 330 PHY_HALTED, 331 PHY_UP, 332 PHY_RUNNING, 333 PHY_NOLINK, 334 }; 335 336 /** 337 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 338 * @devices_in_package: Bit vector of devices present. 339 * @device_ids: The device identifer for each present device. 340 */ 341 struct phy_c45_device_ids { 342 u32 devices_in_package; 343 u32 device_ids[8]; 344 }; 345 346 struct macsec_context; 347 struct macsec_ops; 348 349 /* phy_device: An instance of a PHY 350 * 351 * drv: Pointer to the driver for this PHY instance 352 * phy_id: UID for this device found during discovery 353 * c45_ids: 802.3-c45 Device Identifers if is_c45. 354 * is_c45: Set to true if this phy uses clause 45 addressing. 355 * is_internal: Set to true if this phy is internal to a MAC. 356 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc. 357 * is_gigabit_capable: Set to true if PHY supports 1000Mbps 358 * has_fixups: Set to true if this phy has fixups/quirks. 359 * suspended: Set to true if this phy has been suspended successfully. 360 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 361 * loopback_enabled: Set true if this phy has been loopbacked successfully. 362 * state: state of the PHY for management purposes 363 * dev_flags: Device-specific flags used by the PHY driver. 364 * irq: IRQ number of the PHY's interrupt (-1 if none) 365 * phy_timer: The timer for handling the state machine 366 * sfp_bus_attached: flag indicating whether the SFP bus has been attached 367 * sfp_bus: SFP bus attached to this PHY's fiber port 368 * attached_dev: The attached enet driver's device instance ptr 369 * adjust_link: Callback for the enet controller to respond to 370 * changes in the link state. 371 * macsec_ops: MACsec offloading ops. 372 * 373 * speed, duplex, pause, supported, advertising, lp_advertising, 374 * and autoneg are used like in mii_if_info 375 * 376 * interrupts currently only supports enabled or disabled, 377 * but could be changed in the future to support enabling 378 * and disabling specific interrupts 379 * 380 * Contains some infrastructure for polling and interrupt 381 * handling, as well as handling shifts in PHY hardware state 382 */ 383 struct phy_device { 384 struct mdio_device mdio; 385 386 /* Information about the PHY type */ 387 /* And management functions */ 388 struct phy_driver *drv; 389 390 u32 phy_id; 391 392 struct phy_c45_device_ids c45_ids; 393 unsigned is_c45:1; 394 unsigned is_internal:1; 395 unsigned is_pseudo_fixed_link:1; 396 unsigned is_gigabit_capable:1; 397 unsigned has_fixups:1; 398 unsigned suspended:1; 399 unsigned sysfs_links:1; 400 unsigned loopback_enabled:1; 401 402 unsigned autoneg:1; 403 /* The most recently read link state */ 404 unsigned link:1; 405 unsigned autoneg_complete:1; 406 407 /* Interrupts are enabled */ 408 unsigned interrupts:1; 409 410 enum phy_state state; 411 412 u32 dev_flags; 413 414 phy_interface_t interface; 415 416 /* 417 * forced speed & duplex (no autoneg) 418 * partner speed & duplex & pause (autoneg) 419 */ 420 int speed; 421 int duplex; 422 int pause; 423 int asym_pause; 424 425 /* Union of PHY and Attached devices' supported link modes */ 426 /* See ethtool.h for more info */ 427 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 428 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 429 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 430 /* used with phy_speed_down */ 431 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 432 433 /* Energy efficient ethernet modes which should be prohibited */ 434 u32 eee_broken_modes; 435 436 #ifdef CONFIG_LED_TRIGGER_PHY 437 struct phy_led_trigger *phy_led_triggers; 438 unsigned int phy_num_led_triggers; 439 struct phy_led_trigger *last_triggered; 440 441 struct phy_led_trigger *led_link_trigger; 442 #endif 443 444 /* 445 * Interrupt number for this PHY 446 * -1 means no interrupt 447 */ 448 int irq; 449 450 /* private data pointer */ 451 /* For use by PHYs to maintain extra state */ 452 void *priv; 453 454 /* Interrupt and Polling infrastructure */ 455 struct delayed_work state_queue; 456 457 struct mutex lock; 458 459 /* This may be modified under the rtnl lock */ 460 bool sfp_bus_attached; 461 struct sfp_bus *sfp_bus; 462 struct phylink *phylink; 463 struct net_device *attached_dev; 464 struct mii_timestamper *mii_ts; 465 466 u8 mdix; 467 u8 mdix_ctrl; 468 469 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier); 470 void (*adjust_link)(struct net_device *dev); 471 472 #if IS_ENABLED(CONFIG_MACSEC) 473 /* MACsec management functions */ 474 const struct macsec_ops *macsec_ops; 475 #endif 476 }; 477 #define to_phy_device(d) container_of(to_mdio_device(d), \ 478 struct phy_device, mdio) 479 480 /* struct phy_driver: Driver structure for a particular PHY type 481 * 482 * driver_data: static driver data 483 * phy_id: The result of reading the UID registers of this PHY 484 * type, and ANDing them with the phy_id_mask. This driver 485 * only works for PHYs with IDs which match this field 486 * name: The friendly name of this PHY type 487 * phy_id_mask: Defines the important bits of the phy_id 488 * features: A mandatory list of features (speed, duplex, etc) 489 * supported by this PHY 490 * flags: A bitfield defining certain other features this PHY 491 * supports (like interrupts) 492 * 493 * All functions are optional. If config_aneg or read_status 494 * are not implemented, the phy core uses the genphy versions. 495 * Note that none of these functions should be called from 496 * interrupt time. The goal is for the bus read/write functions 497 * to be able to block when the bus transaction is happening, 498 * and be freed up by an interrupt (The MPC85xx has this ability, 499 * though it is not currently supported in the driver). 500 */ 501 struct phy_driver { 502 struct mdio_driver_common mdiodrv; 503 u32 phy_id; 504 char *name; 505 u32 phy_id_mask; 506 const unsigned long * const features; 507 u32 flags; 508 const void *driver_data; 509 510 /* 511 * Called to issue a PHY software reset 512 */ 513 int (*soft_reset)(struct phy_device *phydev); 514 515 /* 516 * Called to initialize the PHY, 517 * including after a reset 518 */ 519 int (*config_init)(struct phy_device *phydev); 520 521 /* 522 * Called during discovery. Used to set 523 * up device-specific structures, if any 524 */ 525 int (*probe)(struct phy_device *phydev); 526 527 /* 528 * Probe the hardware to determine what abilities it has. 529 * Should only set phydev->supported. 530 */ 531 int (*get_features)(struct phy_device *phydev); 532 533 /* PHY Power Management */ 534 int (*suspend)(struct phy_device *phydev); 535 int (*resume)(struct phy_device *phydev); 536 537 /* 538 * Configures the advertisement and resets 539 * autonegotiation if phydev->autoneg is on, 540 * forces the speed to the current settings in phydev 541 * if phydev->autoneg is off 542 */ 543 int (*config_aneg)(struct phy_device *phydev); 544 545 /* Determines the auto negotiation result */ 546 int (*aneg_done)(struct phy_device *phydev); 547 548 /* Determines the negotiated speed and duplex */ 549 int (*read_status)(struct phy_device *phydev); 550 551 /* Clears any pending interrupts */ 552 int (*ack_interrupt)(struct phy_device *phydev); 553 554 /* Enables or disables interrupts */ 555 int (*config_intr)(struct phy_device *phydev); 556 557 /* 558 * Checks if the PHY generated an interrupt. 559 * For multi-PHY devices with shared PHY interrupt pin 560 */ 561 int (*did_interrupt)(struct phy_device *phydev); 562 563 /* Override default interrupt handling */ 564 int (*handle_interrupt)(struct phy_device *phydev); 565 566 /* Clears up any memory if needed */ 567 void (*remove)(struct phy_device *phydev); 568 569 /* Returns true if this is a suitable driver for the given 570 * phydev. If NULL, matching is based on phy_id and 571 * phy_id_mask. 572 */ 573 int (*match_phy_device)(struct phy_device *phydev); 574 575 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to 576 * enable Wake on LAN, so set_wol is provided to be called in the 577 * ethernet driver's set_wol function. */ 578 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 579 580 /* See set_wol, but for checking whether Wake on LAN is enabled. */ 581 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 582 583 /* 584 * Called to inform a PHY device driver when the core is about to 585 * change the link state. This callback is supposed to be used as 586 * fixup hook for drivers that need to take action when the link 587 * state changes. Drivers are by no means allowed to mess with the 588 * PHY device structure in their implementations. 589 */ 590 void (*link_change_notify)(struct phy_device *dev); 591 592 /* 593 * Phy specific driver override for reading a MMD register. 594 * This function is optional for PHY specific drivers. When 595 * not provided, the default MMD read function will be used 596 * by phy_read_mmd(), which will use either a direct read for 597 * Clause 45 PHYs or an indirect read for Clause 22 PHYs. 598 * devnum is the MMD device number within the PHY device, 599 * regnum is the register within the selected MMD device. 600 */ 601 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 602 603 /* 604 * Phy specific driver override for writing a MMD register. 605 * This function is optional for PHY specific drivers. When 606 * not provided, the default MMD write function will be used 607 * by phy_write_mmd(), which will use either a direct write for 608 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs. 609 * devnum is the MMD device number within the PHY device, 610 * regnum is the register within the selected MMD device. 611 * val is the value to be written. 612 */ 613 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 614 u16 val); 615 616 int (*read_page)(struct phy_device *dev); 617 int (*write_page)(struct phy_device *dev, int page); 618 619 /* Get the size and type of the eeprom contained within a plug-in 620 * module */ 621 int (*module_info)(struct phy_device *dev, 622 struct ethtool_modinfo *modinfo); 623 624 /* Get the eeprom information from the plug-in module */ 625 int (*module_eeprom)(struct phy_device *dev, 626 struct ethtool_eeprom *ee, u8 *data); 627 628 /* Get statistics from the phy using ethtool */ 629 int (*get_sset_count)(struct phy_device *dev); 630 void (*get_strings)(struct phy_device *dev, u8 *data); 631 void (*get_stats)(struct phy_device *dev, 632 struct ethtool_stats *stats, u64 *data); 633 634 /* Get and Set PHY tunables */ 635 int (*get_tunable)(struct phy_device *dev, 636 struct ethtool_tunable *tuna, void *data); 637 int (*set_tunable)(struct phy_device *dev, 638 struct ethtool_tunable *tuna, 639 const void *data); 640 int (*set_loopback)(struct phy_device *dev, bool enable); 641 }; 642 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 643 struct phy_driver, mdiodrv) 644 645 #define PHY_ANY_ID "MATCH ANY PHY" 646 #define PHY_ANY_UID 0xffffffff 647 648 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 649 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 650 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 651 652 /* A Structure for boards to register fixups with the PHY Lib */ 653 struct phy_fixup { 654 struct list_head list; 655 char bus_id[MII_BUS_ID_SIZE + 3]; 656 u32 phy_uid; 657 u32 phy_uid_mask; 658 int (*run)(struct phy_device *phydev); 659 }; 660 661 const char *phy_speed_to_str(int speed); 662 const char *phy_duplex_to_str(unsigned int duplex); 663 664 /* A structure for mapping a particular speed and duplex 665 * combination to a particular SUPPORTED and ADVERTISED value 666 */ 667 struct phy_setting { 668 u32 speed; 669 u8 duplex; 670 u8 bit; 671 }; 672 673 const struct phy_setting * 674 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 675 bool exact); 676 size_t phy_speeds(unsigned int *speeds, size_t size, 677 unsigned long *mask); 678 void of_set_phy_supported(struct phy_device *phydev); 679 void of_set_phy_eee_broken(struct phy_device *phydev); 680 int phy_speed_down_core(struct phy_device *phydev); 681 682 /** 683 * phy_is_started - Convenience function to check whether PHY is started 684 * @phydev: The phy_device struct 685 */ 686 static inline bool phy_is_started(struct phy_device *phydev) 687 { 688 return phydev->state >= PHY_UP; 689 } 690 691 void phy_resolve_aneg_pause(struct phy_device *phydev); 692 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 693 694 /** 695 * phy_read - Convenience function for reading a given PHY register 696 * @phydev: the phy_device struct 697 * @regnum: register number to read 698 * 699 * NOTE: MUST NOT be called from interrupt context, 700 * because the bus read/write functions may wait for an interrupt 701 * to conclude the operation. 702 */ 703 static inline int phy_read(struct phy_device *phydev, u32 regnum) 704 { 705 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 706 } 707 708 /** 709 * __phy_read - convenience function for reading a given PHY register 710 * @phydev: the phy_device struct 711 * @regnum: register number to read 712 * 713 * The caller must have taken the MDIO bus lock. 714 */ 715 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 716 { 717 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 718 } 719 720 /** 721 * phy_write - Convenience function for writing a given PHY register 722 * @phydev: the phy_device struct 723 * @regnum: register number to write 724 * @val: value to write to @regnum 725 * 726 * NOTE: MUST NOT be called from interrupt context, 727 * because the bus read/write functions may wait for an interrupt 728 * to conclude the operation. 729 */ 730 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 731 { 732 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 733 } 734 735 /** 736 * __phy_write - Convenience function for writing a given PHY register 737 * @phydev: the phy_device struct 738 * @regnum: register number to write 739 * @val: value to write to @regnum 740 * 741 * The caller must have taken the MDIO bus lock. 742 */ 743 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 744 { 745 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 746 val); 747 } 748 749 /** 750 * phy_read_mmd - Convenience function for reading a register 751 * from an MMD on a given PHY. 752 * @phydev: The phy_device struct 753 * @devad: The MMD to read from 754 * @regnum: The register on the MMD to read 755 * 756 * Same rules as for phy_read(); 757 */ 758 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 759 760 /** 761 * __phy_read_mmd - Convenience function for reading a register 762 * from an MMD on a given PHY. 763 * @phydev: The phy_device struct 764 * @devad: The MMD to read from 765 * @regnum: The register on the MMD to read 766 * 767 * Same rules as for __phy_read(); 768 */ 769 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 770 771 /** 772 * phy_write_mmd - Convenience function for writing a register 773 * on an MMD on a given PHY. 774 * @phydev: The phy_device struct 775 * @devad: The MMD to write to 776 * @regnum: The register on the MMD to read 777 * @val: value to write to @regnum 778 * 779 * Same rules as for phy_write(); 780 */ 781 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 782 783 /** 784 * __phy_write_mmd - Convenience function for writing a register 785 * on an MMD on a given PHY. 786 * @phydev: The phy_device struct 787 * @devad: The MMD to write to 788 * @regnum: The register on the MMD to read 789 * @val: value to write to @regnum 790 * 791 * Same rules as for __phy_write(); 792 */ 793 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 794 795 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 796 u16 set); 797 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 798 u16 set); 799 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 800 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 801 802 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 803 u16 mask, u16 set); 804 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 805 u16 mask, u16 set); 806 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 807 u16 mask, u16 set); 808 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 809 u16 mask, u16 set); 810 811 /** 812 * __phy_set_bits - Convenience function for setting bits in a PHY register 813 * @phydev: the phy_device struct 814 * @regnum: register number to write 815 * @val: bits to set 816 * 817 * The caller must have taken the MDIO bus lock. 818 */ 819 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 820 { 821 return __phy_modify(phydev, regnum, 0, val); 822 } 823 824 /** 825 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 826 * @phydev: the phy_device struct 827 * @regnum: register number to write 828 * @val: bits to clear 829 * 830 * The caller must have taken the MDIO bus lock. 831 */ 832 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 833 u16 val) 834 { 835 return __phy_modify(phydev, regnum, val, 0); 836 } 837 838 /** 839 * phy_set_bits - Convenience function for setting bits in a PHY register 840 * @phydev: the phy_device struct 841 * @regnum: register number to write 842 * @val: bits to set 843 */ 844 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 845 { 846 return phy_modify(phydev, regnum, 0, val); 847 } 848 849 /** 850 * phy_clear_bits - Convenience function for clearing bits in a PHY register 851 * @phydev: the phy_device struct 852 * @regnum: register number to write 853 * @val: bits to clear 854 */ 855 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 856 { 857 return phy_modify(phydev, regnum, val, 0); 858 } 859 860 /** 861 * __phy_set_bits_mmd - Convenience function for setting bits in a register 862 * on MMD 863 * @phydev: the phy_device struct 864 * @devad: the MMD containing register to modify 865 * @regnum: register number to modify 866 * @val: bits to set 867 * 868 * The caller must have taken the MDIO bus lock. 869 */ 870 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 871 u32 regnum, u16 val) 872 { 873 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 874 } 875 876 /** 877 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 878 * on MMD 879 * @phydev: the phy_device struct 880 * @devad: the MMD containing register to modify 881 * @regnum: register number to modify 882 * @val: bits to clear 883 * 884 * The caller must have taken the MDIO bus lock. 885 */ 886 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 887 u32 regnum, u16 val) 888 { 889 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 890 } 891 892 /** 893 * phy_set_bits_mmd - Convenience function for setting bits in a register 894 * on MMD 895 * @phydev: the phy_device struct 896 * @devad: the MMD containing register to modify 897 * @regnum: register number to modify 898 * @val: bits to set 899 */ 900 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 901 u32 regnum, u16 val) 902 { 903 return phy_modify_mmd(phydev, devad, regnum, 0, val); 904 } 905 906 /** 907 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 908 * on MMD 909 * @phydev: the phy_device struct 910 * @devad: the MMD containing register to modify 911 * @regnum: register number to modify 912 * @val: bits to clear 913 */ 914 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 915 u32 regnum, u16 val) 916 { 917 return phy_modify_mmd(phydev, devad, regnum, val, 0); 918 } 919 920 /** 921 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 922 * @phydev: the phy_device struct 923 * 924 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 925 * PHY_IGNORE_INTERRUPT 926 */ 927 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 928 { 929 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT; 930 } 931 932 /** 933 * phy_polling_mode - Convenience function for testing whether polling is 934 * used to detect PHY status changes 935 * @phydev: the phy_device struct 936 */ 937 static inline bool phy_polling_mode(struct phy_device *phydev) 938 { 939 return phydev->irq == PHY_POLL; 940 } 941 942 /** 943 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 944 * @phydev: the phy_device struct 945 */ 946 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 947 { 948 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 949 } 950 951 /** 952 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 953 * @phydev: the phy_device struct 954 */ 955 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 956 { 957 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 958 } 959 960 /** 961 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 962 * PTP hardware clock capabilities. 963 * @phydev: the phy_device struct 964 */ 965 static inline bool phy_has_tsinfo(struct phy_device *phydev) 966 { 967 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 968 } 969 970 /** 971 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 972 * @phydev: the phy_device struct 973 */ 974 static inline bool phy_has_txtstamp(struct phy_device *phydev) 975 { 976 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 977 } 978 979 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) 980 { 981 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); 982 } 983 984 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 985 int type) 986 { 987 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 988 } 989 990 static inline int phy_ts_info(struct phy_device *phydev, 991 struct ethtool_ts_info *tsinfo) 992 { 993 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 994 } 995 996 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 997 int type) 998 { 999 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1000 } 1001 1002 /** 1003 * phy_is_internal - Convenience function for testing if a PHY is internal 1004 * @phydev: the phy_device struct 1005 */ 1006 static inline bool phy_is_internal(struct phy_device *phydev) 1007 { 1008 return phydev->is_internal; 1009 } 1010 1011 /** 1012 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1013 * PHY interface mode is RGMII (all variants) 1014 * @mode: the phy_interface_t enum 1015 */ 1016 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1017 { 1018 return mode >= PHY_INTERFACE_MODE_RGMII && 1019 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1020 }; 1021 1022 /** 1023 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z 1024 * negotiation 1025 * @mode: one of &enum phy_interface_t 1026 * 1027 * Returns true if the phy interface mode uses the 16-bit negotiation 1028 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1029 */ 1030 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1031 { 1032 return mode == PHY_INTERFACE_MODE_1000BASEX || 1033 mode == PHY_INTERFACE_MODE_2500BASEX; 1034 } 1035 1036 /** 1037 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1038 * is RGMII (all variants) 1039 * @phydev: the phy_device struct 1040 */ 1041 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1042 { 1043 return phy_interface_mode_is_rgmii(phydev->interface); 1044 }; 1045 1046 /* 1047 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1048 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1049 * @phydev: the phy_device struct 1050 */ 1051 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1052 { 1053 return phydev->is_pseudo_fixed_link; 1054 } 1055 1056 int phy_save_page(struct phy_device *phydev); 1057 int phy_select_page(struct phy_device *phydev, int page); 1058 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1059 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1060 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1061 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1062 u16 mask, u16 set); 1063 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1064 u16 mask, u16 set); 1065 1066 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1067 bool is_c45, 1068 struct phy_c45_device_ids *c45_ids); 1069 #if IS_ENABLED(CONFIG_PHYLIB) 1070 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1071 int phy_device_register(struct phy_device *phy); 1072 void phy_device_free(struct phy_device *phydev); 1073 #else 1074 static inline 1075 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1076 { 1077 return NULL; 1078 } 1079 1080 static inline int phy_device_register(struct phy_device *phy) 1081 { 1082 return 0; 1083 } 1084 1085 static inline void phy_device_free(struct phy_device *phydev) { } 1086 #endif /* CONFIG_PHYLIB */ 1087 void phy_device_remove(struct phy_device *phydev); 1088 int phy_init_hw(struct phy_device *phydev); 1089 int phy_suspend(struct phy_device *phydev); 1090 int phy_resume(struct phy_device *phydev); 1091 int __phy_resume(struct phy_device *phydev); 1092 int phy_loopback(struct phy_device *phydev, bool enable); 1093 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1094 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1095 int phy_sfp_probe(struct phy_device *phydev, 1096 const struct sfp_upstream_ops *ops); 1097 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1098 phy_interface_t interface); 1099 struct phy_device *phy_find_first(struct mii_bus *bus); 1100 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1101 u32 flags, phy_interface_t interface); 1102 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1103 void (*handler)(struct net_device *), 1104 phy_interface_t interface); 1105 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1106 void (*handler)(struct net_device *), 1107 phy_interface_t interface); 1108 void phy_disconnect(struct phy_device *phydev); 1109 void phy_detach(struct phy_device *phydev); 1110 void phy_start(struct phy_device *phydev); 1111 void phy_stop(struct phy_device *phydev); 1112 int phy_start_aneg(struct phy_device *phydev); 1113 int phy_aneg_done(struct phy_device *phydev); 1114 int phy_speed_down(struct phy_device *phydev, bool sync); 1115 int phy_speed_up(struct phy_device *phydev); 1116 1117 int phy_restart_aneg(struct phy_device *phydev); 1118 int phy_reset_after_clk_enable(struct phy_device *phydev); 1119 1120 static inline void phy_device_reset(struct phy_device *phydev, int value) 1121 { 1122 mdio_device_reset(&phydev->mdio, value); 1123 } 1124 1125 #define phydev_err(_phydev, format, args...) \ 1126 dev_err(&_phydev->mdio.dev, format, ##args) 1127 1128 #define phydev_info(_phydev, format, args...) \ 1129 dev_info(&_phydev->mdio.dev, format, ##args) 1130 1131 #define phydev_warn(_phydev, format, args...) \ 1132 dev_warn(&_phydev->mdio.dev, format, ##args) 1133 1134 #define phydev_dbg(_phydev, format, args...) \ 1135 dev_dbg(&_phydev->mdio.dev, format, ##args) 1136 1137 static inline const char *phydev_name(const struct phy_device *phydev) 1138 { 1139 return dev_name(&phydev->mdio.dev); 1140 } 1141 1142 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1143 { 1144 mutex_lock(&phydev->mdio.bus->mdio_lock); 1145 } 1146 1147 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1148 { 1149 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1150 } 1151 1152 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1153 __printf(2, 3); 1154 char *phy_attached_info_irq(struct phy_device *phydev) 1155 __malloc; 1156 void phy_attached_info(struct phy_device *phydev); 1157 1158 /* Clause 22 PHY */ 1159 int genphy_read_abilities(struct phy_device *phydev); 1160 int genphy_setup_forced(struct phy_device *phydev); 1161 int genphy_restart_aneg(struct phy_device *phydev); 1162 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1163 int genphy_config_eee_advert(struct phy_device *phydev); 1164 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1165 int genphy_aneg_done(struct phy_device *phydev); 1166 int genphy_update_link(struct phy_device *phydev); 1167 int genphy_read_lpa(struct phy_device *phydev); 1168 int genphy_read_status_fixed(struct phy_device *phydev); 1169 int genphy_read_status(struct phy_device *phydev); 1170 int genphy_suspend(struct phy_device *phydev); 1171 int genphy_resume(struct phy_device *phydev); 1172 int genphy_loopback(struct phy_device *phydev, bool enable); 1173 int genphy_soft_reset(struct phy_device *phydev); 1174 1175 static inline int genphy_config_aneg(struct phy_device *phydev) 1176 { 1177 return __genphy_config_aneg(phydev, false); 1178 } 1179 1180 static inline int genphy_no_soft_reset(struct phy_device *phydev) 1181 { 1182 return 0; 1183 } 1184 static inline int genphy_no_ack_interrupt(struct phy_device *phydev) 1185 { 1186 return 0; 1187 } 1188 static inline int genphy_no_config_intr(struct phy_device *phydev) 1189 { 1190 return 0; 1191 } 1192 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1193 u16 regnum); 1194 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1195 u16 regnum, u16 val); 1196 1197 /* Clause 37 */ 1198 int genphy_c37_config_aneg(struct phy_device *phydev); 1199 int genphy_c37_read_status(struct phy_device *phydev); 1200 1201 /* Clause 45 PHY */ 1202 int genphy_c45_restart_aneg(struct phy_device *phydev); 1203 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1204 int genphy_c45_aneg_done(struct phy_device *phydev); 1205 int genphy_c45_read_link(struct phy_device *phydev); 1206 int genphy_c45_read_lpa(struct phy_device *phydev); 1207 int genphy_c45_read_pma(struct phy_device *phydev); 1208 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1209 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1210 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1211 int genphy_c45_read_mdix(struct phy_device *phydev); 1212 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1213 int genphy_c45_read_status(struct phy_device *phydev); 1214 int genphy_c45_config_aneg(struct phy_device *phydev); 1215 1216 /* The gen10g_* functions are the old Clause 45 stub */ 1217 int gen10g_config_aneg(struct phy_device *phydev); 1218 1219 static inline int phy_read_status(struct phy_device *phydev) 1220 { 1221 if (!phydev->drv) 1222 return -EIO; 1223 1224 if (phydev->drv->read_status) 1225 return phydev->drv->read_status(phydev); 1226 else 1227 return genphy_read_status(phydev); 1228 } 1229 1230 void phy_driver_unregister(struct phy_driver *drv); 1231 void phy_drivers_unregister(struct phy_driver *drv, int n); 1232 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1233 int phy_drivers_register(struct phy_driver *new_driver, int n, 1234 struct module *owner); 1235 void phy_state_machine(struct work_struct *work); 1236 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1237 void phy_mac_interrupt(struct phy_device *phydev); 1238 void phy_start_machine(struct phy_device *phydev); 1239 void phy_stop_machine(struct phy_device *phydev); 1240 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1241 struct ethtool_link_ksettings *cmd); 1242 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1243 const struct ethtool_link_ksettings *cmd); 1244 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1245 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1246 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1247 void phy_request_interrupt(struct phy_device *phydev); 1248 void phy_free_interrupt(struct phy_device *phydev); 1249 void phy_print_status(struct phy_device *phydev); 1250 int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1251 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1252 void phy_advertise_supported(struct phy_device *phydev); 1253 void phy_support_sym_pause(struct phy_device *phydev); 1254 void phy_support_asym_pause(struct phy_device *phydev); 1255 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1256 bool autoneg); 1257 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1258 bool phy_validate_pause(struct phy_device *phydev, 1259 struct ethtool_pauseparam *pp); 1260 1261 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1262 int (*run)(struct phy_device *)); 1263 int phy_register_fixup_for_id(const char *bus_id, 1264 int (*run)(struct phy_device *)); 1265 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1266 int (*run)(struct phy_device *)); 1267 1268 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1269 int phy_unregister_fixup_for_id(const char *bus_id); 1270 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1271 1272 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1273 int phy_get_eee_err(struct phy_device *phydev); 1274 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1275 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1276 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1277 void phy_ethtool_get_wol(struct phy_device *phydev, 1278 struct ethtool_wolinfo *wol); 1279 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1280 struct ethtool_link_ksettings *cmd); 1281 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1282 const struct ethtool_link_ksettings *cmd); 1283 int phy_ethtool_nway_reset(struct net_device *ndev); 1284 1285 #if IS_ENABLED(CONFIG_PHYLIB) 1286 int __init mdio_bus_init(void); 1287 void mdio_bus_exit(void); 1288 #endif 1289 1290 /* Inline function for use within net/core/ethtool.c (built-in) */ 1291 static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data) 1292 { 1293 if (!phydev->drv) 1294 return -EIO; 1295 1296 mutex_lock(&phydev->lock); 1297 phydev->drv->get_strings(phydev, data); 1298 mutex_unlock(&phydev->lock); 1299 1300 return 0; 1301 } 1302 1303 static inline int phy_ethtool_get_sset_count(struct phy_device *phydev) 1304 { 1305 int ret; 1306 1307 if (!phydev->drv) 1308 return -EIO; 1309 1310 if (phydev->drv->get_sset_count && 1311 phydev->drv->get_strings && 1312 phydev->drv->get_stats) { 1313 mutex_lock(&phydev->lock); 1314 ret = phydev->drv->get_sset_count(phydev); 1315 mutex_unlock(&phydev->lock); 1316 1317 return ret; 1318 } 1319 1320 return -EOPNOTSUPP; 1321 } 1322 1323 static inline int phy_ethtool_get_stats(struct phy_device *phydev, 1324 struct ethtool_stats *stats, u64 *data) 1325 { 1326 if (!phydev->drv) 1327 return -EIO; 1328 1329 mutex_lock(&phydev->lock); 1330 phydev->drv->get_stats(phydev, stats, data); 1331 mutex_unlock(&phydev->lock); 1332 1333 return 0; 1334 } 1335 1336 extern struct bus_type mdio_bus_type; 1337 1338 struct mdio_board_info { 1339 const char *bus_id; 1340 char modalias[MDIO_NAME_SIZE]; 1341 int mdio_addr; 1342 const void *platform_data; 1343 }; 1344 1345 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1346 int mdiobus_register_board_info(const struct mdio_board_info *info, 1347 unsigned int n); 1348 #else 1349 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1350 unsigned int n) 1351 { 1352 return 0; 1353 } 1354 #endif 1355 1356 1357 /** 1358 * module_phy_driver() - Helper macro for registering PHY drivers 1359 * @__phy_drivers: array of PHY drivers to register 1360 * 1361 * Helper macro for PHY drivers which do not do anything special in module 1362 * init/exit. Each module may only use this macro once, and calling it 1363 * replaces module_init() and module_exit(). 1364 */ 1365 #define phy_module_driver(__phy_drivers, __count) \ 1366 static int __init phy_module_init(void) \ 1367 { \ 1368 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 1369 } \ 1370 module_init(phy_module_init); \ 1371 static void __exit phy_module_exit(void) \ 1372 { \ 1373 phy_drivers_unregister(__phy_drivers, __count); \ 1374 } \ 1375 module_exit(phy_module_exit) 1376 1377 #define module_phy_driver(__phy_drivers) \ 1378 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 1379 1380 bool phy_driver_is_genphy(struct phy_device *phydev); 1381 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 1382 1383 #endif /* __PHY_H */ 1384