1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/linkmode.h> 18 #include <linux/mdio.h> 19 #include <linux/mii.h> 20 #include <linux/mii_timestamper.h> 21 #include <linux/module.h> 22 #include <linux/timer.h> 23 #include <linux/workqueue.h> 24 #include <linux/mod_devicetable.h> 25 #include <linux/u64_stats_sync.h> 26 #include <linux/irqreturn.h> 27 #include <linux/iopoll.h> 28 29 #include <linux/atomic.h> 30 31 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 32 SUPPORTED_TP | \ 33 SUPPORTED_MII) 34 35 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 36 SUPPORTED_10baseT_Full) 37 38 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 39 SUPPORTED_100baseT_Full) 40 41 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 42 SUPPORTED_1000baseT_Full) 43 44 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 45 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 52 53 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 54 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 55 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 56 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 57 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 58 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 59 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 60 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 61 62 extern const int phy_basic_ports_array[3]; 63 extern const int phy_fibre_port_array[1]; 64 extern const int phy_all_ports_features_array[7]; 65 extern const int phy_10_100_features_array[4]; 66 extern const int phy_basic_t1_features_array[2]; 67 extern const int phy_gbit_features_array[2]; 68 extern const int phy_10gbit_features_array[1]; 69 70 /* 71 * Set phydev->irq to PHY_POLL if interrupts are not supported, 72 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if 73 * the attached driver handles the interrupt 74 */ 75 #define PHY_POLL -1 76 #define PHY_IGNORE_INTERRUPT -2 77 78 #define PHY_IS_INTERNAL 0x00000001 79 #define PHY_RST_AFTER_CLK_EN 0x00000002 80 #define MDIO_DEVICE_IS_PHY 0x80000000 81 82 /* Interface Mode definitions */ 83 typedef enum { 84 PHY_INTERFACE_MODE_NA, 85 PHY_INTERFACE_MODE_INTERNAL, 86 PHY_INTERFACE_MODE_MII, 87 PHY_INTERFACE_MODE_GMII, 88 PHY_INTERFACE_MODE_SGMII, 89 PHY_INTERFACE_MODE_TBI, 90 PHY_INTERFACE_MODE_REVMII, 91 PHY_INTERFACE_MODE_RMII, 92 PHY_INTERFACE_MODE_RGMII, 93 PHY_INTERFACE_MODE_RGMII_ID, 94 PHY_INTERFACE_MODE_RGMII_RXID, 95 PHY_INTERFACE_MODE_RGMII_TXID, 96 PHY_INTERFACE_MODE_RTBI, 97 PHY_INTERFACE_MODE_SMII, 98 PHY_INTERFACE_MODE_XGMII, 99 PHY_INTERFACE_MODE_XLGMII, 100 PHY_INTERFACE_MODE_MOCA, 101 PHY_INTERFACE_MODE_QSGMII, 102 PHY_INTERFACE_MODE_TRGMII, 103 PHY_INTERFACE_MODE_1000BASEX, 104 PHY_INTERFACE_MODE_2500BASEX, 105 PHY_INTERFACE_MODE_RXAUI, 106 PHY_INTERFACE_MODE_XAUI, 107 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 108 PHY_INTERFACE_MODE_10GBASER, 109 PHY_INTERFACE_MODE_USXGMII, 110 /* 10GBASE-KR - with Clause 73 AN */ 111 PHY_INTERFACE_MODE_10GKR, 112 PHY_INTERFACE_MODE_MAX, 113 } phy_interface_t; 114 115 /** 116 * phy_supported_speeds - return all speeds currently supported by a phy device 117 * @phy: The phy device to return supported speeds of. 118 * @speeds: buffer to store supported speeds in. 119 * @size: size of speeds buffer. 120 * 121 * Description: Returns the number of supported speeds, and fills 122 * the speeds buffer with the supported speeds. If speeds buffer is 123 * too small to contain all currently supported speeds, will return as 124 * many speeds as can fit. 125 */ 126 unsigned int phy_supported_speeds(struct phy_device *phy, 127 unsigned int *speeds, 128 unsigned int size); 129 130 /** 131 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 132 * @interface: enum phy_interface_t value 133 * 134 * Description: maps 'enum phy_interface_t' defined in this file 135 * into the device tree binding of 'phy-mode', so that Ethernet 136 * device driver can get phy interface from device tree. 137 */ 138 static inline const char *phy_modes(phy_interface_t interface) 139 { 140 switch (interface) { 141 case PHY_INTERFACE_MODE_NA: 142 return ""; 143 case PHY_INTERFACE_MODE_INTERNAL: 144 return "internal"; 145 case PHY_INTERFACE_MODE_MII: 146 return "mii"; 147 case PHY_INTERFACE_MODE_GMII: 148 return "gmii"; 149 case PHY_INTERFACE_MODE_SGMII: 150 return "sgmii"; 151 case PHY_INTERFACE_MODE_TBI: 152 return "tbi"; 153 case PHY_INTERFACE_MODE_REVMII: 154 return "rev-mii"; 155 case PHY_INTERFACE_MODE_RMII: 156 return "rmii"; 157 case PHY_INTERFACE_MODE_RGMII: 158 return "rgmii"; 159 case PHY_INTERFACE_MODE_RGMII_ID: 160 return "rgmii-id"; 161 case PHY_INTERFACE_MODE_RGMII_RXID: 162 return "rgmii-rxid"; 163 case PHY_INTERFACE_MODE_RGMII_TXID: 164 return "rgmii-txid"; 165 case PHY_INTERFACE_MODE_RTBI: 166 return "rtbi"; 167 case PHY_INTERFACE_MODE_SMII: 168 return "smii"; 169 case PHY_INTERFACE_MODE_XGMII: 170 return "xgmii"; 171 case PHY_INTERFACE_MODE_XLGMII: 172 return "xlgmii"; 173 case PHY_INTERFACE_MODE_MOCA: 174 return "moca"; 175 case PHY_INTERFACE_MODE_QSGMII: 176 return "qsgmii"; 177 case PHY_INTERFACE_MODE_TRGMII: 178 return "trgmii"; 179 case PHY_INTERFACE_MODE_1000BASEX: 180 return "1000base-x"; 181 case PHY_INTERFACE_MODE_2500BASEX: 182 return "2500base-x"; 183 case PHY_INTERFACE_MODE_RXAUI: 184 return "rxaui"; 185 case PHY_INTERFACE_MODE_XAUI: 186 return "xaui"; 187 case PHY_INTERFACE_MODE_10GBASER: 188 return "10gbase-r"; 189 case PHY_INTERFACE_MODE_USXGMII: 190 return "usxgmii"; 191 case PHY_INTERFACE_MODE_10GKR: 192 return "10gbase-kr"; 193 default: 194 return "unknown"; 195 } 196 } 197 198 199 #define PHY_INIT_TIMEOUT 100000 200 #define PHY_FORCE_TIMEOUT 10 201 202 #define PHY_MAX_ADDR 32 203 204 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 205 #define PHY_ID_FMT "%s:%02x" 206 207 #define MII_BUS_ID_SIZE 61 208 209 /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit 210 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */ 211 #define MII_ADDR_C45 (1<<30) 212 #define MII_DEVADDR_C45_SHIFT 16 213 #define MII_REGADDR_C45_MASK GENMASK(15, 0) 214 215 struct device; 216 struct phylink; 217 struct sfp_bus; 218 struct sfp_upstream_ops; 219 struct sk_buff; 220 221 struct mdio_bus_stats { 222 u64_stats_t transfers; 223 u64_stats_t errors; 224 u64_stats_t writes; 225 u64_stats_t reads; 226 /* Must be last, add new statistics above */ 227 struct u64_stats_sync syncp; 228 }; 229 230 /* 231 * The Bus class for PHYs. Devices which provide access to 232 * PHYs should register using this structure 233 */ 234 struct mii_bus { 235 struct module *owner; 236 const char *name; 237 char id[MII_BUS_ID_SIZE]; 238 void *priv; 239 int (*read)(struct mii_bus *bus, int addr, int regnum); 240 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 241 int (*reset)(struct mii_bus *bus); 242 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 243 244 unsigned int is_managed:1; /* is device-managed */ 245 unsigned int is_managed_registered:1; 246 247 /* 248 * A lock to ensure that only one thing can read/write 249 * the MDIO bus at a time 250 */ 251 struct mutex mdio_lock; 252 253 struct device *parent; 254 enum { 255 MDIOBUS_ALLOCATED = 1, 256 MDIOBUS_REGISTERED, 257 MDIOBUS_UNREGISTERED, 258 MDIOBUS_RELEASED, 259 } state; 260 struct device dev; 261 262 /* list of all PHYs on bus */ 263 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 264 265 /* PHY addresses to be ignored when probing */ 266 u32 phy_mask; 267 268 /* PHY addresses to ignore the TA/read failure */ 269 u32 phy_ignore_ta_mask; 270 271 /* 272 * An array of interrupts, each PHY's interrupt at the index 273 * matching its address 274 */ 275 int irq[PHY_MAX_ADDR]; 276 277 /* GPIO reset pulse width in microseconds */ 278 int reset_delay_us; 279 /* RESET GPIO descriptor pointer */ 280 struct gpio_desc *reset_gpiod; 281 }; 282 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 283 284 struct mii_bus *mdiobus_alloc_size(size_t); 285 static inline struct mii_bus *mdiobus_alloc(void) 286 { 287 return mdiobus_alloc_size(0); 288 } 289 290 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 291 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 292 static inline int devm_mdiobus_register(struct mii_bus *bus) 293 { 294 int ret; 295 296 if (!bus->is_managed) 297 return -EPERM; 298 299 ret = mdiobus_register(bus); 300 if (!ret) 301 bus->is_managed_registered = 1; 302 303 return ret; 304 } 305 306 void mdiobus_unregister(struct mii_bus *bus); 307 void mdiobus_free(struct mii_bus *bus); 308 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 309 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 310 { 311 return devm_mdiobus_alloc_size(dev, 0); 312 } 313 314 struct mii_bus *mdio_find_bus(const char *mdio_name); 315 void devm_mdiobus_free(struct device *dev, struct mii_bus *bus); 316 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); 317 318 #define PHY_INTERRUPT_DISABLED false 319 #define PHY_INTERRUPT_ENABLED true 320 321 /* PHY state machine states: 322 * 323 * DOWN: PHY device and driver are not ready for anything. probe 324 * should be called if and only if the PHY is in this state, 325 * given that the PHY device exists. 326 * - PHY driver probe function will set the state to READY 327 * 328 * READY: PHY is ready to send and receive packets, but the 329 * controller is not. By default, PHYs which do not implement 330 * probe will be set to this state by phy_probe(). 331 * - start will set the state to UP 332 * 333 * UP: The PHY and attached device are ready to do work. 334 * Interrupts should be started here. 335 * - timer moves to NOLINK or RUNNING 336 * 337 * NOLINK: PHY is up, but not currently plugged in. 338 * - irq or timer will set RUNNING if link comes back 339 * - phy_stop moves to HALTED 340 * 341 * RUNNING: PHY is currently up, running, and possibly sending 342 * and/or receiving packets 343 * - irq or timer will set NOLINK if link goes down 344 * - phy_stop moves to HALTED 345 * 346 * HALTED: PHY is up, but no polling or interrupts are done. Or 347 * PHY is in an error state. 348 * - phy_start moves to UP 349 */ 350 enum phy_state { 351 PHY_DOWN = 0, 352 PHY_READY, 353 PHY_HALTED, 354 PHY_UP, 355 PHY_RUNNING, 356 PHY_NOLINK, 357 }; 358 359 /** 360 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 361 * @devices_in_package: Bit vector of devices present. 362 * @device_ids: The device identifer for each present device. 363 */ 364 struct phy_c45_device_ids { 365 u32 devices_in_package; 366 u32 device_ids[8]; 367 }; 368 369 struct macsec_context; 370 struct macsec_ops; 371 372 /* phy_device: An instance of a PHY 373 * 374 * drv: Pointer to the driver for this PHY instance 375 * phy_id: UID for this device found during discovery 376 * c45_ids: 802.3-c45 Device Identifers if is_c45. 377 * is_c45: Set to true if this phy uses clause 45 addressing. 378 * is_internal: Set to true if this phy is internal to a MAC. 379 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc. 380 * is_gigabit_capable: Set to true if PHY supports 1000Mbps 381 * has_fixups: Set to true if this phy has fixups/quirks. 382 * suspended: Set to true if this phy has been suspended successfully. 383 * suspended_by_mdio_bus: Set to true if this phy was suspended by MDIO bus. 384 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 385 * loopback_enabled: Set true if this phy has been loopbacked successfully. 386 * downshifted_rate: Set true if link speed has been downshifted. 387 * state: state of the PHY for management purposes 388 * dev_flags: Device-specific flags used by the PHY driver. 389 * irq: IRQ number of the PHY's interrupt (-1 if none) 390 * phy_timer: The timer for handling the state machine 391 * sfp_bus_attached: flag indicating whether the SFP bus has been attached 392 * sfp_bus: SFP bus attached to this PHY's fiber port 393 * attached_dev: The attached enet driver's device instance ptr 394 * adjust_link: Callback for the enet controller to respond to 395 * changes in the link state. 396 * macsec_ops: MACsec offloading ops. 397 * 398 * speed, duplex, pause, supported, advertising, lp_advertising, 399 * and autoneg are used like in mii_if_info 400 * 401 * interrupts currently only supports enabled or disabled, 402 * but could be changed in the future to support enabling 403 * and disabling specific interrupts 404 * 405 * Contains some infrastructure for polling and interrupt 406 * handling, as well as handling shifts in PHY hardware state 407 */ 408 struct phy_device { 409 struct mdio_device mdio; 410 411 /* Information about the PHY type */ 412 /* And management functions */ 413 struct phy_driver *drv; 414 415 u32 phy_id; 416 417 struct phy_c45_device_ids c45_ids; 418 unsigned is_c45:1; 419 unsigned is_internal:1; 420 unsigned is_pseudo_fixed_link:1; 421 unsigned is_gigabit_capable:1; 422 unsigned has_fixups:1; 423 unsigned suspended:1; 424 unsigned suspended_by_mdio_bus:1; 425 unsigned sysfs_links:1; 426 unsigned loopback_enabled:1; 427 unsigned downshifted_rate:1; 428 429 unsigned autoneg:1; 430 /* The most recently read link state */ 431 unsigned link:1; 432 unsigned autoneg_complete:1; 433 434 /* Interrupts are enabled */ 435 unsigned interrupts:1; 436 437 enum phy_state state; 438 439 u32 dev_flags; 440 441 phy_interface_t interface; 442 443 /* 444 * forced speed & duplex (no autoneg) 445 * partner speed & duplex & pause (autoneg) 446 */ 447 int speed; 448 int duplex; 449 int pause; 450 int asym_pause; 451 452 /* Union of PHY and Attached devices' supported link modes */ 453 /* See ethtool.h for more info */ 454 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 455 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 456 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 457 /* used with phy_speed_down */ 458 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 459 460 /* Energy efficient ethernet modes which should be prohibited */ 461 u32 eee_broken_modes; 462 463 #ifdef CONFIG_LED_TRIGGER_PHY 464 struct phy_led_trigger *phy_led_triggers; 465 unsigned int phy_num_led_triggers; 466 struct phy_led_trigger *last_triggered; 467 468 struct phy_led_trigger *led_link_trigger; 469 #endif 470 471 /* 472 * Interrupt number for this PHY 473 * -1 means no interrupt 474 */ 475 int irq; 476 477 /* private data pointer */ 478 /* For use by PHYs to maintain extra state */ 479 void *priv; 480 481 /* Interrupt and Polling infrastructure */ 482 struct delayed_work state_queue; 483 484 struct mutex lock; 485 486 /* This may be modified under the rtnl lock */ 487 bool sfp_bus_attached; 488 struct sfp_bus *sfp_bus; 489 struct phylink *phylink; 490 struct net_device *attached_dev; 491 struct mii_timestamper *mii_ts; 492 493 u8 mdix; 494 u8 mdix_ctrl; 495 496 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier); 497 void (*adjust_link)(struct net_device *dev); 498 499 #if IS_ENABLED(CONFIG_MACSEC) 500 /* MACsec management functions */ 501 const struct macsec_ops *macsec_ops; 502 #endif 503 }; 504 #define to_phy_device(d) container_of(to_mdio_device(d), \ 505 struct phy_device, mdio) 506 507 /* struct phy_driver: Driver structure for a particular PHY type 508 * 509 * driver_data: static driver data 510 * phy_id: The result of reading the UID registers of this PHY 511 * type, and ANDing them with the phy_id_mask. This driver 512 * only works for PHYs with IDs which match this field 513 * name: The friendly name of this PHY type 514 * phy_id_mask: Defines the important bits of the phy_id 515 * features: A mandatory list of features (speed, duplex, etc) 516 * supported by this PHY 517 * flags: A bitfield defining certain other features this PHY 518 * supports (like interrupts) 519 * 520 * All functions are optional. If config_aneg or read_status 521 * are not implemented, the phy core uses the genphy versions. 522 * Note that none of these functions should be called from 523 * interrupt time. The goal is for the bus read/write functions 524 * to be able to block when the bus transaction is happening, 525 * and be freed up by an interrupt (The MPC85xx has this ability, 526 * though it is not currently supported in the driver). 527 */ 528 struct phy_driver { 529 struct mdio_driver_common mdiodrv; 530 u32 phy_id; 531 char *name; 532 u32 phy_id_mask; 533 const unsigned long * const features; 534 u32 flags; 535 const void *driver_data; 536 537 /* 538 * Called to issue a PHY software reset 539 */ 540 int (*soft_reset)(struct phy_device *phydev); 541 542 /* 543 * Called to initialize the PHY, 544 * including after a reset 545 */ 546 int (*config_init)(struct phy_device *phydev); 547 548 /* 549 * Called during discovery. Used to set 550 * up device-specific structures, if any 551 */ 552 int (*probe)(struct phy_device *phydev); 553 554 /* 555 * Probe the hardware to determine what abilities it has. 556 * Should only set phydev->supported. 557 */ 558 int (*get_features)(struct phy_device *phydev); 559 560 /* PHY Power Management */ 561 int (*suspend)(struct phy_device *phydev); 562 int (*resume)(struct phy_device *phydev); 563 564 /* 565 * Configures the advertisement and resets 566 * autonegotiation if phydev->autoneg is on, 567 * forces the speed to the current settings in phydev 568 * if phydev->autoneg is off 569 */ 570 int (*config_aneg)(struct phy_device *phydev); 571 572 /* Determines the auto negotiation result */ 573 int (*aneg_done)(struct phy_device *phydev); 574 575 /* Determines the negotiated speed and duplex */ 576 int (*read_status)(struct phy_device *phydev); 577 578 /* Clears any pending interrupts */ 579 int (*ack_interrupt)(struct phy_device *phydev); 580 581 /* Enables or disables interrupts */ 582 int (*config_intr)(struct phy_device *phydev); 583 584 /* 585 * Checks if the PHY generated an interrupt. 586 * For multi-PHY devices with shared PHY interrupt pin 587 * Set interrupt bits have to be cleared. 588 */ 589 int (*did_interrupt)(struct phy_device *phydev); 590 591 /* Override default interrupt handling */ 592 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 593 594 /* Clears up any memory if needed */ 595 void (*remove)(struct phy_device *phydev); 596 597 /* Returns true if this is a suitable driver for the given 598 * phydev. If NULL, matching is based on phy_id and 599 * phy_id_mask. 600 */ 601 int (*match_phy_device)(struct phy_device *phydev); 602 603 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to 604 * enable Wake on LAN, so set_wol is provided to be called in the 605 * ethernet driver's set_wol function. */ 606 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 607 608 /* See set_wol, but for checking whether Wake on LAN is enabled. */ 609 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 610 611 /* 612 * Called to inform a PHY device driver when the core is about to 613 * change the link state. This callback is supposed to be used as 614 * fixup hook for drivers that need to take action when the link 615 * state changes. Drivers are by no means allowed to mess with the 616 * PHY device structure in their implementations. 617 */ 618 void (*link_change_notify)(struct phy_device *dev); 619 620 /* 621 * Phy specific driver override for reading a MMD register. 622 * This function is optional for PHY specific drivers. When 623 * not provided, the default MMD read function will be used 624 * by phy_read_mmd(), which will use either a direct read for 625 * Clause 45 PHYs or an indirect read for Clause 22 PHYs. 626 * devnum is the MMD device number within the PHY device, 627 * regnum is the register within the selected MMD device. 628 */ 629 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 630 631 /* 632 * Phy specific driver override for writing a MMD register. 633 * This function is optional for PHY specific drivers. When 634 * not provided, the default MMD write function will be used 635 * by phy_write_mmd(), which will use either a direct write for 636 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs. 637 * devnum is the MMD device number within the PHY device, 638 * regnum is the register within the selected MMD device. 639 * val is the value to be written. 640 */ 641 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 642 u16 val); 643 644 int (*read_page)(struct phy_device *dev); 645 int (*write_page)(struct phy_device *dev, int page); 646 647 /* Get the size and type of the eeprom contained within a plug-in 648 * module */ 649 int (*module_info)(struct phy_device *dev, 650 struct ethtool_modinfo *modinfo); 651 652 /* Get the eeprom information from the plug-in module */ 653 int (*module_eeprom)(struct phy_device *dev, 654 struct ethtool_eeprom *ee, u8 *data); 655 656 /* Get statistics from the phy using ethtool */ 657 int (*get_sset_count)(struct phy_device *dev); 658 void (*get_strings)(struct phy_device *dev, u8 *data); 659 void (*get_stats)(struct phy_device *dev, 660 struct ethtool_stats *stats, u64 *data); 661 662 /* Get and Set PHY tunables */ 663 int (*get_tunable)(struct phy_device *dev, 664 struct ethtool_tunable *tuna, void *data); 665 int (*set_tunable)(struct phy_device *dev, 666 struct ethtool_tunable *tuna, 667 const void *data); 668 int (*set_loopback)(struct phy_device *dev, bool enable); 669 }; 670 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 671 struct phy_driver, mdiodrv) 672 673 #define PHY_ANY_ID "MATCH ANY PHY" 674 #define PHY_ANY_UID 0xffffffff 675 676 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 677 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 678 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 679 680 /* A Structure for boards to register fixups with the PHY Lib */ 681 struct phy_fixup { 682 struct list_head list; 683 char bus_id[MII_BUS_ID_SIZE + 3]; 684 u32 phy_uid; 685 u32 phy_uid_mask; 686 int (*run)(struct phy_device *phydev); 687 }; 688 689 const char *phy_speed_to_str(int speed); 690 const char *phy_duplex_to_str(unsigned int duplex); 691 692 /* A structure for mapping a particular speed and duplex 693 * combination to a particular SUPPORTED and ADVERTISED value 694 */ 695 struct phy_setting { 696 u32 speed; 697 u8 duplex; 698 u8 bit; 699 }; 700 701 const struct phy_setting * 702 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 703 bool exact); 704 size_t phy_speeds(unsigned int *speeds, size_t size, 705 unsigned long *mask); 706 void of_set_phy_supported(struct phy_device *phydev); 707 void of_set_phy_eee_broken(struct phy_device *phydev); 708 int phy_speed_down_core(struct phy_device *phydev); 709 710 /** 711 * phy_is_started - Convenience function to check whether PHY is started 712 * @phydev: The phy_device struct 713 */ 714 static inline bool phy_is_started(struct phy_device *phydev) 715 { 716 return phydev->state >= PHY_UP; 717 } 718 719 void phy_resolve_aneg_pause(struct phy_device *phydev); 720 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 721 void phy_check_downshift(struct phy_device *phydev); 722 723 /** 724 * phy_read - Convenience function for reading a given PHY register 725 * @phydev: the phy_device struct 726 * @regnum: register number to read 727 * 728 * NOTE: MUST NOT be called from interrupt context, 729 * because the bus read/write functions may wait for an interrupt 730 * to conclude the operation. 731 */ 732 static inline int phy_read(struct phy_device *phydev, u32 regnum) 733 { 734 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 735 } 736 737 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 738 timeout_us, sleep_before_read) \ 739 ({ \ 740 int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \ 741 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 742 if (val < 0) \ 743 __ret = val; \ 744 if (__ret) \ 745 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 746 __ret; \ 747 }) 748 749 750 /** 751 * __phy_read - convenience function for reading a given PHY register 752 * @phydev: the phy_device struct 753 * @regnum: register number to read 754 * 755 * The caller must have taken the MDIO bus lock. 756 */ 757 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 758 { 759 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 760 } 761 762 /** 763 * phy_write - Convenience function for writing a given PHY register 764 * @phydev: the phy_device struct 765 * @regnum: register number to write 766 * @val: value to write to @regnum 767 * 768 * NOTE: MUST NOT be called from interrupt context, 769 * because the bus read/write functions may wait for an interrupt 770 * to conclude the operation. 771 */ 772 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 773 { 774 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 775 } 776 777 /** 778 * __phy_write - Convenience function for writing a given PHY register 779 * @phydev: the phy_device struct 780 * @regnum: register number to write 781 * @val: value to write to @regnum 782 * 783 * The caller must have taken the MDIO bus lock. 784 */ 785 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 786 { 787 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 788 val); 789 } 790 791 /** 792 * __phy_modify_changed() - Convenience function for modifying a PHY register 793 * @phydev: a pointer to a &struct phy_device 794 * @regnum: register number 795 * @mask: bit mask of bits to clear 796 * @set: bit mask of bits to set 797 * 798 * Unlocked helper function which allows a PHY register to be modified as 799 * new register value = (old register value & ~mask) | set 800 * 801 * Returns negative errno, 0 if there was no change, and 1 in case of change 802 */ 803 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 804 u16 mask, u16 set) 805 { 806 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 807 regnum, mask, set); 808 } 809 810 /** 811 * phy_read_mmd - Convenience function for reading a register 812 * from an MMD on a given PHY. 813 * @phydev: The phy_device struct 814 * @devad: The MMD to read from 815 * @regnum: The register on the MMD to read 816 * 817 * Same rules as for phy_read(); 818 */ 819 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 820 821 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 822 sleep_us, timeout_us, sleep_before_read) \ 823 ({ \ 824 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \ 825 sleep_us, timeout_us, sleep_before_read, \ 826 phydev, devaddr, regnum); \ 827 if (val < 0) \ 828 __ret = val; \ 829 if (__ret) \ 830 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 831 __ret; \ 832 }) 833 834 /** 835 * __phy_read_mmd - Convenience function for reading a register 836 * from an MMD on a given PHY. 837 * @phydev: The phy_device struct 838 * @devad: The MMD to read from 839 * @regnum: The register on the MMD to read 840 * 841 * Same rules as for __phy_read(); 842 */ 843 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 844 845 /** 846 * phy_write_mmd - Convenience function for writing a register 847 * on an MMD on a given PHY. 848 * @phydev: The phy_device struct 849 * @devad: The MMD to write to 850 * @regnum: The register on the MMD to read 851 * @val: value to write to @regnum 852 * 853 * Same rules as for phy_write(); 854 */ 855 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 856 857 /** 858 * __phy_write_mmd - Convenience function for writing a register 859 * on an MMD on a given PHY. 860 * @phydev: The phy_device struct 861 * @devad: The MMD to write to 862 * @regnum: The register on the MMD to read 863 * @val: value to write to @regnum 864 * 865 * Same rules as for __phy_write(); 866 */ 867 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 868 869 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 870 u16 set); 871 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 872 u16 set); 873 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 874 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 875 876 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 877 u16 mask, u16 set); 878 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 879 u16 mask, u16 set); 880 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 881 u16 mask, u16 set); 882 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 883 u16 mask, u16 set); 884 885 /** 886 * __phy_set_bits - Convenience function for setting bits in a PHY register 887 * @phydev: the phy_device struct 888 * @regnum: register number to write 889 * @val: bits to set 890 * 891 * The caller must have taken the MDIO bus lock. 892 */ 893 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 894 { 895 return __phy_modify(phydev, regnum, 0, val); 896 } 897 898 /** 899 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 900 * @phydev: the phy_device struct 901 * @regnum: register number to write 902 * @val: bits to clear 903 * 904 * The caller must have taken the MDIO bus lock. 905 */ 906 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 907 u16 val) 908 { 909 return __phy_modify(phydev, regnum, val, 0); 910 } 911 912 /** 913 * phy_set_bits - Convenience function for setting bits in a PHY register 914 * @phydev: the phy_device struct 915 * @regnum: register number to write 916 * @val: bits to set 917 */ 918 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 919 { 920 return phy_modify(phydev, regnum, 0, val); 921 } 922 923 /** 924 * phy_clear_bits - Convenience function for clearing bits in a PHY register 925 * @phydev: the phy_device struct 926 * @regnum: register number to write 927 * @val: bits to clear 928 */ 929 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 930 { 931 return phy_modify(phydev, regnum, val, 0); 932 } 933 934 /** 935 * __phy_set_bits_mmd - Convenience function for setting bits in a register 936 * on MMD 937 * @phydev: the phy_device struct 938 * @devad: the MMD containing register to modify 939 * @regnum: register number to modify 940 * @val: bits to set 941 * 942 * The caller must have taken the MDIO bus lock. 943 */ 944 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 945 u32 regnum, u16 val) 946 { 947 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 948 } 949 950 /** 951 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 952 * on MMD 953 * @phydev: the phy_device struct 954 * @devad: the MMD containing register to modify 955 * @regnum: register number to modify 956 * @val: bits to clear 957 * 958 * The caller must have taken the MDIO bus lock. 959 */ 960 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 961 u32 regnum, u16 val) 962 { 963 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 964 } 965 966 /** 967 * phy_set_bits_mmd - Convenience function for setting bits in a register 968 * on MMD 969 * @phydev: the phy_device struct 970 * @devad: the MMD containing register to modify 971 * @regnum: register number to modify 972 * @val: bits to set 973 */ 974 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 975 u32 regnum, u16 val) 976 { 977 return phy_modify_mmd(phydev, devad, regnum, 0, val); 978 } 979 980 /** 981 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 982 * on MMD 983 * @phydev: the phy_device struct 984 * @devad: the MMD containing register to modify 985 * @regnum: register number to modify 986 * @val: bits to clear 987 */ 988 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 989 u32 regnum, u16 val) 990 { 991 return phy_modify_mmd(phydev, devad, regnum, val, 0); 992 } 993 994 /** 995 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 996 * @phydev: the phy_device struct 997 * 998 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 999 * PHY_IGNORE_INTERRUPT 1000 */ 1001 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1002 { 1003 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT; 1004 } 1005 1006 /** 1007 * phy_polling_mode - Convenience function for testing whether polling is 1008 * used to detect PHY status changes 1009 * @phydev: the phy_device struct 1010 */ 1011 static inline bool phy_polling_mode(struct phy_device *phydev) 1012 { 1013 return phydev->irq == PHY_POLL; 1014 } 1015 1016 /** 1017 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1018 * @phydev: the phy_device struct 1019 */ 1020 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1021 { 1022 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1023 } 1024 1025 /** 1026 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1027 * @phydev: the phy_device struct 1028 */ 1029 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1030 { 1031 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1032 } 1033 1034 /** 1035 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1036 * PTP hardware clock capabilities. 1037 * @phydev: the phy_device struct 1038 */ 1039 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1040 { 1041 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1042 } 1043 1044 /** 1045 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1046 * @phydev: the phy_device struct 1047 */ 1048 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1049 { 1050 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1051 } 1052 1053 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) 1054 { 1055 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); 1056 } 1057 1058 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1059 int type) 1060 { 1061 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1062 } 1063 1064 static inline int phy_ts_info(struct phy_device *phydev, 1065 struct ethtool_ts_info *tsinfo) 1066 { 1067 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1068 } 1069 1070 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1071 int type) 1072 { 1073 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1074 } 1075 1076 /** 1077 * phy_is_internal - Convenience function for testing if a PHY is internal 1078 * @phydev: the phy_device struct 1079 */ 1080 static inline bool phy_is_internal(struct phy_device *phydev) 1081 { 1082 return phydev->is_internal; 1083 } 1084 1085 /** 1086 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1087 * PHY interface mode is RGMII (all variants) 1088 * @mode: the phy_interface_t enum 1089 */ 1090 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1091 { 1092 return mode >= PHY_INTERFACE_MODE_RGMII && 1093 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1094 }; 1095 1096 /** 1097 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z 1098 * negotiation 1099 * @mode: one of &enum phy_interface_t 1100 * 1101 * Returns true if the phy interface mode uses the 16-bit negotiation 1102 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1103 */ 1104 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1105 { 1106 return mode == PHY_INTERFACE_MODE_1000BASEX || 1107 mode == PHY_INTERFACE_MODE_2500BASEX; 1108 } 1109 1110 /** 1111 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1112 * is RGMII (all variants) 1113 * @phydev: the phy_device struct 1114 */ 1115 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1116 { 1117 return phy_interface_mode_is_rgmii(phydev->interface); 1118 }; 1119 1120 /* 1121 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1122 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1123 * @phydev: the phy_device struct 1124 */ 1125 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1126 { 1127 return phydev->is_pseudo_fixed_link; 1128 } 1129 1130 int phy_save_page(struct phy_device *phydev); 1131 int phy_select_page(struct phy_device *phydev, int page); 1132 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1133 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1134 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1135 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1136 u16 mask, u16 set); 1137 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1138 u16 mask, u16 set); 1139 1140 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1141 bool is_c45, 1142 struct phy_c45_device_ids *c45_ids); 1143 #if IS_ENABLED(CONFIG_PHYLIB) 1144 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1145 int phy_device_register(struct phy_device *phy); 1146 void phy_device_free(struct phy_device *phydev); 1147 #else 1148 static inline 1149 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1150 { 1151 return NULL; 1152 } 1153 1154 static inline int phy_device_register(struct phy_device *phy) 1155 { 1156 return 0; 1157 } 1158 1159 static inline void phy_device_free(struct phy_device *phydev) { } 1160 #endif /* CONFIG_PHYLIB */ 1161 void phy_device_remove(struct phy_device *phydev); 1162 int phy_init_hw(struct phy_device *phydev); 1163 int phy_suspend(struct phy_device *phydev); 1164 int phy_resume(struct phy_device *phydev); 1165 int __phy_resume(struct phy_device *phydev); 1166 int phy_loopback(struct phy_device *phydev, bool enable); 1167 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1168 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1169 int phy_sfp_probe(struct phy_device *phydev, 1170 const struct sfp_upstream_ops *ops); 1171 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1172 phy_interface_t interface); 1173 struct phy_device *phy_find_first(struct mii_bus *bus); 1174 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1175 u32 flags, phy_interface_t interface); 1176 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1177 void (*handler)(struct net_device *), 1178 phy_interface_t interface); 1179 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1180 void (*handler)(struct net_device *), 1181 phy_interface_t interface); 1182 void phy_disconnect(struct phy_device *phydev); 1183 void phy_detach(struct phy_device *phydev); 1184 void phy_start(struct phy_device *phydev); 1185 void phy_stop(struct phy_device *phydev); 1186 int phy_start_aneg(struct phy_device *phydev); 1187 int phy_aneg_done(struct phy_device *phydev); 1188 int phy_speed_down(struct phy_device *phydev, bool sync); 1189 int phy_speed_up(struct phy_device *phydev); 1190 1191 int phy_restart_aneg(struct phy_device *phydev); 1192 int phy_reset_after_clk_enable(struct phy_device *phydev); 1193 1194 static inline void phy_device_reset(struct phy_device *phydev, int value) 1195 { 1196 mdio_device_reset(&phydev->mdio, value); 1197 } 1198 1199 #define phydev_err(_phydev, format, args...) \ 1200 dev_err(&_phydev->mdio.dev, format, ##args) 1201 1202 #define phydev_info(_phydev, format, args...) \ 1203 dev_info(&_phydev->mdio.dev, format, ##args) 1204 1205 #define phydev_warn(_phydev, format, args...) \ 1206 dev_warn(&_phydev->mdio.dev, format, ##args) 1207 1208 #define phydev_dbg(_phydev, format, args...) \ 1209 dev_dbg(&_phydev->mdio.dev, format, ##args) 1210 1211 static inline const char *phydev_name(const struct phy_device *phydev) 1212 { 1213 return dev_name(&phydev->mdio.dev); 1214 } 1215 1216 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1217 { 1218 mutex_lock(&phydev->mdio.bus->mdio_lock); 1219 } 1220 1221 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1222 { 1223 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1224 } 1225 1226 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1227 __printf(2, 3); 1228 char *phy_attached_info_irq(struct phy_device *phydev) 1229 __malloc; 1230 void phy_attached_info(struct phy_device *phydev); 1231 1232 /* Clause 22 PHY */ 1233 int genphy_read_abilities(struct phy_device *phydev); 1234 int genphy_setup_forced(struct phy_device *phydev); 1235 int genphy_restart_aneg(struct phy_device *phydev); 1236 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1237 int genphy_config_eee_advert(struct phy_device *phydev); 1238 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1239 int genphy_aneg_done(struct phy_device *phydev); 1240 int genphy_update_link(struct phy_device *phydev); 1241 int genphy_read_lpa(struct phy_device *phydev); 1242 int genphy_read_status_fixed(struct phy_device *phydev); 1243 int genphy_read_status(struct phy_device *phydev); 1244 int genphy_suspend(struct phy_device *phydev); 1245 int genphy_resume(struct phy_device *phydev); 1246 int genphy_loopback(struct phy_device *phydev, bool enable); 1247 int genphy_soft_reset(struct phy_device *phydev); 1248 1249 static inline int genphy_config_aneg(struct phy_device *phydev) 1250 { 1251 return __genphy_config_aneg(phydev, false); 1252 } 1253 1254 static inline int genphy_no_ack_interrupt(struct phy_device *phydev) 1255 { 1256 return 0; 1257 } 1258 static inline int genphy_no_config_intr(struct phy_device *phydev) 1259 { 1260 return 0; 1261 } 1262 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1263 u16 regnum); 1264 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1265 u16 regnum, u16 val); 1266 1267 /* Clause 37 */ 1268 int genphy_c37_config_aneg(struct phy_device *phydev); 1269 int genphy_c37_read_status(struct phy_device *phydev); 1270 1271 /* Clause 45 PHY */ 1272 int genphy_c45_restart_aneg(struct phy_device *phydev); 1273 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1274 int genphy_c45_aneg_done(struct phy_device *phydev); 1275 int genphy_c45_read_link(struct phy_device *phydev); 1276 int genphy_c45_read_lpa(struct phy_device *phydev); 1277 int genphy_c45_read_pma(struct phy_device *phydev); 1278 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1279 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1280 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1281 int genphy_c45_read_mdix(struct phy_device *phydev); 1282 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1283 int genphy_c45_read_status(struct phy_device *phydev); 1284 int genphy_c45_config_aneg(struct phy_device *phydev); 1285 1286 /* The gen10g_* functions are the old Clause 45 stub */ 1287 int gen10g_config_aneg(struct phy_device *phydev); 1288 1289 static inline int phy_read_status(struct phy_device *phydev) 1290 { 1291 if (!phydev->drv) 1292 return -EIO; 1293 1294 if (phydev->drv->read_status) 1295 return phydev->drv->read_status(phydev); 1296 else 1297 return genphy_read_status(phydev); 1298 } 1299 1300 void phy_driver_unregister(struct phy_driver *drv); 1301 void phy_drivers_unregister(struct phy_driver *drv, int n); 1302 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1303 int phy_drivers_register(struct phy_driver *new_driver, int n, 1304 struct module *owner); 1305 void phy_state_machine(struct work_struct *work); 1306 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1307 void phy_mac_interrupt(struct phy_device *phydev); 1308 void phy_start_machine(struct phy_device *phydev); 1309 void phy_stop_machine(struct phy_device *phydev); 1310 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1311 struct ethtool_link_ksettings *cmd); 1312 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1313 const struct ethtool_link_ksettings *cmd); 1314 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1315 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1316 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1317 void phy_request_interrupt(struct phy_device *phydev); 1318 void phy_free_interrupt(struct phy_device *phydev); 1319 void phy_print_status(struct phy_device *phydev); 1320 int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1321 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1322 void phy_advertise_supported(struct phy_device *phydev); 1323 void phy_support_sym_pause(struct phy_device *phydev); 1324 void phy_support_asym_pause(struct phy_device *phydev); 1325 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1326 bool autoneg); 1327 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1328 bool phy_validate_pause(struct phy_device *phydev, 1329 struct ethtool_pauseparam *pp); 1330 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1331 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1332 bool *tx_pause, bool *rx_pause); 1333 1334 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1335 int (*run)(struct phy_device *)); 1336 int phy_register_fixup_for_id(const char *bus_id, 1337 int (*run)(struct phy_device *)); 1338 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1339 int (*run)(struct phy_device *)); 1340 1341 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1342 int phy_unregister_fixup_for_id(const char *bus_id); 1343 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1344 1345 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1346 int phy_get_eee_err(struct phy_device *phydev); 1347 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1348 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1349 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1350 void phy_ethtool_get_wol(struct phy_device *phydev, 1351 struct ethtool_wolinfo *wol); 1352 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1353 struct ethtool_link_ksettings *cmd); 1354 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1355 const struct ethtool_link_ksettings *cmd); 1356 int phy_ethtool_nway_reset(struct net_device *ndev); 1357 1358 #if IS_ENABLED(CONFIG_PHYLIB) 1359 int __init mdio_bus_init(void); 1360 void mdio_bus_exit(void); 1361 #endif 1362 1363 /* Inline function for use within net/core/ethtool.c (built-in) */ 1364 static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data) 1365 { 1366 if (!phydev->drv) 1367 return -EIO; 1368 1369 mutex_lock(&phydev->lock); 1370 phydev->drv->get_strings(phydev, data); 1371 mutex_unlock(&phydev->lock); 1372 1373 return 0; 1374 } 1375 1376 static inline int phy_ethtool_get_sset_count(struct phy_device *phydev) 1377 { 1378 int ret; 1379 1380 if (!phydev->drv) 1381 return -EIO; 1382 1383 if (phydev->drv->get_sset_count && 1384 phydev->drv->get_strings && 1385 phydev->drv->get_stats) { 1386 mutex_lock(&phydev->lock); 1387 ret = phydev->drv->get_sset_count(phydev); 1388 mutex_unlock(&phydev->lock); 1389 1390 return ret; 1391 } 1392 1393 return -EOPNOTSUPP; 1394 } 1395 1396 static inline int phy_ethtool_get_stats(struct phy_device *phydev, 1397 struct ethtool_stats *stats, u64 *data) 1398 { 1399 if (!phydev->drv) 1400 return -EIO; 1401 1402 mutex_lock(&phydev->lock); 1403 phydev->drv->get_stats(phydev, stats, data); 1404 mutex_unlock(&phydev->lock); 1405 1406 return 0; 1407 } 1408 1409 extern struct bus_type mdio_bus_type; 1410 1411 struct mdio_board_info { 1412 const char *bus_id; 1413 char modalias[MDIO_NAME_SIZE]; 1414 int mdio_addr; 1415 const void *platform_data; 1416 }; 1417 1418 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1419 int mdiobus_register_board_info(const struct mdio_board_info *info, 1420 unsigned int n); 1421 #else 1422 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1423 unsigned int n) 1424 { 1425 return 0; 1426 } 1427 #endif 1428 1429 1430 /** 1431 * module_phy_driver() - Helper macro for registering PHY drivers 1432 * @__phy_drivers: array of PHY drivers to register 1433 * 1434 * Helper macro for PHY drivers which do not do anything special in module 1435 * init/exit. Each module may only use this macro once, and calling it 1436 * replaces module_init() and module_exit(). 1437 */ 1438 #define phy_module_driver(__phy_drivers, __count) \ 1439 static int __init phy_module_init(void) \ 1440 { \ 1441 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 1442 } \ 1443 module_init(phy_module_init); \ 1444 static void __exit phy_module_exit(void) \ 1445 { \ 1446 phy_drivers_unregister(__phy_drivers, __count); \ 1447 } \ 1448 module_exit(phy_module_exit) 1449 1450 #define module_phy_driver(__phy_drivers) \ 1451 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 1452 1453 bool phy_driver_is_genphy(struct phy_device *phydev); 1454 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 1455 1456 #endif /* __PHY_H */ 1457