1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/linkmode.h> 18 #include <linux/mdio.h> 19 #include <linux/mii.h> 20 #include <linux/module.h> 21 #include <linux/timer.h> 22 #include <linux/workqueue.h> 23 #include <linux/mod_devicetable.h> 24 25 #include <linux/atomic.h> 26 27 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 28 SUPPORTED_TP | \ 29 SUPPORTED_MII) 30 31 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 32 SUPPORTED_10baseT_Full) 33 34 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 35 SUPPORTED_100baseT_Full) 36 37 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 38 SUPPORTED_1000baseT_Full) 39 40 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 41 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 42 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 43 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 44 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 45 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 48 49 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 50 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 51 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 52 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 53 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 54 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 55 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 56 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 57 58 extern const int phy_basic_ports_array[3]; 59 extern const int phy_fibre_port_array[1]; 60 extern const int phy_all_ports_features_array[7]; 61 extern const int phy_10_100_features_array[4]; 62 extern const int phy_basic_t1_features_array[2]; 63 extern const int phy_gbit_features_array[2]; 64 extern const int phy_10gbit_features_array[1]; 65 66 /* 67 * Set phydev->irq to PHY_POLL if interrupts are not supported, 68 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if 69 * the attached driver handles the interrupt 70 */ 71 #define PHY_POLL -1 72 #define PHY_IGNORE_INTERRUPT -2 73 74 #define PHY_IS_INTERNAL 0x00000001 75 #define PHY_RST_AFTER_CLK_EN 0x00000002 76 #define MDIO_DEVICE_IS_PHY 0x80000000 77 78 /* Interface Mode definitions */ 79 typedef enum { 80 PHY_INTERFACE_MODE_NA, 81 PHY_INTERFACE_MODE_INTERNAL, 82 PHY_INTERFACE_MODE_MII, 83 PHY_INTERFACE_MODE_GMII, 84 PHY_INTERFACE_MODE_SGMII, 85 PHY_INTERFACE_MODE_TBI, 86 PHY_INTERFACE_MODE_REVMII, 87 PHY_INTERFACE_MODE_RMII, 88 PHY_INTERFACE_MODE_RGMII, 89 PHY_INTERFACE_MODE_RGMII_ID, 90 PHY_INTERFACE_MODE_RGMII_RXID, 91 PHY_INTERFACE_MODE_RGMII_TXID, 92 PHY_INTERFACE_MODE_RTBI, 93 PHY_INTERFACE_MODE_SMII, 94 PHY_INTERFACE_MODE_XGMII, 95 PHY_INTERFACE_MODE_MOCA, 96 PHY_INTERFACE_MODE_QSGMII, 97 PHY_INTERFACE_MODE_TRGMII, 98 PHY_INTERFACE_MODE_1000BASEX, 99 PHY_INTERFACE_MODE_2500BASEX, 100 PHY_INTERFACE_MODE_RXAUI, 101 PHY_INTERFACE_MODE_XAUI, 102 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */ 103 PHY_INTERFACE_MODE_10GKR, 104 PHY_INTERFACE_MODE_USXGMII, 105 PHY_INTERFACE_MODE_MAX, 106 } phy_interface_t; 107 108 /** 109 * phy_supported_speeds - return all speeds currently supported by a phy device 110 * @phy: The phy device to return supported speeds of. 111 * @speeds: buffer to store supported speeds in. 112 * @size: size of speeds buffer. 113 * 114 * Description: Returns the number of supported speeds, and fills 115 * the speeds buffer with the supported speeds. If speeds buffer is 116 * too small to contain all currently supported speeds, will return as 117 * many speeds as can fit. 118 */ 119 unsigned int phy_supported_speeds(struct phy_device *phy, 120 unsigned int *speeds, 121 unsigned int size); 122 123 /** 124 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 125 * @interface: enum phy_interface_t value 126 * 127 * Description: maps 'enum phy_interface_t' defined in this file 128 * into the device tree binding of 'phy-mode', so that Ethernet 129 * device driver can get phy interface from device tree. 130 */ 131 static inline const char *phy_modes(phy_interface_t interface) 132 { 133 switch (interface) { 134 case PHY_INTERFACE_MODE_NA: 135 return ""; 136 case PHY_INTERFACE_MODE_INTERNAL: 137 return "internal"; 138 case PHY_INTERFACE_MODE_MII: 139 return "mii"; 140 case PHY_INTERFACE_MODE_GMII: 141 return "gmii"; 142 case PHY_INTERFACE_MODE_SGMII: 143 return "sgmii"; 144 case PHY_INTERFACE_MODE_TBI: 145 return "tbi"; 146 case PHY_INTERFACE_MODE_REVMII: 147 return "rev-mii"; 148 case PHY_INTERFACE_MODE_RMII: 149 return "rmii"; 150 case PHY_INTERFACE_MODE_RGMII: 151 return "rgmii"; 152 case PHY_INTERFACE_MODE_RGMII_ID: 153 return "rgmii-id"; 154 case PHY_INTERFACE_MODE_RGMII_RXID: 155 return "rgmii-rxid"; 156 case PHY_INTERFACE_MODE_RGMII_TXID: 157 return "rgmii-txid"; 158 case PHY_INTERFACE_MODE_RTBI: 159 return "rtbi"; 160 case PHY_INTERFACE_MODE_SMII: 161 return "smii"; 162 case PHY_INTERFACE_MODE_XGMII: 163 return "xgmii"; 164 case PHY_INTERFACE_MODE_MOCA: 165 return "moca"; 166 case PHY_INTERFACE_MODE_QSGMII: 167 return "qsgmii"; 168 case PHY_INTERFACE_MODE_TRGMII: 169 return "trgmii"; 170 case PHY_INTERFACE_MODE_1000BASEX: 171 return "1000base-x"; 172 case PHY_INTERFACE_MODE_2500BASEX: 173 return "2500base-x"; 174 case PHY_INTERFACE_MODE_RXAUI: 175 return "rxaui"; 176 case PHY_INTERFACE_MODE_XAUI: 177 return "xaui"; 178 case PHY_INTERFACE_MODE_10GKR: 179 return "10gbase-kr"; 180 case PHY_INTERFACE_MODE_USXGMII: 181 return "usxgmii"; 182 default: 183 return "unknown"; 184 } 185 } 186 187 188 #define PHY_INIT_TIMEOUT 100000 189 #define PHY_FORCE_TIMEOUT 10 190 191 #define PHY_MAX_ADDR 32 192 193 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 194 #define PHY_ID_FMT "%s:%02x" 195 196 #define MII_BUS_ID_SIZE 61 197 198 /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit 199 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */ 200 #define MII_ADDR_C45 (1<<30) 201 #define MII_DEVADDR_C45_SHIFT 16 202 #define MII_REGADDR_C45_MASK GENMASK(15, 0) 203 204 struct device; 205 struct phylink; 206 struct sk_buff; 207 208 /* 209 * The Bus class for PHYs. Devices which provide access to 210 * PHYs should register using this structure 211 */ 212 struct mii_bus { 213 struct module *owner; 214 const char *name; 215 char id[MII_BUS_ID_SIZE]; 216 void *priv; 217 int (*read)(struct mii_bus *bus, int addr, int regnum); 218 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 219 int (*reset)(struct mii_bus *bus); 220 221 /* 222 * A lock to ensure that only one thing can read/write 223 * the MDIO bus at a time 224 */ 225 struct mutex mdio_lock; 226 227 struct device *parent; 228 enum { 229 MDIOBUS_ALLOCATED = 1, 230 MDIOBUS_REGISTERED, 231 MDIOBUS_UNREGISTERED, 232 MDIOBUS_RELEASED, 233 } state; 234 struct device dev; 235 236 /* list of all PHYs on bus */ 237 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 238 239 /* PHY addresses to be ignored when probing */ 240 u32 phy_mask; 241 242 /* PHY addresses to ignore the TA/read failure */ 243 u32 phy_ignore_ta_mask; 244 245 /* 246 * An array of interrupts, each PHY's interrupt at the index 247 * matching its address 248 */ 249 int irq[PHY_MAX_ADDR]; 250 251 /* GPIO reset pulse width in microseconds */ 252 int reset_delay_us; 253 /* RESET GPIO descriptor pointer */ 254 struct gpio_desc *reset_gpiod; 255 }; 256 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 257 258 struct mii_bus *mdiobus_alloc_size(size_t); 259 static inline struct mii_bus *mdiobus_alloc(void) 260 { 261 return mdiobus_alloc_size(0); 262 } 263 264 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 265 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 266 void mdiobus_unregister(struct mii_bus *bus); 267 void mdiobus_free(struct mii_bus *bus); 268 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 269 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 270 { 271 return devm_mdiobus_alloc_size(dev, 0); 272 } 273 274 void devm_mdiobus_free(struct device *dev, struct mii_bus *bus); 275 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); 276 277 #define PHY_INTERRUPT_DISABLED false 278 #define PHY_INTERRUPT_ENABLED true 279 280 /* PHY state machine states: 281 * 282 * DOWN: PHY device and driver are not ready for anything. probe 283 * should be called if and only if the PHY is in this state, 284 * given that the PHY device exists. 285 * - PHY driver probe function will set the state to READY 286 * 287 * READY: PHY is ready to send and receive packets, but the 288 * controller is not. By default, PHYs which do not implement 289 * probe will be set to this state by phy_probe(). 290 * - start will set the state to UP 291 * 292 * UP: The PHY and attached device are ready to do work. 293 * Interrupts should be started here. 294 * - timer moves to NOLINK or RUNNING 295 * 296 * NOLINK: PHY is up, but not currently plugged in. 297 * - irq or timer will set RUNNING if link comes back 298 * - phy_stop moves to HALTED 299 * 300 * RUNNING: PHY is currently up, running, and possibly sending 301 * and/or receiving packets 302 * - irq or timer will set NOLINK if link goes down 303 * - phy_stop moves to HALTED 304 * 305 * HALTED: PHY is up, but no polling or interrupts are done. Or 306 * PHY is in an error state. 307 * - phy_start moves to UP 308 */ 309 enum phy_state { 310 PHY_DOWN = 0, 311 PHY_READY, 312 PHY_HALTED, 313 PHY_UP, 314 PHY_RUNNING, 315 PHY_NOLINK, 316 }; 317 318 /** 319 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 320 * @devices_in_package: Bit vector of devices present. 321 * @device_ids: The device identifer for each present device. 322 */ 323 struct phy_c45_device_ids { 324 u32 devices_in_package; 325 u32 device_ids[8]; 326 }; 327 328 /* phy_device: An instance of a PHY 329 * 330 * drv: Pointer to the driver for this PHY instance 331 * phy_id: UID for this device found during discovery 332 * c45_ids: 802.3-c45 Device Identifers if is_c45. 333 * is_c45: Set to true if this phy uses clause 45 addressing. 334 * is_internal: Set to true if this phy is internal to a MAC. 335 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc. 336 * is_gigabit_capable: Set to true if PHY supports 1000Mbps 337 * has_fixups: Set to true if this phy has fixups/quirks. 338 * suspended: Set to true if this phy has been suspended successfully. 339 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 340 * loopback_enabled: Set true if this phy has been loopbacked successfully. 341 * state: state of the PHY for management purposes 342 * dev_flags: Device-specific flags used by the PHY driver. 343 * irq: IRQ number of the PHY's interrupt (-1 if none) 344 * phy_timer: The timer for handling the state machine 345 * attached_dev: The attached enet driver's device instance ptr 346 * adjust_link: Callback for the enet controller to respond to 347 * changes in the link state. 348 * 349 * speed, duplex, pause, supported, advertising, lp_advertising, 350 * and autoneg are used like in mii_if_info 351 * 352 * interrupts currently only supports enabled or disabled, 353 * but could be changed in the future to support enabling 354 * and disabling specific interrupts 355 * 356 * Contains some infrastructure for polling and interrupt 357 * handling, as well as handling shifts in PHY hardware state 358 */ 359 struct phy_device { 360 struct mdio_device mdio; 361 362 /* Information about the PHY type */ 363 /* And management functions */ 364 struct phy_driver *drv; 365 366 u32 phy_id; 367 368 struct phy_c45_device_ids c45_ids; 369 unsigned is_c45:1; 370 unsigned is_internal:1; 371 unsigned is_pseudo_fixed_link:1; 372 unsigned is_gigabit_capable:1; 373 unsigned has_fixups:1; 374 unsigned suspended:1; 375 unsigned sysfs_links:1; 376 unsigned loopback_enabled:1; 377 378 unsigned autoneg:1; 379 /* The most recently read link state */ 380 unsigned link:1; 381 unsigned autoneg_complete:1; 382 383 /* Interrupts are enabled */ 384 unsigned interrupts:1; 385 386 enum phy_state state; 387 388 u32 dev_flags; 389 390 phy_interface_t interface; 391 392 /* 393 * forced speed & duplex (no autoneg) 394 * partner speed & duplex & pause (autoneg) 395 */ 396 int speed; 397 int duplex; 398 int pause; 399 int asym_pause; 400 401 /* Union of PHY and Attached devices' supported link modes */ 402 /* See ethtool.h for more info */ 403 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 404 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 405 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 406 407 /* Energy efficient ethernet modes which should be prohibited */ 408 u32 eee_broken_modes; 409 410 #ifdef CONFIG_LED_TRIGGER_PHY 411 struct phy_led_trigger *phy_led_triggers; 412 unsigned int phy_num_led_triggers; 413 struct phy_led_trigger *last_triggered; 414 415 struct phy_led_trigger *led_link_trigger; 416 #endif 417 418 /* 419 * Interrupt number for this PHY 420 * -1 means no interrupt 421 */ 422 int irq; 423 424 /* private data pointer */ 425 /* For use by PHYs to maintain extra state */ 426 void *priv; 427 428 /* Interrupt and Polling infrastructure */ 429 struct delayed_work state_queue; 430 431 struct mutex lock; 432 433 struct phylink *phylink; 434 struct net_device *attached_dev; 435 436 u8 mdix; 437 u8 mdix_ctrl; 438 439 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier); 440 void (*adjust_link)(struct net_device *dev); 441 }; 442 #define to_phy_device(d) container_of(to_mdio_device(d), \ 443 struct phy_device, mdio) 444 445 /* struct phy_driver: Driver structure for a particular PHY type 446 * 447 * driver_data: static driver data 448 * phy_id: The result of reading the UID registers of this PHY 449 * type, and ANDing them with the phy_id_mask. This driver 450 * only works for PHYs with IDs which match this field 451 * name: The friendly name of this PHY type 452 * phy_id_mask: Defines the important bits of the phy_id 453 * features: A mandatory list of features (speed, duplex, etc) 454 * supported by this PHY 455 * flags: A bitfield defining certain other features this PHY 456 * supports (like interrupts) 457 * 458 * All functions are optional. If config_aneg or read_status 459 * are not implemented, the phy core uses the genphy versions. 460 * Note that none of these functions should be called from 461 * interrupt time. The goal is for the bus read/write functions 462 * to be able to block when the bus transaction is happening, 463 * and be freed up by an interrupt (The MPC85xx has this ability, 464 * though it is not currently supported in the driver). 465 */ 466 struct phy_driver { 467 struct mdio_driver_common mdiodrv; 468 u32 phy_id; 469 char *name; 470 u32 phy_id_mask; 471 const unsigned long * const features; 472 u32 flags; 473 const void *driver_data; 474 475 /* 476 * Called to issue a PHY software reset 477 */ 478 int (*soft_reset)(struct phy_device *phydev); 479 480 /* 481 * Called to initialize the PHY, 482 * including after a reset 483 */ 484 int (*config_init)(struct phy_device *phydev); 485 486 /* 487 * Called during discovery. Used to set 488 * up device-specific structures, if any 489 */ 490 int (*probe)(struct phy_device *phydev); 491 492 /* 493 * Probe the hardware to determine what abilities it has. 494 * Should only set phydev->supported. 495 */ 496 int (*get_features)(struct phy_device *phydev); 497 498 /* PHY Power Management */ 499 int (*suspend)(struct phy_device *phydev); 500 int (*resume)(struct phy_device *phydev); 501 502 /* 503 * Configures the advertisement and resets 504 * autonegotiation if phydev->autoneg is on, 505 * forces the speed to the current settings in phydev 506 * if phydev->autoneg is off 507 */ 508 int (*config_aneg)(struct phy_device *phydev); 509 510 /* Determines the auto negotiation result */ 511 int (*aneg_done)(struct phy_device *phydev); 512 513 /* Determines the negotiated speed and duplex */ 514 int (*read_status)(struct phy_device *phydev); 515 516 /* Clears any pending interrupts */ 517 int (*ack_interrupt)(struct phy_device *phydev); 518 519 /* Enables or disables interrupts */ 520 int (*config_intr)(struct phy_device *phydev); 521 522 /* 523 * Checks if the PHY generated an interrupt. 524 * For multi-PHY devices with shared PHY interrupt pin 525 */ 526 int (*did_interrupt)(struct phy_device *phydev); 527 528 /* Override default interrupt handling */ 529 int (*handle_interrupt)(struct phy_device *phydev); 530 531 /* Clears up any memory if needed */ 532 void (*remove)(struct phy_device *phydev); 533 534 /* Returns true if this is a suitable driver for the given 535 * phydev. If NULL, matching is based on phy_id and 536 * phy_id_mask. 537 */ 538 int (*match_phy_device)(struct phy_device *phydev); 539 540 /* Handles ethtool queries for hardware time stamping. */ 541 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti); 542 543 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */ 544 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr); 545 546 /* 547 * Requests a Rx timestamp for 'skb'. If the skb is accepted, 548 * the phy driver promises to deliver it using netif_rx() as 549 * soon as a timestamp becomes available. One of the 550 * PTP_CLASS_ values is passed in 'type'. The function must 551 * return true if the skb is accepted for delivery. 552 */ 553 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); 554 555 /* 556 * Requests a Tx timestamp for 'skb'. The phy driver promises 557 * to deliver it using skb_complete_tx_timestamp() as soon as a 558 * timestamp becomes available. One of the PTP_CLASS_ values 559 * is passed in 'type'. 560 */ 561 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); 562 563 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to 564 * enable Wake on LAN, so set_wol is provided to be called in the 565 * ethernet driver's set_wol function. */ 566 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 567 568 /* See set_wol, but for checking whether Wake on LAN is enabled. */ 569 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 570 571 /* 572 * Called to inform a PHY device driver when the core is about to 573 * change the link state. This callback is supposed to be used as 574 * fixup hook for drivers that need to take action when the link 575 * state changes. Drivers are by no means allowed to mess with the 576 * PHY device structure in their implementations. 577 */ 578 void (*link_change_notify)(struct phy_device *dev); 579 580 /* 581 * Phy specific driver override for reading a MMD register. 582 * This function is optional for PHY specific drivers. When 583 * not provided, the default MMD read function will be used 584 * by phy_read_mmd(), which will use either a direct read for 585 * Clause 45 PHYs or an indirect read for Clause 22 PHYs. 586 * devnum is the MMD device number within the PHY device, 587 * regnum is the register within the selected MMD device. 588 */ 589 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 590 591 /* 592 * Phy specific driver override for writing a MMD register. 593 * This function is optional for PHY specific drivers. When 594 * not provided, the default MMD write function will be used 595 * by phy_write_mmd(), which will use either a direct write for 596 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs. 597 * devnum is the MMD device number within the PHY device, 598 * regnum is the register within the selected MMD device. 599 * val is the value to be written. 600 */ 601 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 602 u16 val); 603 604 int (*read_page)(struct phy_device *dev); 605 int (*write_page)(struct phy_device *dev, int page); 606 607 /* Get the size and type of the eeprom contained within a plug-in 608 * module */ 609 int (*module_info)(struct phy_device *dev, 610 struct ethtool_modinfo *modinfo); 611 612 /* Get the eeprom information from the plug-in module */ 613 int (*module_eeprom)(struct phy_device *dev, 614 struct ethtool_eeprom *ee, u8 *data); 615 616 /* Get statistics from the phy using ethtool */ 617 int (*get_sset_count)(struct phy_device *dev); 618 void (*get_strings)(struct phy_device *dev, u8 *data); 619 void (*get_stats)(struct phy_device *dev, 620 struct ethtool_stats *stats, u64 *data); 621 622 /* Get and Set PHY tunables */ 623 int (*get_tunable)(struct phy_device *dev, 624 struct ethtool_tunable *tuna, void *data); 625 int (*set_tunable)(struct phy_device *dev, 626 struct ethtool_tunable *tuna, 627 const void *data); 628 int (*set_loopback)(struct phy_device *dev, bool enable); 629 }; 630 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 631 struct phy_driver, mdiodrv) 632 633 #define PHY_ANY_ID "MATCH ANY PHY" 634 #define PHY_ANY_UID 0xffffffff 635 636 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 637 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 638 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 639 640 /* A Structure for boards to register fixups with the PHY Lib */ 641 struct phy_fixup { 642 struct list_head list; 643 char bus_id[MII_BUS_ID_SIZE + 3]; 644 u32 phy_uid; 645 u32 phy_uid_mask; 646 int (*run)(struct phy_device *phydev); 647 }; 648 649 const char *phy_speed_to_str(int speed); 650 const char *phy_duplex_to_str(unsigned int duplex); 651 652 /* A structure for mapping a particular speed and duplex 653 * combination to a particular SUPPORTED and ADVERTISED value 654 */ 655 struct phy_setting { 656 u32 speed; 657 u8 duplex; 658 u8 bit; 659 }; 660 661 const struct phy_setting * 662 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 663 bool exact); 664 size_t phy_speeds(unsigned int *speeds, size_t size, 665 unsigned long *mask); 666 void of_set_phy_supported(struct phy_device *phydev); 667 void of_set_phy_eee_broken(struct phy_device *phydev); 668 669 /** 670 * phy_is_started - Convenience function to check whether PHY is started 671 * @phydev: The phy_device struct 672 */ 673 static inline bool phy_is_started(struct phy_device *phydev) 674 { 675 return phydev->state >= PHY_UP; 676 } 677 678 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 679 680 /** 681 * phy_read - Convenience function for reading a given PHY register 682 * @phydev: the phy_device struct 683 * @regnum: register number to read 684 * 685 * NOTE: MUST NOT be called from interrupt context, 686 * because the bus read/write functions may wait for an interrupt 687 * to conclude the operation. 688 */ 689 static inline int phy_read(struct phy_device *phydev, u32 regnum) 690 { 691 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 692 } 693 694 /** 695 * __phy_read - convenience function for reading a given PHY register 696 * @phydev: the phy_device struct 697 * @regnum: register number to read 698 * 699 * The caller must have taken the MDIO bus lock. 700 */ 701 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 702 { 703 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 704 } 705 706 /** 707 * phy_write - Convenience function for writing a given PHY register 708 * @phydev: the phy_device struct 709 * @regnum: register number to write 710 * @val: value to write to @regnum 711 * 712 * NOTE: MUST NOT be called from interrupt context, 713 * because the bus read/write functions may wait for an interrupt 714 * to conclude the operation. 715 */ 716 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 717 { 718 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 719 } 720 721 /** 722 * __phy_write - Convenience function for writing a given PHY register 723 * @phydev: the phy_device struct 724 * @regnum: register number to write 725 * @val: value to write to @regnum 726 * 727 * The caller must have taken the MDIO bus lock. 728 */ 729 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 730 { 731 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 732 val); 733 } 734 735 /** 736 * phy_read_mmd - Convenience function for reading a register 737 * from an MMD on a given PHY. 738 * @phydev: The phy_device struct 739 * @devad: The MMD to read from 740 * @regnum: The register on the MMD to read 741 * 742 * Same rules as for phy_read(); 743 */ 744 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 745 746 /** 747 * __phy_read_mmd - Convenience function for reading a register 748 * from an MMD on a given PHY. 749 * @phydev: The phy_device struct 750 * @devad: The MMD to read from 751 * @regnum: The register on the MMD to read 752 * 753 * Same rules as for __phy_read(); 754 */ 755 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 756 757 /** 758 * phy_write_mmd - Convenience function for writing a register 759 * on an MMD on a given PHY. 760 * @phydev: The phy_device struct 761 * @devad: The MMD to write to 762 * @regnum: The register on the MMD to read 763 * @val: value to write to @regnum 764 * 765 * Same rules as for phy_write(); 766 */ 767 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 768 769 /** 770 * __phy_write_mmd - Convenience function for writing a register 771 * on an MMD on a given PHY. 772 * @phydev: The phy_device struct 773 * @devad: The MMD to write to 774 * @regnum: The register on the MMD to read 775 * @val: value to write to @regnum 776 * 777 * Same rules as for __phy_write(); 778 */ 779 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 780 781 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 782 u16 set); 783 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 784 u16 set); 785 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 786 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 787 788 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 789 u16 mask, u16 set); 790 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 791 u16 mask, u16 set); 792 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 793 u16 mask, u16 set); 794 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 795 u16 mask, u16 set); 796 797 /** 798 * __phy_set_bits - Convenience function for setting bits in a PHY register 799 * @phydev: the phy_device struct 800 * @regnum: register number to write 801 * @val: bits to set 802 * 803 * The caller must have taken the MDIO bus lock. 804 */ 805 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 806 { 807 return __phy_modify(phydev, regnum, 0, val); 808 } 809 810 /** 811 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 812 * @phydev: the phy_device struct 813 * @regnum: register number to write 814 * @val: bits to clear 815 * 816 * The caller must have taken the MDIO bus lock. 817 */ 818 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 819 u16 val) 820 { 821 return __phy_modify(phydev, regnum, val, 0); 822 } 823 824 /** 825 * phy_set_bits - Convenience function for setting bits in a PHY register 826 * @phydev: the phy_device struct 827 * @regnum: register number to write 828 * @val: bits to set 829 */ 830 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 831 { 832 return phy_modify(phydev, regnum, 0, val); 833 } 834 835 /** 836 * phy_clear_bits - Convenience function for clearing bits in a PHY register 837 * @phydev: the phy_device struct 838 * @regnum: register number to write 839 * @val: bits to clear 840 */ 841 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 842 { 843 return phy_modify(phydev, regnum, val, 0); 844 } 845 846 /** 847 * __phy_set_bits_mmd - Convenience function for setting bits in a register 848 * on MMD 849 * @phydev: the phy_device struct 850 * @devad: the MMD containing register to modify 851 * @regnum: register number to modify 852 * @val: bits to set 853 * 854 * The caller must have taken the MDIO bus lock. 855 */ 856 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 857 u32 regnum, u16 val) 858 { 859 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 860 } 861 862 /** 863 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 864 * on MMD 865 * @phydev: the phy_device struct 866 * @devad: the MMD containing register to modify 867 * @regnum: register number to modify 868 * @val: bits to clear 869 * 870 * The caller must have taken the MDIO bus lock. 871 */ 872 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 873 u32 regnum, u16 val) 874 { 875 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 876 } 877 878 /** 879 * phy_set_bits_mmd - Convenience function for setting bits in a register 880 * on MMD 881 * @phydev: the phy_device struct 882 * @devad: the MMD containing register to modify 883 * @regnum: register number to modify 884 * @val: bits to set 885 */ 886 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 887 u32 regnum, u16 val) 888 { 889 return phy_modify_mmd(phydev, devad, regnum, 0, val); 890 } 891 892 /** 893 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 894 * on MMD 895 * @phydev: the phy_device struct 896 * @devad: the MMD containing register to modify 897 * @regnum: register number to modify 898 * @val: bits to clear 899 */ 900 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 901 u32 regnum, u16 val) 902 { 903 return phy_modify_mmd(phydev, devad, regnum, val, 0); 904 } 905 906 /** 907 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 908 * @phydev: the phy_device struct 909 * 910 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 911 * PHY_IGNORE_INTERRUPT 912 */ 913 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 914 { 915 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT; 916 } 917 918 /** 919 * phy_polling_mode - Convenience function for testing whether polling is 920 * used to detect PHY status changes 921 * @phydev: the phy_device struct 922 */ 923 static inline bool phy_polling_mode(struct phy_device *phydev) 924 { 925 return phydev->irq == PHY_POLL; 926 } 927 928 /** 929 * phy_is_internal - Convenience function for testing if a PHY is internal 930 * @phydev: the phy_device struct 931 */ 932 static inline bool phy_is_internal(struct phy_device *phydev) 933 { 934 return phydev->is_internal; 935 } 936 937 /** 938 * phy_interface_mode_is_rgmii - Convenience function for testing if a 939 * PHY interface mode is RGMII (all variants) 940 * @mode: the phy_interface_t enum 941 */ 942 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 943 { 944 return mode >= PHY_INTERFACE_MODE_RGMII && 945 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 946 }; 947 948 /** 949 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z 950 * negotiation 951 * @mode: one of &enum phy_interface_t 952 * 953 * Returns true if the phy interface mode uses the 16-bit negotiation 954 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 955 */ 956 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 957 { 958 return mode == PHY_INTERFACE_MODE_1000BASEX || 959 mode == PHY_INTERFACE_MODE_2500BASEX; 960 } 961 962 /** 963 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 964 * is RGMII (all variants) 965 * @phydev: the phy_device struct 966 */ 967 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 968 { 969 return phy_interface_mode_is_rgmii(phydev->interface); 970 }; 971 972 /* 973 * phy_is_pseudo_fixed_link - Convenience function for testing if this 974 * PHY is the CPU port facing side of an Ethernet switch, or similar. 975 * @phydev: the phy_device struct 976 */ 977 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 978 { 979 return phydev->is_pseudo_fixed_link; 980 } 981 982 int phy_save_page(struct phy_device *phydev); 983 int phy_select_page(struct phy_device *phydev, int page); 984 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 985 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 986 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 987 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 988 u16 mask, u16 set); 989 990 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id, 991 bool is_c45, 992 struct phy_c45_device_ids *c45_ids); 993 #if IS_ENABLED(CONFIG_PHYLIB) 994 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 995 int phy_device_register(struct phy_device *phy); 996 void phy_device_free(struct phy_device *phydev); 997 #else 998 static inline 999 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1000 { 1001 return NULL; 1002 } 1003 1004 static inline int phy_device_register(struct phy_device *phy) 1005 { 1006 return 0; 1007 } 1008 1009 static inline void phy_device_free(struct phy_device *phydev) { } 1010 #endif /* CONFIG_PHYLIB */ 1011 void phy_device_remove(struct phy_device *phydev); 1012 int phy_init_hw(struct phy_device *phydev); 1013 int phy_suspend(struct phy_device *phydev); 1014 int phy_resume(struct phy_device *phydev); 1015 int __phy_resume(struct phy_device *phydev); 1016 int phy_loopback(struct phy_device *phydev, bool enable); 1017 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1018 phy_interface_t interface); 1019 struct phy_device *phy_find_first(struct mii_bus *bus); 1020 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1021 u32 flags, phy_interface_t interface); 1022 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1023 void (*handler)(struct net_device *), 1024 phy_interface_t interface); 1025 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1026 void (*handler)(struct net_device *), 1027 phy_interface_t interface); 1028 void phy_disconnect(struct phy_device *phydev); 1029 void phy_detach(struct phy_device *phydev); 1030 void phy_start(struct phy_device *phydev); 1031 void phy_stop(struct phy_device *phydev); 1032 int phy_start_aneg(struct phy_device *phydev); 1033 int phy_aneg_done(struct phy_device *phydev); 1034 int phy_speed_down(struct phy_device *phydev, bool sync); 1035 int phy_speed_up(struct phy_device *phydev); 1036 1037 int phy_restart_aneg(struct phy_device *phydev); 1038 int phy_reset_after_clk_enable(struct phy_device *phydev); 1039 1040 static inline void phy_device_reset(struct phy_device *phydev, int value) 1041 { 1042 mdio_device_reset(&phydev->mdio, value); 1043 } 1044 1045 #define phydev_err(_phydev, format, args...) \ 1046 dev_err(&_phydev->mdio.dev, format, ##args) 1047 1048 #define phydev_info(_phydev, format, args...) \ 1049 dev_info(&_phydev->mdio.dev, format, ##args) 1050 1051 #define phydev_warn(_phydev, format, args...) \ 1052 dev_warn(&_phydev->mdio.dev, format, ##args) 1053 1054 #define phydev_dbg(_phydev, format, args...) \ 1055 dev_dbg(&_phydev->mdio.dev, format, ##args) 1056 1057 static inline const char *phydev_name(const struct phy_device *phydev) 1058 { 1059 return dev_name(&phydev->mdio.dev); 1060 } 1061 1062 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1063 __printf(2, 3); 1064 void phy_attached_info(struct phy_device *phydev); 1065 1066 /* Clause 22 PHY */ 1067 int genphy_config_init(struct phy_device *phydev); 1068 int genphy_read_abilities(struct phy_device *phydev); 1069 int genphy_setup_forced(struct phy_device *phydev); 1070 int genphy_restart_aneg(struct phy_device *phydev); 1071 int genphy_config_eee_advert(struct phy_device *phydev); 1072 int genphy_config_aneg(struct phy_device *phydev); 1073 int genphy_aneg_done(struct phy_device *phydev); 1074 int genphy_update_link(struct phy_device *phydev); 1075 int genphy_read_status(struct phy_device *phydev); 1076 int genphy_suspend(struct phy_device *phydev); 1077 int genphy_resume(struct phy_device *phydev); 1078 int genphy_loopback(struct phy_device *phydev, bool enable); 1079 int genphy_soft_reset(struct phy_device *phydev); 1080 static inline int genphy_no_soft_reset(struct phy_device *phydev) 1081 { 1082 return 0; 1083 } 1084 static inline int genphy_no_ack_interrupt(struct phy_device *phydev) 1085 { 1086 return 0; 1087 } 1088 static inline int genphy_no_config_intr(struct phy_device *phydev) 1089 { 1090 return 0; 1091 } 1092 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1093 u16 regnum); 1094 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1095 u16 regnum, u16 val); 1096 1097 /* Clause 45 PHY */ 1098 int genphy_c45_restart_aneg(struct phy_device *phydev); 1099 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1100 int genphy_c45_aneg_done(struct phy_device *phydev); 1101 int genphy_c45_read_link(struct phy_device *phydev); 1102 int genphy_c45_read_lpa(struct phy_device *phydev); 1103 int genphy_c45_read_pma(struct phy_device *phydev); 1104 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1105 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1106 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1107 int genphy_c45_read_mdix(struct phy_device *phydev); 1108 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1109 int genphy_c45_read_status(struct phy_device *phydev); 1110 1111 /* The gen10g_* functions are the old Clause 45 stub */ 1112 int gen10g_config_aneg(struct phy_device *phydev); 1113 1114 static inline int phy_read_status(struct phy_device *phydev) 1115 { 1116 if (!phydev->drv) 1117 return -EIO; 1118 1119 if (phydev->drv->read_status) 1120 return phydev->drv->read_status(phydev); 1121 else 1122 return genphy_read_status(phydev); 1123 } 1124 1125 void phy_driver_unregister(struct phy_driver *drv); 1126 void phy_drivers_unregister(struct phy_driver *drv, int n); 1127 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1128 int phy_drivers_register(struct phy_driver *new_driver, int n, 1129 struct module *owner); 1130 void phy_state_machine(struct work_struct *work); 1131 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1132 void phy_mac_interrupt(struct phy_device *phydev); 1133 void phy_start_machine(struct phy_device *phydev); 1134 void phy_stop_machine(struct phy_device *phydev); 1135 int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd); 1136 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1137 struct ethtool_link_ksettings *cmd); 1138 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1139 const struct ethtool_link_ksettings *cmd); 1140 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1141 void phy_request_interrupt(struct phy_device *phydev); 1142 void phy_free_interrupt(struct phy_device *phydev); 1143 void phy_print_status(struct phy_device *phydev); 1144 int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1145 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1146 void phy_advertise_supported(struct phy_device *phydev); 1147 void phy_support_sym_pause(struct phy_device *phydev); 1148 void phy_support_asym_pause(struct phy_device *phydev); 1149 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1150 bool autoneg); 1151 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1152 bool phy_validate_pause(struct phy_device *phydev, 1153 struct ethtool_pauseparam *pp); 1154 1155 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1156 int (*run)(struct phy_device *)); 1157 int phy_register_fixup_for_id(const char *bus_id, 1158 int (*run)(struct phy_device *)); 1159 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1160 int (*run)(struct phy_device *)); 1161 1162 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1163 int phy_unregister_fixup_for_id(const char *bus_id); 1164 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1165 1166 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1167 int phy_get_eee_err(struct phy_device *phydev); 1168 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1169 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1170 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1171 void phy_ethtool_get_wol(struct phy_device *phydev, 1172 struct ethtool_wolinfo *wol); 1173 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1174 struct ethtool_link_ksettings *cmd); 1175 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1176 const struct ethtool_link_ksettings *cmd); 1177 int phy_ethtool_nway_reset(struct net_device *ndev); 1178 1179 #if IS_ENABLED(CONFIG_PHYLIB) 1180 int __init mdio_bus_init(void); 1181 void mdio_bus_exit(void); 1182 #endif 1183 1184 /* Inline function for use within net/core/ethtool.c (built-in) */ 1185 static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data) 1186 { 1187 if (!phydev->drv) 1188 return -EIO; 1189 1190 mutex_lock(&phydev->lock); 1191 phydev->drv->get_strings(phydev, data); 1192 mutex_unlock(&phydev->lock); 1193 1194 return 0; 1195 } 1196 1197 static inline int phy_ethtool_get_sset_count(struct phy_device *phydev) 1198 { 1199 int ret; 1200 1201 if (!phydev->drv) 1202 return -EIO; 1203 1204 if (phydev->drv->get_sset_count && 1205 phydev->drv->get_strings && 1206 phydev->drv->get_stats) { 1207 mutex_lock(&phydev->lock); 1208 ret = phydev->drv->get_sset_count(phydev); 1209 mutex_unlock(&phydev->lock); 1210 1211 return ret; 1212 } 1213 1214 return -EOPNOTSUPP; 1215 } 1216 1217 static inline int phy_ethtool_get_stats(struct phy_device *phydev, 1218 struct ethtool_stats *stats, u64 *data) 1219 { 1220 if (!phydev->drv) 1221 return -EIO; 1222 1223 mutex_lock(&phydev->lock); 1224 phydev->drv->get_stats(phydev, stats, data); 1225 mutex_unlock(&phydev->lock); 1226 1227 return 0; 1228 } 1229 1230 extern struct bus_type mdio_bus_type; 1231 1232 struct mdio_board_info { 1233 const char *bus_id; 1234 char modalias[MDIO_NAME_SIZE]; 1235 int mdio_addr; 1236 const void *platform_data; 1237 }; 1238 1239 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1240 int mdiobus_register_board_info(const struct mdio_board_info *info, 1241 unsigned int n); 1242 #else 1243 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1244 unsigned int n) 1245 { 1246 return 0; 1247 } 1248 #endif 1249 1250 1251 /** 1252 * module_phy_driver() - Helper macro for registering PHY drivers 1253 * @__phy_drivers: array of PHY drivers to register 1254 * 1255 * Helper macro for PHY drivers which do not do anything special in module 1256 * init/exit. Each module may only use this macro once, and calling it 1257 * replaces module_init() and module_exit(). 1258 */ 1259 #define phy_module_driver(__phy_drivers, __count) \ 1260 static int __init phy_module_init(void) \ 1261 { \ 1262 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 1263 } \ 1264 module_init(phy_module_init); \ 1265 static void __exit phy_module_exit(void) \ 1266 { \ 1267 phy_drivers_unregister(__phy_drivers, __count); \ 1268 } \ 1269 module_exit(phy_module_exit) 1270 1271 #define module_phy_driver(__phy_drivers) \ 1272 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 1273 1274 bool phy_driver_is_genphy(struct phy_device *phydev); 1275 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 1276 1277 #endif /* __PHY_H */ 1278