1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/leds.h> 18 #include <linux/linkmode.h> 19 #include <linux/netlink.h> 20 #include <linux/mdio.h> 21 #include <linux/mii.h> 22 #include <linux/mii_timestamper.h> 23 #include <linux/module.h> 24 #include <linux/timer.h> 25 #include <linux/workqueue.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/u64_stats_sync.h> 28 #include <linux/irqreturn.h> 29 #include <linux/iopoll.h> 30 #include <linux/refcount.h> 31 32 #include <linux/atomic.h> 33 #include <net/eee.h> 34 35 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 36 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 37 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 38 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 39 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 40 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 41 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init; 42 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap2_features) __ro_after_init; 43 44 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 45 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 46 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 47 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 48 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 49 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 50 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features) 51 #define PHY_EEE_CAP2_FEATURES ((unsigned long *)&phy_eee_cap2_features) 52 53 extern const int phy_basic_ports_array[3]; 54 55 /* 56 * Set phydev->irq to PHY_POLL if interrupts are not supported, 57 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 58 * the attached MAC driver handles the interrupt 59 */ 60 #define PHY_POLL -1 61 #define PHY_MAC_INTERRUPT -2 62 63 #define PHY_IS_INTERNAL 0x00000001 64 #define PHY_RST_AFTER_CLK_EN 0x00000002 65 #define PHY_POLL_CABLE_TEST 0x00000004 66 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008 67 #define MDIO_DEVICE_IS_PHY 0x80000000 68 69 /** 70 * enum phy_interface_t - Interface Mode definitions 71 * 72 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 73 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 74 * @PHY_INTERFACE_MODE_MII: Media-independent interface 75 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 76 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 77 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 78 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 79 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 80 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 81 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 82 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 83 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 84 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 85 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 86 * @PHY_INTERFACE_MODE_SMII: Serial MII 87 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 88 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 89 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 90 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII 91 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 92 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 93 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 94 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 95 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 96 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 97 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 98 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 99 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 100 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 101 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 102 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 103 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 104 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 105 * @PHY_INTERFACE_MODE_10G_QXGMII: 10G-QXGMII - 4 ports over 10G USXGMII 106 * @PHY_INTERFACE_MODE_MAX: Book keeping 107 * 108 * Describes the interface between the MAC and PHY. 109 */ 110 typedef enum { 111 PHY_INTERFACE_MODE_NA, 112 PHY_INTERFACE_MODE_INTERNAL, 113 PHY_INTERFACE_MODE_MII, 114 PHY_INTERFACE_MODE_GMII, 115 PHY_INTERFACE_MODE_SGMII, 116 PHY_INTERFACE_MODE_TBI, 117 PHY_INTERFACE_MODE_REVMII, 118 PHY_INTERFACE_MODE_RMII, 119 PHY_INTERFACE_MODE_REVRMII, 120 PHY_INTERFACE_MODE_RGMII, 121 PHY_INTERFACE_MODE_RGMII_ID, 122 PHY_INTERFACE_MODE_RGMII_RXID, 123 PHY_INTERFACE_MODE_RGMII_TXID, 124 PHY_INTERFACE_MODE_RTBI, 125 PHY_INTERFACE_MODE_SMII, 126 PHY_INTERFACE_MODE_XGMII, 127 PHY_INTERFACE_MODE_XLGMII, 128 PHY_INTERFACE_MODE_MOCA, 129 PHY_INTERFACE_MODE_PSGMII, 130 PHY_INTERFACE_MODE_QSGMII, 131 PHY_INTERFACE_MODE_TRGMII, 132 PHY_INTERFACE_MODE_100BASEX, 133 PHY_INTERFACE_MODE_1000BASEX, 134 PHY_INTERFACE_MODE_2500BASEX, 135 PHY_INTERFACE_MODE_5GBASER, 136 PHY_INTERFACE_MODE_RXAUI, 137 PHY_INTERFACE_MODE_XAUI, 138 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 139 PHY_INTERFACE_MODE_10GBASER, 140 PHY_INTERFACE_MODE_25GBASER, 141 PHY_INTERFACE_MODE_USXGMII, 142 /* 10GBASE-KR - with Clause 73 AN */ 143 PHY_INTERFACE_MODE_10GKR, 144 PHY_INTERFACE_MODE_QUSGMII, 145 PHY_INTERFACE_MODE_1000BASEKX, 146 PHY_INTERFACE_MODE_10G_QXGMII, 147 PHY_INTERFACE_MODE_MAX, 148 } phy_interface_t; 149 150 /* PHY interface mode bitmap handling */ 151 #define DECLARE_PHY_INTERFACE_MASK(name) \ 152 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 153 154 static inline void phy_interface_zero(unsigned long *intf) 155 { 156 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 157 } 158 159 static inline bool phy_interface_empty(const unsigned long *intf) 160 { 161 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 162 } 163 164 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 165 const unsigned long *b) 166 { 167 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 168 } 169 170 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 171 const unsigned long *b) 172 { 173 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 174 } 175 176 static inline void phy_interface_set_rgmii(unsigned long *intf) 177 { 178 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 179 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 180 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 181 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 182 } 183 184 /* 185 * phy_supported_speeds - return all speeds currently supported by a PHY device 186 */ 187 unsigned int phy_supported_speeds(struct phy_device *phy, 188 unsigned int *speeds, 189 unsigned int size); 190 191 /** 192 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 193 * @interface: enum phy_interface_t value 194 * 195 * Description: maps enum &phy_interface_t defined in this file 196 * into the device tree binding of 'phy-mode', so that Ethernet 197 * device driver can get PHY interface from device tree. 198 */ 199 static inline const char *phy_modes(phy_interface_t interface) 200 { 201 switch (interface) { 202 case PHY_INTERFACE_MODE_NA: 203 return ""; 204 case PHY_INTERFACE_MODE_INTERNAL: 205 return "internal"; 206 case PHY_INTERFACE_MODE_MII: 207 return "mii"; 208 case PHY_INTERFACE_MODE_GMII: 209 return "gmii"; 210 case PHY_INTERFACE_MODE_SGMII: 211 return "sgmii"; 212 case PHY_INTERFACE_MODE_TBI: 213 return "tbi"; 214 case PHY_INTERFACE_MODE_REVMII: 215 return "rev-mii"; 216 case PHY_INTERFACE_MODE_RMII: 217 return "rmii"; 218 case PHY_INTERFACE_MODE_REVRMII: 219 return "rev-rmii"; 220 case PHY_INTERFACE_MODE_RGMII: 221 return "rgmii"; 222 case PHY_INTERFACE_MODE_RGMII_ID: 223 return "rgmii-id"; 224 case PHY_INTERFACE_MODE_RGMII_RXID: 225 return "rgmii-rxid"; 226 case PHY_INTERFACE_MODE_RGMII_TXID: 227 return "rgmii-txid"; 228 case PHY_INTERFACE_MODE_RTBI: 229 return "rtbi"; 230 case PHY_INTERFACE_MODE_SMII: 231 return "smii"; 232 case PHY_INTERFACE_MODE_XGMII: 233 return "xgmii"; 234 case PHY_INTERFACE_MODE_XLGMII: 235 return "xlgmii"; 236 case PHY_INTERFACE_MODE_MOCA: 237 return "moca"; 238 case PHY_INTERFACE_MODE_PSGMII: 239 return "psgmii"; 240 case PHY_INTERFACE_MODE_QSGMII: 241 return "qsgmii"; 242 case PHY_INTERFACE_MODE_TRGMII: 243 return "trgmii"; 244 case PHY_INTERFACE_MODE_1000BASEX: 245 return "1000base-x"; 246 case PHY_INTERFACE_MODE_1000BASEKX: 247 return "1000base-kx"; 248 case PHY_INTERFACE_MODE_2500BASEX: 249 return "2500base-x"; 250 case PHY_INTERFACE_MODE_5GBASER: 251 return "5gbase-r"; 252 case PHY_INTERFACE_MODE_RXAUI: 253 return "rxaui"; 254 case PHY_INTERFACE_MODE_XAUI: 255 return "xaui"; 256 case PHY_INTERFACE_MODE_10GBASER: 257 return "10gbase-r"; 258 case PHY_INTERFACE_MODE_25GBASER: 259 return "25gbase-r"; 260 case PHY_INTERFACE_MODE_USXGMII: 261 return "usxgmii"; 262 case PHY_INTERFACE_MODE_10GKR: 263 return "10gbase-kr"; 264 case PHY_INTERFACE_MODE_100BASEX: 265 return "100base-x"; 266 case PHY_INTERFACE_MODE_QUSGMII: 267 return "qusgmii"; 268 case PHY_INTERFACE_MODE_10G_QXGMII: 269 return "10g-qxgmii"; 270 default: 271 return "unknown"; 272 } 273 } 274 275 /** 276 * rgmii_clock - map link speed to the clock rate 277 * @speed: link speed value 278 * 279 * Description: maps RGMII supported link speeds 280 * into the clock rates. 281 * 282 * Returns: clock rate or negative errno 283 */ 284 static inline long rgmii_clock(int speed) 285 { 286 switch (speed) { 287 case SPEED_10: 288 return 2500000; 289 case SPEED_100: 290 return 25000000; 291 case SPEED_1000: 292 return 125000000; 293 default: 294 return -EINVAL; 295 } 296 } 297 298 #define PHY_MAX_ADDR 32 299 300 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 301 #define PHY_ID_FMT "%s:%02x" 302 303 #define MII_BUS_ID_SIZE 61 304 305 struct device; 306 struct kernel_hwtstamp_config; 307 struct phylink; 308 struct sfp_bus; 309 struct sfp_upstream_ops; 310 struct sk_buff; 311 312 /** 313 * struct mdio_bus_stats - Statistics counters for MDIO busses 314 * @transfers: Total number of transfers, i.e. @writes + @reads 315 * @errors: Number of MDIO transfers that returned an error 316 * @writes: Number of write transfers 317 * @reads: Number of read transfers 318 * @syncp: Synchronisation for incrementing statistics 319 */ 320 struct mdio_bus_stats { 321 u64_stats_t transfers; 322 u64_stats_t errors; 323 u64_stats_t writes; 324 u64_stats_t reads; 325 /* Must be last, add new statistics above */ 326 struct u64_stats_sync syncp; 327 }; 328 329 /** 330 * struct phy_package_shared - Shared information in PHY packages 331 * @base_addr: Base PHY address of PHY package used to combine PHYs 332 * in one package and for offset calculation of phy_package_read/write 333 * @np: Pointer to the Device Node if PHY package defined in DT 334 * @refcnt: Number of PHYs connected to this shared data 335 * @flags: Initialization of PHY package 336 * @priv_size: Size of the shared private data @priv 337 * @priv: Driver private data shared across a PHY package 338 * 339 * Represents a shared structure between different phydev's in the same 340 * package, for example a quad PHY. See phy_package_join() and 341 * phy_package_leave(). 342 */ 343 struct phy_package_shared { 344 u8 base_addr; 345 /* With PHY package defined in DT this points to the PHY package node */ 346 struct device_node *np; 347 refcount_t refcnt; 348 unsigned long flags; 349 size_t priv_size; 350 351 /* private data pointer */ 352 /* note that this pointer is shared between different phydevs and 353 * the user has to take care of appropriate locking. It is allocated 354 * and freed automatically by phy_package_join() and 355 * phy_package_leave(). 356 */ 357 void *priv; 358 }; 359 360 /* used as bit number in atomic bitops */ 361 #define PHY_SHARED_F_INIT_DONE 0 362 #define PHY_SHARED_F_PROBE_DONE 1 363 364 /** 365 * struct mii_bus - Represents an MDIO bus 366 * 367 * @owner: Who owns this device 368 * @name: User friendly name for this MDIO device, or driver name 369 * @id: Unique identifier for this bus, typical from bus hierarchy 370 * @priv: Driver private data 371 * 372 * The Bus class for PHYs. Devices which provide access to 373 * PHYs should register using this structure 374 */ 375 struct mii_bus { 376 struct module *owner; 377 const char *name; 378 char id[MII_BUS_ID_SIZE]; 379 void *priv; 380 /** @read: Perform a read transfer on the bus */ 381 int (*read)(struct mii_bus *bus, int addr, int regnum); 382 /** @write: Perform a write transfer on the bus */ 383 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 384 /** @read_c45: Perform a C45 read transfer on the bus */ 385 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 386 /** @write_c45: Perform a C45 write transfer on the bus */ 387 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 388 int regnum, u16 val); 389 /** @reset: Perform a reset of the bus */ 390 int (*reset)(struct mii_bus *bus); 391 392 /** @stats: Statistic counters per device on the bus */ 393 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 394 395 /** 396 * @mdio_lock: A lock to ensure that only one thing can read/write 397 * the MDIO bus at a time 398 */ 399 struct mutex mdio_lock; 400 401 /** @parent: Parent device of this bus */ 402 struct device *parent; 403 /** @state: State of bus structure */ 404 enum { 405 MDIOBUS_ALLOCATED = 1, 406 MDIOBUS_REGISTERED, 407 MDIOBUS_UNREGISTERED, 408 MDIOBUS_RELEASED, 409 } state; 410 411 /** @dev: Kernel device representation */ 412 struct device dev; 413 414 /** @mdio_map: list of all MDIO devices on bus */ 415 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 416 417 /** @phy_mask: PHY addresses to be ignored when probing */ 418 u32 phy_mask; 419 420 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 421 u32 phy_ignore_ta_mask; 422 423 /** 424 * @irq: An array of interrupts, each PHY's interrupt at the index 425 * matching its address 426 */ 427 int irq[PHY_MAX_ADDR]; 428 429 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 430 int reset_delay_us; 431 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 432 int reset_post_delay_us; 433 /** @reset_gpiod: Reset GPIO descriptor pointer */ 434 struct gpio_desc *reset_gpiod; 435 436 /** @shared_lock: protect access to the shared element */ 437 struct mutex shared_lock; 438 439 /** @shared: shared state across different PHYs */ 440 struct phy_package_shared *shared[PHY_MAX_ADDR]; 441 }; 442 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 443 444 struct mii_bus *mdiobus_alloc_size(size_t size); 445 446 /** 447 * mdiobus_alloc - Allocate an MDIO bus structure 448 * 449 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 450 * for the driver to register the bus. 451 */ 452 static inline struct mii_bus *mdiobus_alloc(void) 453 { 454 return mdiobus_alloc_size(0); 455 } 456 457 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 458 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 459 struct module *owner); 460 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 461 #define devm_mdiobus_register(dev, bus) \ 462 __devm_mdiobus_register(dev, bus, THIS_MODULE) 463 464 void mdiobus_unregister(struct mii_bus *bus); 465 void mdiobus_free(struct mii_bus *bus); 466 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 467 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 468 { 469 return devm_mdiobus_alloc_size(dev, 0); 470 } 471 472 struct mii_bus *mdio_find_bus(const char *mdio_name); 473 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); 474 475 #define PHY_INTERRUPT_DISABLED false 476 #define PHY_INTERRUPT_ENABLED true 477 478 /** 479 * enum phy_state - PHY state machine states: 480 * 481 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 482 * should be called if and only if the PHY is in this state, 483 * given that the PHY device exists. 484 * - PHY driver probe function will set the state to @PHY_READY 485 * 486 * @PHY_READY: PHY is ready to send and receive packets, but the 487 * controller is not. By default, PHYs which do not implement 488 * probe will be set to this state by phy_probe(). 489 * - start will set the state to UP 490 * 491 * @PHY_UP: The PHY and attached device are ready to do work. 492 * Interrupts should be started here. 493 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 494 * 495 * @PHY_NOLINK: PHY is up, but not currently plugged in. 496 * - irq or timer will set @PHY_RUNNING if link comes back 497 * - phy_stop moves to @PHY_HALTED 498 * 499 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 500 * and/or receiving packets 501 * - irq or timer will set @PHY_NOLINK if link goes down 502 * - phy_stop moves to @PHY_HALTED 503 * 504 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 505 * is not expected to work, carrier will be indicated as down. PHY will be 506 * poll once per second, or on interrupt for it current state. 507 * Once complete, move to UP to restart the PHY. 508 * - phy_stop aborts the running test and moves to @PHY_HALTED 509 * 510 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. 511 * - phy_start moves to @PHY_UP 512 * 513 * @PHY_ERROR: PHY is up, but is in an error state. 514 * - phy_stop moves to @PHY_HALTED 515 */ 516 enum phy_state { 517 PHY_DOWN = 0, 518 PHY_READY, 519 PHY_HALTED, 520 PHY_ERROR, 521 PHY_UP, 522 PHY_RUNNING, 523 PHY_NOLINK, 524 PHY_CABLETEST, 525 }; 526 527 #define MDIO_MMD_NUM 32 528 529 /** 530 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 531 * @devices_in_package: IEEE 802.3 devices in package register value. 532 * @mmds_present: bit vector of MMDs present. 533 * @device_ids: The device identifer for each present device. 534 */ 535 struct phy_c45_device_ids { 536 u32 devices_in_package; 537 u32 mmds_present; 538 u32 device_ids[MDIO_MMD_NUM]; 539 }; 540 541 struct macsec_context; 542 struct macsec_ops; 543 544 /** 545 * struct phy_device - An instance of a PHY 546 * 547 * @mdio: MDIO bus this PHY is on 548 * @drv: Pointer to the driver for this PHY instance 549 * @devlink: Create a link between phy dev and mac dev, if the external phy 550 * used by current mac interface is managed by another mac interface. 551 * @phyindex: Unique id across the phy's parent tree of phys to address the PHY 552 * from userspace, similar to ifindex. A zero index means the PHY 553 * wasn't assigned an id yet. 554 * @phy_id: UID for this device found during discovery 555 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 556 * @is_c45: Set to true if this PHY uses clause 45 addressing. 557 * @is_internal: Set to true if this PHY is internal to a MAC. 558 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 559 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 560 * @has_fixups: Set to true if this PHY has fixups/quirks. 561 * @suspended: Set to true if this PHY has been suspended successfully. 562 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 563 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 564 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 565 * @downshifted_rate: Set true if link speed has been downshifted. 566 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 567 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 568 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN 569 * enabled. 570 * @state: State of the PHY for management purposes 571 * @dev_flags: Device-specific flags used by the PHY driver. 572 * 573 * - Bits [15:0] are free to use by the PHY driver to communicate 574 * driver specific behavior. 575 * - Bits [23:16] are currently reserved for future use. 576 * - Bits [31:24] are reserved for defining generic 577 * PHY driver behavior. 578 * @irq: IRQ number of the PHY's interrupt (-1 if none) 579 * @phylink: Pointer to phylink instance for this PHY 580 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 581 * @sfp_bus: SFP bus attached to this PHY's fiber port 582 * @attached_dev: The attached enet driver's device instance ptr 583 * @adjust_link: Callback for the enet controller to respond to changes: in the 584 * link state. 585 * @phy_link_change: Callback for phylink for notification of link change 586 * @macsec_ops: MACsec offloading ops. 587 * 588 * @speed: Current link speed 589 * @duplex: Current duplex 590 * @port: Current port 591 * @pause: Current pause 592 * @asym_pause: Current asymmetric pause 593 * @supported: Combined MAC/PHY supported linkmodes 594 * @advertising: Currently advertised linkmodes 595 * @adv_old: Saved advertised while power saving for WoL 596 * @supported_eee: supported PHY EEE linkmodes 597 * @advertising_eee: Currently advertised EEE linkmodes 598 * @enable_tx_lpi: When True, MAC should transmit LPI to PHY 599 * @eee_active: phylib private state, indicating that EEE has been negotiated 600 * @eee_cfg: User configuration of EEE 601 * @lp_advertising: Current link partner advertised linkmodes 602 * @host_interfaces: PHY interface modes supported by host 603 * @eee_disabled_modes: Energy efficient ethernet modes not to be advertised 604 * @autoneg: Flag autoneg being used 605 * @rate_matching: Current rate matching mode 606 * @link: Current link state 607 * @autoneg_complete: Flag auto negotiation of the link has completed 608 * @mdix: Current crossover 609 * @mdix_ctrl: User setting of crossover 610 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 611 * @interrupts: Flag interrupts have been enabled 612 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 613 * handling shall be postponed until PHY has resumed 614 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 615 * requiring a rerun of the interrupt handler after resume 616 * @default_timestamp: Flag indicating whether we are using the phy 617 * timestamp as the default one 618 * @interface: enum phy_interface_t value 619 * @possible_interfaces: bitmap if interface modes that the attached PHY 620 * will switch between depending on media speed. 621 * @skb: Netlink message for cable diagnostics 622 * @nest: Netlink nest used for cable diagnostics 623 * @ehdr: nNtlink header for cable diagnostics 624 * @phy_led_triggers: Array of LED triggers 625 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 626 * @led_link_trigger: LED trigger for link up/down 627 * @last_triggered: last LED trigger for link speed 628 * @leds: list of PHY LED structures 629 * @master_slave_set: User requested master/slave configuration 630 * @master_slave_get: Current master/slave advertisement 631 * @master_slave_state: Current master/slave configuration 632 * @mii_ts: Pointer to time stamper callbacks 633 * @psec: Pointer to Power Sourcing Equipment control struct 634 * @lock: Mutex for serialization access to PHY 635 * @state_queue: Work queue for state machine 636 * @link_down_events: Number of times link was lost 637 * @shared: Pointer to private data shared by phys in one package 638 * @priv: Pointer to driver private data 639 * 640 * interrupts currently only supports enabled or disabled, 641 * but could be changed in the future to support enabling 642 * and disabling specific interrupts 643 * 644 * Contains some infrastructure for polling and interrupt 645 * handling, as well as handling shifts in PHY hardware state 646 */ 647 struct phy_device { 648 struct mdio_device mdio; 649 650 /* Information about the PHY type */ 651 /* And management functions */ 652 const struct phy_driver *drv; 653 654 struct device_link *devlink; 655 656 u32 phyindex; 657 u32 phy_id; 658 659 struct phy_c45_device_ids c45_ids; 660 unsigned is_c45:1; 661 unsigned is_internal:1; 662 unsigned is_pseudo_fixed_link:1; 663 unsigned is_gigabit_capable:1; 664 unsigned has_fixups:1; 665 unsigned suspended:1; 666 unsigned suspended_by_mdio_bus:1; 667 unsigned sysfs_links:1; 668 unsigned loopback_enabled:1; 669 unsigned downshifted_rate:1; 670 unsigned is_on_sfp_module:1; 671 unsigned mac_managed_pm:1; 672 unsigned wol_enabled:1; 673 674 unsigned autoneg:1; 675 /* The most recently read link state */ 676 unsigned link:1; 677 unsigned autoneg_complete:1; 678 679 /* Interrupts are enabled */ 680 unsigned interrupts:1; 681 unsigned irq_suspended:1; 682 unsigned irq_rerun:1; 683 684 unsigned default_timestamp:1; 685 686 int rate_matching; 687 688 enum phy_state state; 689 690 u32 dev_flags; 691 692 phy_interface_t interface; 693 DECLARE_PHY_INTERFACE_MASK(possible_interfaces); 694 695 /* 696 * forced speed & duplex (no autoneg) 697 * partner speed & duplex & pause (autoneg) 698 */ 699 int speed; 700 int duplex; 701 int port; 702 int pause; 703 int asym_pause; 704 u8 master_slave_get; 705 u8 master_slave_set; 706 u8 master_slave_state; 707 708 /* Union of PHY and Attached devices' supported link modes */ 709 /* See ethtool.h for more info */ 710 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 711 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 712 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 713 /* used with phy_speed_down */ 714 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 715 /* used for eee validation and configuration*/ 716 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee); 717 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee); 718 /* Energy efficient ethernet modes which should be prohibited */ 719 __ETHTOOL_DECLARE_LINK_MODE_MASK(eee_disabled_modes); 720 bool enable_tx_lpi; 721 bool eee_active; 722 struct eee_config eee_cfg; 723 724 /* Host supported PHY interface types. Should be ignored if empty. */ 725 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 726 727 #ifdef CONFIG_LED_TRIGGER_PHY 728 struct phy_led_trigger *phy_led_triggers; 729 unsigned int phy_num_led_triggers; 730 struct phy_led_trigger *last_triggered; 731 732 struct phy_led_trigger *led_link_trigger; 733 #endif 734 struct list_head leds; 735 736 /* 737 * Interrupt number for this PHY 738 * -1 means no interrupt 739 */ 740 int irq; 741 742 /* private data pointer */ 743 /* For use by PHYs to maintain extra state */ 744 void *priv; 745 746 /* shared data pointer */ 747 /* For use by PHYs inside the same package that need a shared state. */ 748 struct phy_package_shared *shared; 749 750 /* Reporting cable test results */ 751 struct sk_buff *skb; 752 void *ehdr; 753 struct nlattr *nest; 754 755 /* Interrupt and Polling infrastructure */ 756 struct delayed_work state_queue; 757 758 struct mutex lock; 759 760 /* This may be modified under the rtnl lock */ 761 bool sfp_bus_attached; 762 struct sfp_bus *sfp_bus; 763 struct phylink *phylink; 764 struct net_device *attached_dev; 765 struct mii_timestamper *mii_ts; 766 struct pse_control *psec; 767 768 u8 mdix; 769 u8 mdix_ctrl; 770 771 int pma_extable; 772 773 unsigned int link_down_events; 774 775 void (*phy_link_change)(struct phy_device *phydev, bool up); 776 void (*adjust_link)(struct net_device *dev); 777 778 #if IS_ENABLED(CONFIG_MACSEC) 779 /* MACsec management functions */ 780 const struct macsec_ops *macsec_ops; 781 #endif 782 }; 783 784 /* Generic phy_device::dev_flags */ 785 #define PHY_F_NO_IRQ 0x80000000 786 #define PHY_F_RXC_ALWAYS_ON 0x40000000 787 788 static inline struct phy_device *to_phy_device(const struct device *dev) 789 { 790 return container_of(to_mdio_device(dev), struct phy_device, mdio); 791 } 792 793 /** 794 * struct phy_tdr_config - Configuration of a TDR raw test 795 * 796 * @first: Distance for first data collection point 797 * @last: Distance for last data collection point 798 * @step: Step between data collection points 799 * @pair: Bitmap of cable pairs to collect data for 800 * 801 * A structure containing possible configuration parameters 802 * for a TDR cable test. The driver does not need to implement 803 * all the parameters, but should report what is actually used. 804 * All distances are in centimeters. 805 */ 806 struct phy_tdr_config { 807 u32 first; 808 u32 last; 809 u32 step; 810 s8 pair; 811 }; 812 #define PHY_PAIR_ALL -1 813 814 /** 815 * enum link_inband_signalling - in-band signalling modes that are supported 816 * 817 * @LINK_INBAND_DISABLE: in-band signalling can be disabled 818 * @LINK_INBAND_ENABLE: in-band signalling can be enabled without bypass 819 * @LINK_INBAND_BYPASS: in-band signalling can be enabled with bypass 820 * 821 * The possible and required bits can only be used if the valid bit is set. 822 * If possible is clear, that means inband signalling can not be used. 823 * Required is only valid when possible is set, and means that inband 824 * signalling must be used. 825 */ 826 enum link_inband_signalling { 827 LINK_INBAND_DISABLE = BIT(0), 828 LINK_INBAND_ENABLE = BIT(1), 829 LINK_INBAND_BYPASS = BIT(2), 830 }; 831 832 /** 833 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 834 * Avoidance) Reconciliation Sublayer. 835 * 836 * @version: read-only PLCA register map version. -1 = not available. Ignored 837 * when setting the configuration. Format is the same as reported by the PLCA 838 * IDVER register (31.CA00). -1 = not available. 839 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 840 * set. 0 = disabled, anything else = enabled. 841 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 842 * Allowed values [0 .. 254]. 255 = node disabled. 843 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 844 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 845 * set. Allowed values [1 .. 255]. 846 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 847 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 848 * more details. The to_timer shall be set equal over all nodes. 849 * -1 = not available / don't set. Allowed values [0 .. 255]. 850 * @burst_cnt: controls how many additional frames a node is allowed to send in 851 * single transmit opportunity (TO). The default value of 0 means that the 852 * node is allowed exactly one frame per TO. A value of 1 allows two frames 853 * per TO, and so on. -1 = not available / don't set. 854 * Allowed values [0 .. 255]. 855 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 856 * frame before interrupting the burst. This value should be set to a value 857 * greater than the MAC inter-packet gap (which is typically 96 bits). 858 * -1 = not available / don't set. Allowed values [0 .. 255]. 859 * 860 * A structure containing configuration parameters for setting/getting the PLCA 861 * RS configuration. The driver does not need to implement all the parameters, 862 * but should report what is actually used. 863 */ 864 struct phy_plca_cfg { 865 int version; 866 int enabled; 867 int node_id; 868 int node_cnt; 869 int to_tmr; 870 int burst_cnt; 871 int burst_tmr; 872 }; 873 874 /** 875 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 876 * Avoidance) Reconciliation Sublayer. 877 * 878 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 879 * register(31.CA03), indicating BEACON activity. 880 * 881 * A structure containing status information of the PLCA RS configuration. 882 * The driver does not need to implement all the parameters, but should report 883 * what is actually used. 884 */ 885 struct phy_plca_status { 886 bool pst; 887 }; 888 889 /* Modes for PHY LED configuration */ 890 enum phy_led_modes { 891 PHY_LED_ACTIVE_HIGH = 0, 892 PHY_LED_ACTIVE_LOW = 1, 893 PHY_LED_INACTIVE_HIGH_IMPEDANCE = 2, 894 895 /* keep it last */ 896 __PHY_LED_MODES_NUM, 897 }; 898 899 /** 900 * struct phy_led: An LED driven by the PHY 901 * 902 * @list: List of LEDs 903 * @phydev: PHY this LED is attached to 904 * @led_cdev: Standard LED class structure 905 * @index: Number of the LED 906 */ 907 struct phy_led { 908 struct list_head list; 909 struct phy_device *phydev; 910 struct led_classdev led_cdev; 911 u8 index; 912 }; 913 914 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev) 915 916 /** 917 * struct phy_driver - Driver structure for a particular PHY type 918 * 919 * @mdiodrv: Data common to all MDIO devices 920 * @phy_id: The result of reading the UID registers of this PHY 921 * type, and ANDing them with the phy_id_mask. This driver 922 * only works for PHYs with IDs which match this field 923 * @name: The friendly name of this PHY type 924 * @phy_id_mask: Defines the important bits of the phy_id 925 * @features: A mandatory list of features (speed, duplex, etc) 926 * supported by this PHY 927 * @flags: A bitfield defining certain other features this PHY 928 * supports (like interrupts) 929 * @driver_data: Static driver data 930 * 931 * All functions are optional. If config_aneg or read_status 932 * are not implemented, the phy core uses the genphy versions. 933 * Note that none of these functions should be called from 934 * interrupt time. The goal is for the bus read/write functions 935 * to be able to block when the bus transaction is happening, 936 * and be freed up by an interrupt (The MPC85xx has this ability, 937 * though it is not currently supported in the driver). 938 */ 939 struct phy_driver { 940 struct mdio_driver_common mdiodrv; 941 u32 phy_id; 942 char *name; 943 u32 phy_id_mask; 944 const unsigned long * const features; 945 u32 flags; 946 const void *driver_data; 947 948 /** 949 * @soft_reset: Called to issue a PHY software reset 950 */ 951 int (*soft_reset)(struct phy_device *phydev); 952 953 /** 954 * @config_init: Called to initialize the PHY, 955 * including after a reset 956 */ 957 int (*config_init)(struct phy_device *phydev); 958 959 /** 960 * @probe: Called during discovery. Used to set 961 * up device-specific structures, if any 962 */ 963 int (*probe)(struct phy_device *phydev); 964 965 /** 966 * @get_features: Probe the hardware to determine what 967 * abilities it has. Should only set phydev->supported. 968 */ 969 int (*get_features)(struct phy_device *phydev); 970 971 /** 972 * @inband_caps: query whether in-band is supported for the given PHY 973 * interface mode. Returns a bitmask of bits defined by enum 974 * link_inband_signalling. 975 */ 976 unsigned int (*inband_caps)(struct phy_device *phydev, 977 phy_interface_t interface); 978 979 /** 980 * @config_inband: configure in-band mode for the PHY 981 */ 982 int (*config_inband)(struct phy_device *phydev, unsigned int modes); 983 984 /** 985 * @get_rate_matching: Get the supported type of rate matching for a 986 * particular phy interface. This is used by phy consumers to determine 987 * whether to advertise lower-speed modes for that interface. It is 988 * assumed that if a rate matching mode is supported on an interface, 989 * then that interface's rate can be adapted to all slower link speeds 990 * supported by the phy. If the interface is not supported, this should 991 * return %RATE_MATCH_NONE. 992 */ 993 int (*get_rate_matching)(struct phy_device *phydev, 994 phy_interface_t iface); 995 996 /* PHY Power Management */ 997 /** @suspend: Suspend the hardware, saving state if needed */ 998 int (*suspend)(struct phy_device *phydev); 999 /** @resume: Resume the hardware, restoring state if needed */ 1000 int (*resume)(struct phy_device *phydev); 1001 1002 /** 1003 * @config_aneg: Configures the advertisement and resets 1004 * autonegotiation if phydev->autoneg is on, 1005 * forces the speed to the current settings in phydev 1006 * if phydev->autoneg is off 1007 */ 1008 int (*config_aneg)(struct phy_device *phydev); 1009 1010 /** @aneg_done: Determines the auto negotiation result */ 1011 int (*aneg_done)(struct phy_device *phydev); 1012 1013 /** @read_status: Determines the negotiated speed and duplex */ 1014 int (*read_status)(struct phy_device *phydev); 1015 1016 /** 1017 * @config_intr: Enables or disables interrupts. 1018 * It should also clear any pending interrupts prior to enabling the 1019 * IRQs and after disabling them. 1020 */ 1021 int (*config_intr)(struct phy_device *phydev); 1022 1023 /** @handle_interrupt: Override default interrupt handling */ 1024 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 1025 1026 /** @remove: Clears up any memory if needed */ 1027 void (*remove)(struct phy_device *phydev); 1028 1029 /** 1030 * @match_phy_device: Returns true if this is a suitable 1031 * driver for the given phydev. If NULL, matching is based on 1032 * phy_id and phy_id_mask. 1033 */ 1034 int (*match_phy_device)(struct phy_device *phydev); 1035 1036 /** 1037 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 1038 * register changes to enable Wake on LAN, so set_wol is 1039 * provided to be called in the ethernet driver's set_wol 1040 * function. 1041 */ 1042 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1043 1044 /** 1045 * @get_wol: See set_wol, but for checking whether Wake on LAN 1046 * is enabled. 1047 */ 1048 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1049 1050 /** 1051 * @link_change_notify: Called to inform a PHY device driver 1052 * when the core is about to change the link state. This 1053 * callback is supposed to be used as fixup hook for drivers 1054 * that need to take action when the link state 1055 * changes. Drivers are by no means allowed to mess with the 1056 * PHY device structure in their implementations. 1057 */ 1058 void (*link_change_notify)(struct phy_device *dev); 1059 1060 /** 1061 * @read_mmd: PHY specific driver override for reading a MMD 1062 * register. This function is optional for PHY specific 1063 * drivers. When not provided, the default MMD read function 1064 * will be used by phy_read_mmd(), which will use either a 1065 * direct read for Clause 45 PHYs or an indirect read for 1066 * Clause 22 PHYs. devnum is the MMD device number within the 1067 * PHY device, regnum is the register within the selected MMD 1068 * device. 1069 */ 1070 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 1071 1072 /** 1073 * @write_mmd: PHY specific driver override for writing a MMD 1074 * register. This function is optional for PHY specific 1075 * drivers. When not provided, the default MMD write function 1076 * will be used by phy_write_mmd(), which will use either a 1077 * direct write for Clause 45 PHYs, or an indirect write for 1078 * Clause 22 PHYs. devnum is the MMD device number within the 1079 * PHY device, regnum is the register within the selected MMD 1080 * device. val is the value to be written. 1081 */ 1082 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 1083 u16 val); 1084 1085 /** @read_page: Return the current PHY register page number */ 1086 int (*read_page)(struct phy_device *dev); 1087 /** @write_page: Set the current PHY register page number */ 1088 int (*write_page)(struct phy_device *dev, int page); 1089 1090 /** 1091 * @module_info: Get the size and type of the eeprom contained 1092 * within a plug-in module 1093 */ 1094 int (*module_info)(struct phy_device *dev, 1095 struct ethtool_modinfo *modinfo); 1096 1097 /** 1098 * @module_eeprom: Get the eeprom information from the plug-in 1099 * module 1100 */ 1101 int (*module_eeprom)(struct phy_device *dev, 1102 struct ethtool_eeprom *ee, u8 *data); 1103 1104 /** @cable_test_start: Start a cable test */ 1105 int (*cable_test_start)(struct phy_device *dev); 1106 1107 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1108 int (*cable_test_tdr_start)(struct phy_device *dev, 1109 const struct phy_tdr_config *config); 1110 1111 /** 1112 * @cable_test_get_status: Once per second, or on interrupt, 1113 * request the status of the test. 1114 */ 1115 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1116 1117 /* Get statistics from the PHY using ethtool */ 1118 /** 1119 * @get_phy_stats: Retrieve PHY statistics. 1120 * @dev: The PHY device for which the statistics are retrieved. 1121 * @eth_stats: structure where Ethernet PHY stats will be stored. 1122 * @stats: structure where additional PHY-specific stats will be stored. 1123 * 1124 * Retrieves the supported PHY statistics and populates the provided 1125 * structures. The input structures are pre-initialized with 1126 * `ETHTOOL_STAT_NOT_SET`, and the driver must only modify members 1127 * corresponding to supported statistics. Unmodified members will remain 1128 * set to `ETHTOOL_STAT_NOT_SET` and will not be returned to userspace. 1129 */ 1130 void (*get_phy_stats)(struct phy_device *dev, 1131 struct ethtool_eth_phy_stats *eth_stats, 1132 struct ethtool_phy_stats *stats); 1133 1134 /** 1135 * @get_link_stats: Retrieve link statistics. 1136 * @dev: The PHY device for which the statistics are retrieved. 1137 * @link_stats: structure where link-specific stats will be stored. 1138 * 1139 * Retrieves link-related statistics for the given PHY device. The input 1140 * structure is pre-initialized with `ETHTOOL_STAT_NOT_SET`, and the 1141 * driver must only modify members corresponding to supported 1142 * statistics. Unmodified members will remain set to 1143 * `ETHTOOL_STAT_NOT_SET` and will not be returned to userspace. 1144 */ 1145 void (*get_link_stats)(struct phy_device *dev, 1146 struct ethtool_link_ext_stats *link_stats); 1147 1148 /** 1149 * @update_stats: Trigger periodic statistics updates. 1150 * @dev: The PHY device for which statistics updates are triggered. 1151 * 1152 * Periodically gathers statistics from the PHY device to update locally 1153 * maintained 64-bit counters. This is necessary for PHYs that implement 1154 * reduced-width counters (e.g., 16-bit or 32-bit) which can overflow 1155 * more frequently compared to 64-bit counters. By invoking this 1156 * callback, drivers can fetch the current counter values, handle 1157 * overflow detection, and accumulate the results into local 64-bit 1158 * counters for accurate reporting through the `get_phy_stats` and 1159 * `get_link_stats` interfaces. 1160 * 1161 * Return: 0 on success or a negative error code on failure. 1162 */ 1163 int (*update_stats)(struct phy_device *dev); 1164 1165 /** @get_sset_count: Number of statistic counters */ 1166 int (*get_sset_count)(struct phy_device *dev); 1167 /** @get_strings: Names of the statistic counters */ 1168 void (*get_strings)(struct phy_device *dev, u8 *data); 1169 /** @get_stats: Return the statistic counter values */ 1170 void (*get_stats)(struct phy_device *dev, 1171 struct ethtool_stats *stats, u64 *data); 1172 1173 /* Get and Set PHY tunables */ 1174 /** @get_tunable: Return the value of a tunable */ 1175 int (*get_tunable)(struct phy_device *dev, 1176 struct ethtool_tunable *tuna, void *data); 1177 /** @set_tunable: Set the value of a tunable */ 1178 int (*set_tunable)(struct phy_device *dev, 1179 struct ethtool_tunable *tuna, 1180 const void *data); 1181 /** @set_loopback: Set the loopback mood of the PHY */ 1182 int (*set_loopback)(struct phy_device *dev, bool enable); 1183 /** @get_sqi: Get the signal quality indication */ 1184 int (*get_sqi)(struct phy_device *dev); 1185 /** @get_sqi_max: Get the maximum signal quality indication */ 1186 int (*get_sqi_max)(struct phy_device *dev); 1187 1188 /* PLCA RS interface */ 1189 /** @get_plca_cfg: Return the current PLCA configuration */ 1190 int (*get_plca_cfg)(struct phy_device *dev, 1191 struct phy_plca_cfg *plca_cfg); 1192 /** @set_plca_cfg: Set the PLCA configuration */ 1193 int (*set_plca_cfg)(struct phy_device *dev, 1194 const struct phy_plca_cfg *plca_cfg); 1195 /** @get_plca_status: Return the current PLCA status info */ 1196 int (*get_plca_status)(struct phy_device *dev, 1197 struct phy_plca_status *plca_st); 1198 1199 /** 1200 * @led_brightness_set: Set a PHY LED brightness. Index 1201 * indicates which of the PHYs led should be set. Value 1202 * follows the standard LED class meaning, e.g. LED_OFF, 1203 * LED_HALF, LED_FULL. 1204 */ 1205 int (*led_brightness_set)(struct phy_device *dev, 1206 u8 index, enum led_brightness value); 1207 1208 /** 1209 * @led_blink_set: Set a PHY LED blinking. Index indicates 1210 * which of the PHYs led should be configured to blink. Delays 1211 * are in milliseconds and if both are zero then a sensible 1212 * default should be chosen. The call should adjust the 1213 * timings in that case and if it can't match the values 1214 * specified exactly. 1215 */ 1216 int (*led_blink_set)(struct phy_device *dev, u8 index, 1217 unsigned long *delay_on, 1218 unsigned long *delay_off); 1219 /** 1220 * @led_hw_is_supported: Can the HW support the given rules. 1221 * @dev: PHY device which has the LED 1222 * @index: Which LED of the PHY device 1223 * @rules The core is interested in these rules 1224 * 1225 * Return 0 if yes, -EOPNOTSUPP if not, or an error code. 1226 */ 1227 int (*led_hw_is_supported)(struct phy_device *dev, u8 index, 1228 unsigned long rules); 1229 /** 1230 * @led_hw_control_set: Set the HW to control the LED 1231 * @dev: PHY device which has the LED 1232 * @index: Which LED of the PHY device 1233 * @rules The rules used to control the LED 1234 * 1235 * Returns 0, or a an error code. 1236 */ 1237 int (*led_hw_control_set)(struct phy_device *dev, u8 index, 1238 unsigned long rules); 1239 /** 1240 * @led_hw_control_get: Get how the HW is controlling the LED 1241 * @dev: PHY device which has the LED 1242 * @index: Which LED of the PHY device 1243 * @rules Pointer to the rules used to control the LED 1244 * 1245 * Set *@rules to how the HW is currently blinking. Returns 0 1246 * on success, or a error code if the current blinking cannot 1247 * be represented in rules, or some other error happens. 1248 */ 1249 int (*led_hw_control_get)(struct phy_device *dev, u8 index, 1250 unsigned long *rules); 1251 1252 /** 1253 * @led_polarity_set: Set the LED polarity modes 1254 * @dev: PHY device which has the LED 1255 * @index: Which LED of the PHY device 1256 * @modes: bitmap of LED polarity modes 1257 * 1258 * Configure LED with all the required polarity modes in @modes 1259 * to make it correctly turn ON or OFF. 1260 * 1261 * Returns 0, or an error code. 1262 */ 1263 int (*led_polarity_set)(struct phy_device *dev, int index, 1264 unsigned long modes); 1265 1266 /** 1267 * @get_next_update_time: Get the time until the next update event 1268 * @dev: PHY device 1269 * 1270 * Callback to determine the time (in jiffies) until the next 1271 * update event for the PHY state machine. Allows PHY drivers to 1272 * dynamically adjust polling intervals based on link state or other 1273 * conditions. 1274 * 1275 * Returns the time in jiffies until the next update event. 1276 */ 1277 unsigned int (*get_next_update_time)(struct phy_device *dev); 1278 }; 1279 #define to_phy_driver(d) container_of_const(to_mdio_common_driver(d), \ 1280 struct phy_driver, mdiodrv) 1281 1282 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 1283 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 1284 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 1285 1286 /** 1287 * phy_id_compare - compare @id1 with @id2 taking account of @mask 1288 * @id1: first PHY ID 1289 * @id2: second PHY ID 1290 * @mask: the PHY ID mask, set bits are significant in matching 1291 * 1292 * Return true if the bits from @id1 and @id2 specified by @mask match. 1293 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask). 1294 */ 1295 static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask) 1296 { 1297 return !((id1 ^ id2) & mask); 1298 } 1299 1300 /** 1301 * phydev_id_compare - compare @id with the PHY's Clause 22 ID 1302 * @phydev: the PHY device 1303 * @id: the PHY ID to be matched 1304 * 1305 * Compare the @phydev clause 22 ID with the provided @id and return true or 1306 * false depending whether it matches, using the bound driver mask. The 1307 * @phydev must be bound to a driver. 1308 */ 1309 static inline bool phydev_id_compare(struct phy_device *phydev, u32 id) 1310 { 1311 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask); 1312 } 1313 1314 const char *phy_speed_to_str(int speed); 1315 const char *phy_duplex_to_str(unsigned int duplex); 1316 const char *phy_rate_matching_to_str(int rate_matching); 1317 1318 int phy_interface_num_ports(phy_interface_t interface); 1319 1320 /* A structure for mapping a particular speed and duplex 1321 * combination to a particular SUPPORTED and ADVERTISED value 1322 */ 1323 struct phy_setting { 1324 u32 speed; 1325 u8 duplex; 1326 u8 bit; 1327 }; 1328 1329 const struct phy_setting * 1330 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 1331 bool exact); 1332 size_t phy_speeds(unsigned int *speeds, size_t size, 1333 unsigned long *mask); 1334 void of_set_phy_supported(struct phy_device *phydev); 1335 void of_set_phy_eee_broken(struct phy_device *phydev); 1336 void of_set_phy_timing_role(struct phy_device *phydev); 1337 int phy_speed_down_core(struct phy_device *phydev); 1338 1339 /** 1340 * phy_is_started - Convenience function to check whether PHY is started 1341 * @phydev: The phy_device struct 1342 */ 1343 static inline bool phy_is_started(struct phy_device *phydev) 1344 { 1345 return phydev->state >= PHY_UP; 1346 } 1347 1348 /** 1349 * phy_disable_eee_mode - Don't advertise an EEE mode. 1350 * @phydev: The phy_device struct 1351 * @link_mode: The EEE mode to be disabled 1352 */ 1353 static inline void phy_disable_eee_mode(struct phy_device *phydev, u32 link_mode) 1354 { 1355 WARN_ON(phy_is_started(phydev)); 1356 1357 linkmode_set_bit(link_mode, phydev->eee_disabled_modes); 1358 linkmode_clear_bit(link_mode, phydev->advertising_eee); 1359 } 1360 1361 void phy_resolve_aneg_pause(struct phy_device *phydev); 1362 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1363 void phy_check_downshift(struct phy_device *phydev); 1364 1365 /** 1366 * phy_read - Convenience function for reading a given PHY register 1367 * @phydev: the phy_device struct 1368 * @regnum: register number to read 1369 * 1370 * NOTE: MUST NOT be called from interrupt context, 1371 * because the bus read/write functions may wait for an interrupt 1372 * to conclude the operation. 1373 */ 1374 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1375 { 1376 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1377 } 1378 1379 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1380 timeout_us, sleep_before_read) \ 1381 ({ \ 1382 int __ret, __val; \ 1383 __ret = read_poll_timeout(__val = phy_read, val, \ 1384 __val < 0 || (cond), \ 1385 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1386 if (__val < 0) \ 1387 __ret = __val; \ 1388 if (__ret) \ 1389 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1390 __ret; \ 1391 }) 1392 1393 /** 1394 * __phy_read - convenience function for reading a given PHY register 1395 * @phydev: the phy_device struct 1396 * @regnum: register number to read 1397 * 1398 * The caller must have taken the MDIO bus lock. 1399 */ 1400 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1401 { 1402 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1403 } 1404 1405 /** 1406 * phy_write - Convenience function for writing a given PHY register 1407 * @phydev: the phy_device struct 1408 * @regnum: register number to write 1409 * @val: value to write to @regnum 1410 * 1411 * NOTE: MUST NOT be called from interrupt context, 1412 * because the bus read/write functions may wait for an interrupt 1413 * to conclude the operation. 1414 */ 1415 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1416 { 1417 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1418 } 1419 1420 /** 1421 * __phy_write - Convenience function for writing a given PHY register 1422 * @phydev: the phy_device struct 1423 * @regnum: register number to write 1424 * @val: value to write to @regnum 1425 * 1426 * The caller must have taken the MDIO bus lock. 1427 */ 1428 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1429 { 1430 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1431 val); 1432 } 1433 1434 /** 1435 * __phy_modify_changed() - Convenience function for modifying a PHY register 1436 * @phydev: a pointer to a &struct phy_device 1437 * @regnum: register number 1438 * @mask: bit mask of bits to clear 1439 * @set: bit mask of bits to set 1440 * 1441 * Unlocked helper function which allows a PHY register to be modified as 1442 * new register value = (old register value & ~mask) | set 1443 * 1444 * Returns negative errno, 0 if there was no change, and 1 in case of change 1445 */ 1446 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1447 u16 mask, u16 set) 1448 { 1449 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1450 regnum, mask, set); 1451 } 1452 1453 /* 1454 * phy_read_mmd - Convenience function for reading a register 1455 * from an MMD on a given PHY. 1456 */ 1457 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1458 1459 /** 1460 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1461 * condition is met or a timeout occurs 1462 * 1463 * @phydev: The phy_device struct 1464 * @devaddr: The MMD to read from 1465 * @regnum: The register on the MMD to read 1466 * @val: Variable to read the register into 1467 * @cond: Break condition (usually involving @val) 1468 * @sleep_us: Maximum time to sleep between reads in us (0 tight-loops). Please 1469 * read usleep_range() function description for details and 1470 * limitations. 1471 * @timeout_us: Timeout in us, 0 means never timeout 1472 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1473 * 1474 * Returns: 0 on success and -ETIMEDOUT upon a timeout. In either 1475 * case, the last read value at @args is stored in @val. Must not 1476 * be called from atomic context if sleep_us or timeout_us are used. 1477 */ 1478 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1479 sleep_us, timeout_us, sleep_before_read) \ 1480 ({ \ 1481 int __ret, __val; \ 1482 __ret = read_poll_timeout(__val = phy_read_mmd, val, \ 1483 __val < 0 || (cond), \ 1484 sleep_us, timeout_us, sleep_before_read, \ 1485 phydev, devaddr, regnum); \ 1486 if (__val < 0) \ 1487 __ret = __val; \ 1488 if (__ret) \ 1489 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1490 __ret; \ 1491 }) 1492 1493 /* 1494 * __phy_read_mmd - Convenience function for reading a register 1495 * from an MMD on a given PHY. 1496 */ 1497 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1498 1499 /* 1500 * phy_write_mmd - Convenience function for writing a register 1501 * on an MMD on a given PHY. 1502 */ 1503 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1504 1505 /* 1506 * __phy_write_mmd - Convenience function for writing a register 1507 * on an MMD on a given PHY. 1508 */ 1509 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1510 1511 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1512 u16 set); 1513 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1514 u16 set); 1515 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1516 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1517 1518 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1519 u16 mask, u16 set); 1520 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1521 u16 mask, u16 set); 1522 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1523 u16 mask, u16 set); 1524 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1525 u16 mask, u16 set); 1526 1527 /** 1528 * __phy_set_bits - Convenience function for setting bits in a PHY register 1529 * @phydev: the phy_device struct 1530 * @regnum: register number to write 1531 * @val: bits to set 1532 * 1533 * The caller must have taken the MDIO bus lock. 1534 */ 1535 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1536 { 1537 return __phy_modify(phydev, regnum, 0, val); 1538 } 1539 1540 /** 1541 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1542 * @phydev: the phy_device struct 1543 * @regnum: register number to write 1544 * @val: bits to clear 1545 * 1546 * The caller must have taken the MDIO bus lock. 1547 */ 1548 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1549 u16 val) 1550 { 1551 return __phy_modify(phydev, regnum, val, 0); 1552 } 1553 1554 /** 1555 * phy_set_bits - Convenience function for setting bits in a PHY register 1556 * @phydev: the phy_device struct 1557 * @regnum: register number to write 1558 * @val: bits to set 1559 */ 1560 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1561 { 1562 return phy_modify(phydev, regnum, 0, val); 1563 } 1564 1565 /** 1566 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1567 * @phydev: the phy_device struct 1568 * @regnum: register number to write 1569 * @val: bits to clear 1570 */ 1571 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1572 { 1573 return phy_modify(phydev, regnum, val, 0); 1574 } 1575 1576 /** 1577 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1578 * on MMD 1579 * @phydev: the phy_device struct 1580 * @devad: the MMD containing register to modify 1581 * @regnum: register number to modify 1582 * @val: bits to set 1583 * 1584 * The caller must have taken the MDIO bus lock. 1585 */ 1586 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1587 u32 regnum, u16 val) 1588 { 1589 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1590 } 1591 1592 /** 1593 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1594 * on MMD 1595 * @phydev: the phy_device struct 1596 * @devad: the MMD containing register to modify 1597 * @regnum: register number to modify 1598 * @val: bits to clear 1599 * 1600 * The caller must have taken the MDIO bus lock. 1601 */ 1602 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1603 u32 regnum, u16 val) 1604 { 1605 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1606 } 1607 1608 /** 1609 * phy_set_bits_mmd - Convenience function for setting bits in a register 1610 * on MMD 1611 * @phydev: the phy_device struct 1612 * @devad: the MMD containing register to modify 1613 * @regnum: register number to modify 1614 * @val: bits to set 1615 */ 1616 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1617 u32 regnum, u16 val) 1618 { 1619 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1620 } 1621 1622 /** 1623 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1624 * on MMD 1625 * @phydev: the phy_device struct 1626 * @devad: the MMD containing register to modify 1627 * @regnum: register number to modify 1628 * @val: bits to clear 1629 */ 1630 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1631 u32 regnum, u16 val) 1632 { 1633 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1634 } 1635 1636 /** 1637 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1638 * @phydev: the phy_device struct 1639 * 1640 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1641 * PHY_MAC_INTERRUPT 1642 */ 1643 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1644 { 1645 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1646 } 1647 1648 /** 1649 * phy_polling_mode - Convenience function for testing whether polling is 1650 * used to detect PHY status changes 1651 * @phydev: the phy_device struct 1652 */ 1653 static inline bool phy_polling_mode(struct phy_device *phydev) 1654 { 1655 if (phydev->state == PHY_CABLETEST) 1656 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1657 return true; 1658 1659 if (phydev->drv->update_stats) 1660 return true; 1661 1662 return phydev->irq == PHY_POLL; 1663 } 1664 1665 /** 1666 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1667 * @phydev: the phy_device struct 1668 */ 1669 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1670 { 1671 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1672 } 1673 1674 /** 1675 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1676 * @phydev: the phy_device struct 1677 */ 1678 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1679 { 1680 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1681 } 1682 1683 /** 1684 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1685 * PTP hardware clock capabilities. 1686 * @phydev: the phy_device struct 1687 */ 1688 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1689 { 1690 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1691 } 1692 1693 /** 1694 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1695 * @phydev: the phy_device struct 1696 */ 1697 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1698 { 1699 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1700 } 1701 1702 static inline int phy_hwtstamp(struct phy_device *phydev, 1703 struct kernel_hwtstamp_config *cfg, 1704 struct netlink_ext_ack *extack) 1705 { 1706 return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack); 1707 } 1708 1709 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1710 int type) 1711 { 1712 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1713 } 1714 1715 static inline int phy_ts_info(struct phy_device *phydev, 1716 struct kernel_ethtool_ts_info *tsinfo) 1717 { 1718 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1719 } 1720 1721 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1722 int type) 1723 { 1724 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1725 } 1726 1727 /** 1728 * phy_is_default_hwtstamp - Is the PHY hwtstamp the default timestamp 1729 * @phydev: Pointer to phy_device 1730 * 1731 * This is used to get default timestamping device taking into account 1732 * the new API choice, which is selecting the timestamping from MAC by 1733 * default if the phydev does not have default_timestamp flag enabled. 1734 * 1735 * Return: True if phy is the default hw timestamp, false otherwise. 1736 */ 1737 static inline bool phy_is_default_hwtstamp(struct phy_device *phydev) 1738 { 1739 return phy_has_hwtstamp(phydev) && phydev->default_timestamp; 1740 } 1741 1742 /** 1743 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1744 * @phydev: the phy_device struct 1745 */ 1746 static inline bool phy_on_sfp(struct phy_device *phydev) 1747 { 1748 return phydev->is_on_sfp_module; 1749 } 1750 1751 /** 1752 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1753 * PHY interface mode is RGMII (all variants) 1754 * @mode: the &phy_interface_t enum 1755 */ 1756 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1757 { 1758 return mode >= PHY_INTERFACE_MODE_RGMII && 1759 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1760 }; 1761 1762 /** 1763 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1764 * negotiation 1765 * @mode: one of &enum phy_interface_t 1766 * 1767 * Returns true if the PHY interface mode uses the 16-bit negotiation 1768 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1769 */ 1770 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1771 { 1772 return mode == PHY_INTERFACE_MODE_1000BASEX || 1773 mode == PHY_INTERFACE_MODE_2500BASEX; 1774 } 1775 1776 /** 1777 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1778 * is RGMII (all variants) 1779 * @phydev: the phy_device struct 1780 */ 1781 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1782 { 1783 return phy_interface_mode_is_rgmii(phydev->interface); 1784 }; 1785 1786 /** 1787 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1788 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1789 * @phydev: the phy_device struct 1790 */ 1791 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1792 { 1793 return phydev->is_pseudo_fixed_link; 1794 } 1795 1796 int phy_save_page(struct phy_device *phydev); 1797 int phy_select_page(struct phy_device *phydev, int page); 1798 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1799 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1800 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1801 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1802 u16 mask, u16 set); 1803 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1804 u16 mask, u16 set); 1805 1806 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1807 bool is_c45, 1808 struct phy_c45_device_ids *c45_ids); 1809 #if IS_ENABLED(CONFIG_PHYLIB) 1810 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1811 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1812 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1813 struct phy_device *device_phy_find_device(struct device *dev); 1814 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode); 1815 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1816 int phy_device_register(struct phy_device *phy); 1817 void phy_device_free(struct phy_device *phydev); 1818 #else 1819 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1820 { 1821 return 0; 1822 } 1823 static inline 1824 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1825 { 1826 return 0; 1827 } 1828 1829 static inline 1830 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1831 { 1832 return NULL; 1833 } 1834 1835 static inline struct phy_device *device_phy_find_device(struct device *dev) 1836 { 1837 return NULL; 1838 } 1839 1840 static inline 1841 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1842 { 1843 return NULL; 1844 } 1845 1846 static inline 1847 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1848 { 1849 return NULL; 1850 } 1851 1852 static inline int phy_device_register(struct phy_device *phy) 1853 { 1854 return 0; 1855 } 1856 1857 static inline void phy_device_free(struct phy_device *phydev) { } 1858 #endif /* CONFIG_PHYLIB */ 1859 void phy_device_remove(struct phy_device *phydev); 1860 int phy_get_c45_ids(struct phy_device *phydev); 1861 int phy_init_hw(struct phy_device *phydev); 1862 int phy_suspend(struct phy_device *phydev); 1863 int phy_resume(struct phy_device *phydev); 1864 int __phy_resume(struct phy_device *phydev); 1865 int phy_loopback(struct phy_device *phydev, bool enable); 1866 int phy_sfp_connect_phy(void *upstream, struct phy_device *phy); 1867 void phy_sfp_disconnect_phy(void *upstream, struct phy_device *phy); 1868 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1869 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1870 int phy_sfp_probe(struct phy_device *phydev, 1871 const struct sfp_upstream_ops *ops); 1872 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1873 phy_interface_t interface); 1874 struct phy_device *phy_find_first(struct mii_bus *bus); 1875 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1876 u32 flags, phy_interface_t interface); 1877 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1878 void (*handler)(struct net_device *), 1879 phy_interface_t interface); 1880 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1881 void (*handler)(struct net_device *), 1882 phy_interface_t interface); 1883 void phy_disconnect(struct phy_device *phydev); 1884 void phy_detach(struct phy_device *phydev); 1885 void phy_start(struct phy_device *phydev); 1886 void phy_stop(struct phy_device *phydev); 1887 int phy_config_aneg(struct phy_device *phydev); 1888 int _phy_start_aneg(struct phy_device *phydev); 1889 int phy_start_aneg(struct phy_device *phydev); 1890 int phy_aneg_done(struct phy_device *phydev); 1891 unsigned int phy_inband_caps(struct phy_device *phydev, 1892 phy_interface_t interface); 1893 int phy_config_inband(struct phy_device *phydev, unsigned int modes); 1894 int phy_speed_down(struct phy_device *phydev, bool sync); 1895 int phy_speed_up(struct phy_device *phydev); 1896 bool phy_check_valid(int speed, int duplex, unsigned long *features); 1897 1898 int phy_restart_aneg(struct phy_device *phydev); 1899 int phy_reset_after_clk_enable(struct phy_device *phydev); 1900 1901 #if IS_ENABLED(CONFIG_PHYLIB) 1902 int phy_start_cable_test(struct phy_device *phydev, 1903 struct netlink_ext_ack *extack); 1904 int phy_start_cable_test_tdr(struct phy_device *phydev, 1905 struct netlink_ext_ack *extack, 1906 const struct phy_tdr_config *config); 1907 #else 1908 static inline 1909 int phy_start_cable_test(struct phy_device *phydev, 1910 struct netlink_ext_ack *extack) 1911 { 1912 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1913 return -EOPNOTSUPP; 1914 } 1915 static inline 1916 int phy_start_cable_test_tdr(struct phy_device *phydev, 1917 struct netlink_ext_ack *extack, 1918 const struct phy_tdr_config *config) 1919 { 1920 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1921 return -EOPNOTSUPP; 1922 } 1923 #endif 1924 1925 static inline void phy_device_reset(struct phy_device *phydev, int value) 1926 { 1927 mdio_device_reset(&phydev->mdio, value); 1928 } 1929 1930 #define phydev_err(_phydev, format, args...) \ 1931 dev_err(&_phydev->mdio.dev, format, ##args) 1932 1933 #define phydev_err_probe(_phydev, err, format, args...) \ 1934 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1935 1936 #define phydev_info(_phydev, format, args...) \ 1937 dev_info(&_phydev->mdio.dev, format, ##args) 1938 1939 #define phydev_warn(_phydev, format, args...) \ 1940 dev_warn(&_phydev->mdio.dev, format, ##args) 1941 1942 #define phydev_dbg(_phydev, format, args...) \ 1943 dev_dbg(&_phydev->mdio.dev, format, ##args) 1944 1945 static inline const char *phydev_name(const struct phy_device *phydev) 1946 { 1947 return dev_name(&phydev->mdio.dev); 1948 } 1949 1950 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1951 { 1952 mutex_lock(&phydev->mdio.bus->mdio_lock); 1953 } 1954 1955 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1956 { 1957 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1958 } 1959 1960 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1961 __printf(2, 3); 1962 char *phy_attached_info_irq(struct phy_device *phydev) 1963 __malloc; 1964 void phy_attached_info(struct phy_device *phydev); 1965 1966 /* Clause 22 PHY */ 1967 int genphy_read_abilities(struct phy_device *phydev); 1968 int genphy_setup_forced(struct phy_device *phydev); 1969 int genphy_restart_aneg(struct phy_device *phydev); 1970 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1971 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1972 int genphy_aneg_done(struct phy_device *phydev); 1973 int genphy_update_link(struct phy_device *phydev); 1974 int genphy_read_lpa(struct phy_device *phydev); 1975 int genphy_read_status_fixed(struct phy_device *phydev); 1976 int genphy_read_status(struct phy_device *phydev); 1977 int genphy_read_master_slave(struct phy_device *phydev); 1978 int genphy_suspend(struct phy_device *phydev); 1979 int genphy_resume(struct phy_device *phydev); 1980 int genphy_loopback(struct phy_device *phydev, bool enable); 1981 int genphy_soft_reset(struct phy_device *phydev); 1982 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1983 1984 static inline int genphy_config_aneg(struct phy_device *phydev) 1985 { 1986 return __genphy_config_aneg(phydev, false); 1987 } 1988 1989 static inline int genphy_no_config_intr(struct phy_device *phydev) 1990 { 1991 return 0; 1992 } 1993 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1994 u16 regnum); 1995 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1996 u16 regnum, u16 val); 1997 1998 /* Clause 37 */ 1999 int genphy_c37_config_aneg(struct phy_device *phydev); 2000 int genphy_c37_read_status(struct phy_device *phydev, bool *changed); 2001 2002 /* Clause 45 PHY */ 2003 int genphy_c45_restart_aneg(struct phy_device *phydev); 2004 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 2005 int genphy_c45_aneg_done(struct phy_device *phydev); 2006 int genphy_c45_read_link(struct phy_device *phydev); 2007 int genphy_c45_read_lpa(struct phy_device *phydev); 2008 int genphy_c45_read_pma(struct phy_device *phydev); 2009 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 2010 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 2011 int genphy_c45_an_config_aneg(struct phy_device *phydev); 2012 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 2013 int genphy_c45_read_mdix(struct phy_device *phydev); 2014 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 2015 int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev); 2016 int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev); 2017 int genphy_c45_read_eee_abilities(struct phy_device *phydev); 2018 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 2019 int genphy_c45_read_status(struct phy_device *phydev); 2020 int genphy_c45_baset1_read_status(struct phy_device *phydev); 2021 int genphy_c45_config_aneg(struct phy_device *phydev); 2022 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 2023 int genphy_c45_pma_resume(struct phy_device *phydev); 2024 int genphy_c45_pma_suspend(struct phy_device *phydev); 2025 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 2026 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 2027 struct phy_plca_cfg *plca_cfg); 2028 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 2029 const struct phy_plca_cfg *plca_cfg); 2030 int genphy_c45_plca_get_status(struct phy_device *phydev, 2031 struct phy_plca_status *plca_st); 2032 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *lp); 2033 int genphy_c45_ethtool_get_eee(struct phy_device *phydev, 2034 struct ethtool_keee *data); 2035 int genphy_c45_ethtool_set_eee(struct phy_device *phydev, 2036 struct ethtool_keee *data); 2037 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev); 2038 int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv); 2039 2040 /* Generic C45 PHY driver */ 2041 extern struct phy_driver genphy_c45_driver; 2042 2043 /* The gen10g_* functions are the old Clause 45 stub */ 2044 int gen10g_config_aneg(struct phy_device *phydev); 2045 2046 static inline int phy_read_status(struct phy_device *phydev) 2047 { 2048 if (!phydev->drv) 2049 return -EIO; 2050 2051 if (phydev->drv->read_status) 2052 return phydev->drv->read_status(phydev); 2053 else 2054 return genphy_read_status(phydev); 2055 } 2056 2057 void phy_driver_unregister(struct phy_driver *drv); 2058 void phy_drivers_unregister(struct phy_driver *drv, int n); 2059 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 2060 int phy_drivers_register(struct phy_driver *new_driver, int n, 2061 struct module *owner); 2062 void phy_error(struct phy_device *phydev); 2063 void phy_state_machine(struct work_struct *work); 2064 void phy_trigger_machine(struct phy_device *phydev); 2065 void phy_mac_interrupt(struct phy_device *phydev); 2066 void phy_start_machine(struct phy_device *phydev); 2067 void phy_stop_machine(struct phy_device *phydev); 2068 void phy_ethtool_ksettings_get(struct phy_device *phydev, 2069 struct ethtool_link_ksettings *cmd); 2070 int phy_ethtool_ksettings_set(struct phy_device *phydev, 2071 const struct ethtool_link_ksettings *cmd); 2072 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 2073 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 2074 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 2075 int phy_disable_interrupts(struct phy_device *phydev); 2076 void phy_request_interrupt(struct phy_device *phydev); 2077 void phy_free_interrupt(struct phy_device *phydev); 2078 void phy_print_status(struct phy_device *phydev); 2079 int phy_get_rate_matching(struct phy_device *phydev, 2080 phy_interface_t iface); 2081 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 2082 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 2083 void phy_advertise_supported(struct phy_device *phydev); 2084 void phy_advertise_eee_all(struct phy_device *phydev); 2085 void phy_support_sym_pause(struct phy_device *phydev); 2086 void phy_support_asym_pause(struct phy_device *phydev); 2087 void phy_support_eee(struct phy_device *phydev); 2088 void phy_disable_eee(struct phy_device *phydev); 2089 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 2090 bool autoneg); 2091 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 2092 bool phy_validate_pause(struct phy_device *phydev, 2093 struct ethtool_pauseparam *pp); 2094 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 2095 2096 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 2097 const int *delay_values, int size, bool is_rx); 2098 2099 int phy_get_tx_amplitude_gain(struct phy_device *phydev, struct device *dev, 2100 enum ethtool_link_mode_bit_indices linkmode, 2101 u32 *val); 2102 2103 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 2104 bool *tx_pause, bool *rx_pause); 2105 2106 int phy_register_fixup_for_id(const char *bus_id, 2107 int (*run)(struct phy_device *)); 2108 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 2109 int (*run)(struct phy_device *)); 2110 2111 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 2112 int phy_unregister_fixup_for_id(const char *bus_id); 2113 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 2114 2115 int phy_eee_tx_clock_stop_capable(struct phy_device *phydev); 2116 int phy_eee_rx_clock_stop(struct phy_device *phydev, bool clk_stop_enable); 2117 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 2118 int phy_get_eee_err(struct phy_device *phydev); 2119 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data); 2120 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_keee *data); 2121 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 2122 void phy_ethtool_get_wol(struct phy_device *phydev, 2123 struct ethtool_wolinfo *wol); 2124 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 2125 struct ethtool_link_ksettings *cmd); 2126 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 2127 const struct ethtool_link_ksettings *cmd); 2128 int phy_ethtool_nway_reset(struct net_device *ndev); 2129 int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size); 2130 int of_phy_package_join(struct phy_device *phydev, size_t priv_size); 2131 void phy_package_leave(struct phy_device *phydev); 2132 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 2133 int base_addr, size_t priv_size); 2134 int devm_of_phy_package_join(struct device *dev, struct phy_device *phydev, 2135 size_t priv_size); 2136 2137 int __init mdio_bus_init(void); 2138 void mdio_bus_exit(void); 2139 2140 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 2141 int phy_ethtool_get_sset_count(struct phy_device *phydev); 2142 int phy_ethtool_get_stats(struct phy_device *phydev, 2143 struct ethtool_stats *stats, u64 *data); 2144 2145 void __phy_ethtool_get_phy_stats(struct phy_device *phydev, 2146 struct ethtool_eth_phy_stats *phy_stats, 2147 struct ethtool_phy_stats *phydev_stats); 2148 void __phy_ethtool_get_link_ext_stats(struct phy_device *phydev, 2149 struct ethtool_link_ext_stats *link_stats); 2150 2151 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 2152 struct phy_plca_cfg *plca_cfg); 2153 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 2154 const struct phy_plca_cfg *plca_cfg, 2155 struct netlink_ext_ack *extack); 2156 int phy_ethtool_get_plca_status(struct phy_device *phydev, 2157 struct phy_plca_status *plca_st); 2158 2159 int __phy_hwtstamp_get(struct phy_device *phydev, 2160 struct kernel_hwtstamp_config *config); 2161 int __phy_hwtstamp_set(struct phy_device *phydev, 2162 struct kernel_hwtstamp_config *config, 2163 struct netlink_ext_ack *extack); 2164 2165 static inline int phy_package_address(struct phy_device *phydev, 2166 unsigned int addr_offset) 2167 { 2168 struct phy_package_shared *shared = phydev->shared; 2169 u8 base_addr = shared->base_addr; 2170 2171 if (addr_offset >= PHY_MAX_ADDR - base_addr) 2172 return -EIO; 2173 2174 /* we know that addr will be in the range 0..31 and thus the 2175 * implicit cast to a signed int is not a problem. 2176 */ 2177 return base_addr + addr_offset; 2178 } 2179 2180 static inline int phy_package_read(struct phy_device *phydev, 2181 unsigned int addr_offset, u32 regnum) 2182 { 2183 int addr = phy_package_address(phydev, addr_offset); 2184 2185 if (addr < 0) 2186 return addr; 2187 2188 return mdiobus_read(phydev->mdio.bus, addr, regnum); 2189 } 2190 2191 static inline int __phy_package_read(struct phy_device *phydev, 2192 unsigned int addr_offset, u32 regnum) 2193 { 2194 int addr = phy_package_address(phydev, addr_offset); 2195 2196 if (addr < 0) 2197 return addr; 2198 2199 return __mdiobus_read(phydev->mdio.bus, addr, regnum); 2200 } 2201 2202 static inline int phy_package_write(struct phy_device *phydev, 2203 unsigned int addr_offset, u32 regnum, 2204 u16 val) 2205 { 2206 int addr = phy_package_address(phydev, addr_offset); 2207 2208 if (addr < 0) 2209 return addr; 2210 2211 return mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2212 } 2213 2214 static inline int __phy_package_write(struct phy_device *phydev, 2215 unsigned int addr_offset, u32 regnum, 2216 u16 val) 2217 { 2218 int addr = phy_package_address(phydev, addr_offset); 2219 2220 if (addr < 0) 2221 return addr; 2222 2223 return __mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2224 } 2225 2226 int __phy_package_read_mmd(struct phy_device *phydev, 2227 unsigned int addr_offset, int devad, 2228 u32 regnum); 2229 2230 int phy_package_read_mmd(struct phy_device *phydev, 2231 unsigned int addr_offset, int devad, 2232 u32 regnum); 2233 2234 int __phy_package_write_mmd(struct phy_device *phydev, 2235 unsigned int addr_offset, int devad, 2236 u32 regnum, u16 val); 2237 2238 int phy_package_write_mmd(struct phy_device *phydev, 2239 unsigned int addr_offset, int devad, 2240 u32 regnum, u16 val); 2241 2242 static inline bool __phy_package_set_once(struct phy_device *phydev, 2243 unsigned int b) 2244 { 2245 struct phy_package_shared *shared = phydev->shared; 2246 2247 if (!shared) 2248 return false; 2249 2250 return !test_and_set_bit(b, &shared->flags); 2251 } 2252 2253 static inline bool phy_package_init_once(struct phy_device *phydev) 2254 { 2255 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 2256 } 2257 2258 static inline bool phy_package_probe_once(struct phy_device *phydev) 2259 { 2260 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 2261 } 2262 2263 extern const struct bus_type mdio_bus_type; 2264 2265 struct mdio_board_info { 2266 const char *bus_id; 2267 char modalias[MDIO_NAME_SIZE]; 2268 int mdio_addr; 2269 const void *platform_data; 2270 }; 2271 2272 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 2273 int mdiobus_register_board_info(const struct mdio_board_info *info, 2274 unsigned int n); 2275 #else 2276 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 2277 unsigned int n) 2278 { 2279 return 0; 2280 } 2281 #endif 2282 2283 2284 /** 2285 * phy_module_driver() - Helper macro for registering PHY drivers 2286 * @__phy_drivers: array of PHY drivers to register 2287 * @__count: Numbers of members in array 2288 * 2289 * Helper macro for PHY drivers which do not do anything special in module 2290 * init/exit. Each module may only use this macro once, and calling it 2291 * replaces module_init() and module_exit(). 2292 */ 2293 #define phy_module_driver(__phy_drivers, __count) \ 2294 static int __init phy_module_init(void) \ 2295 { \ 2296 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 2297 } \ 2298 module_init(phy_module_init); \ 2299 static void __exit phy_module_exit(void) \ 2300 { \ 2301 phy_drivers_unregister(__phy_drivers, __count); \ 2302 } \ 2303 module_exit(phy_module_exit) 2304 2305 #define module_phy_driver(__phy_drivers) \ 2306 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 2307 2308 bool phy_driver_is_genphy(struct phy_device *phydev); 2309 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 2310 2311 #endif /* __PHY_H */ 2312