1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/leds.h> 18 #include <linux/linkmode.h> 19 #include <linux/netlink.h> 20 #include <linux/mdio.h> 21 #include <linux/mii.h> 22 #include <linux/mii_timestamper.h> 23 #include <linux/module.h> 24 #include <linux/timer.h> 25 #include <linux/workqueue.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/u64_stats_sync.h> 28 #include <linux/irqreturn.h> 29 #include <linux/iopoll.h> 30 #include <linux/refcount.h> 31 32 #include <linux/atomic.h> 33 34 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 35 SUPPORTED_TP | \ 36 SUPPORTED_MII) 37 38 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 39 SUPPORTED_10baseT_Full) 40 41 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 42 SUPPORTED_100baseT_Full) 43 44 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 45 SUPPORTED_1000baseT_Full) 46 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 54 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 55 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 56 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init; 57 58 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 59 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 60 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 61 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 62 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 63 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 64 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 65 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 66 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 67 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features) 68 69 extern const int phy_basic_ports_array[3]; 70 extern const int phy_fibre_port_array[1]; 71 extern const int phy_all_ports_features_array[7]; 72 extern const int phy_10_100_features_array[4]; 73 extern const int phy_basic_t1_features_array[3]; 74 extern const int phy_basic_t1s_p2mp_features_array[2]; 75 extern const int phy_gbit_features_array[2]; 76 extern const int phy_10gbit_features_array[1]; 77 78 /* 79 * Set phydev->irq to PHY_POLL if interrupts are not supported, 80 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 81 * the attached MAC driver handles the interrupt 82 */ 83 #define PHY_POLL -1 84 #define PHY_MAC_INTERRUPT -2 85 86 #define PHY_IS_INTERNAL 0x00000001 87 #define PHY_RST_AFTER_CLK_EN 0x00000002 88 #define PHY_POLL_CABLE_TEST 0x00000004 89 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008 90 #define MDIO_DEVICE_IS_PHY 0x80000000 91 92 /** 93 * enum phy_interface_t - Interface Mode definitions 94 * 95 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 96 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 97 * @PHY_INTERFACE_MODE_MII: Media-independent interface 98 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 99 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 100 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 101 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 102 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 103 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 104 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 105 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 106 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 107 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 108 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 109 * @PHY_INTERFACE_MODE_SMII: Serial MII 110 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 111 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 112 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 113 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII 114 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 115 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 116 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 117 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 118 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 119 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 120 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 121 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 122 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 123 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 124 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 125 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 126 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 127 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 128 * @PHY_INTERFACE_MODE_MAX: Book keeping 129 * 130 * Describes the interface between the MAC and PHY. 131 */ 132 typedef enum { 133 PHY_INTERFACE_MODE_NA, 134 PHY_INTERFACE_MODE_INTERNAL, 135 PHY_INTERFACE_MODE_MII, 136 PHY_INTERFACE_MODE_GMII, 137 PHY_INTERFACE_MODE_SGMII, 138 PHY_INTERFACE_MODE_TBI, 139 PHY_INTERFACE_MODE_REVMII, 140 PHY_INTERFACE_MODE_RMII, 141 PHY_INTERFACE_MODE_REVRMII, 142 PHY_INTERFACE_MODE_RGMII, 143 PHY_INTERFACE_MODE_RGMII_ID, 144 PHY_INTERFACE_MODE_RGMII_RXID, 145 PHY_INTERFACE_MODE_RGMII_TXID, 146 PHY_INTERFACE_MODE_RTBI, 147 PHY_INTERFACE_MODE_SMII, 148 PHY_INTERFACE_MODE_XGMII, 149 PHY_INTERFACE_MODE_XLGMII, 150 PHY_INTERFACE_MODE_MOCA, 151 PHY_INTERFACE_MODE_PSGMII, 152 PHY_INTERFACE_MODE_QSGMII, 153 PHY_INTERFACE_MODE_TRGMII, 154 PHY_INTERFACE_MODE_100BASEX, 155 PHY_INTERFACE_MODE_1000BASEX, 156 PHY_INTERFACE_MODE_2500BASEX, 157 PHY_INTERFACE_MODE_5GBASER, 158 PHY_INTERFACE_MODE_RXAUI, 159 PHY_INTERFACE_MODE_XAUI, 160 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 161 PHY_INTERFACE_MODE_10GBASER, 162 PHY_INTERFACE_MODE_25GBASER, 163 PHY_INTERFACE_MODE_USXGMII, 164 /* 10GBASE-KR - with Clause 73 AN */ 165 PHY_INTERFACE_MODE_10GKR, 166 PHY_INTERFACE_MODE_QUSGMII, 167 PHY_INTERFACE_MODE_1000BASEKX, 168 PHY_INTERFACE_MODE_MAX, 169 } phy_interface_t; 170 171 /* PHY interface mode bitmap handling */ 172 #define DECLARE_PHY_INTERFACE_MASK(name) \ 173 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 174 175 static inline void phy_interface_zero(unsigned long *intf) 176 { 177 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 178 } 179 180 static inline bool phy_interface_empty(const unsigned long *intf) 181 { 182 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 183 } 184 185 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 186 const unsigned long *b) 187 { 188 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 189 } 190 191 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 192 const unsigned long *b) 193 { 194 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 195 } 196 197 static inline void phy_interface_set_rgmii(unsigned long *intf) 198 { 199 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 200 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 201 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 202 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 203 } 204 205 /* 206 * phy_supported_speeds - return all speeds currently supported by a PHY device 207 */ 208 unsigned int phy_supported_speeds(struct phy_device *phy, 209 unsigned int *speeds, 210 unsigned int size); 211 212 /** 213 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 214 * @interface: enum phy_interface_t value 215 * 216 * Description: maps enum &phy_interface_t defined in this file 217 * into the device tree binding of 'phy-mode', so that Ethernet 218 * device driver can get PHY interface from device tree. 219 */ 220 static inline const char *phy_modes(phy_interface_t interface) 221 { 222 switch (interface) { 223 case PHY_INTERFACE_MODE_NA: 224 return ""; 225 case PHY_INTERFACE_MODE_INTERNAL: 226 return "internal"; 227 case PHY_INTERFACE_MODE_MII: 228 return "mii"; 229 case PHY_INTERFACE_MODE_GMII: 230 return "gmii"; 231 case PHY_INTERFACE_MODE_SGMII: 232 return "sgmii"; 233 case PHY_INTERFACE_MODE_TBI: 234 return "tbi"; 235 case PHY_INTERFACE_MODE_REVMII: 236 return "rev-mii"; 237 case PHY_INTERFACE_MODE_RMII: 238 return "rmii"; 239 case PHY_INTERFACE_MODE_REVRMII: 240 return "rev-rmii"; 241 case PHY_INTERFACE_MODE_RGMII: 242 return "rgmii"; 243 case PHY_INTERFACE_MODE_RGMII_ID: 244 return "rgmii-id"; 245 case PHY_INTERFACE_MODE_RGMII_RXID: 246 return "rgmii-rxid"; 247 case PHY_INTERFACE_MODE_RGMII_TXID: 248 return "rgmii-txid"; 249 case PHY_INTERFACE_MODE_RTBI: 250 return "rtbi"; 251 case PHY_INTERFACE_MODE_SMII: 252 return "smii"; 253 case PHY_INTERFACE_MODE_XGMII: 254 return "xgmii"; 255 case PHY_INTERFACE_MODE_XLGMII: 256 return "xlgmii"; 257 case PHY_INTERFACE_MODE_MOCA: 258 return "moca"; 259 case PHY_INTERFACE_MODE_PSGMII: 260 return "psgmii"; 261 case PHY_INTERFACE_MODE_QSGMII: 262 return "qsgmii"; 263 case PHY_INTERFACE_MODE_TRGMII: 264 return "trgmii"; 265 case PHY_INTERFACE_MODE_1000BASEX: 266 return "1000base-x"; 267 case PHY_INTERFACE_MODE_1000BASEKX: 268 return "1000base-kx"; 269 case PHY_INTERFACE_MODE_2500BASEX: 270 return "2500base-x"; 271 case PHY_INTERFACE_MODE_5GBASER: 272 return "5gbase-r"; 273 case PHY_INTERFACE_MODE_RXAUI: 274 return "rxaui"; 275 case PHY_INTERFACE_MODE_XAUI: 276 return "xaui"; 277 case PHY_INTERFACE_MODE_10GBASER: 278 return "10gbase-r"; 279 case PHY_INTERFACE_MODE_25GBASER: 280 return "25gbase-r"; 281 case PHY_INTERFACE_MODE_USXGMII: 282 return "usxgmii"; 283 case PHY_INTERFACE_MODE_10GKR: 284 return "10gbase-kr"; 285 case PHY_INTERFACE_MODE_100BASEX: 286 return "100base-x"; 287 case PHY_INTERFACE_MODE_QUSGMII: 288 return "qusgmii"; 289 default: 290 return "unknown"; 291 } 292 } 293 294 #define PHY_INIT_TIMEOUT 100000 295 #define PHY_FORCE_TIMEOUT 10 296 297 #define PHY_MAX_ADDR 32 298 299 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 300 #define PHY_ID_FMT "%s:%02x" 301 302 #define MII_BUS_ID_SIZE 61 303 304 struct device; 305 struct kernel_hwtstamp_config; 306 struct phylink; 307 struct sfp_bus; 308 struct sfp_upstream_ops; 309 struct sk_buff; 310 311 /** 312 * struct mdio_bus_stats - Statistics counters for MDIO busses 313 * @transfers: Total number of transfers, i.e. @writes + @reads 314 * @errors: Number of MDIO transfers that returned an error 315 * @writes: Number of write transfers 316 * @reads: Number of read transfers 317 * @syncp: Synchronisation for incrementing statistics 318 */ 319 struct mdio_bus_stats { 320 u64_stats_t transfers; 321 u64_stats_t errors; 322 u64_stats_t writes; 323 u64_stats_t reads; 324 /* Must be last, add new statistics above */ 325 struct u64_stats_sync syncp; 326 }; 327 328 /** 329 * struct phy_package_shared - Shared information in PHY packages 330 * @base_addr: Base PHY address of PHY package used to combine PHYs 331 * in one package and for offset calculation of phy_package_read/write 332 * @refcnt: Number of PHYs connected to this shared data 333 * @flags: Initialization of PHY package 334 * @priv_size: Size of the shared private data @priv 335 * @priv: Driver private data shared across a PHY package 336 * 337 * Represents a shared structure between different phydev's in the same 338 * package, for example a quad PHY. See phy_package_join() and 339 * phy_package_leave(). 340 */ 341 struct phy_package_shared { 342 u8 base_addr; 343 refcount_t refcnt; 344 unsigned long flags; 345 size_t priv_size; 346 347 /* private data pointer */ 348 /* note that this pointer is shared between different phydevs and 349 * the user has to take care of appropriate locking. It is allocated 350 * and freed automatically by phy_package_join() and 351 * phy_package_leave(). 352 */ 353 void *priv; 354 }; 355 356 /* used as bit number in atomic bitops */ 357 #define PHY_SHARED_F_INIT_DONE 0 358 #define PHY_SHARED_F_PROBE_DONE 1 359 360 /** 361 * struct mii_bus - Represents an MDIO bus 362 * 363 * @owner: Who owns this device 364 * @name: User friendly name for this MDIO device, or driver name 365 * @id: Unique identifier for this bus, typical from bus hierarchy 366 * @priv: Driver private data 367 * 368 * The Bus class for PHYs. Devices which provide access to 369 * PHYs should register using this structure 370 */ 371 struct mii_bus { 372 struct module *owner; 373 const char *name; 374 char id[MII_BUS_ID_SIZE]; 375 void *priv; 376 /** @read: Perform a read transfer on the bus */ 377 int (*read)(struct mii_bus *bus, int addr, int regnum); 378 /** @write: Perform a write transfer on the bus */ 379 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 380 /** @read_c45: Perform a C45 read transfer on the bus */ 381 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 382 /** @write_c45: Perform a C45 write transfer on the bus */ 383 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 384 int regnum, u16 val); 385 /** @reset: Perform a reset of the bus */ 386 int (*reset)(struct mii_bus *bus); 387 388 /** @stats: Statistic counters per device on the bus */ 389 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 390 391 /** 392 * @mdio_lock: A lock to ensure that only one thing can read/write 393 * the MDIO bus at a time 394 */ 395 struct mutex mdio_lock; 396 397 /** @parent: Parent device of this bus */ 398 struct device *parent; 399 /** @state: State of bus structure */ 400 enum { 401 MDIOBUS_ALLOCATED = 1, 402 MDIOBUS_REGISTERED, 403 MDIOBUS_UNREGISTERED, 404 MDIOBUS_RELEASED, 405 } state; 406 407 /** @dev: Kernel device representation */ 408 struct device dev; 409 410 /** @mdio_map: list of all MDIO devices on bus */ 411 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 412 413 /** @phy_mask: PHY addresses to be ignored when probing */ 414 u32 phy_mask; 415 416 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 417 u32 phy_ignore_ta_mask; 418 419 /** 420 * @irq: An array of interrupts, each PHY's interrupt at the index 421 * matching its address 422 */ 423 int irq[PHY_MAX_ADDR]; 424 425 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 426 int reset_delay_us; 427 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 428 int reset_post_delay_us; 429 /** @reset_gpiod: Reset GPIO descriptor pointer */ 430 struct gpio_desc *reset_gpiod; 431 432 /** @shared_lock: protect access to the shared element */ 433 struct mutex shared_lock; 434 435 /** @shared: shared state across different PHYs */ 436 struct phy_package_shared *shared[PHY_MAX_ADDR]; 437 438 /** @__unregister_callback: called at the last step of unregistration */ 439 void (*__unregister_callback)(struct mii_bus *bus); 440 }; 441 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 442 443 struct mii_bus *mdiobus_alloc_size(size_t size); 444 445 /** 446 * mdiobus_alloc - Allocate an MDIO bus structure 447 * 448 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 449 * for the driver to register the bus. 450 */ 451 static inline struct mii_bus *mdiobus_alloc(void) 452 { 453 return mdiobus_alloc_size(0); 454 } 455 456 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 457 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 458 struct module *owner); 459 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 460 #define devm_mdiobus_register(dev, bus) \ 461 __devm_mdiobus_register(dev, bus, THIS_MODULE) 462 463 void mdiobus_unregister(struct mii_bus *bus); 464 void mdiobus_free(struct mii_bus *bus); 465 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 466 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 467 { 468 return devm_mdiobus_alloc_size(dev, 0); 469 } 470 471 struct mii_bus *mdio_find_bus(const char *mdio_name); 472 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); 473 474 #define PHY_INTERRUPT_DISABLED false 475 #define PHY_INTERRUPT_ENABLED true 476 477 /** 478 * enum phy_state - PHY state machine states: 479 * 480 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 481 * should be called if and only if the PHY is in this state, 482 * given that the PHY device exists. 483 * - PHY driver probe function will set the state to @PHY_READY 484 * 485 * @PHY_READY: PHY is ready to send and receive packets, but the 486 * controller is not. By default, PHYs which do not implement 487 * probe will be set to this state by phy_probe(). 488 * - start will set the state to UP 489 * 490 * @PHY_UP: The PHY and attached device are ready to do work. 491 * Interrupts should be started here. 492 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 493 * 494 * @PHY_NOLINK: PHY is up, but not currently plugged in. 495 * - irq or timer will set @PHY_RUNNING if link comes back 496 * - phy_stop moves to @PHY_HALTED 497 * 498 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 499 * and/or receiving packets 500 * - irq or timer will set @PHY_NOLINK if link goes down 501 * - phy_stop moves to @PHY_HALTED 502 * 503 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 504 * is not expected to work, carrier will be indicated as down. PHY will be 505 * poll once per second, or on interrupt for it current state. 506 * Once complete, move to UP to restart the PHY. 507 * - phy_stop aborts the running test and moves to @PHY_HALTED 508 * 509 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. 510 * - phy_start moves to @PHY_UP 511 * 512 * @PHY_ERROR: PHY is up, but is in an error state. 513 * - phy_stop moves to @PHY_HALTED 514 */ 515 enum phy_state { 516 PHY_DOWN = 0, 517 PHY_READY, 518 PHY_HALTED, 519 PHY_ERROR, 520 PHY_UP, 521 PHY_RUNNING, 522 PHY_NOLINK, 523 PHY_CABLETEST, 524 }; 525 526 #define MDIO_MMD_NUM 32 527 528 /** 529 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 530 * @devices_in_package: IEEE 802.3 devices in package register value. 531 * @mmds_present: bit vector of MMDs present. 532 * @device_ids: The device identifer for each present device. 533 */ 534 struct phy_c45_device_ids { 535 u32 devices_in_package; 536 u32 mmds_present; 537 u32 device_ids[MDIO_MMD_NUM]; 538 }; 539 540 struct macsec_context; 541 struct macsec_ops; 542 543 /** 544 * struct phy_device - An instance of a PHY 545 * 546 * @mdio: MDIO bus this PHY is on 547 * @drv: Pointer to the driver for this PHY instance 548 * @devlink: Create a link between phy dev and mac dev, if the external phy 549 * used by current mac interface is managed by another mac interface. 550 * @phyindex: Unique id across the phy's parent tree of phys to address the PHY 551 * from userspace, similar to ifindex. A zero index means the PHY 552 * wasn't assigned an id yet. 553 * @phy_id: UID for this device found during discovery 554 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 555 * @is_c45: Set to true if this PHY uses clause 45 addressing. 556 * @is_internal: Set to true if this PHY is internal to a MAC. 557 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 558 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 559 * @has_fixups: Set to true if this PHY has fixups/quirks. 560 * @suspended: Set to true if this PHY has been suspended successfully. 561 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 562 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 563 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 564 * @downshifted_rate: Set true if link speed has been downshifted. 565 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 566 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 567 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN 568 * enabled. 569 * @state: State of the PHY for management purposes 570 * @dev_flags: Device-specific flags used by the PHY driver. 571 * 572 * - Bits [15:0] are free to use by the PHY driver to communicate 573 * driver specific behavior. 574 * - Bits [23:16] are currently reserved for future use. 575 * - Bits [31:24] are reserved for defining generic 576 * PHY driver behavior. 577 * @irq: IRQ number of the PHY's interrupt (-1 if none) 578 * @phy_timer: The timer for handling the state machine 579 * @phylink: Pointer to phylink instance for this PHY 580 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 581 * @sfp_bus: SFP bus attached to this PHY's fiber port 582 * @attached_dev: The attached enet driver's device instance ptr 583 * @adjust_link: Callback for the enet controller to respond to changes: in the 584 * link state. 585 * @phy_link_change: Callback for phylink for notification of link change 586 * @macsec_ops: MACsec offloading ops. 587 * 588 * @speed: Current link speed 589 * @duplex: Current duplex 590 * @port: Current port 591 * @pause: Current pause 592 * @asym_pause: Current asymmetric pause 593 * @supported: Combined MAC/PHY supported linkmodes 594 * @advertising: Currently advertised linkmodes 595 * @adv_old: Saved advertised while power saving for WoL 596 * @supported_eee: supported PHY EEE linkmodes 597 * @advertising_eee: Currently advertised EEE linkmodes 598 * @eee_enabled: Flag indicating whether the EEE feature is enabled 599 * @lp_advertising: Current link partner advertised linkmodes 600 * @host_interfaces: PHY interface modes supported by host 601 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 602 * @autoneg: Flag autoneg being used 603 * @rate_matching: Current rate matching mode 604 * @link: Current link state 605 * @autoneg_complete: Flag auto negotiation of the link has completed 606 * @mdix: Current crossover 607 * @mdix_ctrl: User setting of crossover 608 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 609 * @interrupts: Flag interrupts have been enabled 610 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 611 * handling shall be postponed until PHY has resumed 612 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 613 * requiring a rerun of the interrupt handler after resume 614 * @interface: enum phy_interface_t value 615 * @possible_interfaces: bitmap if interface modes that the attached PHY 616 * will switch between depending on media speed. 617 * @skb: Netlink message for cable diagnostics 618 * @nest: Netlink nest used for cable diagnostics 619 * @ehdr: nNtlink header for cable diagnostics 620 * @phy_led_triggers: Array of LED triggers 621 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 622 * @led_link_trigger: LED trigger for link up/down 623 * @last_triggered: last LED trigger for link speed 624 * @leds: list of PHY LED structures 625 * @master_slave_set: User requested master/slave configuration 626 * @master_slave_get: Current master/slave advertisement 627 * @master_slave_state: Current master/slave configuration 628 * @mii_ts: Pointer to time stamper callbacks 629 * @psec: Pointer to Power Sourcing Equipment control struct 630 * @lock: Mutex for serialization access to PHY 631 * @state_queue: Work queue for state machine 632 * @link_down_events: Number of times link was lost 633 * @shared: Pointer to private data shared by phys in one package 634 * @priv: Pointer to driver private data 635 * 636 * interrupts currently only supports enabled or disabled, 637 * but could be changed in the future to support enabling 638 * and disabling specific interrupts 639 * 640 * Contains some infrastructure for polling and interrupt 641 * handling, as well as handling shifts in PHY hardware state 642 */ 643 struct phy_device { 644 struct mdio_device mdio; 645 646 /* Information about the PHY type */ 647 /* And management functions */ 648 struct phy_driver *drv; 649 650 struct device_link *devlink; 651 652 u32 phyindex; 653 u32 phy_id; 654 655 struct phy_c45_device_ids c45_ids; 656 unsigned is_c45:1; 657 unsigned is_internal:1; 658 unsigned is_pseudo_fixed_link:1; 659 unsigned is_gigabit_capable:1; 660 unsigned has_fixups:1; 661 unsigned suspended:1; 662 unsigned suspended_by_mdio_bus:1; 663 unsigned sysfs_links:1; 664 unsigned loopback_enabled:1; 665 unsigned downshifted_rate:1; 666 unsigned is_on_sfp_module:1; 667 unsigned mac_managed_pm:1; 668 unsigned wol_enabled:1; 669 670 unsigned autoneg:1; 671 /* The most recently read link state */ 672 unsigned link:1; 673 unsigned autoneg_complete:1; 674 675 /* Interrupts are enabled */ 676 unsigned interrupts:1; 677 unsigned irq_suspended:1; 678 unsigned irq_rerun:1; 679 680 int rate_matching; 681 682 enum phy_state state; 683 684 u32 dev_flags; 685 686 phy_interface_t interface; 687 DECLARE_PHY_INTERFACE_MASK(possible_interfaces); 688 689 /* 690 * forced speed & duplex (no autoneg) 691 * partner speed & duplex & pause (autoneg) 692 */ 693 int speed; 694 int duplex; 695 int port; 696 int pause; 697 int asym_pause; 698 u8 master_slave_get; 699 u8 master_slave_set; 700 u8 master_slave_state; 701 702 /* Union of PHY and Attached devices' supported link modes */ 703 /* See ethtool.h for more info */ 704 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 705 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 706 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 707 /* used with phy_speed_down */ 708 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 709 /* used for eee validation */ 710 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee); 711 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee); 712 bool eee_enabled; 713 714 /* Host supported PHY interface types. Should be ignored if empty. */ 715 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 716 717 /* Energy efficient ethernet modes which should be prohibited */ 718 u32 eee_broken_modes; 719 720 #ifdef CONFIG_LED_TRIGGER_PHY 721 struct phy_led_trigger *phy_led_triggers; 722 unsigned int phy_num_led_triggers; 723 struct phy_led_trigger *last_triggered; 724 725 struct phy_led_trigger *led_link_trigger; 726 #endif 727 struct list_head leds; 728 729 /* 730 * Interrupt number for this PHY 731 * -1 means no interrupt 732 */ 733 int irq; 734 735 /* private data pointer */ 736 /* For use by PHYs to maintain extra state */ 737 void *priv; 738 739 /* shared data pointer */ 740 /* For use by PHYs inside the same package that need a shared state. */ 741 struct phy_package_shared *shared; 742 743 /* Reporting cable test results */ 744 struct sk_buff *skb; 745 void *ehdr; 746 struct nlattr *nest; 747 748 /* Interrupt and Polling infrastructure */ 749 struct delayed_work state_queue; 750 751 struct mutex lock; 752 753 /* This may be modified under the rtnl lock */ 754 bool sfp_bus_attached; 755 struct sfp_bus *sfp_bus; 756 struct phylink *phylink; 757 struct net_device *attached_dev; 758 struct mii_timestamper *mii_ts; 759 struct pse_control *psec; 760 761 u8 mdix; 762 u8 mdix_ctrl; 763 764 int pma_extable; 765 766 unsigned int link_down_events; 767 768 void (*phy_link_change)(struct phy_device *phydev, bool up); 769 void (*adjust_link)(struct net_device *dev); 770 771 #if IS_ENABLED(CONFIG_MACSEC) 772 /* MACsec management functions */ 773 const struct macsec_ops *macsec_ops; 774 #endif 775 }; 776 777 /* Generic phy_device::dev_flags */ 778 #define PHY_F_NO_IRQ 0x80000000 779 780 static inline struct phy_device *to_phy_device(const struct device *dev) 781 { 782 return container_of(to_mdio_device(dev), struct phy_device, mdio); 783 } 784 785 /** 786 * struct phy_tdr_config - Configuration of a TDR raw test 787 * 788 * @first: Distance for first data collection point 789 * @last: Distance for last data collection point 790 * @step: Step between data collection points 791 * @pair: Bitmap of cable pairs to collect data for 792 * 793 * A structure containing possible configuration parameters 794 * for a TDR cable test. The driver does not need to implement 795 * all the parameters, but should report what is actually used. 796 * All distances are in centimeters. 797 */ 798 struct phy_tdr_config { 799 u32 first; 800 u32 last; 801 u32 step; 802 s8 pair; 803 }; 804 #define PHY_PAIR_ALL -1 805 806 /** 807 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 808 * Avoidance) Reconciliation Sublayer. 809 * 810 * @version: read-only PLCA register map version. -1 = not available. Ignored 811 * when setting the configuration. Format is the same as reported by the PLCA 812 * IDVER register (31.CA00). -1 = not available. 813 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 814 * set. 0 = disabled, anything else = enabled. 815 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 816 * Allowed values [0 .. 254]. 255 = node disabled. 817 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 818 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 819 * set. Allowed values [1 .. 255]. 820 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 821 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 822 * more details. The to_timer shall be set equal over all nodes. 823 * -1 = not available / don't set. Allowed values [0 .. 255]. 824 * @burst_cnt: controls how many additional frames a node is allowed to send in 825 * single transmit opportunity (TO). The default value of 0 means that the 826 * node is allowed exactly one frame per TO. A value of 1 allows two frames 827 * per TO, and so on. -1 = not available / don't set. 828 * Allowed values [0 .. 255]. 829 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 830 * frame before interrupting the burst. This value should be set to a value 831 * greater than the MAC inter-packet gap (which is typically 96 bits). 832 * -1 = not available / don't set. Allowed values [0 .. 255]. 833 * 834 * A structure containing configuration parameters for setting/getting the PLCA 835 * RS configuration. The driver does not need to implement all the parameters, 836 * but should report what is actually used. 837 */ 838 struct phy_plca_cfg { 839 int version; 840 int enabled; 841 int node_id; 842 int node_cnt; 843 int to_tmr; 844 int burst_cnt; 845 int burst_tmr; 846 }; 847 848 /** 849 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 850 * Avoidance) Reconciliation Sublayer. 851 * 852 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 853 * register(31.CA03), indicating BEACON activity. 854 * 855 * A structure containing status information of the PLCA RS configuration. 856 * The driver does not need to implement all the parameters, but should report 857 * what is actually used. 858 */ 859 struct phy_plca_status { 860 bool pst; 861 }; 862 863 /** 864 * struct phy_led: An LED driven by the PHY 865 * 866 * @list: List of LEDs 867 * @phydev: PHY this LED is attached to 868 * @led_cdev: Standard LED class structure 869 * @index: Number of the LED 870 */ 871 struct phy_led { 872 struct list_head list; 873 struct phy_device *phydev; 874 struct led_classdev led_cdev; 875 u8 index; 876 }; 877 878 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev) 879 880 /** 881 * struct phy_driver - Driver structure for a particular PHY type 882 * 883 * @mdiodrv: Data common to all MDIO devices 884 * @phy_id: The result of reading the UID registers of this PHY 885 * type, and ANDing them with the phy_id_mask. This driver 886 * only works for PHYs with IDs which match this field 887 * @name: The friendly name of this PHY type 888 * @phy_id_mask: Defines the important bits of the phy_id 889 * @features: A mandatory list of features (speed, duplex, etc) 890 * supported by this PHY 891 * @flags: A bitfield defining certain other features this PHY 892 * supports (like interrupts) 893 * @driver_data: Static driver data 894 * 895 * All functions are optional. If config_aneg or read_status 896 * are not implemented, the phy core uses the genphy versions. 897 * Note that none of these functions should be called from 898 * interrupt time. The goal is for the bus read/write functions 899 * to be able to block when the bus transaction is happening, 900 * and be freed up by an interrupt (The MPC85xx has this ability, 901 * though it is not currently supported in the driver). 902 */ 903 struct phy_driver { 904 struct mdio_driver_common mdiodrv; 905 u32 phy_id; 906 char *name; 907 u32 phy_id_mask; 908 const unsigned long * const features; 909 u32 flags; 910 const void *driver_data; 911 912 /** 913 * @soft_reset: Called to issue a PHY software reset 914 */ 915 int (*soft_reset)(struct phy_device *phydev); 916 917 /** 918 * @config_init: Called to initialize the PHY, 919 * including after a reset 920 */ 921 int (*config_init)(struct phy_device *phydev); 922 923 /** 924 * @probe: Called during discovery. Used to set 925 * up device-specific structures, if any 926 */ 927 int (*probe)(struct phy_device *phydev); 928 929 /** 930 * @get_features: Probe the hardware to determine what 931 * abilities it has. Should only set phydev->supported. 932 */ 933 int (*get_features)(struct phy_device *phydev); 934 935 /** 936 * @get_rate_matching: Get the supported type of rate matching for a 937 * particular phy interface. This is used by phy consumers to determine 938 * whether to advertise lower-speed modes for that interface. It is 939 * assumed that if a rate matching mode is supported on an interface, 940 * then that interface's rate can be adapted to all slower link speeds 941 * supported by the phy. If the interface is not supported, this should 942 * return %RATE_MATCH_NONE. 943 */ 944 int (*get_rate_matching)(struct phy_device *phydev, 945 phy_interface_t iface); 946 947 /* PHY Power Management */ 948 /** @suspend: Suspend the hardware, saving state if needed */ 949 int (*suspend)(struct phy_device *phydev); 950 /** @resume: Resume the hardware, restoring state if needed */ 951 int (*resume)(struct phy_device *phydev); 952 953 /** 954 * @config_aneg: Configures the advertisement and resets 955 * autonegotiation if phydev->autoneg is on, 956 * forces the speed to the current settings in phydev 957 * if phydev->autoneg is off 958 */ 959 int (*config_aneg)(struct phy_device *phydev); 960 961 /** @aneg_done: Determines the auto negotiation result */ 962 int (*aneg_done)(struct phy_device *phydev); 963 964 /** @read_status: Determines the negotiated speed and duplex */ 965 int (*read_status)(struct phy_device *phydev); 966 967 /** 968 * @config_intr: Enables or disables interrupts. 969 * It should also clear any pending interrupts prior to enabling the 970 * IRQs and after disabling them. 971 */ 972 int (*config_intr)(struct phy_device *phydev); 973 974 /** @handle_interrupt: Override default interrupt handling */ 975 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 976 977 /** @remove: Clears up any memory if needed */ 978 void (*remove)(struct phy_device *phydev); 979 980 /** 981 * @match_phy_device: Returns true if this is a suitable 982 * driver for the given phydev. If NULL, matching is based on 983 * phy_id and phy_id_mask. 984 */ 985 int (*match_phy_device)(struct phy_device *phydev); 986 987 /** 988 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 989 * register changes to enable Wake on LAN, so set_wol is 990 * provided to be called in the ethernet driver's set_wol 991 * function. 992 */ 993 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 994 995 /** 996 * @get_wol: See set_wol, but for checking whether Wake on LAN 997 * is enabled. 998 */ 999 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1000 1001 /** 1002 * @link_change_notify: Called to inform a PHY device driver 1003 * when the core is about to change the link state. This 1004 * callback is supposed to be used as fixup hook for drivers 1005 * that need to take action when the link state 1006 * changes. Drivers are by no means allowed to mess with the 1007 * PHY device structure in their implementations. 1008 */ 1009 void (*link_change_notify)(struct phy_device *dev); 1010 1011 /** 1012 * @read_mmd: PHY specific driver override for reading a MMD 1013 * register. This function is optional for PHY specific 1014 * drivers. When not provided, the default MMD read function 1015 * will be used by phy_read_mmd(), which will use either a 1016 * direct read for Clause 45 PHYs or an indirect read for 1017 * Clause 22 PHYs. devnum is the MMD device number within the 1018 * PHY device, regnum is the register within the selected MMD 1019 * device. 1020 */ 1021 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 1022 1023 /** 1024 * @write_mmd: PHY specific driver override for writing a MMD 1025 * register. This function is optional for PHY specific 1026 * drivers. When not provided, the default MMD write function 1027 * will be used by phy_write_mmd(), which will use either a 1028 * direct write for Clause 45 PHYs, or an indirect write for 1029 * Clause 22 PHYs. devnum is the MMD device number within the 1030 * PHY device, regnum is the register within the selected MMD 1031 * device. val is the value to be written. 1032 */ 1033 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 1034 u16 val); 1035 1036 /** @read_page: Return the current PHY register page number */ 1037 int (*read_page)(struct phy_device *dev); 1038 /** @write_page: Set the current PHY register page number */ 1039 int (*write_page)(struct phy_device *dev, int page); 1040 1041 /** 1042 * @module_info: Get the size and type of the eeprom contained 1043 * within a plug-in module 1044 */ 1045 int (*module_info)(struct phy_device *dev, 1046 struct ethtool_modinfo *modinfo); 1047 1048 /** 1049 * @module_eeprom: Get the eeprom information from the plug-in 1050 * module 1051 */ 1052 int (*module_eeprom)(struct phy_device *dev, 1053 struct ethtool_eeprom *ee, u8 *data); 1054 1055 /** @cable_test_start: Start a cable test */ 1056 int (*cable_test_start)(struct phy_device *dev); 1057 1058 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1059 int (*cable_test_tdr_start)(struct phy_device *dev, 1060 const struct phy_tdr_config *config); 1061 1062 /** 1063 * @cable_test_get_status: Once per second, or on interrupt, 1064 * request the status of the test. 1065 */ 1066 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1067 1068 /* Get statistics from the PHY using ethtool */ 1069 /** @get_sset_count: Number of statistic counters */ 1070 int (*get_sset_count)(struct phy_device *dev); 1071 /** @get_strings: Names of the statistic counters */ 1072 void (*get_strings)(struct phy_device *dev, u8 *data); 1073 /** @get_stats: Return the statistic counter values */ 1074 void (*get_stats)(struct phy_device *dev, 1075 struct ethtool_stats *stats, u64 *data); 1076 1077 /* Get and Set PHY tunables */ 1078 /** @get_tunable: Return the value of a tunable */ 1079 int (*get_tunable)(struct phy_device *dev, 1080 struct ethtool_tunable *tuna, void *data); 1081 /** @set_tunable: Set the value of a tunable */ 1082 int (*set_tunable)(struct phy_device *dev, 1083 struct ethtool_tunable *tuna, 1084 const void *data); 1085 /** @set_loopback: Set the loopback mood of the PHY */ 1086 int (*set_loopback)(struct phy_device *dev, bool enable); 1087 /** @get_sqi: Get the signal quality indication */ 1088 int (*get_sqi)(struct phy_device *dev); 1089 /** @get_sqi_max: Get the maximum signal quality indication */ 1090 int (*get_sqi_max)(struct phy_device *dev); 1091 1092 /* PLCA RS interface */ 1093 /** @get_plca_cfg: Return the current PLCA configuration */ 1094 int (*get_plca_cfg)(struct phy_device *dev, 1095 struct phy_plca_cfg *plca_cfg); 1096 /** @set_plca_cfg: Set the PLCA configuration */ 1097 int (*set_plca_cfg)(struct phy_device *dev, 1098 const struct phy_plca_cfg *plca_cfg); 1099 /** @get_plca_status: Return the current PLCA status info */ 1100 int (*get_plca_status)(struct phy_device *dev, 1101 struct phy_plca_status *plca_st); 1102 1103 /** 1104 * @led_brightness_set: Set a PHY LED brightness. Index 1105 * indicates which of the PHYs led should be set. Value 1106 * follows the standard LED class meaning, e.g. LED_OFF, 1107 * LED_HALF, LED_FULL. 1108 */ 1109 int (*led_brightness_set)(struct phy_device *dev, 1110 u8 index, enum led_brightness value); 1111 1112 /** 1113 * @led_blink_set: Set a PHY LED brightness. Index indicates 1114 * which of the PHYs led should be configured to blink. Delays 1115 * are in milliseconds and if both are zero then a sensible 1116 * default should be chosen. The call should adjust the 1117 * timings in that case and if it can't match the values 1118 * specified exactly. 1119 */ 1120 int (*led_blink_set)(struct phy_device *dev, u8 index, 1121 unsigned long *delay_on, 1122 unsigned long *delay_off); 1123 /** 1124 * @led_hw_is_supported: Can the HW support the given rules. 1125 * @dev: PHY device which has the LED 1126 * @index: Which LED of the PHY device 1127 * @rules The core is interested in these rules 1128 * 1129 * Return 0 if yes, -EOPNOTSUPP if not, or an error code. 1130 */ 1131 int (*led_hw_is_supported)(struct phy_device *dev, u8 index, 1132 unsigned long rules); 1133 /** 1134 * @led_hw_control_set: Set the HW to control the LED 1135 * @dev: PHY device which has the LED 1136 * @index: Which LED of the PHY device 1137 * @rules The rules used to control the LED 1138 * 1139 * Returns 0, or a an error code. 1140 */ 1141 int (*led_hw_control_set)(struct phy_device *dev, u8 index, 1142 unsigned long rules); 1143 /** 1144 * @led_hw_control_get: Get how the HW is controlling the LED 1145 * @dev: PHY device which has the LED 1146 * @index: Which LED of the PHY device 1147 * @rules Pointer to the rules used to control the LED 1148 * 1149 * Set *@rules to how the HW is currently blinking. Returns 0 1150 * on success, or a error code if the current blinking cannot 1151 * be represented in rules, or some other error happens. 1152 */ 1153 int (*led_hw_control_get)(struct phy_device *dev, u8 index, 1154 unsigned long *rules); 1155 1156 }; 1157 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 1158 struct phy_driver, mdiodrv) 1159 1160 #define PHY_ANY_ID "MATCH ANY PHY" 1161 #define PHY_ANY_UID 0xffffffff 1162 1163 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 1164 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 1165 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 1166 1167 /** 1168 * phy_id_compare - compare @id1 with @id2 taking account of @mask 1169 * @id1: first PHY ID 1170 * @id2: second PHY ID 1171 * @mask: the PHY ID mask, set bits are significant in matching 1172 * 1173 * Return true if the bits from @id1 and @id2 specified by @mask match. 1174 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask). 1175 */ 1176 static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask) 1177 { 1178 return !((id1 ^ id2) & mask); 1179 } 1180 1181 /** 1182 * phydev_id_compare - compare @id with the PHY's Clause 22 ID 1183 * @phydev: the PHY device 1184 * @id: the PHY ID to be matched 1185 * 1186 * Compare the @phydev clause 22 ID with the provided @id and return true or 1187 * false depending whether it matches, using the bound driver mask. The 1188 * @phydev must be bound to a driver. 1189 */ 1190 static inline bool phydev_id_compare(struct phy_device *phydev, u32 id) 1191 { 1192 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask); 1193 } 1194 1195 /* A Structure for boards to register fixups with the PHY Lib */ 1196 struct phy_fixup { 1197 struct list_head list; 1198 char bus_id[MII_BUS_ID_SIZE + 3]; 1199 u32 phy_uid; 1200 u32 phy_uid_mask; 1201 int (*run)(struct phy_device *phydev); 1202 }; 1203 1204 const char *phy_speed_to_str(int speed); 1205 const char *phy_duplex_to_str(unsigned int duplex); 1206 const char *phy_rate_matching_to_str(int rate_matching); 1207 1208 int phy_interface_num_ports(phy_interface_t interface); 1209 1210 /* A structure for mapping a particular speed and duplex 1211 * combination to a particular SUPPORTED and ADVERTISED value 1212 */ 1213 struct phy_setting { 1214 u32 speed; 1215 u8 duplex; 1216 u8 bit; 1217 }; 1218 1219 const struct phy_setting * 1220 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 1221 bool exact); 1222 size_t phy_speeds(unsigned int *speeds, size_t size, 1223 unsigned long *mask); 1224 void of_set_phy_supported(struct phy_device *phydev); 1225 void of_set_phy_eee_broken(struct phy_device *phydev); 1226 int phy_speed_down_core(struct phy_device *phydev); 1227 1228 /** 1229 * phy_is_started - Convenience function to check whether PHY is started 1230 * @phydev: The phy_device struct 1231 */ 1232 static inline bool phy_is_started(struct phy_device *phydev) 1233 { 1234 return phydev->state >= PHY_UP; 1235 } 1236 1237 void phy_resolve_aneg_pause(struct phy_device *phydev); 1238 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1239 void phy_check_downshift(struct phy_device *phydev); 1240 1241 /** 1242 * phy_read - Convenience function for reading a given PHY register 1243 * @phydev: the phy_device struct 1244 * @regnum: register number to read 1245 * 1246 * NOTE: MUST NOT be called from interrupt context, 1247 * because the bus read/write functions may wait for an interrupt 1248 * to conclude the operation. 1249 */ 1250 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1251 { 1252 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1253 } 1254 1255 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1256 timeout_us, sleep_before_read) \ 1257 ({ \ 1258 int __ret, __val; \ 1259 __ret = read_poll_timeout(__val = phy_read, val, \ 1260 __val < 0 || (cond), \ 1261 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1262 if (__val < 0) \ 1263 __ret = __val; \ 1264 if (__ret) \ 1265 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1266 __ret; \ 1267 }) 1268 1269 /** 1270 * __phy_read - convenience function for reading a given PHY register 1271 * @phydev: the phy_device struct 1272 * @regnum: register number to read 1273 * 1274 * The caller must have taken the MDIO bus lock. 1275 */ 1276 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1277 { 1278 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1279 } 1280 1281 /** 1282 * phy_write - Convenience function for writing a given PHY register 1283 * @phydev: the phy_device struct 1284 * @regnum: register number to write 1285 * @val: value to write to @regnum 1286 * 1287 * NOTE: MUST NOT be called from interrupt context, 1288 * because the bus read/write functions may wait for an interrupt 1289 * to conclude the operation. 1290 */ 1291 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1292 { 1293 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1294 } 1295 1296 /** 1297 * __phy_write - Convenience function for writing a given PHY register 1298 * @phydev: the phy_device struct 1299 * @regnum: register number to write 1300 * @val: value to write to @regnum 1301 * 1302 * The caller must have taken the MDIO bus lock. 1303 */ 1304 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1305 { 1306 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1307 val); 1308 } 1309 1310 /** 1311 * __phy_modify_changed() - Convenience function for modifying a PHY register 1312 * @phydev: a pointer to a &struct phy_device 1313 * @regnum: register number 1314 * @mask: bit mask of bits to clear 1315 * @set: bit mask of bits to set 1316 * 1317 * Unlocked helper function which allows a PHY register to be modified as 1318 * new register value = (old register value & ~mask) | set 1319 * 1320 * Returns negative errno, 0 if there was no change, and 1 in case of change 1321 */ 1322 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1323 u16 mask, u16 set) 1324 { 1325 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1326 regnum, mask, set); 1327 } 1328 1329 /* 1330 * phy_read_mmd - Convenience function for reading a register 1331 * from an MMD on a given PHY. 1332 */ 1333 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1334 1335 /** 1336 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1337 * condition is met or a timeout occurs 1338 * 1339 * @phydev: The phy_device struct 1340 * @devaddr: The MMD to read from 1341 * @regnum: The register on the MMD to read 1342 * @val: Variable to read the register into 1343 * @cond: Break condition (usually involving @val) 1344 * @sleep_us: Maximum time to sleep between reads in us (0 1345 * tight-loops). Should be less than ~20ms since usleep_range 1346 * is used (see Documentation/timers/timers-howto.rst). 1347 * @timeout_us: Timeout in us, 0 means never timeout 1348 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1349 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either 1350 * case, the last read value at @args is stored in @val. Must not 1351 * be called from atomic context if sleep_us or timeout_us are used. 1352 */ 1353 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1354 sleep_us, timeout_us, sleep_before_read) \ 1355 ({ \ 1356 int __ret, __val; \ 1357 __ret = read_poll_timeout(__val = phy_read_mmd, val, \ 1358 __val < 0 || (cond), \ 1359 sleep_us, timeout_us, sleep_before_read, \ 1360 phydev, devaddr, regnum); \ 1361 if (__val < 0) \ 1362 __ret = __val; \ 1363 if (__ret) \ 1364 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1365 __ret; \ 1366 }) 1367 1368 /* 1369 * __phy_read_mmd - Convenience function for reading a register 1370 * from an MMD on a given PHY. 1371 */ 1372 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1373 1374 /* 1375 * phy_write_mmd - Convenience function for writing a register 1376 * on an MMD on a given PHY. 1377 */ 1378 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1379 1380 /* 1381 * __phy_write_mmd - Convenience function for writing a register 1382 * on an MMD on a given PHY. 1383 */ 1384 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1385 1386 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1387 u16 set); 1388 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1389 u16 set); 1390 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1391 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1392 1393 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1394 u16 mask, u16 set); 1395 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1396 u16 mask, u16 set); 1397 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1398 u16 mask, u16 set); 1399 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1400 u16 mask, u16 set); 1401 1402 /** 1403 * __phy_set_bits - Convenience function for setting bits in a PHY register 1404 * @phydev: the phy_device struct 1405 * @regnum: register number to write 1406 * @val: bits to set 1407 * 1408 * The caller must have taken the MDIO bus lock. 1409 */ 1410 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1411 { 1412 return __phy_modify(phydev, regnum, 0, val); 1413 } 1414 1415 /** 1416 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1417 * @phydev: the phy_device struct 1418 * @regnum: register number to write 1419 * @val: bits to clear 1420 * 1421 * The caller must have taken the MDIO bus lock. 1422 */ 1423 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1424 u16 val) 1425 { 1426 return __phy_modify(phydev, regnum, val, 0); 1427 } 1428 1429 /** 1430 * phy_set_bits - Convenience function for setting bits in a PHY register 1431 * @phydev: the phy_device struct 1432 * @regnum: register number to write 1433 * @val: bits to set 1434 */ 1435 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1436 { 1437 return phy_modify(phydev, regnum, 0, val); 1438 } 1439 1440 /** 1441 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1442 * @phydev: the phy_device struct 1443 * @regnum: register number to write 1444 * @val: bits to clear 1445 */ 1446 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1447 { 1448 return phy_modify(phydev, regnum, val, 0); 1449 } 1450 1451 /** 1452 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1453 * on MMD 1454 * @phydev: the phy_device struct 1455 * @devad: the MMD containing register to modify 1456 * @regnum: register number to modify 1457 * @val: bits to set 1458 * 1459 * The caller must have taken the MDIO bus lock. 1460 */ 1461 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1462 u32 regnum, u16 val) 1463 { 1464 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1465 } 1466 1467 /** 1468 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1469 * on MMD 1470 * @phydev: the phy_device struct 1471 * @devad: the MMD containing register to modify 1472 * @regnum: register number to modify 1473 * @val: bits to clear 1474 * 1475 * The caller must have taken the MDIO bus lock. 1476 */ 1477 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1478 u32 regnum, u16 val) 1479 { 1480 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1481 } 1482 1483 /** 1484 * phy_set_bits_mmd - Convenience function for setting bits in a register 1485 * on MMD 1486 * @phydev: the phy_device struct 1487 * @devad: the MMD containing register to modify 1488 * @regnum: register number to modify 1489 * @val: bits to set 1490 */ 1491 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1492 u32 regnum, u16 val) 1493 { 1494 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1495 } 1496 1497 /** 1498 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1499 * on MMD 1500 * @phydev: the phy_device struct 1501 * @devad: the MMD containing register to modify 1502 * @regnum: register number to modify 1503 * @val: bits to clear 1504 */ 1505 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1506 u32 regnum, u16 val) 1507 { 1508 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1509 } 1510 1511 /** 1512 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1513 * @phydev: the phy_device struct 1514 * 1515 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1516 * PHY_MAC_INTERRUPT 1517 */ 1518 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1519 { 1520 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1521 } 1522 1523 /** 1524 * phy_polling_mode - Convenience function for testing whether polling is 1525 * used to detect PHY status changes 1526 * @phydev: the phy_device struct 1527 */ 1528 static inline bool phy_polling_mode(struct phy_device *phydev) 1529 { 1530 if (phydev->state == PHY_CABLETEST) 1531 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1532 return true; 1533 1534 return phydev->irq == PHY_POLL; 1535 } 1536 1537 /** 1538 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1539 * @phydev: the phy_device struct 1540 */ 1541 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1542 { 1543 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1544 } 1545 1546 /** 1547 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1548 * @phydev: the phy_device struct 1549 */ 1550 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1551 { 1552 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1553 } 1554 1555 /** 1556 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1557 * PTP hardware clock capabilities. 1558 * @phydev: the phy_device struct 1559 */ 1560 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1561 { 1562 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1563 } 1564 1565 /** 1566 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1567 * @phydev: the phy_device struct 1568 */ 1569 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1570 { 1571 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1572 } 1573 1574 static inline int phy_hwtstamp(struct phy_device *phydev, 1575 struct kernel_hwtstamp_config *cfg, 1576 struct netlink_ext_ack *extack) 1577 { 1578 return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack); 1579 } 1580 1581 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1582 int type) 1583 { 1584 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1585 } 1586 1587 static inline int phy_ts_info(struct phy_device *phydev, 1588 struct ethtool_ts_info *tsinfo) 1589 { 1590 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1591 } 1592 1593 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1594 int type) 1595 { 1596 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1597 } 1598 1599 /** 1600 * phy_is_internal - Convenience function for testing if a PHY is internal 1601 * @phydev: the phy_device struct 1602 */ 1603 static inline bool phy_is_internal(struct phy_device *phydev) 1604 { 1605 return phydev->is_internal; 1606 } 1607 1608 /** 1609 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1610 * @phydev: the phy_device struct 1611 */ 1612 static inline bool phy_on_sfp(struct phy_device *phydev) 1613 { 1614 return phydev->is_on_sfp_module; 1615 } 1616 1617 /** 1618 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1619 * PHY interface mode is RGMII (all variants) 1620 * @mode: the &phy_interface_t enum 1621 */ 1622 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1623 { 1624 return mode >= PHY_INTERFACE_MODE_RGMII && 1625 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1626 }; 1627 1628 /** 1629 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1630 * negotiation 1631 * @mode: one of &enum phy_interface_t 1632 * 1633 * Returns true if the PHY interface mode uses the 16-bit negotiation 1634 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1635 */ 1636 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1637 { 1638 return mode == PHY_INTERFACE_MODE_1000BASEX || 1639 mode == PHY_INTERFACE_MODE_2500BASEX; 1640 } 1641 1642 /** 1643 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1644 * is RGMII (all variants) 1645 * @phydev: the phy_device struct 1646 */ 1647 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1648 { 1649 return phy_interface_mode_is_rgmii(phydev->interface); 1650 }; 1651 1652 /** 1653 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1654 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1655 * @phydev: the phy_device struct 1656 */ 1657 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1658 { 1659 return phydev->is_pseudo_fixed_link; 1660 } 1661 1662 int phy_save_page(struct phy_device *phydev); 1663 int phy_select_page(struct phy_device *phydev, int page); 1664 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1665 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1666 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1667 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1668 u16 mask, u16 set); 1669 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1670 u16 mask, u16 set); 1671 1672 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1673 bool is_c45, 1674 struct phy_c45_device_ids *c45_ids); 1675 #if IS_ENABLED(CONFIG_PHYLIB) 1676 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1677 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1678 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1679 struct phy_device *device_phy_find_device(struct device *dev); 1680 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode); 1681 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1682 int phy_device_register(struct phy_device *phy); 1683 void phy_device_free(struct phy_device *phydev); 1684 #else 1685 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1686 { 1687 return 0; 1688 } 1689 static inline 1690 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1691 { 1692 return 0; 1693 } 1694 1695 static inline 1696 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1697 { 1698 return NULL; 1699 } 1700 1701 static inline struct phy_device *device_phy_find_device(struct device *dev) 1702 { 1703 return NULL; 1704 } 1705 1706 static inline 1707 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1708 { 1709 return NULL; 1710 } 1711 1712 static inline 1713 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1714 { 1715 return NULL; 1716 } 1717 1718 static inline int phy_device_register(struct phy_device *phy) 1719 { 1720 return 0; 1721 } 1722 1723 static inline void phy_device_free(struct phy_device *phydev) { } 1724 #endif /* CONFIG_PHYLIB */ 1725 void phy_device_remove(struct phy_device *phydev); 1726 int phy_get_c45_ids(struct phy_device *phydev); 1727 int phy_init_hw(struct phy_device *phydev); 1728 int phy_suspend(struct phy_device *phydev); 1729 int phy_resume(struct phy_device *phydev); 1730 int __phy_resume(struct phy_device *phydev); 1731 int phy_loopback(struct phy_device *phydev, bool enable); 1732 int phy_sfp_connect_phy(void *upstream, struct phy_device *phy); 1733 void phy_sfp_disconnect_phy(void *upstream, struct phy_device *phy); 1734 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1735 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1736 int phy_sfp_probe(struct phy_device *phydev, 1737 const struct sfp_upstream_ops *ops); 1738 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1739 phy_interface_t interface); 1740 struct phy_device *phy_find_first(struct mii_bus *bus); 1741 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1742 u32 flags, phy_interface_t interface); 1743 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1744 void (*handler)(struct net_device *), 1745 phy_interface_t interface); 1746 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1747 void (*handler)(struct net_device *), 1748 phy_interface_t interface); 1749 void phy_disconnect(struct phy_device *phydev); 1750 void phy_detach(struct phy_device *phydev); 1751 void phy_start(struct phy_device *phydev); 1752 void phy_stop(struct phy_device *phydev); 1753 int phy_config_aneg(struct phy_device *phydev); 1754 int _phy_start_aneg(struct phy_device *phydev); 1755 int phy_start_aneg(struct phy_device *phydev); 1756 int phy_aneg_done(struct phy_device *phydev); 1757 int phy_speed_down(struct phy_device *phydev, bool sync); 1758 int phy_speed_up(struct phy_device *phydev); 1759 bool phy_check_valid(int speed, int duplex, unsigned long *features); 1760 1761 int phy_restart_aneg(struct phy_device *phydev); 1762 int phy_reset_after_clk_enable(struct phy_device *phydev); 1763 1764 #if IS_ENABLED(CONFIG_PHYLIB) 1765 int phy_start_cable_test(struct phy_device *phydev, 1766 struct netlink_ext_ack *extack); 1767 int phy_start_cable_test_tdr(struct phy_device *phydev, 1768 struct netlink_ext_ack *extack, 1769 const struct phy_tdr_config *config); 1770 #else 1771 static inline 1772 int phy_start_cable_test(struct phy_device *phydev, 1773 struct netlink_ext_ack *extack) 1774 { 1775 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1776 return -EOPNOTSUPP; 1777 } 1778 static inline 1779 int phy_start_cable_test_tdr(struct phy_device *phydev, 1780 struct netlink_ext_ack *extack, 1781 const struct phy_tdr_config *config) 1782 { 1783 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1784 return -EOPNOTSUPP; 1785 } 1786 #endif 1787 1788 static inline void phy_device_reset(struct phy_device *phydev, int value) 1789 { 1790 mdio_device_reset(&phydev->mdio, value); 1791 } 1792 1793 #define phydev_err(_phydev, format, args...) \ 1794 dev_err(&_phydev->mdio.dev, format, ##args) 1795 1796 #define phydev_err_probe(_phydev, err, format, args...) \ 1797 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1798 1799 #define phydev_info(_phydev, format, args...) \ 1800 dev_info(&_phydev->mdio.dev, format, ##args) 1801 1802 #define phydev_warn(_phydev, format, args...) \ 1803 dev_warn(&_phydev->mdio.dev, format, ##args) 1804 1805 #define phydev_dbg(_phydev, format, args...) \ 1806 dev_dbg(&_phydev->mdio.dev, format, ##args) 1807 1808 static inline const char *phydev_name(const struct phy_device *phydev) 1809 { 1810 return dev_name(&phydev->mdio.dev); 1811 } 1812 1813 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1814 { 1815 mutex_lock(&phydev->mdio.bus->mdio_lock); 1816 } 1817 1818 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1819 { 1820 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1821 } 1822 1823 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1824 __printf(2, 3); 1825 char *phy_attached_info_irq(struct phy_device *phydev) 1826 __malloc; 1827 void phy_attached_info(struct phy_device *phydev); 1828 1829 /* Clause 22 PHY */ 1830 int genphy_read_abilities(struct phy_device *phydev); 1831 int genphy_setup_forced(struct phy_device *phydev); 1832 int genphy_restart_aneg(struct phy_device *phydev); 1833 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1834 int genphy_config_eee_advert(struct phy_device *phydev); 1835 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1836 int genphy_aneg_done(struct phy_device *phydev); 1837 int genphy_update_link(struct phy_device *phydev); 1838 int genphy_read_lpa(struct phy_device *phydev); 1839 int genphy_read_status_fixed(struct phy_device *phydev); 1840 int genphy_read_status(struct phy_device *phydev); 1841 int genphy_read_master_slave(struct phy_device *phydev); 1842 int genphy_suspend(struct phy_device *phydev); 1843 int genphy_resume(struct phy_device *phydev); 1844 int genphy_loopback(struct phy_device *phydev, bool enable); 1845 int genphy_soft_reset(struct phy_device *phydev); 1846 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1847 1848 static inline int genphy_config_aneg(struct phy_device *phydev) 1849 { 1850 return __genphy_config_aneg(phydev, false); 1851 } 1852 1853 static inline int genphy_no_config_intr(struct phy_device *phydev) 1854 { 1855 return 0; 1856 } 1857 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1858 u16 regnum); 1859 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1860 u16 regnum, u16 val); 1861 1862 /* Clause 37 */ 1863 int genphy_c37_config_aneg(struct phy_device *phydev); 1864 int genphy_c37_read_status(struct phy_device *phydev); 1865 1866 /* Clause 45 PHY */ 1867 int genphy_c45_restart_aneg(struct phy_device *phydev); 1868 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1869 int genphy_c45_aneg_done(struct phy_device *phydev); 1870 int genphy_c45_read_link(struct phy_device *phydev); 1871 int genphy_c45_read_lpa(struct phy_device *phydev); 1872 int genphy_c45_read_pma(struct phy_device *phydev); 1873 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1874 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 1875 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1876 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1877 int genphy_c45_read_mdix(struct phy_device *phydev); 1878 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1879 int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev); 1880 int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev); 1881 int genphy_c45_read_eee_abilities(struct phy_device *phydev); 1882 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 1883 int genphy_c45_read_status(struct phy_device *phydev); 1884 int genphy_c45_baset1_read_status(struct phy_device *phydev); 1885 int genphy_c45_config_aneg(struct phy_device *phydev); 1886 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1887 int genphy_c45_pma_resume(struct phy_device *phydev); 1888 int genphy_c45_pma_suspend(struct phy_device *phydev); 1889 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 1890 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 1891 struct phy_plca_cfg *plca_cfg); 1892 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 1893 const struct phy_plca_cfg *plca_cfg); 1894 int genphy_c45_plca_get_status(struct phy_device *phydev, 1895 struct phy_plca_status *plca_st); 1896 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv, 1897 unsigned long *lp, bool *is_enabled); 1898 int genphy_c45_ethtool_get_eee(struct phy_device *phydev, 1899 struct ethtool_eee *data); 1900 int genphy_c45_ethtool_set_eee(struct phy_device *phydev, 1901 struct ethtool_eee *data); 1902 int genphy_c45_write_eee_adv(struct phy_device *phydev, unsigned long *adv); 1903 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev); 1904 int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv); 1905 1906 /* Generic C45 PHY driver */ 1907 extern struct phy_driver genphy_c45_driver; 1908 1909 /* The gen10g_* functions are the old Clause 45 stub */ 1910 int gen10g_config_aneg(struct phy_device *phydev); 1911 1912 static inline int phy_read_status(struct phy_device *phydev) 1913 { 1914 if (!phydev->drv) 1915 return -EIO; 1916 1917 if (phydev->drv->read_status) 1918 return phydev->drv->read_status(phydev); 1919 else 1920 return genphy_read_status(phydev); 1921 } 1922 1923 void phy_driver_unregister(struct phy_driver *drv); 1924 void phy_drivers_unregister(struct phy_driver *drv, int n); 1925 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1926 int phy_drivers_register(struct phy_driver *new_driver, int n, 1927 struct module *owner); 1928 void phy_error(struct phy_device *phydev); 1929 void phy_state_machine(struct work_struct *work); 1930 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1931 void phy_trigger_machine(struct phy_device *phydev); 1932 void phy_mac_interrupt(struct phy_device *phydev); 1933 void phy_start_machine(struct phy_device *phydev); 1934 void phy_stop_machine(struct phy_device *phydev); 1935 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1936 struct ethtool_link_ksettings *cmd); 1937 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1938 const struct ethtool_link_ksettings *cmd); 1939 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1940 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1941 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1942 int phy_disable_interrupts(struct phy_device *phydev); 1943 void phy_request_interrupt(struct phy_device *phydev); 1944 void phy_free_interrupt(struct phy_device *phydev); 1945 void phy_print_status(struct phy_device *phydev); 1946 int phy_get_rate_matching(struct phy_device *phydev, 1947 phy_interface_t iface); 1948 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1949 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1950 void phy_advertise_supported(struct phy_device *phydev); 1951 void phy_support_sym_pause(struct phy_device *phydev); 1952 void phy_support_asym_pause(struct phy_device *phydev); 1953 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1954 bool autoneg); 1955 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1956 bool phy_validate_pause(struct phy_device *phydev, 1957 struct ethtool_pauseparam *pp); 1958 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1959 1960 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 1961 const int *delay_values, int size, bool is_rx); 1962 1963 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1964 bool *tx_pause, bool *rx_pause); 1965 1966 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1967 int (*run)(struct phy_device *)); 1968 int phy_register_fixup_for_id(const char *bus_id, 1969 int (*run)(struct phy_device *)); 1970 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1971 int (*run)(struct phy_device *)); 1972 1973 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1974 int phy_unregister_fixup_for_id(const char *bus_id); 1975 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1976 1977 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1978 int phy_get_eee_err(struct phy_device *phydev); 1979 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1980 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1981 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1982 void phy_ethtool_get_wol(struct phy_device *phydev, 1983 struct ethtool_wolinfo *wol); 1984 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1985 struct ethtool_link_ksettings *cmd); 1986 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1987 const struct ethtool_link_ksettings *cmd); 1988 int phy_ethtool_nway_reset(struct net_device *ndev); 1989 int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size); 1990 void phy_package_leave(struct phy_device *phydev); 1991 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 1992 int base_addr, size_t priv_size); 1993 1994 int __init mdio_bus_init(void); 1995 void mdio_bus_exit(void); 1996 1997 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 1998 int phy_ethtool_get_sset_count(struct phy_device *phydev); 1999 int phy_ethtool_get_stats(struct phy_device *phydev, 2000 struct ethtool_stats *stats, u64 *data); 2001 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 2002 struct phy_plca_cfg *plca_cfg); 2003 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 2004 const struct phy_plca_cfg *plca_cfg, 2005 struct netlink_ext_ack *extack); 2006 int phy_ethtool_get_plca_status(struct phy_device *phydev, 2007 struct phy_plca_status *plca_st); 2008 2009 int __phy_hwtstamp_get(struct phy_device *phydev, 2010 struct kernel_hwtstamp_config *config); 2011 int __phy_hwtstamp_set(struct phy_device *phydev, 2012 struct kernel_hwtstamp_config *config, 2013 struct netlink_ext_ack *extack); 2014 2015 static inline int phy_package_address(struct phy_device *phydev, 2016 unsigned int addr_offset) 2017 { 2018 struct phy_package_shared *shared = phydev->shared; 2019 u8 base_addr = shared->base_addr; 2020 2021 if (addr_offset >= PHY_MAX_ADDR - base_addr) 2022 return -EIO; 2023 2024 /* we know that addr will be in the range 0..31 and thus the 2025 * implicit cast to a signed int is not a problem. 2026 */ 2027 return base_addr + addr_offset; 2028 } 2029 2030 static inline int phy_package_read(struct phy_device *phydev, 2031 unsigned int addr_offset, u32 regnum) 2032 { 2033 int addr = phy_package_address(phydev, addr_offset); 2034 2035 if (addr < 0) 2036 return addr; 2037 2038 return mdiobus_read(phydev->mdio.bus, addr, regnum); 2039 } 2040 2041 static inline int __phy_package_read(struct phy_device *phydev, 2042 unsigned int addr_offset, u32 regnum) 2043 { 2044 int addr = phy_package_address(phydev, addr_offset); 2045 2046 if (addr < 0) 2047 return addr; 2048 2049 return __mdiobus_read(phydev->mdio.bus, addr, regnum); 2050 } 2051 2052 static inline int phy_package_write(struct phy_device *phydev, 2053 unsigned int addr_offset, u32 regnum, 2054 u16 val) 2055 { 2056 int addr = phy_package_address(phydev, addr_offset); 2057 2058 if (addr < 0) 2059 return addr; 2060 2061 return mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2062 } 2063 2064 static inline int __phy_package_write(struct phy_device *phydev, 2065 unsigned int addr_offset, u32 regnum, 2066 u16 val) 2067 { 2068 int addr = phy_package_address(phydev, addr_offset); 2069 2070 if (addr < 0) 2071 return addr; 2072 2073 return __mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2074 } 2075 2076 int __phy_package_read_mmd(struct phy_device *phydev, 2077 unsigned int addr_offset, int devad, 2078 u32 regnum); 2079 2080 int phy_package_read_mmd(struct phy_device *phydev, 2081 unsigned int addr_offset, int devad, 2082 u32 regnum); 2083 2084 int __phy_package_write_mmd(struct phy_device *phydev, 2085 unsigned int addr_offset, int devad, 2086 u32 regnum, u16 val); 2087 2088 int phy_package_write_mmd(struct phy_device *phydev, 2089 unsigned int addr_offset, int devad, 2090 u32 regnum, u16 val); 2091 2092 static inline bool __phy_package_set_once(struct phy_device *phydev, 2093 unsigned int b) 2094 { 2095 struct phy_package_shared *shared = phydev->shared; 2096 2097 if (!shared) 2098 return false; 2099 2100 return !test_and_set_bit(b, &shared->flags); 2101 } 2102 2103 static inline bool phy_package_init_once(struct phy_device *phydev) 2104 { 2105 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 2106 } 2107 2108 static inline bool phy_package_probe_once(struct phy_device *phydev) 2109 { 2110 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 2111 } 2112 2113 extern struct bus_type mdio_bus_type; 2114 2115 struct mdio_board_info { 2116 const char *bus_id; 2117 char modalias[MDIO_NAME_SIZE]; 2118 int mdio_addr; 2119 const void *platform_data; 2120 }; 2121 2122 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 2123 int mdiobus_register_board_info(const struct mdio_board_info *info, 2124 unsigned int n); 2125 #else 2126 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 2127 unsigned int n) 2128 { 2129 return 0; 2130 } 2131 #endif 2132 2133 2134 /** 2135 * phy_module_driver() - Helper macro for registering PHY drivers 2136 * @__phy_drivers: array of PHY drivers to register 2137 * @__count: Numbers of members in array 2138 * 2139 * Helper macro for PHY drivers which do not do anything special in module 2140 * init/exit. Each module may only use this macro once, and calling it 2141 * replaces module_init() and module_exit(). 2142 */ 2143 #define phy_module_driver(__phy_drivers, __count) \ 2144 static int __init phy_module_init(void) \ 2145 { \ 2146 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 2147 } \ 2148 module_init(phy_module_init); \ 2149 static void __exit phy_module_exit(void) \ 2150 { \ 2151 phy_drivers_unregister(__phy_drivers, __count); \ 2152 } \ 2153 module_exit(phy_module_exit) 2154 2155 #define module_phy_driver(__phy_drivers) \ 2156 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 2157 2158 bool phy_driver_is_genphy(struct phy_device *phydev); 2159 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 2160 2161 #endif /* __PHY_H */ 2162