1 /* 2 * Framework and drivers for configuring and reading different PHYs 3 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 4 * 5 * Author: Andy Fleming 6 * 7 * Copyright (c) 2004 Freescale Semiconductor, Inc. 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or (at your 12 * option) any later version. 13 * 14 */ 15 16 #ifndef __PHY_H 17 #define __PHY_H 18 19 #include <linux/compiler.h> 20 #include <linux/spinlock.h> 21 #include <linux/ethtool.h> 22 #include <linux/linkmode.h> 23 #include <linux/mdio.h> 24 #include <linux/mii.h> 25 #include <linux/module.h> 26 #include <linux/timer.h> 27 #include <linux/workqueue.h> 28 #include <linux/mod_devicetable.h> 29 30 #include <linux/atomic.h> 31 32 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 33 SUPPORTED_TP | \ 34 SUPPORTED_MII) 35 36 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 37 SUPPORTED_10baseT_Full) 38 39 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 40 SUPPORTED_100baseT_Full) 41 42 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 43 SUPPORTED_1000baseT_Full) 44 45 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 53 54 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 55 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 56 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 57 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 58 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 59 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 60 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 61 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 62 63 extern const int phy_10_100_features_array[4]; 64 extern const int phy_basic_t1_features_array[2]; 65 extern const int phy_gbit_features_array[2]; 66 extern const int phy_10gbit_features_array[1]; 67 68 /* 69 * Set phydev->irq to PHY_POLL if interrupts are not supported, 70 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if 71 * the attached driver handles the interrupt 72 */ 73 #define PHY_POLL -1 74 #define PHY_IGNORE_INTERRUPT -2 75 76 #define PHY_IS_INTERNAL 0x00000001 77 #define PHY_RST_AFTER_CLK_EN 0x00000002 78 #define MDIO_DEVICE_IS_PHY 0x80000000 79 80 /* Interface Mode definitions */ 81 typedef enum { 82 PHY_INTERFACE_MODE_NA, 83 PHY_INTERFACE_MODE_INTERNAL, 84 PHY_INTERFACE_MODE_MII, 85 PHY_INTERFACE_MODE_GMII, 86 PHY_INTERFACE_MODE_SGMII, 87 PHY_INTERFACE_MODE_TBI, 88 PHY_INTERFACE_MODE_REVMII, 89 PHY_INTERFACE_MODE_RMII, 90 PHY_INTERFACE_MODE_RGMII, 91 PHY_INTERFACE_MODE_RGMII_ID, 92 PHY_INTERFACE_MODE_RGMII_RXID, 93 PHY_INTERFACE_MODE_RGMII_TXID, 94 PHY_INTERFACE_MODE_RTBI, 95 PHY_INTERFACE_MODE_SMII, 96 PHY_INTERFACE_MODE_XGMII, 97 PHY_INTERFACE_MODE_MOCA, 98 PHY_INTERFACE_MODE_QSGMII, 99 PHY_INTERFACE_MODE_TRGMII, 100 PHY_INTERFACE_MODE_1000BASEX, 101 PHY_INTERFACE_MODE_2500BASEX, 102 PHY_INTERFACE_MODE_RXAUI, 103 PHY_INTERFACE_MODE_XAUI, 104 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */ 105 PHY_INTERFACE_MODE_10GKR, 106 PHY_INTERFACE_MODE_USXGMII, 107 PHY_INTERFACE_MODE_MAX, 108 } phy_interface_t; 109 110 /** 111 * phy_supported_speeds - return all speeds currently supported by a phy device 112 * @phy: The phy device to return supported speeds of. 113 * @speeds: buffer to store supported speeds in. 114 * @size: size of speeds buffer. 115 * 116 * Description: Returns the number of supported speeds, and fills 117 * the speeds buffer with the supported speeds. If speeds buffer is 118 * too small to contain all currently supported speeds, will return as 119 * many speeds as can fit. 120 */ 121 unsigned int phy_supported_speeds(struct phy_device *phy, 122 unsigned int *speeds, 123 unsigned int size); 124 125 /** 126 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 127 * @interface: enum phy_interface_t value 128 * 129 * Description: maps 'enum phy_interface_t' defined in this file 130 * into the device tree binding of 'phy-mode', so that Ethernet 131 * device driver can get phy interface from device tree. 132 */ 133 static inline const char *phy_modes(phy_interface_t interface) 134 { 135 switch (interface) { 136 case PHY_INTERFACE_MODE_NA: 137 return ""; 138 case PHY_INTERFACE_MODE_INTERNAL: 139 return "internal"; 140 case PHY_INTERFACE_MODE_MII: 141 return "mii"; 142 case PHY_INTERFACE_MODE_GMII: 143 return "gmii"; 144 case PHY_INTERFACE_MODE_SGMII: 145 return "sgmii"; 146 case PHY_INTERFACE_MODE_TBI: 147 return "tbi"; 148 case PHY_INTERFACE_MODE_REVMII: 149 return "rev-mii"; 150 case PHY_INTERFACE_MODE_RMII: 151 return "rmii"; 152 case PHY_INTERFACE_MODE_RGMII: 153 return "rgmii"; 154 case PHY_INTERFACE_MODE_RGMII_ID: 155 return "rgmii-id"; 156 case PHY_INTERFACE_MODE_RGMII_RXID: 157 return "rgmii-rxid"; 158 case PHY_INTERFACE_MODE_RGMII_TXID: 159 return "rgmii-txid"; 160 case PHY_INTERFACE_MODE_RTBI: 161 return "rtbi"; 162 case PHY_INTERFACE_MODE_SMII: 163 return "smii"; 164 case PHY_INTERFACE_MODE_XGMII: 165 return "xgmii"; 166 case PHY_INTERFACE_MODE_MOCA: 167 return "moca"; 168 case PHY_INTERFACE_MODE_QSGMII: 169 return "qsgmii"; 170 case PHY_INTERFACE_MODE_TRGMII: 171 return "trgmii"; 172 case PHY_INTERFACE_MODE_1000BASEX: 173 return "1000base-x"; 174 case PHY_INTERFACE_MODE_2500BASEX: 175 return "2500base-x"; 176 case PHY_INTERFACE_MODE_RXAUI: 177 return "rxaui"; 178 case PHY_INTERFACE_MODE_XAUI: 179 return "xaui"; 180 case PHY_INTERFACE_MODE_10GKR: 181 return "10gbase-kr"; 182 case PHY_INTERFACE_MODE_USXGMII: 183 return "usxgmii"; 184 default: 185 return "unknown"; 186 } 187 } 188 189 190 #define PHY_INIT_TIMEOUT 100000 191 #define PHY_FORCE_TIMEOUT 10 192 193 #define PHY_MAX_ADDR 32 194 195 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 196 #define PHY_ID_FMT "%s:%02x" 197 198 #define MII_BUS_ID_SIZE 61 199 200 /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit 201 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */ 202 #define MII_ADDR_C45 (1<<30) 203 204 struct device; 205 struct phylink; 206 struct sk_buff; 207 208 /* 209 * The Bus class for PHYs. Devices which provide access to 210 * PHYs should register using this structure 211 */ 212 struct mii_bus { 213 struct module *owner; 214 const char *name; 215 char id[MII_BUS_ID_SIZE]; 216 void *priv; 217 int (*read)(struct mii_bus *bus, int addr, int regnum); 218 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 219 int (*reset)(struct mii_bus *bus); 220 221 /* 222 * A lock to ensure that only one thing can read/write 223 * the MDIO bus at a time 224 */ 225 struct mutex mdio_lock; 226 227 struct device *parent; 228 enum { 229 MDIOBUS_ALLOCATED = 1, 230 MDIOBUS_REGISTERED, 231 MDIOBUS_UNREGISTERED, 232 MDIOBUS_RELEASED, 233 } state; 234 struct device dev; 235 236 /* list of all PHYs on bus */ 237 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 238 239 /* PHY addresses to be ignored when probing */ 240 u32 phy_mask; 241 242 /* PHY addresses to ignore the TA/read failure */ 243 u32 phy_ignore_ta_mask; 244 245 /* 246 * An array of interrupts, each PHY's interrupt at the index 247 * matching its address 248 */ 249 int irq[PHY_MAX_ADDR]; 250 251 /* GPIO reset pulse width in microseconds */ 252 int reset_delay_us; 253 /* RESET GPIO descriptor pointer */ 254 struct gpio_desc *reset_gpiod; 255 }; 256 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 257 258 struct mii_bus *mdiobus_alloc_size(size_t); 259 static inline struct mii_bus *mdiobus_alloc(void) 260 { 261 return mdiobus_alloc_size(0); 262 } 263 264 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 265 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 266 void mdiobus_unregister(struct mii_bus *bus); 267 void mdiobus_free(struct mii_bus *bus); 268 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 269 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 270 { 271 return devm_mdiobus_alloc_size(dev, 0); 272 } 273 274 void devm_mdiobus_free(struct device *dev, struct mii_bus *bus); 275 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); 276 277 #define PHY_INTERRUPT_DISABLED false 278 #define PHY_INTERRUPT_ENABLED true 279 280 /* PHY state machine states: 281 * 282 * DOWN: PHY device and driver are not ready for anything. probe 283 * should be called if and only if the PHY is in this state, 284 * given that the PHY device exists. 285 * - PHY driver probe function will set the state to READY 286 * 287 * READY: PHY is ready to send and receive packets, but the 288 * controller is not. By default, PHYs which do not implement 289 * probe will be set to this state by phy_probe(). 290 * - start will set the state to UP 291 * 292 * UP: The PHY and attached device are ready to do work. 293 * Interrupts should be started here. 294 * - timer moves to NOLINK or RUNNING 295 * 296 * NOLINK: PHY is up, but not currently plugged in. 297 * - irq or timer will set RUNNING if link comes back 298 * - phy_stop moves to HALTED 299 * 300 * FORCING: PHY is being configured with forced settings 301 * - if link is up, move to RUNNING 302 * - If link is down, we drop to the next highest setting, and 303 * retry (FORCING) after a timeout 304 * - phy_stop moves to HALTED 305 * 306 * RUNNING: PHY is currently up, running, and possibly sending 307 * and/or receiving packets 308 * - irq or timer will set NOLINK if link goes down 309 * - phy_stop moves to HALTED 310 * 311 * HALTED: PHY is up, but no polling or interrupts are done. Or 312 * PHY is in an error state. 313 * - phy_start moves to UP 314 */ 315 enum phy_state { 316 PHY_DOWN = 0, 317 PHY_READY, 318 PHY_HALTED, 319 PHY_UP, 320 PHY_RUNNING, 321 PHY_NOLINK, 322 PHY_FORCING, 323 }; 324 325 /** 326 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 327 * @devices_in_package: Bit vector of devices present. 328 * @device_ids: The device identifer for each present device. 329 */ 330 struct phy_c45_device_ids { 331 u32 devices_in_package; 332 u32 device_ids[8]; 333 }; 334 335 /* phy_device: An instance of a PHY 336 * 337 * drv: Pointer to the driver for this PHY instance 338 * phy_id: UID for this device found during discovery 339 * c45_ids: 802.3-c45 Device Identifers if is_c45. 340 * is_c45: Set to true if this phy uses clause 45 addressing. 341 * is_internal: Set to true if this phy is internal to a MAC. 342 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc. 343 * is_gigabit_capable: Set to true if PHY supports 1000Mbps 344 * has_fixups: Set to true if this phy has fixups/quirks. 345 * suspended: Set to true if this phy has been suspended successfully. 346 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 347 * loopback_enabled: Set true if this phy has been loopbacked successfully. 348 * state: state of the PHY for management purposes 349 * dev_flags: Device-specific flags used by the PHY driver. 350 * link_timeout: The number of timer firings to wait before the 351 * giving up on the current attempt at acquiring a link 352 * irq: IRQ number of the PHY's interrupt (-1 if none) 353 * phy_timer: The timer for handling the state machine 354 * attached_dev: The attached enet driver's device instance ptr 355 * adjust_link: Callback for the enet controller to respond to 356 * changes in the link state. 357 * 358 * speed, duplex, pause, supported, advertising, lp_advertising, 359 * and autoneg are used like in mii_if_info 360 * 361 * interrupts currently only supports enabled or disabled, 362 * but could be changed in the future to support enabling 363 * and disabling specific interrupts 364 * 365 * Contains some infrastructure for polling and interrupt 366 * handling, as well as handling shifts in PHY hardware state 367 */ 368 struct phy_device { 369 struct mdio_device mdio; 370 371 /* Information about the PHY type */ 372 /* And management functions */ 373 struct phy_driver *drv; 374 375 u32 phy_id; 376 377 struct phy_c45_device_ids c45_ids; 378 unsigned is_c45:1; 379 unsigned is_internal:1; 380 unsigned is_pseudo_fixed_link:1; 381 unsigned is_gigabit_capable:1; 382 unsigned has_fixups:1; 383 unsigned suspended:1; 384 unsigned sysfs_links:1; 385 unsigned loopback_enabled:1; 386 387 unsigned autoneg:1; 388 /* The most recently read link state */ 389 unsigned link:1; 390 unsigned autoneg_complete:1; 391 392 /* Interrupts are enabled */ 393 unsigned interrupts:1; 394 395 enum phy_state state; 396 397 u32 dev_flags; 398 399 phy_interface_t interface; 400 401 /* 402 * forced speed & duplex (no autoneg) 403 * partner speed & duplex & pause (autoneg) 404 */ 405 int speed; 406 int duplex; 407 int pause; 408 int asym_pause; 409 410 /* Union of PHY and Attached devices' supported link modes */ 411 /* See ethtool.h for more info */ 412 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 413 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 414 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 415 416 /* Energy efficient ethernet modes which should be prohibited */ 417 u32 eee_broken_modes; 418 419 int link_timeout; 420 421 #ifdef CONFIG_LED_TRIGGER_PHY 422 struct phy_led_trigger *phy_led_triggers; 423 unsigned int phy_num_led_triggers; 424 struct phy_led_trigger *last_triggered; 425 426 struct phy_led_trigger *led_link_trigger; 427 #endif 428 429 /* 430 * Interrupt number for this PHY 431 * -1 means no interrupt 432 */ 433 int irq; 434 435 /* private data pointer */ 436 /* For use by PHYs to maintain extra state */ 437 void *priv; 438 439 /* Interrupt and Polling infrastructure */ 440 struct delayed_work state_queue; 441 442 struct mutex lock; 443 444 struct phylink *phylink; 445 struct net_device *attached_dev; 446 447 u8 mdix; 448 u8 mdix_ctrl; 449 450 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier); 451 void (*adjust_link)(struct net_device *dev); 452 }; 453 #define to_phy_device(d) container_of(to_mdio_device(d), \ 454 struct phy_device, mdio) 455 456 /* struct phy_driver: Driver structure for a particular PHY type 457 * 458 * driver_data: static driver data 459 * phy_id: The result of reading the UID registers of this PHY 460 * type, and ANDing them with the phy_id_mask. This driver 461 * only works for PHYs with IDs which match this field 462 * name: The friendly name of this PHY type 463 * phy_id_mask: Defines the important bits of the phy_id 464 * features: A mandatory list of features (speed, duplex, etc) 465 * supported by this PHY 466 * flags: A bitfield defining certain other features this PHY 467 * supports (like interrupts) 468 * 469 * All functions are optional. If config_aneg or read_status 470 * are not implemented, the phy core uses the genphy versions. 471 * Note that none of these functions should be called from 472 * interrupt time. The goal is for the bus read/write functions 473 * to be able to block when the bus transaction is happening, 474 * and be freed up by an interrupt (The MPC85xx has this ability, 475 * though it is not currently supported in the driver). 476 */ 477 struct phy_driver { 478 struct mdio_driver_common mdiodrv; 479 u32 phy_id; 480 char *name; 481 u32 phy_id_mask; 482 const unsigned long * const features; 483 u32 flags; 484 const void *driver_data; 485 486 /* 487 * Called to issue a PHY software reset 488 */ 489 int (*soft_reset)(struct phy_device *phydev); 490 491 /* 492 * Called to initialize the PHY, 493 * including after a reset 494 */ 495 int (*config_init)(struct phy_device *phydev); 496 497 /* 498 * Called during discovery. Used to set 499 * up device-specific structures, if any 500 */ 501 int (*probe)(struct phy_device *phydev); 502 503 /* 504 * Probe the hardware to determine what abilities it has. 505 * Should only set phydev->supported. 506 */ 507 int (*get_features)(struct phy_device *phydev); 508 509 /* PHY Power Management */ 510 int (*suspend)(struct phy_device *phydev); 511 int (*resume)(struct phy_device *phydev); 512 513 /* 514 * Configures the advertisement and resets 515 * autonegotiation if phydev->autoneg is on, 516 * forces the speed to the current settings in phydev 517 * if phydev->autoneg is off 518 */ 519 int (*config_aneg)(struct phy_device *phydev); 520 521 /* Determines the auto negotiation result */ 522 int (*aneg_done)(struct phy_device *phydev); 523 524 /* Determines the negotiated speed and duplex */ 525 int (*read_status)(struct phy_device *phydev); 526 527 /* Clears any pending interrupts */ 528 int (*ack_interrupt)(struct phy_device *phydev); 529 530 /* Enables or disables interrupts */ 531 int (*config_intr)(struct phy_device *phydev); 532 533 /* 534 * Checks if the PHY generated an interrupt. 535 * For multi-PHY devices with shared PHY interrupt pin 536 */ 537 int (*did_interrupt)(struct phy_device *phydev); 538 539 /* Override default interrupt handling */ 540 int (*handle_interrupt)(struct phy_device *phydev); 541 542 /* Clears up any memory if needed */ 543 void (*remove)(struct phy_device *phydev); 544 545 /* Returns true if this is a suitable driver for the given 546 * phydev. If NULL, matching is based on phy_id and 547 * phy_id_mask. 548 */ 549 int (*match_phy_device)(struct phy_device *phydev); 550 551 /* Handles ethtool queries for hardware time stamping. */ 552 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti); 553 554 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */ 555 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr); 556 557 /* 558 * Requests a Rx timestamp for 'skb'. If the skb is accepted, 559 * the phy driver promises to deliver it using netif_rx() as 560 * soon as a timestamp becomes available. One of the 561 * PTP_CLASS_ values is passed in 'type'. The function must 562 * return true if the skb is accepted for delivery. 563 */ 564 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); 565 566 /* 567 * Requests a Tx timestamp for 'skb'. The phy driver promises 568 * to deliver it using skb_complete_tx_timestamp() as soon as a 569 * timestamp becomes available. One of the PTP_CLASS_ values 570 * is passed in 'type'. 571 */ 572 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); 573 574 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to 575 * enable Wake on LAN, so set_wol is provided to be called in the 576 * ethernet driver's set_wol function. */ 577 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 578 579 /* See set_wol, but for checking whether Wake on LAN is enabled. */ 580 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 581 582 /* 583 * Called to inform a PHY device driver when the core is about to 584 * change the link state. This callback is supposed to be used as 585 * fixup hook for drivers that need to take action when the link 586 * state changes. Drivers are by no means allowed to mess with the 587 * PHY device structure in their implementations. 588 */ 589 void (*link_change_notify)(struct phy_device *dev); 590 591 /* 592 * Phy specific driver override for reading a MMD register. 593 * This function is optional for PHY specific drivers. When 594 * not provided, the default MMD read function will be used 595 * by phy_read_mmd(), which will use either a direct read for 596 * Clause 45 PHYs or an indirect read for Clause 22 PHYs. 597 * devnum is the MMD device number within the PHY device, 598 * regnum is the register within the selected MMD device. 599 */ 600 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 601 602 /* 603 * Phy specific driver override for writing a MMD register. 604 * This function is optional for PHY specific drivers. When 605 * not provided, the default MMD write function will be used 606 * by phy_write_mmd(), which will use either a direct write for 607 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs. 608 * devnum is the MMD device number within the PHY device, 609 * regnum is the register within the selected MMD device. 610 * val is the value to be written. 611 */ 612 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 613 u16 val); 614 615 int (*read_page)(struct phy_device *dev); 616 int (*write_page)(struct phy_device *dev, int page); 617 618 /* Get the size and type of the eeprom contained within a plug-in 619 * module */ 620 int (*module_info)(struct phy_device *dev, 621 struct ethtool_modinfo *modinfo); 622 623 /* Get the eeprom information from the plug-in module */ 624 int (*module_eeprom)(struct phy_device *dev, 625 struct ethtool_eeprom *ee, u8 *data); 626 627 /* Get statistics from the phy using ethtool */ 628 int (*get_sset_count)(struct phy_device *dev); 629 void (*get_strings)(struct phy_device *dev, u8 *data); 630 void (*get_stats)(struct phy_device *dev, 631 struct ethtool_stats *stats, u64 *data); 632 633 /* Get and Set PHY tunables */ 634 int (*get_tunable)(struct phy_device *dev, 635 struct ethtool_tunable *tuna, void *data); 636 int (*set_tunable)(struct phy_device *dev, 637 struct ethtool_tunable *tuna, 638 const void *data); 639 int (*set_loopback)(struct phy_device *dev, bool enable); 640 }; 641 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 642 struct phy_driver, mdiodrv) 643 644 #define PHY_ANY_ID "MATCH ANY PHY" 645 #define PHY_ANY_UID 0xffffffff 646 647 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 648 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 649 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 650 651 /* A Structure for boards to register fixups with the PHY Lib */ 652 struct phy_fixup { 653 struct list_head list; 654 char bus_id[MII_BUS_ID_SIZE + 3]; 655 u32 phy_uid; 656 u32 phy_uid_mask; 657 int (*run)(struct phy_device *phydev); 658 }; 659 660 const char *phy_speed_to_str(int speed); 661 const char *phy_duplex_to_str(unsigned int duplex); 662 663 /* A structure for mapping a particular speed and duplex 664 * combination to a particular SUPPORTED and ADVERTISED value 665 */ 666 struct phy_setting { 667 u32 speed; 668 u8 duplex; 669 u8 bit; 670 }; 671 672 const struct phy_setting * 673 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 674 bool exact); 675 size_t phy_speeds(unsigned int *speeds, size_t size, 676 unsigned long *mask); 677 void of_set_phy_supported(struct phy_device *phydev); 678 void of_set_phy_eee_broken(struct phy_device *phydev); 679 680 /** 681 * phy_is_started - Convenience function to check whether PHY is started 682 * @phydev: The phy_device struct 683 */ 684 static inline bool phy_is_started(struct phy_device *phydev) 685 { 686 return phydev->state >= PHY_UP; 687 } 688 689 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 690 691 /** 692 * phy_read - Convenience function for reading a given PHY register 693 * @phydev: the phy_device struct 694 * @regnum: register number to read 695 * 696 * NOTE: MUST NOT be called from interrupt context, 697 * because the bus read/write functions may wait for an interrupt 698 * to conclude the operation. 699 */ 700 static inline int phy_read(struct phy_device *phydev, u32 regnum) 701 { 702 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 703 } 704 705 /** 706 * __phy_read - convenience function for reading a given PHY register 707 * @phydev: the phy_device struct 708 * @regnum: register number to read 709 * 710 * The caller must have taken the MDIO bus lock. 711 */ 712 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 713 { 714 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 715 } 716 717 /** 718 * phy_write - Convenience function for writing a given PHY register 719 * @phydev: the phy_device struct 720 * @regnum: register number to write 721 * @val: value to write to @regnum 722 * 723 * NOTE: MUST NOT be called from interrupt context, 724 * because the bus read/write functions may wait for an interrupt 725 * to conclude the operation. 726 */ 727 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 728 { 729 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 730 } 731 732 /** 733 * __phy_write - Convenience function for writing a given PHY register 734 * @phydev: the phy_device struct 735 * @regnum: register number to write 736 * @val: value to write to @regnum 737 * 738 * The caller must have taken the MDIO bus lock. 739 */ 740 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 741 { 742 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 743 val); 744 } 745 746 /** 747 * phy_read_mmd - Convenience function for reading a register 748 * from an MMD on a given PHY. 749 * @phydev: The phy_device struct 750 * @devad: The MMD to read from 751 * @regnum: The register on the MMD to read 752 * 753 * Same rules as for phy_read(); 754 */ 755 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 756 757 /** 758 * __phy_read_mmd - Convenience function for reading a register 759 * from an MMD on a given PHY. 760 * @phydev: The phy_device struct 761 * @devad: The MMD to read from 762 * @regnum: The register on the MMD to read 763 * 764 * Same rules as for __phy_read(); 765 */ 766 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 767 768 /** 769 * phy_write_mmd - Convenience function for writing a register 770 * on an MMD on a given PHY. 771 * @phydev: The phy_device struct 772 * @devad: The MMD to write to 773 * @regnum: The register on the MMD to read 774 * @val: value to write to @regnum 775 * 776 * Same rules as for phy_write(); 777 */ 778 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 779 780 /** 781 * __phy_write_mmd - Convenience function for writing a register 782 * on an MMD on a given PHY. 783 * @phydev: The phy_device struct 784 * @devad: The MMD to write to 785 * @regnum: The register on the MMD to read 786 * @val: value to write to @regnum 787 * 788 * Same rules as for __phy_write(); 789 */ 790 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 791 792 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 793 u16 set); 794 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 795 u16 set); 796 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 797 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 798 799 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 800 u16 mask, u16 set); 801 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 802 u16 mask, u16 set); 803 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 804 u16 mask, u16 set); 805 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 806 u16 mask, u16 set); 807 808 /** 809 * __phy_set_bits - Convenience function for setting bits in a PHY register 810 * @phydev: the phy_device struct 811 * @regnum: register number to write 812 * @val: bits to set 813 * 814 * The caller must have taken the MDIO bus lock. 815 */ 816 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 817 { 818 return __phy_modify(phydev, regnum, 0, val); 819 } 820 821 /** 822 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 823 * @phydev: the phy_device struct 824 * @regnum: register number to write 825 * @val: bits to clear 826 * 827 * The caller must have taken the MDIO bus lock. 828 */ 829 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 830 u16 val) 831 { 832 return __phy_modify(phydev, regnum, val, 0); 833 } 834 835 /** 836 * phy_set_bits - Convenience function for setting bits in a PHY register 837 * @phydev: the phy_device struct 838 * @regnum: register number to write 839 * @val: bits to set 840 */ 841 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 842 { 843 return phy_modify(phydev, regnum, 0, val); 844 } 845 846 /** 847 * phy_clear_bits - Convenience function for clearing bits in a PHY register 848 * @phydev: the phy_device struct 849 * @regnum: register number to write 850 * @val: bits to clear 851 */ 852 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 853 { 854 return phy_modify(phydev, regnum, val, 0); 855 } 856 857 /** 858 * __phy_set_bits_mmd - Convenience function for setting bits in a register 859 * on MMD 860 * @phydev: the phy_device struct 861 * @devad: the MMD containing register to modify 862 * @regnum: register number to modify 863 * @val: bits to set 864 * 865 * The caller must have taken the MDIO bus lock. 866 */ 867 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 868 u32 regnum, u16 val) 869 { 870 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 871 } 872 873 /** 874 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 875 * on MMD 876 * @phydev: the phy_device struct 877 * @devad: the MMD containing register to modify 878 * @regnum: register number to modify 879 * @val: bits to clear 880 * 881 * The caller must have taken the MDIO bus lock. 882 */ 883 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 884 u32 regnum, u16 val) 885 { 886 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 887 } 888 889 /** 890 * phy_set_bits_mmd - Convenience function for setting bits in a register 891 * on MMD 892 * @phydev: the phy_device struct 893 * @devad: the MMD containing register to modify 894 * @regnum: register number to modify 895 * @val: bits to set 896 */ 897 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 898 u32 regnum, u16 val) 899 { 900 return phy_modify_mmd(phydev, devad, regnum, 0, val); 901 } 902 903 /** 904 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 905 * on MMD 906 * @phydev: the phy_device struct 907 * @devad: the MMD containing register to modify 908 * @regnum: register number to modify 909 * @val: bits to clear 910 */ 911 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 912 u32 regnum, u16 val) 913 { 914 return phy_modify_mmd(phydev, devad, regnum, val, 0); 915 } 916 917 /** 918 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 919 * @phydev: the phy_device struct 920 * 921 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 922 * PHY_IGNORE_INTERRUPT 923 */ 924 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 925 { 926 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT; 927 } 928 929 /** 930 * phy_polling_mode - Convenience function for testing whether polling is 931 * used to detect PHY status changes 932 * @phydev: the phy_device struct 933 */ 934 static inline bool phy_polling_mode(struct phy_device *phydev) 935 { 936 return phydev->irq == PHY_POLL; 937 } 938 939 /** 940 * phy_is_internal - Convenience function for testing if a PHY is internal 941 * @phydev: the phy_device struct 942 */ 943 static inline bool phy_is_internal(struct phy_device *phydev) 944 { 945 return phydev->is_internal; 946 } 947 948 /** 949 * phy_interface_mode_is_rgmii - Convenience function for testing if a 950 * PHY interface mode is RGMII (all variants) 951 * @mode: the phy_interface_t enum 952 */ 953 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 954 { 955 return mode >= PHY_INTERFACE_MODE_RGMII && 956 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 957 }; 958 959 /** 960 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z 961 * negotiation 962 * @mode: one of &enum phy_interface_t 963 * 964 * Returns true if the phy interface mode uses the 16-bit negotiation 965 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 966 */ 967 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 968 { 969 return mode == PHY_INTERFACE_MODE_1000BASEX || 970 mode == PHY_INTERFACE_MODE_2500BASEX; 971 } 972 973 /** 974 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 975 * is RGMII (all variants) 976 * @phydev: the phy_device struct 977 */ 978 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 979 { 980 return phy_interface_mode_is_rgmii(phydev->interface); 981 }; 982 983 /* 984 * phy_is_pseudo_fixed_link - Convenience function for testing if this 985 * PHY is the CPU port facing side of an Ethernet switch, or similar. 986 * @phydev: the phy_device struct 987 */ 988 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 989 { 990 return phydev->is_pseudo_fixed_link; 991 } 992 993 int phy_save_page(struct phy_device *phydev); 994 int phy_select_page(struct phy_device *phydev, int page); 995 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 996 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 997 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 998 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 999 u16 mask, u16 set); 1000 1001 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id, 1002 bool is_c45, 1003 struct phy_c45_device_ids *c45_ids); 1004 #if IS_ENABLED(CONFIG_PHYLIB) 1005 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1006 int phy_device_register(struct phy_device *phy); 1007 void phy_device_free(struct phy_device *phydev); 1008 #else 1009 static inline 1010 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1011 { 1012 return NULL; 1013 } 1014 1015 static inline int phy_device_register(struct phy_device *phy) 1016 { 1017 return 0; 1018 } 1019 1020 static inline void phy_device_free(struct phy_device *phydev) { } 1021 #endif /* CONFIG_PHYLIB */ 1022 void phy_device_remove(struct phy_device *phydev); 1023 int phy_init_hw(struct phy_device *phydev); 1024 int phy_suspend(struct phy_device *phydev); 1025 int phy_resume(struct phy_device *phydev); 1026 int __phy_resume(struct phy_device *phydev); 1027 int phy_loopback(struct phy_device *phydev, bool enable); 1028 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1029 phy_interface_t interface); 1030 struct phy_device *phy_find_first(struct mii_bus *bus); 1031 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1032 u32 flags, phy_interface_t interface); 1033 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1034 void (*handler)(struct net_device *), 1035 phy_interface_t interface); 1036 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1037 void (*handler)(struct net_device *), 1038 phy_interface_t interface); 1039 void phy_disconnect(struct phy_device *phydev); 1040 void phy_detach(struct phy_device *phydev); 1041 void phy_start(struct phy_device *phydev); 1042 void phy_stop(struct phy_device *phydev); 1043 int phy_start_aneg(struct phy_device *phydev); 1044 int phy_aneg_done(struct phy_device *phydev); 1045 int phy_speed_down(struct phy_device *phydev, bool sync); 1046 int phy_speed_up(struct phy_device *phydev); 1047 1048 int phy_restart_aneg(struct phy_device *phydev); 1049 int phy_reset_after_clk_enable(struct phy_device *phydev); 1050 1051 static inline void phy_device_reset(struct phy_device *phydev, int value) 1052 { 1053 mdio_device_reset(&phydev->mdio, value); 1054 } 1055 1056 #define phydev_err(_phydev, format, args...) \ 1057 dev_err(&_phydev->mdio.dev, format, ##args) 1058 1059 #define phydev_info(_phydev, format, args...) \ 1060 dev_info(&_phydev->mdio.dev, format, ##args) 1061 1062 #define phydev_warn(_phydev, format, args...) \ 1063 dev_warn(&_phydev->mdio.dev, format, ##args) 1064 1065 #define phydev_dbg(_phydev, format, args...) \ 1066 dev_dbg(&_phydev->mdio.dev, format, ##args) 1067 1068 static inline const char *phydev_name(const struct phy_device *phydev) 1069 { 1070 return dev_name(&phydev->mdio.dev); 1071 } 1072 1073 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1074 __printf(2, 3); 1075 void phy_attached_info(struct phy_device *phydev); 1076 1077 /* Clause 22 PHY */ 1078 int genphy_config_init(struct phy_device *phydev); 1079 int genphy_read_abilities(struct phy_device *phydev); 1080 int genphy_setup_forced(struct phy_device *phydev); 1081 int genphy_restart_aneg(struct phy_device *phydev); 1082 int genphy_config_eee_advert(struct phy_device *phydev); 1083 int genphy_config_aneg(struct phy_device *phydev); 1084 int genphy_aneg_done(struct phy_device *phydev); 1085 int genphy_update_link(struct phy_device *phydev); 1086 int genphy_read_status(struct phy_device *phydev); 1087 int genphy_suspend(struct phy_device *phydev); 1088 int genphy_resume(struct phy_device *phydev); 1089 int genphy_loopback(struct phy_device *phydev, bool enable); 1090 int genphy_soft_reset(struct phy_device *phydev); 1091 static inline int genphy_no_soft_reset(struct phy_device *phydev) 1092 { 1093 return 0; 1094 } 1095 static inline int genphy_no_ack_interrupt(struct phy_device *phydev) 1096 { 1097 return 0; 1098 } 1099 static inline int genphy_no_config_intr(struct phy_device *phydev) 1100 { 1101 return 0; 1102 } 1103 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1104 u16 regnum); 1105 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1106 u16 regnum, u16 val); 1107 1108 /* Clause 45 PHY */ 1109 int genphy_c45_restart_aneg(struct phy_device *phydev); 1110 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1111 int genphy_c45_aneg_done(struct phy_device *phydev); 1112 int genphy_c45_read_link(struct phy_device *phydev); 1113 int genphy_c45_read_lpa(struct phy_device *phydev); 1114 int genphy_c45_read_pma(struct phy_device *phydev); 1115 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1116 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1117 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1118 int genphy_c45_read_mdix(struct phy_device *phydev); 1119 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1120 int genphy_c45_read_status(struct phy_device *phydev); 1121 1122 /* The gen10g_* functions are the old Clause 45 stub */ 1123 int gen10g_config_aneg(struct phy_device *phydev); 1124 1125 static inline int phy_read_status(struct phy_device *phydev) 1126 { 1127 if (!phydev->drv) 1128 return -EIO; 1129 1130 if (phydev->drv->read_status) 1131 return phydev->drv->read_status(phydev); 1132 else 1133 return genphy_read_status(phydev); 1134 } 1135 1136 void phy_driver_unregister(struct phy_driver *drv); 1137 void phy_drivers_unregister(struct phy_driver *drv, int n); 1138 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1139 int phy_drivers_register(struct phy_driver *new_driver, int n, 1140 struct module *owner); 1141 void phy_state_machine(struct work_struct *work); 1142 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1143 void phy_mac_interrupt(struct phy_device *phydev); 1144 void phy_start_machine(struct phy_device *phydev); 1145 void phy_stop_machine(struct phy_device *phydev); 1146 int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd); 1147 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1148 struct ethtool_link_ksettings *cmd); 1149 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1150 const struct ethtool_link_ksettings *cmd); 1151 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1152 void phy_request_interrupt(struct phy_device *phydev); 1153 void phy_free_interrupt(struct phy_device *phydev); 1154 void phy_print_status(struct phy_device *phydev); 1155 int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1156 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1157 void phy_advertise_supported(struct phy_device *phydev); 1158 void phy_support_sym_pause(struct phy_device *phydev); 1159 void phy_support_asym_pause(struct phy_device *phydev); 1160 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1161 bool autoneg); 1162 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1163 bool phy_validate_pause(struct phy_device *phydev, 1164 struct ethtool_pauseparam *pp); 1165 1166 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1167 int (*run)(struct phy_device *)); 1168 int phy_register_fixup_for_id(const char *bus_id, 1169 int (*run)(struct phy_device *)); 1170 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1171 int (*run)(struct phy_device *)); 1172 1173 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1174 int phy_unregister_fixup_for_id(const char *bus_id); 1175 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1176 1177 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1178 int phy_get_eee_err(struct phy_device *phydev); 1179 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1180 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1181 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1182 void phy_ethtool_get_wol(struct phy_device *phydev, 1183 struct ethtool_wolinfo *wol); 1184 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1185 struct ethtool_link_ksettings *cmd); 1186 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1187 const struct ethtool_link_ksettings *cmd); 1188 int phy_ethtool_nway_reset(struct net_device *ndev); 1189 1190 #if IS_ENABLED(CONFIG_PHYLIB) 1191 int __init mdio_bus_init(void); 1192 void mdio_bus_exit(void); 1193 #endif 1194 1195 /* Inline function for use within net/core/ethtool.c (built-in) */ 1196 static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data) 1197 { 1198 if (!phydev->drv) 1199 return -EIO; 1200 1201 mutex_lock(&phydev->lock); 1202 phydev->drv->get_strings(phydev, data); 1203 mutex_unlock(&phydev->lock); 1204 1205 return 0; 1206 } 1207 1208 static inline int phy_ethtool_get_sset_count(struct phy_device *phydev) 1209 { 1210 int ret; 1211 1212 if (!phydev->drv) 1213 return -EIO; 1214 1215 if (phydev->drv->get_sset_count && 1216 phydev->drv->get_strings && 1217 phydev->drv->get_stats) { 1218 mutex_lock(&phydev->lock); 1219 ret = phydev->drv->get_sset_count(phydev); 1220 mutex_unlock(&phydev->lock); 1221 1222 return ret; 1223 } 1224 1225 return -EOPNOTSUPP; 1226 } 1227 1228 static inline int phy_ethtool_get_stats(struct phy_device *phydev, 1229 struct ethtool_stats *stats, u64 *data) 1230 { 1231 if (!phydev->drv) 1232 return -EIO; 1233 1234 mutex_lock(&phydev->lock); 1235 phydev->drv->get_stats(phydev, stats, data); 1236 mutex_unlock(&phydev->lock); 1237 1238 return 0; 1239 } 1240 1241 extern struct bus_type mdio_bus_type; 1242 1243 struct mdio_board_info { 1244 const char *bus_id; 1245 char modalias[MDIO_NAME_SIZE]; 1246 int mdio_addr; 1247 const void *platform_data; 1248 }; 1249 1250 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1251 int mdiobus_register_board_info(const struct mdio_board_info *info, 1252 unsigned int n); 1253 #else 1254 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1255 unsigned int n) 1256 { 1257 return 0; 1258 } 1259 #endif 1260 1261 1262 /** 1263 * module_phy_driver() - Helper macro for registering PHY drivers 1264 * @__phy_drivers: array of PHY drivers to register 1265 * 1266 * Helper macro for PHY drivers which do not do anything special in module 1267 * init/exit. Each module may only use this macro once, and calling it 1268 * replaces module_init() and module_exit(). 1269 */ 1270 #define phy_module_driver(__phy_drivers, __count) \ 1271 static int __init phy_module_init(void) \ 1272 { \ 1273 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 1274 } \ 1275 module_init(phy_module_init); \ 1276 static void __exit phy_module_exit(void) \ 1277 { \ 1278 phy_drivers_unregister(__phy_drivers, __count); \ 1279 } \ 1280 module_exit(phy_module_exit) 1281 1282 #define module_phy_driver(__phy_drivers) \ 1283 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 1284 1285 bool phy_driver_is_genphy(struct phy_device *phydev); 1286 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 1287 1288 #endif /* __PHY_H */ 1289