1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/leds.h> 18 #include <linux/linkmode.h> 19 #include <linux/netlink.h> 20 #include <linux/mdio.h> 21 #include <linux/mii.h> 22 #include <linux/mii_timestamper.h> 23 #include <linux/module.h> 24 #include <linux/timer.h> 25 #include <linux/workqueue.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/u64_stats_sync.h> 28 #include <linux/irqreturn.h> 29 #include <linux/iopoll.h> 30 #include <linux/refcount.h> 31 32 #include <linux/atomic.h> 33 #include <net/eee.h> 34 35 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 36 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 37 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 38 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 39 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 40 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 41 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init; 42 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap2_features) __ro_after_init; 43 44 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 45 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 46 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 47 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 48 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 49 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 50 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features) 51 #define PHY_EEE_CAP2_FEATURES ((unsigned long *)&phy_eee_cap2_features) 52 53 extern const int phy_basic_ports_array[3]; 54 55 /* 56 * Set phydev->irq to PHY_POLL if interrupts are not supported, 57 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 58 * the attached MAC driver handles the interrupt 59 */ 60 #define PHY_POLL -1 61 #define PHY_MAC_INTERRUPT -2 62 63 #define PHY_IS_INTERNAL 0x00000001 64 #define PHY_RST_AFTER_CLK_EN 0x00000002 65 #define PHY_POLL_CABLE_TEST 0x00000004 66 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008 67 #define MDIO_DEVICE_IS_PHY 0x80000000 68 69 /** 70 * enum phy_interface_t - Interface Mode definitions 71 * 72 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 73 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 74 * @PHY_INTERFACE_MODE_MII: Media-independent interface 75 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 76 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 77 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 78 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 79 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 80 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 81 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 82 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 83 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 84 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 85 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 86 * @PHY_INTERFACE_MODE_SMII: Serial MII 87 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 88 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 89 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 90 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII 91 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 92 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 93 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 94 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 95 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 96 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 97 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 98 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 99 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 100 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 101 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 102 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 103 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 104 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 105 * @PHY_INTERFACE_MODE_10G_QXGMII: 10G-QXGMII - 4 ports over 10G USXGMII 106 * @PHY_INTERFACE_MODE_MAX: Book keeping 107 * 108 * Describes the interface between the MAC and PHY. 109 */ 110 typedef enum { 111 PHY_INTERFACE_MODE_NA, 112 PHY_INTERFACE_MODE_INTERNAL, 113 PHY_INTERFACE_MODE_MII, 114 PHY_INTERFACE_MODE_GMII, 115 PHY_INTERFACE_MODE_SGMII, 116 PHY_INTERFACE_MODE_TBI, 117 PHY_INTERFACE_MODE_REVMII, 118 PHY_INTERFACE_MODE_RMII, 119 PHY_INTERFACE_MODE_REVRMII, 120 PHY_INTERFACE_MODE_RGMII, 121 PHY_INTERFACE_MODE_RGMII_ID, 122 PHY_INTERFACE_MODE_RGMII_RXID, 123 PHY_INTERFACE_MODE_RGMII_TXID, 124 PHY_INTERFACE_MODE_RTBI, 125 PHY_INTERFACE_MODE_SMII, 126 PHY_INTERFACE_MODE_XGMII, 127 PHY_INTERFACE_MODE_XLGMII, 128 PHY_INTERFACE_MODE_MOCA, 129 PHY_INTERFACE_MODE_PSGMII, 130 PHY_INTERFACE_MODE_QSGMII, 131 PHY_INTERFACE_MODE_TRGMII, 132 PHY_INTERFACE_MODE_100BASEX, 133 PHY_INTERFACE_MODE_1000BASEX, 134 PHY_INTERFACE_MODE_2500BASEX, 135 PHY_INTERFACE_MODE_5GBASER, 136 PHY_INTERFACE_MODE_RXAUI, 137 PHY_INTERFACE_MODE_XAUI, 138 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 139 PHY_INTERFACE_MODE_10GBASER, 140 PHY_INTERFACE_MODE_25GBASER, 141 PHY_INTERFACE_MODE_USXGMII, 142 /* 10GBASE-KR - with Clause 73 AN */ 143 PHY_INTERFACE_MODE_10GKR, 144 PHY_INTERFACE_MODE_QUSGMII, 145 PHY_INTERFACE_MODE_1000BASEKX, 146 PHY_INTERFACE_MODE_10G_QXGMII, 147 PHY_INTERFACE_MODE_MAX, 148 } phy_interface_t; 149 150 /* PHY interface mode bitmap handling */ 151 #define DECLARE_PHY_INTERFACE_MASK(name) \ 152 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 153 154 static inline void phy_interface_zero(unsigned long *intf) 155 { 156 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 157 } 158 159 static inline bool phy_interface_empty(const unsigned long *intf) 160 { 161 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 162 } 163 164 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 165 const unsigned long *b) 166 { 167 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 168 } 169 170 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 171 const unsigned long *b) 172 { 173 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 174 } 175 176 static inline void phy_interface_set_rgmii(unsigned long *intf) 177 { 178 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 179 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 180 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 181 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 182 } 183 184 /** 185 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 186 * @interface: enum phy_interface_t value 187 * 188 * Description: maps enum &phy_interface_t defined in this file 189 * into the device tree binding of 'phy-mode', so that Ethernet 190 * device driver can get PHY interface from device tree. 191 */ 192 static inline const char *phy_modes(phy_interface_t interface) 193 { 194 switch (interface) { 195 case PHY_INTERFACE_MODE_NA: 196 return ""; 197 case PHY_INTERFACE_MODE_INTERNAL: 198 return "internal"; 199 case PHY_INTERFACE_MODE_MII: 200 return "mii"; 201 case PHY_INTERFACE_MODE_GMII: 202 return "gmii"; 203 case PHY_INTERFACE_MODE_SGMII: 204 return "sgmii"; 205 case PHY_INTERFACE_MODE_TBI: 206 return "tbi"; 207 case PHY_INTERFACE_MODE_REVMII: 208 return "rev-mii"; 209 case PHY_INTERFACE_MODE_RMII: 210 return "rmii"; 211 case PHY_INTERFACE_MODE_REVRMII: 212 return "rev-rmii"; 213 case PHY_INTERFACE_MODE_RGMII: 214 return "rgmii"; 215 case PHY_INTERFACE_MODE_RGMII_ID: 216 return "rgmii-id"; 217 case PHY_INTERFACE_MODE_RGMII_RXID: 218 return "rgmii-rxid"; 219 case PHY_INTERFACE_MODE_RGMII_TXID: 220 return "rgmii-txid"; 221 case PHY_INTERFACE_MODE_RTBI: 222 return "rtbi"; 223 case PHY_INTERFACE_MODE_SMII: 224 return "smii"; 225 case PHY_INTERFACE_MODE_XGMII: 226 return "xgmii"; 227 case PHY_INTERFACE_MODE_XLGMII: 228 return "xlgmii"; 229 case PHY_INTERFACE_MODE_MOCA: 230 return "moca"; 231 case PHY_INTERFACE_MODE_PSGMII: 232 return "psgmii"; 233 case PHY_INTERFACE_MODE_QSGMII: 234 return "qsgmii"; 235 case PHY_INTERFACE_MODE_TRGMII: 236 return "trgmii"; 237 case PHY_INTERFACE_MODE_1000BASEX: 238 return "1000base-x"; 239 case PHY_INTERFACE_MODE_1000BASEKX: 240 return "1000base-kx"; 241 case PHY_INTERFACE_MODE_2500BASEX: 242 return "2500base-x"; 243 case PHY_INTERFACE_MODE_5GBASER: 244 return "5gbase-r"; 245 case PHY_INTERFACE_MODE_RXAUI: 246 return "rxaui"; 247 case PHY_INTERFACE_MODE_XAUI: 248 return "xaui"; 249 case PHY_INTERFACE_MODE_10GBASER: 250 return "10gbase-r"; 251 case PHY_INTERFACE_MODE_25GBASER: 252 return "25gbase-r"; 253 case PHY_INTERFACE_MODE_USXGMII: 254 return "usxgmii"; 255 case PHY_INTERFACE_MODE_10GKR: 256 return "10gbase-kr"; 257 case PHY_INTERFACE_MODE_100BASEX: 258 return "100base-x"; 259 case PHY_INTERFACE_MODE_QUSGMII: 260 return "qusgmii"; 261 case PHY_INTERFACE_MODE_10G_QXGMII: 262 return "10g-qxgmii"; 263 default: 264 return "unknown"; 265 } 266 } 267 268 /** 269 * rgmii_clock - map link speed to the clock rate 270 * @speed: link speed value 271 * 272 * Description: maps RGMII supported link speeds 273 * into the clock rates. 274 * 275 * Returns: clock rate or negative errno 276 */ 277 static inline long rgmii_clock(int speed) 278 { 279 switch (speed) { 280 case SPEED_10: 281 return 2500000; 282 case SPEED_100: 283 return 25000000; 284 case SPEED_1000: 285 return 125000000; 286 default: 287 return -EINVAL; 288 } 289 } 290 291 #define PHY_MAX_ADDR 32 292 293 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 294 #define PHY_ID_FMT "%s:%02x" 295 296 #define MII_BUS_ID_SIZE 61 297 298 struct device; 299 struct kernel_hwtstamp_config; 300 struct phylink; 301 struct sfp_bus; 302 struct sfp_upstream_ops; 303 struct sk_buff; 304 305 /** 306 * struct mdio_bus_stats - Statistics counters for MDIO busses 307 * @transfers: Total number of transfers, i.e. @writes + @reads 308 * @errors: Number of MDIO transfers that returned an error 309 * @writes: Number of write transfers 310 * @reads: Number of read transfers 311 * @syncp: Synchronisation for incrementing statistics 312 */ 313 struct mdio_bus_stats { 314 u64_stats_t transfers; 315 u64_stats_t errors; 316 u64_stats_t writes; 317 u64_stats_t reads; 318 /* Must be last, add new statistics above */ 319 struct u64_stats_sync syncp; 320 }; 321 322 /** 323 * struct mii_bus - Represents an MDIO bus 324 * 325 * @owner: Who owns this device 326 * @name: User friendly name for this MDIO device, or driver name 327 * @id: Unique identifier for this bus, typical from bus hierarchy 328 * @priv: Driver private data 329 * 330 * The Bus class for PHYs. Devices which provide access to 331 * PHYs should register using this structure 332 */ 333 struct mii_bus { 334 struct module *owner; 335 const char *name; 336 char id[MII_BUS_ID_SIZE]; 337 void *priv; 338 /** @read: Perform a read transfer on the bus */ 339 int (*read)(struct mii_bus *bus, int addr, int regnum); 340 /** @write: Perform a write transfer on the bus */ 341 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 342 /** @read_c45: Perform a C45 read transfer on the bus */ 343 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 344 /** @write_c45: Perform a C45 write transfer on the bus */ 345 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 346 int regnum, u16 val); 347 /** @reset: Perform a reset of the bus */ 348 int (*reset)(struct mii_bus *bus); 349 350 /** @stats: Statistic counters per device on the bus */ 351 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 352 353 /** 354 * @mdio_lock: A lock to ensure that only one thing can read/write 355 * the MDIO bus at a time 356 */ 357 struct mutex mdio_lock; 358 359 /** @parent: Parent device of this bus */ 360 struct device *parent; 361 /** @state: State of bus structure */ 362 enum { 363 MDIOBUS_ALLOCATED = 1, 364 MDIOBUS_REGISTERED, 365 MDIOBUS_UNREGISTERED, 366 MDIOBUS_RELEASED, 367 } state; 368 369 /** @dev: Kernel device representation */ 370 struct device dev; 371 372 /** @mdio_map: list of all MDIO devices on bus */ 373 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 374 375 /** @phy_mask: PHY addresses to be ignored when probing */ 376 u32 phy_mask; 377 378 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 379 u32 phy_ignore_ta_mask; 380 381 /** 382 * @irq: An array of interrupts, each PHY's interrupt at the index 383 * matching its address 384 */ 385 int irq[PHY_MAX_ADDR]; 386 387 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 388 int reset_delay_us; 389 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 390 int reset_post_delay_us; 391 /** @reset_gpiod: Reset GPIO descriptor pointer */ 392 struct gpio_desc *reset_gpiod; 393 394 /** @shared_lock: protect access to the shared element */ 395 struct mutex shared_lock; 396 397 /** @shared: shared state across different PHYs */ 398 struct phy_package_shared *shared[PHY_MAX_ADDR]; 399 }; 400 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 401 402 struct mii_bus *mdiobus_alloc_size(size_t size); 403 404 /** 405 * mdiobus_alloc - Allocate an MDIO bus structure 406 * 407 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 408 * for the driver to register the bus. 409 */ 410 static inline struct mii_bus *mdiobus_alloc(void) 411 { 412 return mdiobus_alloc_size(0); 413 } 414 415 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 416 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 417 struct module *owner); 418 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 419 #define devm_mdiobus_register(dev, bus) \ 420 __devm_mdiobus_register(dev, bus, THIS_MODULE) 421 422 void mdiobus_unregister(struct mii_bus *bus); 423 void mdiobus_free(struct mii_bus *bus); 424 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 425 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 426 { 427 return devm_mdiobus_alloc_size(dev, 0); 428 } 429 430 struct mii_bus *mdio_find_bus(const char *mdio_name); 431 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); 432 433 #define PHY_INTERRUPT_DISABLED false 434 #define PHY_INTERRUPT_ENABLED true 435 436 /** 437 * enum phy_state - PHY state machine states: 438 * 439 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 440 * should be called if and only if the PHY is in this state, 441 * given that the PHY device exists. 442 * - PHY driver probe function will set the state to @PHY_READY 443 * 444 * @PHY_READY: PHY is ready to send and receive packets, but the 445 * controller is not. By default, PHYs which do not implement 446 * probe will be set to this state by phy_probe(). 447 * - start will set the state to UP 448 * 449 * @PHY_UP: The PHY and attached device are ready to do work. 450 * Interrupts should be started here. 451 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 452 * 453 * @PHY_NOLINK: PHY is up, but not currently plugged in. 454 * - irq or timer will set @PHY_RUNNING if link comes back 455 * - phy_stop moves to @PHY_HALTED 456 * 457 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 458 * and/or receiving packets 459 * - irq or timer will set @PHY_NOLINK if link goes down 460 * - phy_stop moves to @PHY_HALTED 461 * 462 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 463 * is not expected to work, carrier will be indicated as down. PHY will be 464 * poll once per second, or on interrupt for it current state. 465 * Once complete, move to UP to restart the PHY. 466 * - phy_stop aborts the running test and moves to @PHY_HALTED 467 * 468 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. 469 * - phy_start moves to @PHY_UP 470 * 471 * @PHY_ERROR: PHY is up, but is in an error state. 472 * - phy_stop moves to @PHY_HALTED 473 */ 474 enum phy_state { 475 PHY_DOWN = 0, 476 PHY_READY, 477 PHY_HALTED, 478 PHY_ERROR, 479 PHY_UP, 480 PHY_RUNNING, 481 PHY_NOLINK, 482 PHY_CABLETEST, 483 }; 484 485 #define MDIO_MMD_NUM 32 486 487 /** 488 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 489 * @devices_in_package: IEEE 802.3 devices in package register value. 490 * @mmds_present: bit vector of MMDs present. 491 * @device_ids: The device identifer for each present device. 492 */ 493 struct phy_c45_device_ids { 494 u32 devices_in_package; 495 u32 mmds_present; 496 u32 device_ids[MDIO_MMD_NUM]; 497 }; 498 499 struct macsec_context; 500 struct macsec_ops; 501 502 /** 503 * struct phy_device - An instance of a PHY 504 * 505 * @mdio: MDIO bus this PHY is on 506 * @drv: Pointer to the driver for this PHY instance 507 * @devlink: Create a link between phy dev and mac dev, if the external phy 508 * used by current mac interface is managed by another mac interface. 509 * @phyindex: Unique id across the phy's parent tree of phys to address the PHY 510 * from userspace, similar to ifindex. A zero index means the PHY 511 * wasn't assigned an id yet. 512 * @phy_id: UID for this device found during discovery 513 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 514 * @is_c45: Set to true if this PHY uses clause 45 addressing. 515 * @is_internal: Set to true if this PHY is internal to a MAC. 516 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 517 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 518 * @has_fixups: Set to true if this PHY has fixups/quirks. 519 * @suspended: Set to true if this PHY has been suspended successfully. 520 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 521 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 522 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 523 * @downshifted_rate: Set true if link speed has been downshifted. 524 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 525 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 526 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN 527 * enabled. 528 * @state: State of the PHY for management purposes 529 * @dev_flags: Device-specific flags used by the PHY driver. 530 * 531 * - Bits [15:0] are free to use by the PHY driver to communicate 532 * driver specific behavior. 533 * - Bits [23:16] are currently reserved for future use. 534 * - Bits [31:24] are reserved for defining generic 535 * PHY driver behavior. 536 * @irq: IRQ number of the PHY's interrupt (-1 if none) 537 * @phylink: Pointer to phylink instance for this PHY 538 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 539 * @sfp_bus: SFP bus attached to this PHY's fiber port 540 * @attached_dev: The attached enet driver's device instance ptr 541 * @adjust_link: Callback for the enet controller to respond to changes: in the 542 * link state. 543 * @phy_link_change: Callback for phylink for notification of link change 544 * @macsec_ops: MACsec offloading ops. 545 * 546 * @speed: Current link speed 547 * @duplex: Current duplex 548 * @port: Current port 549 * @pause: Current pause 550 * @asym_pause: Current asymmetric pause 551 * @supported: Combined MAC/PHY supported linkmodes 552 * @advertising: Currently advertised linkmodes 553 * @adv_old: Saved advertised while power saving for WoL 554 * @supported_eee: supported PHY EEE linkmodes 555 * @advertising_eee: Currently advertised EEE linkmodes 556 * @enable_tx_lpi: When True, MAC should transmit LPI to PHY 557 * @eee_active: phylib private state, indicating that EEE has been negotiated 558 * @eee_cfg: User configuration of EEE 559 * @lp_advertising: Current link partner advertised linkmodes 560 * @host_interfaces: PHY interface modes supported by host 561 * @eee_disabled_modes: Energy efficient ethernet modes not to be advertised 562 * @autoneg: Flag autoneg being used 563 * @rate_matching: Current rate matching mode 564 * @link: Current link state 565 * @autoneg_complete: Flag auto negotiation of the link has completed 566 * @mdix: Current crossover 567 * @mdix_ctrl: User setting of crossover 568 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 569 * @interrupts: Flag interrupts have been enabled 570 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 571 * handling shall be postponed until PHY has resumed 572 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 573 * requiring a rerun of the interrupt handler after resume 574 * @default_timestamp: Flag indicating whether we are using the phy 575 * timestamp as the default one 576 * @interface: enum phy_interface_t value 577 * @possible_interfaces: bitmap if interface modes that the attached PHY 578 * will switch between depending on media speed. 579 * @skb: Netlink message for cable diagnostics 580 * @nest: Netlink nest used for cable diagnostics 581 * @ehdr: nNtlink header for cable diagnostics 582 * @phy_led_triggers: Array of LED triggers 583 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 584 * @led_link_trigger: LED trigger for link up/down 585 * @last_triggered: last LED trigger for link speed 586 * @leds: list of PHY LED structures 587 * @master_slave_set: User requested master/slave configuration 588 * @master_slave_get: Current master/slave advertisement 589 * @master_slave_state: Current master/slave configuration 590 * @mii_ts: Pointer to time stamper callbacks 591 * @psec: Pointer to Power Sourcing Equipment control struct 592 * @lock: Mutex for serialization access to PHY 593 * @state_queue: Work queue for state machine 594 * @link_down_events: Number of times link was lost 595 * @shared: Pointer to private data shared by phys in one package 596 * @priv: Pointer to driver private data 597 * 598 * interrupts currently only supports enabled or disabled, 599 * but could be changed in the future to support enabling 600 * and disabling specific interrupts 601 * 602 * Contains some infrastructure for polling and interrupt 603 * handling, as well as handling shifts in PHY hardware state 604 */ 605 struct phy_device { 606 struct mdio_device mdio; 607 608 /* Information about the PHY type */ 609 /* And management functions */ 610 const struct phy_driver *drv; 611 612 struct device_link *devlink; 613 614 u32 phyindex; 615 u32 phy_id; 616 617 struct phy_c45_device_ids c45_ids; 618 unsigned is_c45:1; 619 unsigned is_internal:1; 620 unsigned is_pseudo_fixed_link:1; 621 unsigned is_gigabit_capable:1; 622 unsigned has_fixups:1; 623 unsigned suspended:1; 624 unsigned suspended_by_mdio_bus:1; 625 unsigned sysfs_links:1; 626 unsigned loopback_enabled:1; 627 unsigned downshifted_rate:1; 628 unsigned is_on_sfp_module:1; 629 unsigned mac_managed_pm:1; 630 unsigned wol_enabled:1; 631 632 unsigned autoneg:1; 633 /* The most recently read link state */ 634 unsigned link:1; 635 unsigned autoneg_complete:1; 636 637 /* Interrupts are enabled */ 638 unsigned interrupts:1; 639 unsigned irq_suspended:1; 640 unsigned irq_rerun:1; 641 642 unsigned default_timestamp:1; 643 644 int rate_matching; 645 646 enum phy_state state; 647 648 u32 dev_flags; 649 650 phy_interface_t interface; 651 DECLARE_PHY_INTERFACE_MASK(possible_interfaces); 652 653 /* 654 * forced speed & duplex (no autoneg) 655 * partner speed & duplex & pause (autoneg) 656 */ 657 int speed; 658 int duplex; 659 int port; 660 int pause; 661 int asym_pause; 662 u8 master_slave_get; 663 u8 master_slave_set; 664 u8 master_slave_state; 665 666 /* Union of PHY and Attached devices' supported link modes */ 667 /* See ethtool.h for more info */ 668 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 669 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 670 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 671 /* used with phy_speed_down */ 672 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 673 /* used for eee validation and configuration*/ 674 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee); 675 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee); 676 /* Energy efficient ethernet modes which should be prohibited */ 677 __ETHTOOL_DECLARE_LINK_MODE_MASK(eee_disabled_modes); 678 bool enable_tx_lpi; 679 bool eee_active; 680 struct eee_config eee_cfg; 681 682 /* Host supported PHY interface types. Should be ignored if empty. */ 683 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 684 685 #ifdef CONFIG_LED_TRIGGER_PHY 686 struct phy_led_trigger *phy_led_triggers; 687 unsigned int phy_num_led_triggers; 688 struct phy_led_trigger *last_triggered; 689 690 struct phy_led_trigger *led_link_trigger; 691 #endif 692 struct list_head leds; 693 694 /* 695 * Interrupt number for this PHY 696 * -1 means no interrupt 697 */ 698 int irq; 699 700 /* private data pointer */ 701 /* For use by PHYs to maintain extra state */ 702 void *priv; 703 704 /* shared data pointer */ 705 /* For use by PHYs inside the same package that need a shared state. */ 706 struct phy_package_shared *shared; 707 708 /* Reporting cable test results */ 709 struct sk_buff *skb; 710 void *ehdr; 711 struct nlattr *nest; 712 713 /* Interrupt and Polling infrastructure */ 714 struct delayed_work state_queue; 715 716 struct mutex lock; 717 718 /* This may be modified under the rtnl lock */ 719 bool sfp_bus_attached; 720 struct sfp_bus *sfp_bus; 721 struct phylink *phylink; 722 struct net_device *attached_dev; 723 struct mii_timestamper *mii_ts; 724 struct pse_control *psec; 725 726 u8 mdix; 727 u8 mdix_ctrl; 728 729 int pma_extable; 730 731 unsigned int link_down_events; 732 733 void (*phy_link_change)(struct phy_device *phydev, bool up); 734 void (*adjust_link)(struct net_device *dev); 735 736 #if IS_ENABLED(CONFIG_MACSEC) 737 /* MACsec management functions */ 738 const struct macsec_ops *macsec_ops; 739 #endif 740 }; 741 742 /* Generic phy_device::dev_flags */ 743 #define PHY_F_NO_IRQ 0x80000000 744 #define PHY_F_RXC_ALWAYS_ON 0x40000000 745 746 static inline struct phy_device *to_phy_device(const struct device *dev) 747 { 748 return container_of(to_mdio_device(dev), struct phy_device, mdio); 749 } 750 751 /** 752 * struct phy_tdr_config - Configuration of a TDR raw test 753 * 754 * @first: Distance for first data collection point 755 * @last: Distance for last data collection point 756 * @step: Step between data collection points 757 * @pair: Bitmap of cable pairs to collect data for 758 * 759 * A structure containing possible configuration parameters 760 * for a TDR cable test. The driver does not need to implement 761 * all the parameters, but should report what is actually used. 762 * All distances are in centimeters. 763 */ 764 struct phy_tdr_config { 765 u32 first; 766 u32 last; 767 u32 step; 768 s8 pair; 769 }; 770 #define PHY_PAIR_ALL -1 771 772 /** 773 * enum link_inband_signalling - in-band signalling modes that are supported 774 * 775 * @LINK_INBAND_DISABLE: in-band signalling can be disabled 776 * @LINK_INBAND_ENABLE: in-band signalling can be enabled without bypass 777 * @LINK_INBAND_BYPASS: in-band signalling can be enabled with bypass 778 * 779 * The possible and required bits can only be used if the valid bit is set. 780 * If possible is clear, that means inband signalling can not be used. 781 * Required is only valid when possible is set, and means that inband 782 * signalling must be used. 783 */ 784 enum link_inband_signalling { 785 LINK_INBAND_DISABLE = BIT(0), 786 LINK_INBAND_ENABLE = BIT(1), 787 LINK_INBAND_BYPASS = BIT(2), 788 }; 789 790 /** 791 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 792 * Avoidance) Reconciliation Sublayer. 793 * 794 * @version: read-only PLCA register map version. -1 = not available. Ignored 795 * when setting the configuration. Format is the same as reported by the PLCA 796 * IDVER register (31.CA00). -1 = not available. 797 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 798 * set. 0 = disabled, anything else = enabled. 799 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 800 * Allowed values [0 .. 254]. 255 = node disabled. 801 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 802 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 803 * set. Allowed values [1 .. 255]. 804 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 805 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 806 * more details. The to_timer shall be set equal over all nodes. 807 * -1 = not available / don't set. Allowed values [0 .. 255]. 808 * @burst_cnt: controls how many additional frames a node is allowed to send in 809 * single transmit opportunity (TO). The default value of 0 means that the 810 * node is allowed exactly one frame per TO. A value of 1 allows two frames 811 * per TO, and so on. -1 = not available / don't set. 812 * Allowed values [0 .. 255]. 813 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 814 * frame before interrupting the burst. This value should be set to a value 815 * greater than the MAC inter-packet gap (which is typically 96 bits). 816 * -1 = not available / don't set. Allowed values [0 .. 255]. 817 * 818 * A structure containing configuration parameters for setting/getting the PLCA 819 * RS configuration. The driver does not need to implement all the parameters, 820 * but should report what is actually used. 821 */ 822 struct phy_plca_cfg { 823 int version; 824 int enabled; 825 int node_id; 826 int node_cnt; 827 int to_tmr; 828 int burst_cnt; 829 int burst_tmr; 830 }; 831 832 /** 833 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 834 * Avoidance) Reconciliation Sublayer. 835 * 836 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 837 * register(31.CA03), indicating BEACON activity. 838 * 839 * A structure containing status information of the PLCA RS configuration. 840 * The driver does not need to implement all the parameters, but should report 841 * what is actually used. 842 */ 843 struct phy_plca_status { 844 bool pst; 845 }; 846 847 /* Modes for PHY LED configuration */ 848 enum phy_led_modes { 849 PHY_LED_ACTIVE_HIGH = 0, 850 PHY_LED_ACTIVE_LOW = 1, 851 PHY_LED_INACTIVE_HIGH_IMPEDANCE = 2, 852 853 /* keep it last */ 854 __PHY_LED_MODES_NUM, 855 }; 856 857 /** 858 * struct phy_led: An LED driven by the PHY 859 * 860 * @list: List of LEDs 861 * @phydev: PHY this LED is attached to 862 * @led_cdev: Standard LED class structure 863 * @index: Number of the LED 864 */ 865 struct phy_led { 866 struct list_head list; 867 struct phy_device *phydev; 868 struct led_classdev led_cdev; 869 u8 index; 870 }; 871 872 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev) 873 874 /** 875 * struct phy_driver - Driver structure for a particular PHY type 876 * 877 * @mdiodrv: Data common to all MDIO devices 878 * @phy_id: The result of reading the UID registers of this PHY 879 * type, and ANDing them with the phy_id_mask. This driver 880 * only works for PHYs with IDs which match this field 881 * @name: The friendly name of this PHY type 882 * @phy_id_mask: Defines the important bits of the phy_id 883 * @features: A mandatory list of features (speed, duplex, etc) 884 * supported by this PHY 885 * @flags: A bitfield defining certain other features this PHY 886 * supports (like interrupts) 887 * @driver_data: Static driver data 888 * 889 * All functions are optional. If config_aneg or read_status 890 * are not implemented, the phy core uses the genphy versions. 891 * Note that none of these functions should be called from 892 * interrupt time. The goal is for the bus read/write functions 893 * to be able to block when the bus transaction is happening, 894 * and be freed up by an interrupt (The MPC85xx has this ability, 895 * though it is not currently supported in the driver). 896 */ 897 struct phy_driver { 898 struct mdio_driver_common mdiodrv; 899 u32 phy_id; 900 char *name; 901 u32 phy_id_mask; 902 const unsigned long * const features; 903 u32 flags; 904 const void *driver_data; 905 906 /** 907 * @soft_reset: Called to issue a PHY software reset 908 */ 909 int (*soft_reset)(struct phy_device *phydev); 910 911 /** 912 * @config_init: Called to initialize the PHY, 913 * including after a reset 914 */ 915 int (*config_init)(struct phy_device *phydev); 916 917 /** 918 * @probe: Called during discovery. Used to set 919 * up device-specific structures, if any 920 */ 921 int (*probe)(struct phy_device *phydev); 922 923 /** 924 * @get_features: Probe the hardware to determine what 925 * abilities it has. Should only set phydev->supported. 926 */ 927 int (*get_features)(struct phy_device *phydev); 928 929 /** 930 * @inband_caps: query whether in-band is supported for the given PHY 931 * interface mode. Returns a bitmask of bits defined by enum 932 * link_inband_signalling. 933 */ 934 unsigned int (*inband_caps)(struct phy_device *phydev, 935 phy_interface_t interface); 936 937 /** 938 * @config_inband: configure in-band mode for the PHY 939 */ 940 int (*config_inband)(struct phy_device *phydev, unsigned int modes); 941 942 /** 943 * @get_rate_matching: Get the supported type of rate matching for a 944 * particular phy interface. This is used by phy consumers to determine 945 * whether to advertise lower-speed modes for that interface. It is 946 * assumed that if a rate matching mode is supported on an interface, 947 * then that interface's rate can be adapted to all slower link speeds 948 * supported by the phy. If the interface is not supported, this should 949 * return %RATE_MATCH_NONE. 950 */ 951 int (*get_rate_matching)(struct phy_device *phydev, 952 phy_interface_t iface); 953 954 /* PHY Power Management */ 955 /** @suspend: Suspend the hardware, saving state if needed */ 956 int (*suspend)(struct phy_device *phydev); 957 /** @resume: Resume the hardware, restoring state if needed */ 958 int (*resume)(struct phy_device *phydev); 959 960 /** 961 * @config_aneg: Configures the advertisement and resets 962 * autonegotiation if phydev->autoneg is on, 963 * forces the speed to the current settings in phydev 964 * if phydev->autoneg is off 965 */ 966 int (*config_aneg)(struct phy_device *phydev); 967 968 /** @aneg_done: Determines the auto negotiation result */ 969 int (*aneg_done)(struct phy_device *phydev); 970 971 /** @read_status: Determines the negotiated speed and duplex */ 972 int (*read_status)(struct phy_device *phydev); 973 974 /** 975 * @config_intr: Enables or disables interrupts. 976 * It should also clear any pending interrupts prior to enabling the 977 * IRQs and after disabling them. 978 */ 979 int (*config_intr)(struct phy_device *phydev); 980 981 /** @handle_interrupt: Override default interrupt handling */ 982 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 983 984 /** @remove: Clears up any memory if needed */ 985 void (*remove)(struct phy_device *phydev); 986 987 /** 988 * @match_phy_device: Returns true if this is a suitable 989 * driver for the given phydev. If NULL, matching is based on 990 * phy_id and phy_id_mask. 991 */ 992 int (*match_phy_device)(struct phy_device *phydev); 993 994 /** 995 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 996 * register changes to enable Wake on LAN, so set_wol is 997 * provided to be called in the ethernet driver's set_wol 998 * function. 999 */ 1000 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1001 1002 /** 1003 * @get_wol: See set_wol, but for checking whether Wake on LAN 1004 * is enabled. 1005 */ 1006 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1007 1008 /** 1009 * @link_change_notify: Called to inform a PHY device driver 1010 * when the core is about to change the link state. This 1011 * callback is supposed to be used as fixup hook for drivers 1012 * that need to take action when the link state 1013 * changes. Drivers are by no means allowed to mess with the 1014 * PHY device structure in their implementations. 1015 */ 1016 void (*link_change_notify)(struct phy_device *dev); 1017 1018 /** 1019 * @read_mmd: PHY specific driver override for reading a MMD 1020 * register. This function is optional for PHY specific 1021 * drivers. When not provided, the default MMD read function 1022 * will be used by phy_read_mmd(), which will use either a 1023 * direct read for Clause 45 PHYs or an indirect read for 1024 * Clause 22 PHYs. devnum is the MMD device number within the 1025 * PHY device, regnum is the register within the selected MMD 1026 * device. 1027 */ 1028 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 1029 1030 /** 1031 * @write_mmd: PHY specific driver override for writing a MMD 1032 * register. This function is optional for PHY specific 1033 * drivers. When not provided, the default MMD write function 1034 * will be used by phy_write_mmd(), which will use either a 1035 * direct write for Clause 45 PHYs, or an indirect write for 1036 * Clause 22 PHYs. devnum is the MMD device number within the 1037 * PHY device, regnum is the register within the selected MMD 1038 * device. val is the value to be written. 1039 */ 1040 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 1041 u16 val); 1042 1043 /** @read_page: Return the current PHY register page number */ 1044 int (*read_page)(struct phy_device *dev); 1045 /** @write_page: Set the current PHY register page number */ 1046 int (*write_page)(struct phy_device *dev, int page); 1047 1048 /** 1049 * @module_info: Get the size and type of the eeprom contained 1050 * within a plug-in module 1051 */ 1052 int (*module_info)(struct phy_device *dev, 1053 struct ethtool_modinfo *modinfo); 1054 1055 /** 1056 * @module_eeprom: Get the eeprom information from the plug-in 1057 * module 1058 */ 1059 int (*module_eeprom)(struct phy_device *dev, 1060 struct ethtool_eeprom *ee, u8 *data); 1061 1062 /** @cable_test_start: Start a cable test */ 1063 int (*cable_test_start)(struct phy_device *dev); 1064 1065 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1066 int (*cable_test_tdr_start)(struct phy_device *dev, 1067 const struct phy_tdr_config *config); 1068 1069 /** 1070 * @cable_test_get_status: Once per second, or on interrupt, 1071 * request the status of the test. 1072 */ 1073 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1074 1075 /* Get statistics from the PHY using ethtool */ 1076 /** 1077 * @get_phy_stats: Retrieve PHY statistics. 1078 * @dev: The PHY device for which the statistics are retrieved. 1079 * @eth_stats: structure where Ethernet PHY stats will be stored. 1080 * @stats: structure where additional PHY-specific stats will be stored. 1081 * 1082 * Retrieves the supported PHY statistics and populates the provided 1083 * structures. The input structures are pre-initialized with 1084 * `ETHTOOL_STAT_NOT_SET`, and the driver must only modify members 1085 * corresponding to supported statistics. Unmodified members will remain 1086 * set to `ETHTOOL_STAT_NOT_SET` and will not be returned to userspace. 1087 */ 1088 void (*get_phy_stats)(struct phy_device *dev, 1089 struct ethtool_eth_phy_stats *eth_stats, 1090 struct ethtool_phy_stats *stats); 1091 1092 /** 1093 * @get_link_stats: Retrieve link statistics. 1094 * @dev: The PHY device for which the statistics are retrieved. 1095 * @link_stats: structure where link-specific stats will be stored. 1096 * 1097 * Retrieves link-related statistics for the given PHY device. The input 1098 * structure is pre-initialized with `ETHTOOL_STAT_NOT_SET`, and the 1099 * driver must only modify members corresponding to supported 1100 * statistics. Unmodified members will remain set to 1101 * `ETHTOOL_STAT_NOT_SET` and will not be returned to userspace. 1102 */ 1103 void (*get_link_stats)(struct phy_device *dev, 1104 struct ethtool_link_ext_stats *link_stats); 1105 1106 /** 1107 * @update_stats: Trigger periodic statistics updates. 1108 * @dev: The PHY device for which statistics updates are triggered. 1109 * 1110 * Periodically gathers statistics from the PHY device to update locally 1111 * maintained 64-bit counters. This is necessary for PHYs that implement 1112 * reduced-width counters (e.g., 16-bit or 32-bit) which can overflow 1113 * more frequently compared to 64-bit counters. By invoking this 1114 * callback, drivers can fetch the current counter values, handle 1115 * overflow detection, and accumulate the results into local 64-bit 1116 * counters for accurate reporting through the `get_phy_stats` and 1117 * `get_link_stats` interfaces. 1118 * 1119 * Return: 0 on success or a negative error code on failure. 1120 */ 1121 int (*update_stats)(struct phy_device *dev); 1122 1123 /** @get_sset_count: Number of statistic counters */ 1124 int (*get_sset_count)(struct phy_device *dev); 1125 /** @get_strings: Names of the statistic counters */ 1126 void (*get_strings)(struct phy_device *dev, u8 *data); 1127 /** @get_stats: Return the statistic counter values */ 1128 void (*get_stats)(struct phy_device *dev, 1129 struct ethtool_stats *stats, u64 *data); 1130 1131 /* Get and Set PHY tunables */ 1132 /** @get_tunable: Return the value of a tunable */ 1133 int (*get_tunable)(struct phy_device *dev, 1134 struct ethtool_tunable *tuna, void *data); 1135 /** @set_tunable: Set the value of a tunable */ 1136 int (*set_tunable)(struct phy_device *dev, 1137 struct ethtool_tunable *tuna, 1138 const void *data); 1139 /** @set_loopback: Set the loopback mood of the PHY */ 1140 int (*set_loopback)(struct phy_device *dev, bool enable); 1141 /** @get_sqi: Get the signal quality indication */ 1142 int (*get_sqi)(struct phy_device *dev); 1143 /** @get_sqi_max: Get the maximum signal quality indication */ 1144 int (*get_sqi_max)(struct phy_device *dev); 1145 1146 /* PLCA RS interface */ 1147 /** @get_plca_cfg: Return the current PLCA configuration */ 1148 int (*get_plca_cfg)(struct phy_device *dev, 1149 struct phy_plca_cfg *plca_cfg); 1150 /** @set_plca_cfg: Set the PLCA configuration */ 1151 int (*set_plca_cfg)(struct phy_device *dev, 1152 const struct phy_plca_cfg *plca_cfg); 1153 /** @get_plca_status: Return the current PLCA status info */ 1154 int (*get_plca_status)(struct phy_device *dev, 1155 struct phy_plca_status *plca_st); 1156 1157 /** 1158 * @led_brightness_set: Set a PHY LED brightness. Index 1159 * indicates which of the PHYs led should be set. Value 1160 * follows the standard LED class meaning, e.g. LED_OFF, 1161 * LED_HALF, LED_FULL. 1162 */ 1163 int (*led_brightness_set)(struct phy_device *dev, 1164 u8 index, enum led_brightness value); 1165 1166 /** 1167 * @led_blink_set: Set a PHY LED blinking. Index indicates 1168 * which of the PHYs led should be configured to blink. Delays 1169 * are in milliseconds and if both are zero then a sensible 1170 * default should be chosen. The call should adjust the 1171 * timings in that case and if it can't match the values 1172 * specified exactly. 1173 */ 1174 int (*led_blink_set)(struct phy_device *dev, u8 index, 1175 unsigned long *delay_on, 1176 unsigned long *delay_off); 1177 /** 1178 * @led_hw_is_supported: Can the HW support the given rules. 1179 * @dev: PHY device which has the LED 1180 * @index: Which LED of the PHY device 1181 * @rules The core is interested in these rules 1182 * 1183 * Return 0 if yes, -EOPNOTSUPP if not, or an error code. 1184 */ 1185 int (*led_hw_is_supported)(struct phy_device *dev, u8 index, 1186 unsigned long rules); 1187 /** 1188 * @led_hw_control_set: Set the HW to control the LED 1189 * @dev: PHY device which has the LED 1190 * @index: Which LED of the PHY device 1191 * @rules The rules used to control the LED 1192 * 1193 * Returns 0, or a an error code. 1194 */ 1195 int (*led_hw_control_set)(struct phy_device *dev, u8 index, 1196 unsigned long rules); 1197 /** 1198 * @led_hw_control_get: Get how the HW is controlling the LED 1199 * @dev: PHY device which has the LED 1200 * @index: Which LED of the PHY device 1201 * @rules Pointer to the rules used to control the LED 1202 * 1203 * Set *@rules to how the HW is currently blinking. Returns 0 1204 * on success, or a error code if the current blinking cannot 1205 * be represented in rules, or some other error happens. 1206 */ 1207 int (*led_hw_control_get)(struct phy_device *dev, u8 index, 1208 unsigned long *rules); 1209 1210 /** 1211 * @led_polarity_set: Set the LED polarity modes 1212 * @dev: PHY device which has the LED 1213 * @index: Which LED of the PHY device 1214 * @modes: bitmap of LED polarity modes 1215 * 1216 * Configure LED with all the required polarity modes in @modes 1217 * to make it correctly turn ON or OFF. 1218 * 1219 * Returns 0, or an error code. 1220 */ 1221 int (*led_polarity_set)(struct phy_device *dev, int index, 1222 unsigned long modes); 1223 1224 /** 1225 * @get_next_update_time: Get the time until the next update event 1226 * @dev: PHY device 1227 * 1228 * Callback to determine the time (in jiffies) until the next 1229 * update event for the PHY state machine. Allows PHY drivers to 1230 * dynamically adjust polling intervals based on link state or other 1231 * conditions. 1232 * 1233 * Returns the time in jiffies until the next update event. 1234 */ 1235 unsigned int (*get_next_update_time)(struct phy_device *dev); 1236 }; 1237 #define to_phy_driver(d) container_of_const(to_mdio_common_driver(d), \ 1238 struct phy_driver, mdiodrv) 1239 1240 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 1241 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 1242 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 1243 1244 /** 1245 * phy_id_compare - compare @id1 with @id2 taking account of @mask 1246 * @id1: first PHY ID 1247 * @id2: second PHY ID 1248 * @mask: the PHY ID mask, set bits are significant in matching 1249 * 1250 * Return true if the bits from @id1 and @id2 specified by @mask match. 1251 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask). 1252 */ 1253 static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask) 1254 { 1255 return !((id1 ^ id2) & mask); 1256 } 1257 1258 /** 1259 * phydev_id_compare - compare @id with the PHY's Clause 22 ID 1260 * @phydev: the PHY device 1261 * @id: the PHY ID to be matched 1262 * 1263 * Compare the @phydev clause 22 ID with the provided @id and return true or 1264 * false depending whether it matches, using the bound driver mask. The 1265 * @phydev must be bound to a driver. 1266 */ 1267 static inline bool phydev_id_compare(struct phy_device *phydev, u32 id) 1268 { 1269 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask); 1270 } 1271 1272 const char *phy_speed_to_str(int speed); 1273 const char *phy_duplex_to_str(unsigned int duplex); 1274 const char *phy_rate_matching_to_str(int rate_matching); 1275 1276 int phy_interface_num_ports(phy_interface_t interface); 1277 1278 /* A structure for mapping a particular speed and duplex 1279 * combination to a particular SUPPORTED and ADVERTISED value 1280 */ 1281 struct phy_setting { 1282 u32 speed; 1283 u8 duplex; 1284 u8 bit; 1285 }; 1286 1287 const struct phy_setting * 1288 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 1289 bool exact); 1290 size_t phy_speeds(unsigned int *speeds, size_t size, 1291 unsigned long *mask); 1292 1293 /** 1294 * phy_is_started - Convenience function to check whether PHY is started 1295 * @phydev: The phy_device struct 1296 */ 1297 static inline bool phy_is_started(struct phy_device *phydev) 1298 { 1299 return phydev->state >= PHY_UP; 1300 } 1301 1302 /** 1303 * phy_disable_eee_mode - Don't advertise an EEE mode. 1304 * @phydev: The phy_device struct 1305 * @link_mode: The EEE mode to be disabled 1306 */ 1307 static inline void phy_disable_eee_mode(struct phy_device *phydev, u32 link_mode) 1308 { 1309 WARN_ON(phy_is_started(phydev)); 1310 1311 linkmode_set_bit(link_mode, phydev->eee_disabled_modes); 1312 linkmode_clear_bit(link_mode, phydev->advertising_eee); 1313 } 1314 1315 void phy_resolve_aneg_pause(struct phy_device *phydev); 1316 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1317 1318 /** 1319 * phy_read - Convenience function for reading a given PHY register 1320 * @phydev: the phy_device struct 1321 * @regnum: register number to read 1322 * 1323 * NOTE: MUST NOT be called from interrupt context, 1324 * because the bus read/write functions may wait for an interrupt 1325 * to conclude the operation. 1326 */ 1327 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1328 { 1329 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1330 } 1331 1332 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1333 timeout_us, sleep_before_read) \ 1334 ({ \ 1335 int __ret, __val; \ 1336 __ret = read_poll_timeout(__val = phy_read, val, \ 1337 __val < 0 || (cond), \ 1338 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1339 if (__val < 0) \ 1340 __ret = __val; \ 1341 if (__ret) \ 1342 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1343 __ret; \ 1344 }) 1345 1346 /** 1347 * __phy_read - convenience function for reading a given PHY register 1348 * @phydev: the phy_device struct 1349 * @regnum: register number to read 1350 * 1351 * The caller must have taken the MDIO bus lock. 1352 */ 1353 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1354 { 1355 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1356 } 1357 1358 /** 1359 * phy_write - Convenience function for writing a given PHY register 1360 * @phydev: the phy_device struct 1361 * @regnum: register number to write 1362 * @val: value to write to @regnum 1363 * 1364 * NOTE: MUST NOT be called from interrupt context, 1365 * because the bus read/write functions may wait for an interrupt 1366 * to conclude the operation. 1367 */ 1368 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1369 { 1370 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1371 } 1372 1373 /** 1374 * __phy_write - Convenience function for writing a given PHY register 1375 * @phydev: the phy_device struct 1376 * @regnum: register number to write 1377 * @val: value to write to @regnum 1378 * 1379 * The caller must have taken the MDIO bus lock. 1380 */ 1381 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1382 { 1383 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1384 val); 1385 } 1386 1387 /** 1388 * __phy_modify_changed() - Convenience function for modifying a PHY register 1389 * @phydev: a pointer to a &struct phy_device 1390 * @regnum: register number 1391 * @mask: bit mask of bits to clear 1392 * @set: bit mask of bits to set 1393 * 1394 * Unlocked helper function which allows a PHY register to be modified as 1395 * new register value = (old register value & ~mask) | set 1396 * 1397 * Returns negative errno, 0 if there was no change, and 1 in case of change 1398 */ 1399 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1400 u16 mask, u16 set) 1401 { 1402 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1403 regnum, mask, set); 1404 } 1405 1406 /* 1407 * phy_read_mmd - Convenience function for reading a register 1408 * from an MMD on a given PHY. 1409 */ 1410 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1411 1412 /** 1413 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1414 * condition is met or a timeout occurs 1415 * 1416 * @phydev: The phy_device struct 1417 * @devaddr: The MMD to read from 1418 * @regnum: The register on the MMD to read 1419 * @val: Variable to read the register into 1420 * @cond: Break condition (usually involving @val) 1421 * @sleep_us: Maximum time to sleep between reads in us (0 tight-loops). Please 1422 * read usleep_range() function description for details and 1423 * limitations. 1424 * @timeout_us: Timeout in us, 0 means never timeout 1425 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1426 * 1427 * Returns: 0 on success and -ETIMEDOUT upon a timeout. In either 1428 * case, the last read value at @args is stored in @val. Must not 1429 * be called from atomic context if sleep_us or timeout_us are used. 1430 */ 1431 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1432 sleep_us, timeout_us, sleep_before_read) \ 1433 ({ \ 1434 int __ret, __val; \ 1435 __ret = read_poll_timeout(__val = phy_read_mmd, val, \ 1436 __val < 0 || (cond), \ 1437 sleep_us, timeout_us, sleep_before_read, \ 1438 phydev, devaddr, regnum); \ 1439 if (__val < 0) \ 1440 __ret = __val; \ 1441 if (__ret) \ 1442 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1443 __ret; \ 1444 }) 1445 1446 /* 1447 * __phy_read_mmd - Convenience function for reading a register 1448 * from an MMD on a given PHY. 1449 */ 1450 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1451 1452 /* 1453 * phy_write_mmd - Convenience function for writing a register 1454 * on an MMD on a given PHY. 1455 */ 1456 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1457 1458 /* 1459 * __phy_write_mmd - Convenience function for writing a register 1460 * on an MMD on a given PHY. 1461 */ 1462 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1463 1464 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1465 u16 set); 1466 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1467 u16 set); 1468 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1469 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1470 1471 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1472 u16 mask, u16 set); 1473 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1474 u16 mask, u16 set); 1475 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1476 u16 mask, u16 set); 1477 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1478 u16 mask, u16 set); 1479 1480 /** 1481 * __phy_set_bits - Convenience function for setting bits in a PHY register 1482 * @phydev: the phy_device struct 1483 * @regnum: register number to write 1484 * @val: bits to set 1485 * 1486 * The caller must have taken the MDIO bus lock. 1487 */ 1488 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1489 { 1490 return __phy_modify(phydev, regnum, 0, val); 1491 } 1492 1493 /** 1494 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1495 * @phydev: the phy_device struct 1496 * @regnum: register number to write 1497 * @val: bits to clear 1498 * 1499 * The caller must have taken the MDIO bus lock. 1500 */ 1501 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1502 u16 val) 1503 { 1504 return __phy_modify(phydev, regnum, val, 0); 1505 } 1506 1507 /** 1508 * phy_set_bits - Convenience function for setting bits in a PHY register 1509 * @phydev: the phy_device struct 1510 * @regnum: register number to write 1511 * @val: bits to set 1512 */ 1513 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1514 { 1515 return phy_modify(phydev, regnum, 0, val); 1516 } 1517 1518 /** 1519 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1520 * @phydev: the phy_device struct 1521 * @regnum: register number to write 1522 * @val: bits to clear 1523 */ 1524 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1525 { 1526 return phy_modify(phydev, regnum, val, 0); 1527 } 1528 1529 /** 1530 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1531 * on MMD 1532 * @phydev: the phy_device struct 1533 * @devad: the MMD containing register to modify 1534 * @regnum: register number to modify 1535 * @val: bits to set 1536 * 1537 * The caller must have taken the MDIO bus lock. 1538 */ 1539 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1540 u32 regnum, u16 val) 1541 { 1542 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1543 } 1544 1545 /** 1546 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1547 * on MMD 1548 * @phydev: the phy_device struct 1549 * @devad: the MMD containing register to modify 1550 * @regnum: register number to modify 1551 * @val: bits to clear 1552 * 1553 * The caller must have taken the MDIO bus lock. 1554 */ 1555 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1556 u32 regnum, u16 val) 1557 { 1558 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1559 } 1560 1561 /** 1562 * phy_set_bits_mmd - Convenience function for setting bits in a register 1563 * on MMD 1564 * @phydev: the phy_device struct 1565 * @devad: the MMD containing register to modify 1566 * @regnum: register number to modify 1567 * @val: bits to set 1568 */ 1569 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1570 u32 regnum, u16 val) 1571 { 1572 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1573 } 1574 1575 /** 1576 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1577 * on MMD 1578 * @phydev: the phy_device struct 1579 * @devad: the MMD containing register to modify 1580 * @regnum: register number to modify 1581 * @val: bits to clear 1582 */ 1583 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1584 u32 regnum, u16 val) 1585 { 1586 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1587 } 1588 1589 /** 1590 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1591 * @phydev: the phy_device struct 1592 * 1593 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1594 * PHY_MAC_INTERRUPT 1595 */ 1596 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1597 { 1598 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1599 } 1600 1601 /** 1602 * phy_polling_mode - Convenience function for testing whether polling is 1603 * used to detect PHY status changes 1604 * @phydev: the phy_device struct 1605 */ 1606 static inline bool phy_polling_mode(struct phy_device *phydev) 1607 { 1608 if (phydev->state == PHY_CABLETEST) 1609 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1610 return true; 1611 1612 if (phydev->drv->update_stats) 1613 return true; 1614 1615 return phydev->irq == PHY_POLL; 1616 } 1617 1618 /** 1619 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1620 * @phydev: the phy_device struct 1621 */ 1622 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1623 { 1624 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1625 } 1626 1627 /** 1628 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1629 * @phydev: the phy_device struct 1630 */ 1631 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1632 { 1633 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1634 } 1635 1636 /** 1637 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1638 * PTP hardware clock capabilities. 1639 * @phydev: the phy_device struct 1640 */ 1641 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1642 { 1643 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1644 } 1645 1646 /** 1647 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1648 * @phydev: the phy_device struct 1649 */ 1650 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1651 { 1652 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1653 } 1654 1655 static inline int phy_hwtstamp(struct phy_device *phydev, 1656 struct kernel_hwtstamp_config *cfg, 1657 struct netlink_ext_ack *extack) 1658 { 1659 return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack); 1660 } 1661 1662 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1663 int type) 1664 { 1665 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1666 } 1667 1668 static inline int phy_ts_info(struct phy_device *phydev, 1669 struct kernel_ethtool_ts_info *tsinfo) 1670 { 1671 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1672 } 1673 1674 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1675 int type) 1676 { 1677 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1678 } 1679 1680 /** 1681 * phy_is_default_hwtstamp - Is the PHY hwtstamp the default timestamp 1682 * @phydev: Pointer to phy_device 1683 * 1684 * This is used to get default timestamping device taking into account 1685 * the new API choice, which is selecting the timestamping from MAC by 1686 * default if the phydev does not have default_timestamp flag enabled. 1687 * 1688 * Return: True if phy is the default hw timestamp, false otherwise. 1689 */ 1690 static inline bool phy_is_default_hwtstamp(struct phy_device *phydev) 1691 { 1692 return phy_has_hwtstamp(phydev) && phydev->default_timestamp; 1693 } 1694 1695 /** 1696 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1697 * @phydev: the phy_device struct 1698 */ 1699 static inline bool phy_on_sfp(struct phy_device *phydev) 1700 { 1701 return phydev->is_on_sfp_module; 1702 } 1703 1704 /** 1705 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1706 * PHY interface mode is RGMII (all variants) 1707 * @mode: the &phy_interface_t enum 1708 */ 1709 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1710 { 1711 return mode >= PHY_INTERFACE_MODE_RGMII && 1712 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1713 }; 1714 1715 /** 1716 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1717 * negotiation 1718 * @mode: one of &enum phy_interface_t 1719 * 1720 * Returns true if the PHY interface mode uses the 16-bit negotiation 1721 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1722 */ 1723 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1724 { 1725 return mode == PHY_INTERFACE_MODE_1000BASEX || 1726 mode == PHY_INTERFACE_MODE_2500BASEX; 1727 } 1728 1729 /** 1730 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1731 * is RGMII (all variants) 1732 * @phydev: the phy_device struct 1733 */ 1734 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1735 { 1736 return phy_interface_mode_is_rgmii(phydev->interface); 1737 }; 1738 1739 /** 1740 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1741 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1742 * @phydev: the phy_device struct 1743 */ 1744 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1745 { 1746 return phydev->is_pseudo_fixed_link; 1747 } 1748 1749 int phy_save_page(struct phy_device *phydev); 1750 int phy_select_page(struct phy_device *phydev, int page); 1751 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1752 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1753 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1754 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1755 u16 mask, u16 set); 1756 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1757 u16 mask, u16 set); 1758 1759 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1760 bool is_c45, 1761 struct phy_c45_device_ids *c45_ids); 1762 #if IS_ENABLED(CONFIG_PHYLIB) 1763 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1764 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1765 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1766 struct phy_device *device_phy_find_device(struct device *dev); 1767 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode); 1768 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1769 int phy_device_register(struct phy_device *phy); 1770 void phy_device_free(struct phy_device *phydev); 1771 #else 1772 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1773 { 1774 return 0; 1775 } 1776 static inline 1777 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1778 { 1779 return 0; 1780 } 1781 1782 static inline 1783 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1784 { 1785 return NULL; 1786 } 1787 1788 static inline struct phy_device *device_phy_find_device(struct device *dev) 1789 { 1790 return NULL; 1791 } 1792 1793 static inline 1794 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1795 { 1796 return NULL; 1797 } 1798 1799 static inline 1800 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1801 { 1802 return NULL; 1803 } 1804 1805 static inline int phy_device_register(struct phy_device *phy) 1806 { 1807 return 0; 1808 } 1809 1810 static inline void phy_device_free(struct phy_device *phydev) { } 1811 #endif /* CONFIG_PHYLIB */ 1812 void phy_device_remove(struct phy_device *phydev); 1813 int phy_get_c45_ids(struct phy_device *phydev); 1814 int phy_init_hw(struct phy_device *phydev); 1815 int phy_suspend(struct phy_device *phydev); 1816 int phy_resume(struct phy_device *phydev); 1817 int __phy_resume(struct phy_device *phydev); 1818 int phy_loopback(struct phy_device *phydev, bool enable); 1819 int phy_sfp_connect_phy(void *upstream, struct phy_device *phy); 1820 void phy_sfp_disconnect_phy(void *upstream, struct phy_device *phy); 1821 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1822 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1823 int phy_sfp_probe(struct phy_device *phydev, 1824 const struct sfp_upstream_ops *ops); 1825 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1826 phy_interface_t interface); 1827 struct phy_device *phy_find_first(struct mii_bus *bus); 1828 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1829 u32 flags, phy_interface_t interface); 1830 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1831 void (*handler)(struct net_device *), 1832 phy_interface_t interface); 1833 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1834 void (*handler)(struct net_device *), 1835 phy_interface_t interface); 1836 void phy_disconnect(struct phy_device *phydev); 1837 void phy_detach(struct phy_device *phydev); 1838 void phy_start(struct phy_device *phydev); 1839 void phy_stop(struct phy_device *phydev); 1840 int phy_config_aneg(struct phy_device *phydev); 1841 int _phy_start_aneg(struct phy_device *phydev); 1842 int phy_start_aneg(struct phy_device *phydev); 1843 int phy_aneg_done(struct phy_device *phydev); 1844 unsigned int phy_inband_caps(struct phy_device *phydev, 1845 phy_interface_t interface); 1846 int phy_config_inband(struct phy_device *phydev, unsigned int modes); 1847 int phy_speed_down(struct phy_device *phydev, bool sync); 1848 int phy_speed_up(struct phy_device *phydev); 1849 bool phy_check_valid(int speed, int duplex, unsigned long *features); 1850 1851 int phy_restart_aneg(struct phy_device *phydev); 1852 int phy_reset_after_clk_enable(struct phy_device *phydev); 1853 1854 #if IS_ENABLED(CONFIG_PHYLIB) 1855 int phy_start_cable_test(struct phy_device *phydev, 1856 struct netlink_ext_ack *extack); 1857 int phy_start_cable_test_tdr(struct phy_device *phydev, 1858 struct netlink_ext_ack *extack, 1859 const struct phy_tdr_config *config); 1860 #else 1861 static inline 1862 int phy_start_cable_test(struct phy_device *phydev, 1863 struct netlink_ext_ack *extack) 1864 { 1865 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1866 return -EOPNOTSUPP; 1867 } 1868 static inline 1869 int phy_start_cable_test_tdr(struct phy_device *phydev, 1870 struct netlink_ext_ack *extack, 1871 const struct phy_tdr_config *config) 1872 { 1873 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1874 return -EOPNOTSUPP; 1875 } 1876 #endif 1877 1878 static inline void phy_device_reset(struct phy_device *phydev, int value) 1879 { 1880 mdio_device_reset(&phydev->mdio, value); 1881 } 1882 1883 #define phydev_err(_phydev, format, args...) \ 1884 dev_err(&_phydev->mdio.dev, format, ##args) 1885 1886 #define phydev_err_probe(_phydev, err, format, args...) \ 1887 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1888 1889 #define phydev_info(_phydev, format, args...) \ 1890 dev_info(&_phydev->mdio.dev, format, ##args) 1891 1892 #define phydev_warn(_phydev, format, args...) \ 1893 dev_warn(&_phydev->mdio.dev, format, ##args) 1894 1895 #define phydev_dbg(_phydev, format, args...) \ 1896 dev_dbg(&_phydev->mdio.dev, format, ##args) 1897 1898 static inline const char *phydev_name(const struct phy_device *phydev) 1899 { 1900 return dev_name(&phydev->mdio.dev); 1901 } 1902 1903 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1904 { 1905 mutex_lock(&phydev->mdio.bus->mdio_lock); 1906 } 1907 1908 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1909 { 1910 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1911 } 1912 1913 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1914 __printf(2, 3); 1915 char *phy_attached_info_irq(struct phy_device *phydev) 1916 __malloc; 1917 void phy_attached_info(struct phy_device *phydev); 1918 1919 /* Clause 22 PHY */ 1920 int genphy_read_abilities(struct phy_device *phydev); 1921 int genphy_setup_forced(struct phy_device *phydev); 1922 int genphy_restart_aneg(struct phy_device *phydev); 1923 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1924 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1925 int genphy_aneg_done(struct phy_device *phydev); 1926 int genphy_update_link(struct phy_device *phydev); 1927 int genphy_read_lpa(struct phy_device *phydev); 1928 int genphy_read_status_fixed(struct phy_device *phydev); 1929 int genphy_read_status(struct phy_device *phydev); 1930 int genphy_read_master_slave(struct phy_device *phydev); 1931 int genphy_suspend(struct phy_device *phydev); 1932 int genphy_resume(struct phy_device *phydev); 1933 int genphy_loopback(struct phy_device *phydev, bool enable); 1934 int genphy_soft_reset(struct phy_device *phydev); 1935 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1936 1937 static inline int genphy_config_aneg(struct phy_device *phydev) 1938 { 1939 return __genphy_config_aneg(phydev, false); 1940 } 1941 1942 static inline int genphy_no_config_intr(struct phy_device *phydev) 1943 { 1944 return 0; 1945 } 1946 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1947 u16 regnum); 1948 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1949 u16 regnum, u16 val); 1950 1951 /* Clause 37 */ 1952 int genphy_c37_config_aneg(struct phy_device *phydev); 1953 int genphy_c37_read_status(struct phy_device *phydev, bool *changed); 1954 1955 /* Clause 45 PHY */ 1956 int genphy_c45_restart_aneg(struct phy_device *phydev); 1957 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1958 int genphy_c45_aneg_done(struct phy_device *phydev); 1959 int genphy_c45_read_link(struct phy_device *phydev); 1960 int genphy_c45_read_lpa(struct phy_device *phydev); 1961 int genphy_c45_read_pma(struct phy_device *phydev); 1962 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1963 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 1964 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1965 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1966 int genphy_c45_read_mdix(struct phy_device *phydev); 1967 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1968 int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev); 1969 int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev); 1970 int genphy_c45_read_eee_abilities(struct phy_device *phydev); 1971 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 1972 int genphy_c45_read_status(struct phy_device *phydev); 1973 int genphy_c45_baset1_read_status(struct phy_device *phydev); 1974 int genphy_c45_config_aneg(struct phy_device *phydev); 1975 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1976 int genphy_c45_pma_resume(struct phy_device *phydev); 1977 int genphy_c45_pma_suspend(struct phy_device *phydev); 1978 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 1979 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 1980 struct phy_plca_cfg *plca_cfg); 1981 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 1982 const struct phy_plca_cfg *plca_cfg); 1983 int genphy_c45_plca_get_status(struct phy_device *phydev, 1984 struct phy_plca_status *plca_st); 1985 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *lp); 1986 int genphy_c45_ethtool_get_eee(struct phy_device *phydev, 1987 struct ethtool_keee *data); 1988 int genphy_c45_ethtool_set_eee(struct phy_device *phydev, 1989 struct ethtool_keee *data); 1990 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev); 1991 1992 /* Generic C45 PHY driver */ 1993 extern struct phy_driver genphy_c45_driver; 1994 1995 /* The gen10g_* functions are the old Clause 45 stub */ 1996 int gen10g_config_aneg(struct phy_device *phydev); 1997 1998 static inline int phy_read_status(struct phy_device *phydev) 1999 { 2000 if (!phydev->drv) 2001 return -EIO; 2002 2003 if (phydev->drv->read_status) 2004 return phydev->drv->read_status(phydev); 2005 else 2006 return genphy_read_status(phydev); 2007 } 2008 2009 void phy_driver_unregister(struct phy_driver *drv); 2010 void phy_drivers_unregister(struct phy_driver *drv, int n); 2011 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 2012 int phy_drivers_register(struct phy_driver *new_driver, int n, 2013 struct module *owner); 2014 void phy_error(struct phy_device *phydev); 2015 void phy_state_machine(struct work_struct *work); 2016 void phy_trigger_machine(struct phy_device *phydev); 2017 void phy_mac_interrupt(struct phy_device *phydev); 2018 void phy_start_machine(struct phy_device *phydev); 2019 void phy_stop_machine(struct phy_device *phydev); 2020 void phy_ethtool_ksettings_get(struct phy_device *phydev, 2021 struct ethtool_link_ksettings *cmd); 2022 int phy_ethtool_ksettings_set(struct phy_device *phydev, 2023 const struct ethtool_link_ksettings *cmd); 2024 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 2025 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 2026 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 2027 int phy_disable_interrupts(struct phy_device *phydev); 2028 void phy_request_interrupt(struct phy_device *phydev); 2029 void phy_free_interrupt(struct phy_device *phydev); 2030 void phy_print_status(struct phy_device *phydev); 2031 int phy_get_rate_matching(struct phy_device *phydev, 2032 phy_interface_t iface); 2033 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 2034 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 2035 void phy_advertise_supported(struct phy_device *phydev); 2036 void phy_advertise_eee_all(struct phy_device *phydev); 2037 void phy_support_sym_pause(struct phy_device *phydev); 2038 void phy_support_asym_pause(struct phy_device *phydev); 2039 void phy_support_eee(struct phy_device *phydev); 2040 void phy_disable_eee(struct phy_device *phydev); 2041 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 2042 bool autoneg); 2043 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 2044 bool phy_validate_pause(struct phy_device *phydev, 2045 struct ethtool_pauseparam *pp); 2046 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 2047 2048 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 2049 const int *delay_values, int size, bool is_rx); 2050 2051 int phy_get_tx_amplitude_gain(struct phy_device *phydev, struct device *dev, 2052 enum ethtool_link_mode_bit_indices linkmode, 2053 u32 *val); 2054 2055 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 2056 bool *tx_pause, bool *rx_pause); 2057 2058 int phy_register_fixup_for_id(const char *bus_id, 2059 int (*run)(struct phy_device *)); 2060 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 2061 int (*run)(struct phy_device *)); 2062 2063 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 2064 int phy_unregister_fixup_for_id(const char *bus_id); 2065 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 2066 2067 int phy_eee_tx_clock_stop_capable(struct phy_device *phydev); 2068 int phy_eee_rx_clock_stop(struct phy_device *phydev, bool clk_stop_enable); 2069 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 2070 int phy_get_eee_err(struct phy_device *phydev); 2071 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data); 2072 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_keee *data); 2073 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 2074 void phy_ethtool_get_wol(struct phy_device *phydev, 2075 struct ethtool_wolinfo *wol); 2076 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 2077 struct ethtool_link_ksettings *cmd); 2078 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 2079 const struct ethtool_link_ksettings *cmd); 2080 int phy_ethtool_nway_reset(struct net_device *ndev); 2081 2082 int __init mdio_bus_init(void); 2083 void mdio_bus_exit(void); 2084 2085 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 2086 int phy_ethtool_get_sset_count(struct phy_device *phydev); 2087 int phy_ethtool_get_stats(struct phy_device *phydev, 2088 struct ethtool_stats *stats, u64 *data); 2089 2090 void __phy_ethtool_get_phy_stats(struct phy_device *phydev, 2091 struct ethtool_eth_phy_stats *phy_stats, 2092 struct ethtool_phy_stats *phydev_stats); 2093 void __phy_ethtool_get_link_ext_stats(struct phy_device *phydev, 2094 struct ethtool_link_ext_stats *link_stats); 2095 2096 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 2097 struct phy_plca_cfg *plca_cfg); 2098 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 2099 const struct phy_plca_cfg *plca_cfg, 2100 struct netlink_ext_ack *extack); 2101 int phy_ethtool_get_plca_status(struct phy_device *phydev, 2102 struct phy_plca_status *plca_st); 2103 2104 int __phy_hwtstamp_get(struct phy_device *phydev, 2105 struct kernel_hwtstamp_config *config); 2106 int __phy_hwtstamp_set(struct phy_device *phydev, 2107 struct kernel_hwtstamp_config *config, 2108 struct netlink_ext_ack *extack); 2109 2110 extern const struct bus_type mdio_bus_type; 2111 2112 struct mdio_board_info { 2113 const char *bus_id; 2114 char modalias[MDIO_NAME_SIZE]; 2115 int mdio_addr; 2116 const void *platform_data; 2117 }; 2118 2119 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 2120 int mdiobus_register_board_info(const struct mdio_board_info *info, 2121 unsigned int n); 2122 #else 2123 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 2124 unsigned int n) 2125 { 2126 return 0; 2127 } 2128 #endif 2129 2130 2131 /** 2132 * phy_module_driver() - Helper macro for registering PHY drivers 2133 * @__phy_drivers: array of PHY drivers to register 2134 * @__count: Numbers of members in array 2135 * 2136 * Helper macro for PHY drivers which do not do anything special in module 2137 * init/exit. Each module may only use this macro once, and calling it 2138 * replaces module_init() and module_exit(). 2139 */ 2140 #define phy_module_driver(__phy_drivers, __count) \ 2141 static int __init phy_module_init(void) \ 2142 { \ 2143 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 2144 } \ 2145 module_init(phy_module_init); \ 2146 static void __exit phy_module_exit(void) \ 2147 { \ 2148 phy_drivers_unregister(__phy_drivers, __count); \ 2149 } \ 2150 module_exit(phy_module_exit) 2151 2152 #define module_phy_driver(__phy_drivers) \ 2153 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 2154 2155 bool phy_driver_is_genphy(struct phy_device *phydev); 2156 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 2157 2158 #endif /* __PHY_H */ 2159