1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/leds.h> 18 #include <linux/linkmode.h> 19 #include <linux/netlink.h> 20 #include <linux/mdio.h> 21 #include <linux/mii.h> 22 #include <linux/mii_timestamper.h> 23 #include <linux/module.h> 24 #include <linux/timer.h> 25 #include <linux/workqueue.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/u64_stats_sync.h> 28 #include <linux/irqreturn.h> 29 #include <linux/iopoll.h> 30 #include <linux/refcount.h> 31 32 #include <linux/atomic.h> 33 #include <net/eee.h> 34 35 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 36 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 37 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 38 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 39 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 40 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 41 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 42 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 43 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 44 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init; 45 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap2_features) __ro_after_init; 46 47 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 48 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 49 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 50 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 51 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 52 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 53 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features) 54 #define PHY_EEE_CAP2_FEATURES ((unsigned long *)&phy_eee_cap2_features) 55 56 extern const int phy_basic_ports_array[3]; 57 extern const int phy_10_100_features_array[4]; 58 extern const int phy_basic_t1_features_array[3]; 59 extern const int phy_basic_t1s_p2mp_features_array[2]; 60 extern const int phy_gbit_features_array[2]; 61 extern const int phy_10gbit_features_array[1]; 62 63 /* 64 * Set phydev->irq to PHY_POLL if interrupts are not supported, 65 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 66 * the attached MAC driver handles the interrupt 67 */ 68 #define PHY_POLL -1 69 #define PHY_MAC_INTERRUPT -2 70 71 #define PHY_IS_INTERNAL 0x00000001 72 #define PHY_RST_AFTER_CLK_EN 0x00000002 73 #define PHY_POLL_CABLE_TEST 0x00000004 74 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008 75 #define MDIO_DEVICE_IS_PHY 0x80000000 76 77 /** 78 * enum phy_interface_t - Interface Mode definitions 79 * 80 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 81 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 82 * @PHY_INTERFACE_MODE_MII: Media-independent interface 83 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 84 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 85 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 86 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 87 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 88 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 89 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 90 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 91 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 92 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 93 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 94 * @PHY_INTERFACE_MODE_SMII: Serial MII 95 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 96 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 97 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 98 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII 99 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 100 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 101 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 102 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 103 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 104 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 105 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 106 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 107 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 108 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 109 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 110 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 111 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 112 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 113 * @PHY_INTERFACE_MODE_10G_QXGMII: 10G-QXGMII - 4 ports over 10G USXGMII 114 * @PHY_INTERFACE_MODE_MAX: Book keeping 115 * 116 * Describes the interface between the MAC and PHY. 117 */ 118 typedef enum { 119 PHY_INTERFACE_MODE_NA, 120 PHY_INTERFACE_MODE_INTERNAL, 121 PHY_INTERFACE_MODE_MII, 122 PHY_INTERFACE_MODE_GMII, 123 PHY_INTERFACE_MODE_SGMII, 124 PHY_INTERFACE_MODE_TBI, 125 PHY_INTERFACE_MODE_REVMII, 126 PHY_INTERFACE_MODE_RMII, 127 PHY_INTERFACE_MODE_REVRMII, 128 PHY_INTERFACE_MODE_RGMII, 129 PHY_INTERFACE_MODE_RGMII_ID, 130 PHY_INTERFACE_MODE_RGMII_RXID, 131 PHY_INTERFACE_MODE_RGMII_TXID, 132 PHY_INTERFACE_MODE_RTBI, 133 PHY_INTERFACE_MODE_SMII, 134 PHY_INTERFACE_MODE_XGMII, 135 PHY_INTERFACE_MODE_XLGMII, 136 PHY_INTERFACE_MODE_MOCA, 137 PHY_INTERFACE_MODE_PSGMII, 138 PHY_INTERFACE_MODE_QSGMII, 139 PHY_INTERFACE_MODE_TRGMII, 140 PHY_INTERFACE_MODE_100BASEX, 141 PHY_INTERFACE_MODE_1000BASEX, 142 PHY_INTERFACE_MODE_2500BASEX, 143 PHY_INTERFACE_MODE_5GBASER, 144 PHY_INTERFACE_MODE_RXAUI, 145 PHY_INTERFACE_MODE_XAUI, 146 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 147 PHY_INTERFACE_MODE_10GBASER, 148 PHY_INTERFACE_MODE_25GBASER, 149 PHY_INTERFACE_MODE_USXGMII, 150 /* 10GBASE-KR - with Clause 73 AN */ 151 PHY_INTERFACE_MODE_10GKR, 152 PHY_INTERFACE_MODE_QUSGMII, 153 PHY_INTERFACE_MODE_1000BASEKX, 154 PHY_INTERFACE_MODE_10G_QXGMII, 155 PHY_INTERFACE_MODE_MAX, 156 } phy_interface_t; 157 158 /* PHY interface mode bitmap handling */ 159 #define DECLARE_PHY_INTERFACE_MASK(name) \ 160 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 161 162 static inline void phy_interface_zero(unsigned long *intf) 163 { 164 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 165 } 166 167 static inline bool phy_interface_empty(const unsigned long *intf) 168 { 169 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 170 } 171 172 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 173 const unsigned long *b) 174 { 175 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 176 } 177 178 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 179 const unsigned long *b) 180 { 181 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 182 } 183 184 static inline void phy_interface_set_rgmii(unsigned long *intf) 185 { 186 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 187 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 188 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 189 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 190 } 191 192 /* 193 * phy_supported_speeds - return all speeds currently supported by a PHY device 194 */ 195 unsigned int phy_supported_speeds(struct phy_device *phy, 196 unsigned int *speeds, 197 unsigned int size); 198 199 /** 200 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 201 * @interface: enum phy_interface_t value 202 * 203 * Description: maps enum &phy_interface_t defined in this file 204 * into the device tree binding of 'phy-mode', so that Ethernet 205 * device driver can get PHY interface from device tree. 206 */ 207 static inline const char *phy_modes(phy_interface_t interface) 208 { 209 switch (interface) { 210 case PHY_INTERFACE_MODE_NA: 211 return ""; 212 case PHY_INTERFACE_MODE_INTERNAL: 213 return "internal"; 214 case PHY_INTERFACE_MODE_MII: 215 return "mii"; 216 case PHY_INTERFACE_MODE_GMII: 217 return "gmii"; 218 case PHY_INTERFACE_MODE_SGMII: 219 return "sgmii"; 220 case PHY_INTERFACE_MODE_TBI: 221 return "tbi"; 222 case PHY_INTERFACE_MODE_REVMII: 223 return "rev-mii"; 224 case PHY_INTERFACE_MODE_RMII: 225 return "rmii"; 226 case PHY_INTERFACE_MODE_REVRMII: 227 return "rev-rmii"; 228 case PHY_INTERFACE_MODE_RGMII: 229 return "rgmii"; 230 case PHY_INTERFACE_MODE_RGMII_ID: 231 return "rgmii-id"; 232 case PHY_INTERFACE_MODE_RGMII_RXID: 233 return "rgmii-rxid"; 234 case PHY_INTERFACE_MODE_RGMII_TXID: 235 return "rgmii-txid"; 236 case PHY_INTERFACE_MODE_RTBI: 237 return "rtbi"; 238 case PHY_INTERFACE_MODE_SMII: 239 return "smii"; 240 case PHY_INTERFACE_MODE_XGMII: 241 return "xgmii"; 242 case PHY_INTERFACE_MODE_XLGMII: 243 return "xlgmii"; 244 case PHY_INTERFACE_MODE_MOCA: 245 return "moca"; 246 case PHY_INTERFACE_MODE_PSGMII: 247 return "psgmii"; 248 case PHY_INTERFACE_MODE_QSGMII: 249 return "qsgmii"; 250 case PHY_INTERFACE_MODE_TRGMII: 251 return "trgmii"; 252 case PHY_INTERFACE_MODE_1000BASEX: 253 return "1000base-x"; 254 case PHY_INTERFACE_MODE_1000BASEKX: 255 return "1000base-kx"; 256 case PHY_INTERFACE_MODE_2500BASEX: 257 return "2500base-x"; 258 case PHY_INTERFACE_MODE_5GBASER: 259 return "5gbase-r"; 260 case PHY_INTERFACE_MODE_RXAUI: 261 return "rxaui"; 262 case PHY_INTERFACE_MODE_XAUI: 263 return "xaui"; 264 case PHY_INTERFACE_MODE_10GBASER: 265 return "10gbase-r"; 266 case PHY_INTERFACE_MODE_25GBASER: 267 return "25gbase-r"; 268 case PHY_INTERFACE_MODE_USXGMII: 269 return "usxgmii"; 270 case PHY_INTERFACE_MODE_10GKR: 271 return "10gbase-kr"; 272 case PHY_INTERFACE_MODE_100BASEX: 273 return "100base-x"; 274 case PHY_INTERFACE_MODE_QUSGMII: 275 return "qusgmii"; 276 case PHY_INTERFACE_MODE_10G_QXGMII: 277 return "10g-qxgmii"; 278 default: 279 return "unknown"; 280 } 281 } 282 283 /** 284 * rgmii_clock - map link speed to the clock rate 285 * @speed: link speed value 286 * 287 * Description: maps RGMII supported link speeds 288 * into the clock rates. 289 * 290 * Returns: clock rate or negative errno 291 */ 292 static inline long rgmii_clock(int speed) 293 { 294 switch (speed) { 295 case SPEED_10: 296 return 2500000; 297 case SPEED_100: 298 return 25000000; 299 case SPEED_1000: 300 return 125000000; 301 default: 302 return -EINVAL; 303 } 304 } 305 306 #define PHY_MAX_ADDR 32 307 308 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 309 #define PHY_ID_FMT "%s:%02x" 310 311 #define MII_BUS_ID_SIZE 61 312 313 struct device; 314 struct kernel_hwtstamp_config; 315 struct phylink; 316 struct sfp_bus; 317 struct sfp_upstream_ops; 318 struct sk_buff; 319 320 /** 321 * struct mdio_bus_stats - Statistics counters for MDIO busses 322 * @transfers: Total number of transfers, i.e. @writes + @reads 323 * @errors: Number of MDIO transfers that returned an error 324 * @writes: Number of write transfers 325 * @reads: Number of read transfers 326 * @syncp: Synchronisation for incrementing statistics 327 */ 328 struct mdio_bus_stats { 329 u64_stats_t transfers; 330 u64_stats_t errors; 331 u64_stats_t writes; 332 u64_stats_t reads; 333 /* Must be last, add new statistics above */ 334 struct u64_stats_sync syncp; 335 }; 336 337 /** 338 * struct phy_package_shared - Shared information in PHY packages 339 * @base_addr: Base PHY address of PHY package used to combine PHYs 340 * in one package and for offset calculation of phy_package_read/write 341 * @np: Pointer to the Device Node if PHY package defined in DT 342 * @refcnt: Number of PHYs connected to this shared data 343 * @flags: Initialization of PHY package 344 * @priv_size: Size of the shared private data @priv 345 * @priv: Driver private data shared across a PHY package 346 * 347 * Represents a shared structure between different phydev's in the same 348 * package, for example a quad PHY. See phy_package_join() and 349 * phy_package_leave(). 350 */ 351 struct phy_package_shared { 352 u8 base_addr; 353 /* With PHY package defined in DT this points to the PHY package node */ 354 struct device_node *np; 355 refcount_t refcnt; 356 unsigned long flags; 357 size_t priv_size; 358 359 /* private data pointer */ 360 /* note that this pointer is shared between different phydevs and 361 * the user has to take care of appropriate locking. It is allocated 362 * and freed automatically by phy_package_join() and 363 * phy_package_leave(). 364 */ 365 void *priv; 366 }; 367 368 /* used as bit number in atomic bitops */ 369 #define PHY_SHARED_F_INIT_DONE 0 370 #define PHY_SHARED_F_PROBE_DONE 1 371 372 /** 373 * struct mii_bus - Represents an MDIO bus 374 * 375 * @owner: Who owns this device 376 * @name: User friendly name for this MDIO device, or driver name 377 * @id: Unique identifier for this bus, typical from bus hierarchy 378 * @priv: Driver private data 379 * 380 * The Bus class for PHYs. Devices which provide access to 381 * PHYs should register using this structure 382 */ 383 struct mii_bus { 384 struct module *owner; 385 const char *name; 386 char id[MII_BUS_ID_SIZE]; 387 void *priv; 388 /** @read: Perform a read transfer on the bus */ 389 int (*read)(struct mii_bus *bus, int addr, int regnum); 390 /** @write: Perform a write transfer on the bus */ 391 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 392 /** @read_c45: Perform a C45 read transfer on the bus */ 393 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 394 /** @write_c45: Perform a C45 write transfer on the bus */ 395 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 396 int regnum, u16 val); 397 /** @reset: Perform a reset of the bus */ 398 int (*reset)(struct mii_bus *bus); 399 400 /** @stats: Statistic counters per device on the bus */ 401 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 402 403 /** 404 * @mdio_lock: A lock to ensure that only one thing can read/write 405 * the MDIO bus at a time 406 */ 407 struct mutex mdio_lock; 408 409 /** @parent: Parent device of this bus */ 410 struct device *parent; 411 /** @state: State of bus structure */ 412 enum { 413 MDIOBUS_ALLOCATED = 1, 414 MDIOBUS_REGISTERED, 415 MDIOBUS_UNREGISTERED, 416 MDIOBUS_RELEASED, 417 } state; 418 419 /** @dev: Kernel device representation */ 420 struct device dev; 421 422 /** @mdio_map: list of all MDIO devices on bus */ 423 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 424 425 /** @phy_mask: PHY addresses to be ignored when probing */ 426 u32 phy_mask; 427 428 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 429 u32 phy_ignore_ta_mask; 430 431 /** 432 * @irq: An array of interrupts, each PHY's interrupt at the index 433 * matching its address 434 */ 435 int irq[PHY_MAX_ADDR]; 436 437 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 438 int reset_delay_us; 439 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 440 int reset_post_delay_us; 441 /** @reset_gpiod: Reset GPIO descriptor pointer */ 442 struct gpio_desc *reset_gpiod; 443 444 /** @shared_lock: protect access to the shared element */ 445 struct mutex shared_lock; 446 447 /** @shared: shared state across different PHYs */ 448 struct phy_package_shared *shared[PHY_MAX_ADDR]; 449 }; 450 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 451 452 struct mii_bus *mdiobus_alloc_size(size_t size); 453 454 /** 455 * mdiobus_alloc - Allocate an MDIO bus structure 456 * 457 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 458 * for the driver to register the bus. 459 */ 460 static inline struct mii_bus *mdiobus_alloc(void) 461 { 462 return mdiobus_alloc_size(0); 463 } 464 465 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 466 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 467 struct module *owner); 468 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 469 #define devm_mdiobus_register(dev, bus) \ 470 __devm_mdiobus_register(dev, bus, THIS_MODULE) 471 472 void mdiobus_unregister(struct mii_bus *bus); 473 void mdiobus_free(struct mii_bus *bus); 474 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 475 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 476 { 477 return devm_mdiobus_alloc_size(dev, 0); 478 } 479 480 struct mii_bus *mdio_find_bus(const char *mdio_name); 481 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); 482 483 #define PHY_INTERRUPT_DISABLED false 484 #define PHY_INTERRUPT_ENABLED true 485 486 /** 487 * enum phy_state - PHY state machine states: 488 * 489 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 490 * should be called if and only if the PHY is in this state, 491 * given that the PHY device exists. 492 * - PHY driver probe function will set the state to @PHY_READY 493 * 494 * @PHY_READY: PHY is ready to send and receive packets, but the 495 * controller is not. By default, PHYs which do not implement 496 * probe will be set to this state by phy_probe(). 497 * - start will set the state to UP 498 * 499 * @PHY_UP: The PHY and attached device are ready to do work. 500 * Interrupts should be started here. 501 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 502 * 503 * @PHY_NOLINK: PHY is up, but not currently plugged in. 504 * - irq or timer will set @PHY_RUNNING if link comes back 505 * - phy_stop moves to @PHY_HALTED 506 * 507 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 508 * and/or receiving packets 509 * - irq or timer will set @PHY_NOLINK if link goes down 510 * - phy_stop moves to @PHY_HALTED 511 * 512 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 513 * is not expected to work, carrier will be indicated as down. PHY will be 514 * poll once per second, or on interrupt for it current state. 515 * Once complete, move to UP to restart the PHY. 516 * - phy_stop aborts the running test and moves to @PHY_HALTED 517 * 518 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. 519 * - phy_start moves to @PHY_UP 520 * 521 * @PHY_ERROR: PHY is up, but is in an error state. 522 * - phy_stop moves to @PHY_HALTED 523 */ 524 enum phy_state { 525 PHY_DOWN = 0, 526 PHY_READY, 527 PHY_HALTED, 528 PHY_ERROR, 529 PHY_UP, 530 PHY_RUNNING, 531 PHY_NOLINK, 532 PHY_CABLETEST, 533 }; 534 535 #define MDIO_MMD_NUM 32 536 537 /** 538 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 539 * @devices_in_package: IEEE 802.3 devices in package register value. 540 * @mmds_present: bit vector of MMDs present. 541 * @device_ids: The device identifer for each present device. 542 */ 543 struct phy_c45_device_ids { 544 u32 devices_in_package; 545 u32 mmds_present; 546 u32 device_ids[MDIO_MMD_NUM]; 547 }; 548 549 struct macsec_context; 550 struct macsec_ops; 551 552 /** 553 * struct phy_device - An instance of a PHY 554 * 555 * @mdio: MDIO bus this PHY is on 556 * @drv: Pointer to the driver for this PHY instance 557 * @devlink: Create a link between phy dev and mac dev, if the external phy 558 * used by current mac interface is managed by another mac interface. 559 * @phyindex: Unique id across the phy's parent tree of phys to address the PHY 560 * from userspace, similar to ifindex. A zero index means the PHY 561 * wasn't assigned an id yet. 562 * @phy_id: UID for this device found during discovery 563 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 564 * @is_c45: Set to true if this PHY uses clause 45 addressing. 565 * @is_internal: Set to true if this PHY is internal to a MAC. 566 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 567 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 568 * @has_fixups: Set to true if this PHY has fixups/quirks. 569 * @suspended: Set to true if this PHY has been suspended successfully. 570 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 571 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 572 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 573 * @downshifted_rate: Set true if link speed has been downshifted. 574 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 575 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 576 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN 577 * enabled. 578 * @state: State of the PHY for management purposes 579 * @dev_flags: Device-specific flags used by the PHY driver. 580 * 581 * - Bits [15:0] are free to use by the PHY driver to communicate 582 * driver specific behavior. 583 * - Bits [23:16] are currently reserved for future use. 584 * - Bits [31:24] are reserved for defining generic 585 * PHY driver behavior. 586 * @irq: IRQ number of the PHY's interrupt (-1 if none) 587 * @phylink: Pointer to phylink instance for this PHY 588 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 589 * @sfp_bus: SFP bus attached to this PHY's fiber port 590 * @attached_dev: The attached enet driver's device instance ptr 591 * @adjust_link: Callback for the enet controller to respond to changes: in the 592 * link state. 593 * @phy_link_change: Callback for phylink for notification of link change 594 * @macsec_ops: MACsec offloading ops. 595 * 596 * @speed: Current link speed 597 * @duplex: Current duplex 598 * @port: Current port 599 * @pause: Current pause 600 * @asym_pause: Current asymmetric pause 601 * @supported: Combined MAC/PHY supported linkmodes 602 * @advertising: Currently advertised linkmodes 603 * @adv_old: Saved advertised while power saving for WoL 604 * @supported_eee: supported PHY EEE linkmodes 605 * @advertising_eee: Currently advertised EEE linkmodes 606 * @enable_tx_lpi: When True, MAC should transmit LPI to PHY 607 * @eee_active: phylib private state, indicating that EEE has been negotiated 608 * @eee_cfg: User configuration of EEE 609 * @lp_advertising: Current link partner advertised linkmodes 610 * @host_interfaces: PHY interface modes supported by host 611 * @eee_disabled_modes: Energy efficient ethernet modes not to be advertised 612 * @autoneg: Flag autoneg being used 613 * @rate_matching: Current rate matching mode 614 * @link: Current link state 615 * @autoneg_complete: Flag auto negotiation of the link has completed 616 * @mdix: Current crossover 617 * @mdix_ctrl: User setting of crossover 618 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 619 * @interrupts: Flag interrupts have been enabled 620 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 621 * handling shall be postponed until PHY has resumed 622 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 623 * requiring a rerun of the interrupt handler after resume 624 * @default_timestamp: Flag indicating whether we are using the phy 625 * timestamp as the default one 626 * @interface: enum phy_interface_t value 627 * @possible_interfaces: bitmap if interface modes that the attached PHY 628 * will switch between depending on media speed. 629 * @skb: Netlink message for cable diagnostics 630 * @nest: Netlink nest used for cable diagnostics 631 * @ehdr: nNtlink header for cable diagnostics 632 * @phy_led_triggers: Array of LED triggers 633 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 634 * @led_link_trigger: LED trigger for link up/down 635 * @last_triggered: last LED trigger for link speed 636 * @leds: list of PHY LED structures 637 * @master_slave_set: User requested master/slave configuration 638 * @master_slave_get: Current master/slave advertisement 639 * @master_slave_state: Current master/slave configuration 640 * @mii_ts: Pointer to time stamper callbacks 641 * @psec: Pointer to Power Sourcing Equipment control struct 642 * @lock: Mutex for serialization access to PHY 643 * @state_queue: Work queue for state machine 644 * @link_down_events: Number of times link was lost 645 * @shared: Pointer to private data shared by phys in one package 646 * @priv: Pointer to driver private data 647 * 648 * interrupts currently only supports enabled or disabled, 649 * but could be changed in the future to support enabling 650 * and disabling specific interrupts 651 * 652 * Contains some infrastructure for polling and interrupt 653 * handling, as well as handling shifts in PHY hardware state 654 */ 655 struct phy_device { 656 struct mdio_device mdio; 657 658 /* Information about the PHY type */ 659 /* And management functions */ 660 const struct phy_driver *drv; 661 662 struct device_link *devlink; 663 664 u32 phyindex; 665 u32 phy_id; 666 667 struct phy_c45_device_ids c45_ids; 668 unsigned is_c45:1; 669 unsigned is_internal:1; 670 unsigned is_pseudo_fixed_link:1; 671 unsigned is_gigabit_capable:1; 672 unsigned has_fixups:1; 673 unsigned suspended:1; 674 unsigned suspended_by_mdio_bus:1; 675 unsigned sysfs_links:1; 676 unsigned loopback_enabled:1; 677 unsigned downshifted_rate:1; 678 unsigned is_on_sfp_module:1; 679 unsigned mac_managed_pm:1; 680 unsigned wol_enabled:1; 681 682 unsigned autoneg:1; 683 /* The most recently read link state */ 684 unsigned link:1; 685 unsigned autoneg_complete:1; 686 687 /* Interrupts are enabled */ 688 unsigned interrupts:1; 689 unsigned irq_suspended:1; 690 unsigned irq_rerun:1; 691 692 unsigned default_timestamp:1; 693 694 int rate_matching; 695 696 enum phy_state state; 697 698 u32 dev_flags; 699 700 phy_interface_t interface; 701 DECLARE_PHY_INTERFACE_MASK(possible_interfaces); 702 703 /* 704 * forced speed & duplex (no autoneg) 705 * partner speed & duplex & pause (autoneg) 706 */ 707 int speed; 708 int duplex; 709 int port; 710 int pause; 711 int asym_pause; 712 u8 master_slave_get; 713 u8 master_slave_set; 714 u8 master_slave_state; 715 716 /* Union of PHY and Attached devices' supported link modes */ 717 /* See ethtool.h for more info */ 718 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 719 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 720 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 721 /* used with phy_speed_down */ 722 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 723 /* used for eee validation and configuration*/ 724 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee); 725 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee); 726 /* Energy efficient ethernet modes which should be prohibited */ 727 __ETHTOOL_DECLARE_LINK_MODE_MASK(eee_disabled_modes); 728 bool enable_tx_lpi; 729 bool eee_active; 730 struct eee_config eee_cfg; 731 732 /* Host supported PHY interface types. Should be ignored if empty. */ 733 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 734 735 #ifdef CONFIG_LED_TRIGGER_PHY 736 struct phy_led_trigger *phy_led_triggers; 737 unsigned int phy_num_led_triggers; 738 struct phy_led_trigger *last_triggered; 739 740 struct phy_led_trigger *led_link_trigger; 741 #endif 742 struct list_head leds; 743 744 /* 745 * Interrupt number for this PHY 746 * -1 means no interrupt 747 */ 748 int irq; 749 750 /* private data pointer */ 751 /* For use by PHYs to maintain extra state */ 752 void *priv; 753 754 /* shared data pointer */ 755 /* For use by PHYs inside the same package that need a shared state. */ 756 struct phy_package_shared *shared; 757 758 /* Reporting cable test results */ 759 struct sk_buff *skb; 760 void *ehdr; 761 struct nlattr *nest; 762 763 /* Interrupt and Polling infrastructure */ 764 struct delayed_work state_queue; 765 766 struct mutex lock; 767 768 /* This may be modified under the rtnl lock */ 769 bool sfp_bus_attached; 770 struct sfp_bus *sfp_bus; 771 struct phylink *phylink; 772 struct net_device *attached_dev; 773 struct mii_timestamper *mii_ts; 774 struct pse_control *psec; 775 776 u8 mdix; 777 u8 mdix_ctrl; 778 779 int pma_extable; 780 781 unsigned int link_down_events; 782 783 void (*phy_link_change)(struct phy_device *phydev, bool up); 784 void (*adjust_link)(struct net_device *dev); 785 786 #if IS_ENABLED(CONFIG_MACSEC) 787 /* MACsec management functions */ 788 const struct macsec_ops *macsec_ops; 789 #endif 790 }; 791 792 /* Generic phy_device::dev_flags */ 793 #define PHY_F_NO_IRQ 0x80000000 794 #define PHY_F_RXC_ALWAYS_ON 0x40000000 795 796 static inline struct phy_device *to_phy_device(const struct device *dev) 797 { 798 return container_of(to_mdio_device(dev), struct phy_device, mdio); 799 } 800 801 /** 802 * struct phy_tdr_config - Configuration of a TDR raw test 803 * 804 * @first: Distance for first data collection point 805 * @last: Distance for last data collection point 806 * @step: Step between data collection points 807 * @pair: Bitmap of cable pairs to collect data for 808 * 809 * A structure containing possible configuration parameters 810 * for a TDR cable test. The driver does not need to implement 811 * all the parameters, but should report what is actually used. 812 * All distances are in centimeters. 813 */ 814 struct phy_tdr_config { 815 u32 first; 816 u32 last; 817 u32 step; 818 s8 pair; 819 }; 820 #define PHY_PAIR_ALL -1 821 822 /** 823 * enum link_inband_signalling - in-band signalling modes that are supported 824 * 825 * @LINK_INBAND_DISABLE: in-band signalling can be disabled 826 * @LINK_INBAND_ENABLE: in-band signalling can be enabled without bypass 827 * @LINK_INBAND_BYPASS: in-band signalling can be enabled with bypass 828 * 829 * The possible and required bits can only be used if the valid bit is set. 830 * If possible is clear, that means inband signalling can not be used. 831 * Required is only valid when possible is set, and means that inband 832 * signalling must be used. 833 */ 834 enum link_inband_signalling { 835 LINK_INBAND_DISABLE = BIT(0), 836 LINK_INBAND_ENABLE = BIT(1), 837 LINK_INBAND_BYPASS = BIT(2), 838 }; 839 840 /** 841 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 842 * Avoidance) Reconciliation Sublayer. 843 * 844 * @version: read-only PLCA register map version. -1 = not available. Ignored 845 * when setting the configuration. Format is the same as reported by the PLCA 846 * IDVER register (31.CA00). -1 = not available. 847 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 848 * set. 0 = disabled, anything else = enabled. 849 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 850 * Allowed values [0 .. 254]. 255 = node disabled. 851 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 852 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 853 * set. Allowed values [1 .. 255]. 854 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 855 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 856 * more details. The to_timer shall be set equal over all nodes. 857 * -1 = not available / don't set. Allowed values [0 .. 255]. 858 * @burst_cnt: controls how many additional frames a node is allowed to send in 859 * single transmit opportunity (TO). The default value of 0 means that the 860 * node is allowed exactly one frame per TO. A value of 1 allows two frames 861 * per TO, and so on. -1 = not available / don't set. 862 * Allowed values [0 .. 255]. 863 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 864 * frame before interrupting the burst. This value should be set to a value 865 * greater than the MAC inter-packet gap (which is typically 96 bits). 866 * -1 = not available / don't set. Allowed values [0 .. 255]. 867 * 868 * A structure containing configuration parameters for setting/getting the PLCA 869 * RS configuration. The driver does not need to implement all the parameters, 870 * but should report what is actually used. 871 */ 872 struct phy_plca_cfg { 873 int version; 874 int enabled; 875 int node_id; 876 int node_cnt; 877 int to_tmr; 878 int burst_cnt; 879 int burst_tmr; 880 }; 881 882 /** 883 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 884 * Avoidance) Reconciliation Sublayer. 885 * 886 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 887 * register(31.CA03), indicating BEACON activity. 888 * 889 * A structure containing status information of the PLCA RS configuration. 890 * The driver does not need to implement all the parameters, but should report 891 * what is actually used. 892 */ 893 struct phy_plca_status { 894 bool pst; 895 }; 896 897 /* Modes for PHY LED configuration */ 898 enum phy_led_modes { 899 PHY_LED_ACTIVE_HIGH = 0, 900 PHY_LED_ACTIVE_LOW = 1, 901 PHY_LED_INACTIVE_HIGH_IMPEDANCE = 2, 902 903 /* keep it last */ 904 __PHY_LED_MODES_NUM, 905 }; 906 907 /** 908 * struct phy_led: An LED driven by the PHY 909 * 910 * @list: List of LEDs 911 * @phydev: PHY this LED is attached to 912 * @led_cdev: Standard LED class structure 913 * @index: Number of the LED 914 */ 915 struct phy_led { 916 struct list_head list; 917 struct phy_device *phydev; 918 struct led_classdev led_cdev; 919 u8 index; 920 }; 921 922 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev) 923 924 /** 925 * struct phy_driver - Driver structure for a particular PHY type 926 * 927 * @mdiodrv: Data common to all MDIO devices 928 * @phy_id: The result of reading the UID registers of this PHY 929 * type, and ANDing them with the phy_id_mask. This driver 930 * only works for PHYs with IDs which match this field 931 * @name: The friendly name of this PHY type 932 * @phy_id_mask: Defines the important bits of the phy_id 933 * @features: A mandatory list of features (speed, duplex, etc) 934 * supported by this PHY 935 * @flags: A bitfield defining certain other features this PHY 936 * supports (like interrupts) 937 * @driver_data: Static driver data 938 * 939 * All functions are optional. If config_aneg or read_status 940 * are not implemented, the phy core uses the genphy versions. 941 * Note that none of these functions should be called from 942 * interrupt time. The goal is for the bus read/write functions 943 * to be able to block when the bus transaction is happening, 944 * and be freed up by an interrupt (The MPC85xx has this ability, 945 * though it is not currently supported in the driver). 946 */ 947 struct phy_driver { 948 struct mdio_driver_common mdiodrv; 949 u32 phy_id; 950 char *name; 951 u32 phy_id_mask; 952 const unsigned long * const features; 953 u32 flags; 954 const void *driver_data; 955 956 /** 957 * @soft_reset: Called to issue a PHY software reset 958 */ 959 int (*soft_reset)(struct phy_device *phydev); 960 961 /** 962 * @config_init: Called to initialize the PHY, 963 * including after a reset 964 */ 965 int (*config_init)(struct phy_device *phydev); 966 967 /** 968 * @probe: Called during discovery. Used to set 969 * up device-specific structures, if any 970 */ 971 int (*probe)(struct phy_device *phydev); 972 973 /** 974 * @get_features: Probe the hardware to determine what 975 * abilities it has. Should only set phydev->supported. 976 */ 977 int (*get_features)(struct phy_device *phydev); 978 979 /** 980 * @inband_caps: query whether in-band is supported for the given PHY 981 * interface mode. Returns a bitmask of bits defined by enum 982 * link_inband_signalling. 983 */ 984 unsigned int (*inband_caps)(struct phy_device *phydev, 985 phy_interface_t interface); 986 987 /** 988 * @config_inband: configure in-band mode for the PHY 989 */ 990 int (*config_inband)(struct phy_device *phydev, unsigned int modes); 991 992 /** 993 * @get_rate_matching: Get the supported type of rate matching for a 994 * particular phy interface. This is used by phy consumers to determine 995 * whether to advertise lower-speed modes for that interface. It is 996 * assumed that if a rate matching mode is supported on an interface, 997 * then that interface's rate can be adapted to all slower link speeds 998 * supported by the phy. If the interface is not supported, this should 999 * return %RATE_MATCH_NONE. 1000 */ 1001 int (*get_rate_matching)(struct phy_device *phydev, 1002 phy_interface_t iface); 1003 1004 /* PHY Power Management */ 1005 /** @suspend: Suspend the hardware, saving state if needed */ 1006 int (*suspend)(struct phy_device *phydev); 1007 /** @resume: Resume the hardware, restoring state if needed */ 1008 int (*resume)(struct phy_device *phydev); 1009 1010 /** 1011 * @config_aneg: Configures the advertisement and resets 1012 * autonegotiation if phydev->autoneg is on, 1013 * forces the speed to the current settings in phydev 1014 * if phydev->autoneg is off 1015 */ 1016 int (*config_aneg)(struct phy_device *phydev); 1017 1018 /** @aneg_done: Determines the auto negotiation result */ 1019 int (*aneg_done)(struct phy_device *phydev); 1020 1021 /** @read_status: Determines the negotiated speed and duplex */ 1022 int (*read_status)(struct phy_device *phydev); 1023 1024 /** 1025 * @config_intr: Enables or disables interrupts. 1026 * It should also clear any pending interrupts prior to enabling the 1027 * IRQs and after disabling them. 1028 */ 1029 int (*config_intr)(struct phy_device *phydev); 1030 1031 /** @handle_interrupt: Override default interrupt handling */ 1032 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 1033 1034 /** @remove: Clears up any memory if needed */ 1035 void (*remove)(struct phy_device *phydev); 1036 1037 /** 1038 * @match_phy_device: Returns true if this is a suitable 1039 * driver for the given phydev. If NULL, matching is based on 1040 * phy_id and phy_id_mask. 1041 */ 1042 int (*match_phy_device)(struct phy_device *phydev); 1043 1044 /** 1045 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 1046 * register changes to enable Wake on LAN, so set_wol is 1047 * provided to be called in the ethernet driver's set_wol 1048 * function. 1049 */ 1050 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1051 1052 /** 1053 * @get_wol: See set_wol, but for checking whether Wake on LAN 1054 * is enabled. 1055 */ 1056 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1057 1058 /** 1059 * @link_change_notify: Called to inform a PHY device driver 1060 * when the core is about to change the link state. This 1061 * callback is supposed to be used as fixup hook for drivers 1062 * that need to take action when the link state 1063 * changes. Drivers are by no means allowed to mess with the 1064 * PHY device structure in their implementations. 1065 */ 1066 void (*link_change_notify)(struct phy_device *dev); 1067 1068 /** 1069 * @read_mmd: PHY specific driver override for reading a MMD 1070 * register. This function is optional for PHY specific 1071 * drivers. When not provided, the default MMD read function 1072 * will be used by phy_read_mmd(), which will use either a 1073 * direct read for Clause 45 PHYs or an indirect read for 1074 * Clause 22 PHYs. devnum is the MMD device number within the 1075 * PHY device, regnum is the register within the selected MMD 1076 * device. 1077 */ 1078 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 1079 1080 /** 1081 * @write_mmd: PHY specific driver override for writing a MMD 1082 * register. This function is optional for PHY specific 1083 * drivers. When not provided, the default MMD write function 1084 * will be used by phy_write_mmd(), which will use either a 1085 * direct write for Clause 45 PHYs, or an indirect write for 1086 * Clause 22 PHYs. devnum is the MMD device number within the 1087 * PHY device, regnum is the register within the selected MMD 1088 * device. val is the value to be written. 1089 */ 1090 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 1091 u16 val); 1092 1093 /** @read_page: Return the current PHY register page number */ 1094 int (*read_page)(struct phy_device *dev); 1095 /** @write_page: Set the current PHY register page number */ 1096 int (*write_page)(struct phy_device *dev, int page); 1097 1098 /** 1099 * @module_info: Get the size and type of the eeprom contained 1100 * within a plug-in module 1101 */ 1102 int (*module_info)(struct phy_device *dev, 1103 struct ethtool_modinfo *modinfo); 1104 1105 /** 1106 * @module_eeprom: Get the eeprom information from the plug-in 1107 * module 1108 */ 1109 int (*module_eeprom)(struct phy_device *dev, 1110 struct ethtool_eeprom *ee, u8 *data); 1111 1112 /** @cable_test_start: Start a cable test */ 1113 int (*cable_test_start)(struct phy_device *dev); 1114 1115 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1116 int (*cable_test_tdr_start)(struct phy_device *dev, 1117 const struct phy_tdr_config *config); 1118 1119 /** 1120 * @cable_test_get_status: Once per second, or on interrupt, 1121 * request the status of the test. 1122 */ 1123 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1124 1125 /* Get statistics from the PHY using ethtool */ 1126 /** 1127 * @get_phy_stats: Retrieve PHY statistics. 1128 * @dev: The PHY device for which the statistics are retrieved. 1129 * @eth_stats: structure where Ethernet PHY stats will be stored. 1130 * @stats: structure where additional PHY-specific stats will be stored. 1131 * 1132 * Retrieves the supported PHY statistics and populates the provided 1133 * structures. The input structures are pre-initialized with 1134 * `ETHTOOL_STAT_NOT_SET`, and the driver must only modify members 1135 * corresponding to supported statistics. Unmodified members will remain 1136 * set to `ETHTOOL_STAT_NOT_SET` and will not be returned to userspace. 1137 */ 1138 void (*get_phy_stats)(struct phy_device *dev, 1139 struct ethtool_eth_phy_stats *eth_stats, 1140 struct ethtool_phy_stats *stats); 1141 1142 /** 1143 * @get_link_stats: Retrieve link statistics. 1144 * @dev: The PHY device for which the statistics are retrieved. 1145 * @link_stats: structure where link-specific stats will be stored. 1146 * 1147 * Retrieves link-related statistics for the given PHY device. The input 1148 * structure is pre-initialized with `ETHTOOL_STAT_NOT_SET`, and the 1149 * driver must only modify members corresponding to supported 1150 * statistics. Unmodified members will remain set to 1151 * `ETHTOOL_STAT_NOT_SET` and will not be returned to userspace. 1152 */ 1153 void (*get_link_stats)(struct phy_device *dev, 1154 struct ethtool_link_ext_stats *link_stats); 1155 1156 /** 1157 * @update_stats: Trigger periodic statistics updates. 1158 * @dev: The PHY device for which statistics updates are triggered. 1159 * 1160 * Periodically gathers statistics from the PHY device to update locally 1161 * maintained 64-bit counters. This is necessary for PHYs that implement 1162 * reduced-width counters (e.g., 16-bit or 32-bit) which can overflow 1163 * more frequently compared to 64-bit counters. By invoking this 1164 * callback, drivers can fetch the current counter values, handle 1165 * overflow detection, and accumulate the results into local 64-bit 1166 * counters for accurate reporting through the `get_phy_stats` and 1167 * `get_link_stats` interfaces. 1168 * 1169 * Return: 0 on success or a negative error code on failure. 1170 */ 1171 int (*update_stats)(struct phy_device *dev); 1172 1173 /** @get_sset_count: Number of statistic counters */ 1174 int (*get_sset_count)(struct phy_device *dev); 1175 /** @get_strings: Names of the statistic counters */ 1176 void (*get_strings)(struct phy_device *dev, u8 *data); 1177 /** @get_stats: Return the statistic counter values */ 1178 void (*get_stats)(struct phy_device *dev, 1179 struct ethtool_stats *stats, u64 *data); 1180 1181 /* Get and Set PHY tunables */ 1182 /** @get_tunable: Return the value of a tunable */ 1183 int (*get_tunable)(struct phy_device *dev, 1184 struct ethtool_tunable *tuna, void *data); 1185 /** @set_tunable: Set the value of a tunable */ 1186 int (*set_tunable)(struct phy_device *dev, 1187 struct ethtool_tunable *tuna, 1188 const void *data); 1189 /** @set_loopback: Set the loopback mood of the PHY */ 1190 int (*set_loopback)(struct phy_device *dev, bool enable); 1191 /** @get_sqi: Get the signal quality indication */ 1192 int (*get_sqi)(struct phy_device *dev); 1193 /** @get_sqi_max: Get the maximum signal quality indication */ 1194 int (*get_sqi_max)(struct phy_device *dev); 1195 1196 /* PLCA RS interface */ 1197 /** @get_plca_cfg: Return the current PLCA configuration */ 1198 int (*get_plca_cfg)(struct phy_device *dev, 1199 struct phy_plca_cfg *plca_cfg); 1200 /** @set_plca_cfg: Set the PLCA configuration */ 1201 int (*set_plca_cfg)(struct phy_device *dev, 1202 const struct phy_plca_cfg *plca_cfg); 1203 /** @get_plca_status: Return the current PLCA status info */ 1204 int (*get_plca_status)(struct phy_device *dev, 1205 struct phy_plca_status *plca_st); 1206 1207 /** 1208 * @led_brightness_set: Set a PHY LED brightness. Index 1209 * indicates which of the PHYs led should be set. Value 1210 * follows the standard LED class meaning, e.g. LED_OFF, 1211 * LED_HALF, LED_FULL. 1212 */ 1213 int (*led_brightness_set)(struct phy_device *dev, 1214 u8 index, enum led_brightness value); 1215 1216 /** 1217 * @led_blink_set: Set a PHY LED blinking. Index indicates 1218 * which of the PHYs led should be configured to blink. Delays 1219 * are in milliseconds and if both are zero then a sensible 1220 * default should be chosen. The call should adjust the 1221 * timings in that case and if it can't match the values 1222 * specified exactly. 1223 */ 1224 int (*led_blink_set)(struct phy_device *dev, u8 index, 1225 unsigned long *delay_on, 1226 unsigned long *delay_off); 1227 /** 1228 * @led_hw_is_supported: Can the HW support the given rules. 1229 * @dev: PHY device which has the LED 1230 * @index: Which LED of the PHY device 1231 * @rules The core is interested in these rules 1232 * 1233 * Return 0 if yes, -EOPNOTSUPP if not, or an error code. 1234 */ 1235 int (*led_hw_is_supported)(struct phy_device *dev, u8 index, 1236 unsigned long rules); 1237 /** 1238 * @led_hw_control_set: Set the HW to control the LED 1239 * @dev: PHY device which has the LED 1240 * @index: Which LED of the PHY device 1241 * @rules The rules used to control the LED 1242 * 1243 * Returns 0, or a an error code. 1244 */ 1245 int (*led_hw_control_set)(struct phy_device *dev, u8 index, 1246 unsigned long rules); 1247 /** 1248 * @led_hw_control_get: Get how the HW is controlling the LED 1249 * @dev: PHY device which has the LED 1250 * @index: Which LED of the PHY device 1251 * @rules Pointer to the rules used to control the LED 1252 * 1253 * Set *@rules to how the HW is currently blinking. Returns 0 1254 * on success, or a error code if the current blinking cannot 1255 * be represented in rules, or some other error happens. 1256 */ 1257 int (*led_hw_control_get)(struct phy_device *dev, u8 index, 1258 unsigned long *rules); 1259 1260 /** 1261 * @led_polarity_set: Set the LED polarity modes 1262 * @dev: PHY device which has the LED 1263 * @index: Which LED of the PHY device 1264 * @modes: bitmap of LED polarity modes 1265 * 1266 * Configure LED with all the required polarity modes in @modes 1267 * to make it correctly turn ON or OFF. 1268 * 1269 * Returns 0, or an error code. 1270 */ 1271 int (*led_polarity_set)(struct phy_device *dev, int index, 1272 unsigned long modes); 1273 1274 /** 1275 * @get_next_update_time: Get the time until the next update event 1276 * @dev: PHY device 1277 * 1278 * Callback to determine the time (in jiffies) until the next 1279 * update event for the PHY state machine. Allows PHY drivers to 1280 * dynamically adjust polling intervals based on link state or other 1281 * conditions. 1282 * 1283 * Returns the time in jiffies until the next update event. 1284 */ 1285 unsigned int (*get_next_update_time)(struct phy_device *dev); 1286 }; 1287 #define to_phy_driver(d) container_of_const(to_mdio_common_driver(d), \ 1288 struct phy_driver, mdiodrv) 1289 1290 #define PHY_ANY_ID "MATCH ANY PHY" 1291 #define PHY_ANY_UID 0xffffffff 1292 1293 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 1294 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 1295 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 1296 1297 /** 1298 * phy_id_compare - compare @id1 with @id2 taking account of @mask 1299 * @id1: first PHY ID 1300 * @id2: second PHY ID 1301 * @mask: the PHY ID mask, set bits are significant in matching 1302 * 1303 * Return true if the bits from @id1 and @id2 specified by @mask match. 1304 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask). 1305 */ 1306 static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask) 1307 { 1308 return !((id1 ^ id2) & mask); 1309 } 1310 1311 /** 1312 * phydev_id_compare - compare @id with the PHY's Clause 22 ID 1313 * @phydev: the PHY device 1314 * @id: the PHY ID to be matched 1315 * 1316 * Compare the @phydev clause 22 ID with the provided @id and return true or 1317 * false depending whether it matches, using the bound driver mask. The 1318 * @phydev must be bound to a driver. 1319 */ 1320 static inline bool phydev_id_compare(struct phy_device *phydev, u32 id) 1321 { 1322 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask); 1323 } 1324 1325 /* A Structure for boards to register fixups with the PHY Lib */ 1326 struct phy_fixup { 1327 struct list_head list; 1328 char bus_id[MII_BUS_ID_SIZE + 3]; 1329 u32 phy_uid; 1330 u32 phy_uid_mask; 1331 int (*run)(struct phy_device *phydev); 1332 }; 1333 1334 const char *phy_speed_to_str(int speed); 1335 const char *phy_duplex_to_str(unsigned int duplex); 1336 const char *phy_rate_matching_to_str(int rate_matching); 1337 1338 int phy_interface_num_ports(phy_interface_t interface); 1339 1340 /* A structure for mapping a particular speed and duplex 1341 * combination to a particular SUPPORTED and ADVERTISED value 1342 */ 1343 struct phy_setting { 1344 u32 speed; 1345 u8 duplex; 1346 u8 bit; 1347 }; 1348 1349 const struct phy_setting * 1350 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 1351 bool exact); 1352 size_t phy_speeds(unsigned int *speeds, size_t size, 1353 unsigned long *mask); 1354 void of_set_phy_supported(struct phy_device *phydev); 1355 void of_set_phy_eee_broken(struct phy_device *phydev); 1356 void of_set_phy_timing_role(struct phy_device *phydev); 1357 int phy_speed_down_core(struct phy_device *phydev); 1358 1359 /** 1360 * phy_disable_eee_mode - Don't advertise an EEE mode. 1361 * @phydev: The phy_device struct 1362 * @link_mode: The EEE mode to be disabled 1363 */ 1364 static inline void phy_disable_eee_mode(struct phy_device *phydev, u32 link_mode) 1365 { 1366 linkmode_set_bit(link_mode, phydev->eee_disabled_modes); 1367 } 1368 1369 /** 1370 * phy_is_started - Convenience function to check whether PHY is started 1371 * @phydev: The phy_device struct 1372 */ 1373 static inline bool phy_is_started(struct phy_device *phydev) 1374 { 1375 return phydev->state >= PHY_UP; 1376 } 1377 1378 void phy_resolve_aneg_pause(struct phy_device *phydev); 1379 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1380 void phy_check_downshift(struct phy_device *phydev); 1381 1382 /** 1383 * phy_read - Convenience function for reading a given PHY register 1384 * @phydev: the phy_device struct 1385 * @regnum: register number to read 1386 * 1387 * NOTE: MUST NOT be called from interrupt context, 1388 * because the bus read/write functions may wait for an interrupt 1389 * to conclude the operation. 1390 */ 1391 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1392 { 1393 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1394 } 1395 1396 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1397 timeout_us, sleep_before_read) \ 1398 ({ \ 1399 int __ret, __val; \ 1400 __ret = read_poll_timeout(__val = phy_read, val, \ 1401 __val < 0 || (cond), \ 1402 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1403 if (__val < 0) \ 1404 __ret = __val; \ 1405 if (__ret) \ 1406 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1407 __ret; \ 1408 }) 1409 1410 /** 1411 * __phy_read - convenience function for reading a given PHY register 1412 * @phydev: the phy_device struct 1413 * @regnum: register number to read 1414 * 1415 * The caller must have taken the MDIO bus lock. 1416 */ 1417 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1418 { 1419 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1420 } 1421 1422 /** 1423 * phy_write - Convenience function for writing a given PHY register 1424 * @phydev: the phy_device struct 1425 * @regnum: register number to write 1426 * @val: value to write to @regnum 1427 * 1428 * NOTE: MUST NOT be called from interrupt context, 1429 * because the bus read/write functions may wait for an interrupt 1430 * to conclude the operation. 1431 */ 1432 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1433 { 1434 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1435 } 1436 1437 /** 1438 * __phy_write - Convenience function for writing a given PHY register 1439 * @phydev: the phy_device struct 1440 * @regnum: register number to write 1441 * @val: value to write to @regnum 1442 * 1443 * The caller must have taken the MDIO bus lock. 1444 */ 1445 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1446 { 1447 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1448 val); 1449 } 1450 1451 /** 1452 * __phy_modify_changed() - Convenience function for modifying a PHY register 1453 * @phydev: a pointer to a &struct phy_device 1454 * @regnum: register number 1455 * @mask: bit mask of bits to clear 1456 * @set: bit mask of bits to set 1457 * 1458 * Unlocked helper function which allows a PHY register to be modified as 1459 * new register value = (old register value & ~mask) | set 1460 * 1461 * Returns negative errno, 0 if there was no change, and 1 in case of change 1462 */ 1463 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1464 u16 mask, u16 set) 1465 { 1466 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1467 regnum, mask, set); 1468 } 1469 1470 /* 1471 * phy_read_mmd - Convenience function for reading a register 1472 * from an MMD on a given PHY. 1473 */ 1474 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1475 1476 /** 1477 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1478 * condition is met or a timeout occurs 1479 * 1480 * @phydev: The phy_device struct 1481 * @devaddr: The MMD to read from 1482 * @regnum: The register on the MMD to read 1483 * @val: Variable to read the register into 1484 * @cond: Break condition (usually involving @val) 1485 * @sleep_us: Maximum time to sleep between reads in us (0 tight-loops). Please 1486 * read usleep_range() function description for details and 1487 * limitations. 1488 * @timeout_us: Timeout in us, 0 means never timeout 1489 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1490 * 1491 * Returns: 0 on success and -ETIMEDOUT upon a timeout. In either 1492 * case, the last read value at @args is stored in @val. Must not 1493 * be called from atomic context if sleep_us or timeout_us are used. 1494 */ 1495 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1496 sleep_us, timeout_us, sleep_before_read) \ 1497 ({ \ 1498 int __ret, __val; \ 1499 __ret = read_poll_timeout(__val = phy_read_mmd, val, \ 1500 __val < 0 || (cond), \ 1501 sleep_us, timeout_us, sleep_before_read, \ 1502 phydev, devaddr, regnum); \ 1503 if (__val < 0) \ 1504 __ret = __val; \ 1505 if (__ret) \ 1506 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1507 __ret; \ 1508 }) 1509 1510 /* 1511 * __phy_read_mmd - Convenience function for reading a register 1512 * from an MMD on a given PHY. 1513 */ 1514 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1515 1516 /* 1517 * phy_write_mmd - Convenience function for writing a register 1518 * on an MMD on a given PHY. 1519 */ 1520 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1521 1522 /* 1523 * __phy_write_mmd - Convenience function for writing a register 1524 * on an MMD on a given PHY. 1525 */ 1526 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1527 1528 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1529 u16 set); 1530 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1531 u16 set); 1532 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1533 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1534 1535 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1536 u16 mask, u16 set); 1537 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1538 u16 mask, u16 set); 1539 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1540 u16 mask, u16 set); 1541 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1542 u16 mask, u16 set); 1543 1544 /** 1545 * __phy_set_bits - Convenience function for setting bits in a PHY register 1546 * @phydev: the phy_device struct 1547 * @regnum: register number to write 1548 * @val: bits to set 1549 * 1550 * The caller must have taken the MDIO bus lock. 1551 */ 1552 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1553 { 1554 return __phy_modify(phydev, regnum, 0, val); 1555 } 1556 1557 /** 1558 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1559 * @phydev: the phy_device struct 1560 * @regnum: register number to write 1561 * @val: bits to clear 1562 * 1563 * The caller must have taken the MDIO bus lock. 1564 */ 1565 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1566 u16 val) 1567 { 1568 return __phy_modify(phydev, regnum, val, 0); 1569 } 1570 1571 /** 1572 * phy_set_bits - Convenience function for setting bits in a PHY register 1573 * @phydev: the phy_device struct 1574 * @regnum: register number to write 1575 * @val: bits to set 1576 */ 1577 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1578 { 1579 return phy_modify(phydev, regnum, 0, val); 1580 } 1581 1582 /** 1583 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1584 * @phydev: the phy_device struct 1585 * @regnum: register number to write 1586 * @val: bits to clear 1587 */ 1588 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1589 { 1590 return phy_modify(phydev, regnum, val, 0); 1591 } 1592 1593 /** 1594 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1595 * on MMD 1596 * @phydev: the phy_device struct 1597 * @devad: the MMD containing register to modify 1598 * @regnum: register number to modify 1599 * @val: bits to set 1600 * 1601 * The caller must have taken the MDIO bus lock. 1602 */ 1603 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1604 u32 regnum, u16 val) 1605 { 1606 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1607 } 1608 1609 /** 1610 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1611 * on MMD 1612 * @phydev: the phy_device struct 1613 * @devad: the MMD containing register to modify 1614 * @regnum: register number to modify 1615 * @val: bits to clear 1616 * 1617 * The caller must have taken the MDIO bus lock. 1618 */ 1619 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1620 u32 regnum, u16 val) 1621 { 1622 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1623 } 1624 1625 /** 1626 * phy_set_bits_mmd - Convenience function for setting bits in a register 1627 * on MMD 1628 * @phydev: the phy_device struct 1629 * @devad: the MMD containing register to modify 1630 * @regnum: register number to modify 1631 * @val: bits to set 1632 */ 1633 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1634 u32 regnum, u16 val) 1635 { 1636 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1637 } 1638 1639 /** 1640 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1641 * on MMD 1642 * @phydev: the phy_device struct 1643 * @devad: the MMD containing register to modify 1644 * @regnum: register number to modify 1645 * @val: bits to clear 1646 */ 1647 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1648 u32 regnum, u16 val) 1649 { 1650 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1651 } 1652 1653 /** 1654 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1655 * @phydev: the phy_device struct 1656 * 1657 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1658 * PHY_MAC_INTERRUPT 1659 */ 1660 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1661 { 1662 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1663 } 1664 1665 /** 1666 * phy_polling_mode - Convenience function for testing whether polling is 1667 * used to detect PHY status changes 1668 * @phydev: the phy_device struct 1669 */ 1670 static inline bool phy_polling_mode(struct phy_device *phydev) 1671 { 1672 if (phydev->state == PHY_CABLETEST) 1673 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1674 return true; 1675 1676 if (phydev->drv->update_stats) 1677 return true; 1678 1679 return phydev->irq == PHY_POLL; 1680 } 1681 1682 /** 1683 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1684 * @phydev: the phy_device struct 1685 */ 1686 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1687 { 1688 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1689 } 1690 1691 /** 1692 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1693 * @phydev: the phy_device struct 1694 */ 1695 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1696 { 1697 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1698 } 1699 1700 /** 1701 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1702 * PTP hardware clock capabilities. 1703 * @phydev: the phy_device struct 1704 */ 1705 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1706 { 1707 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1708 } 1709 1710 /** 1711 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1712 * @phydev: the phy_device struct 1713 */ 1714 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1715 { 1716 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1717 } 1718 1719 static inline int phy_hwtstamp(struct phy_device *phydev, 1720 struct kernel_hwtstamp_config *cfg, 1721 struct netlink_ext_ack *extack) 1722 { 1723 return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack); 1724 } 1725 1726 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1727 int type) 1728 { 1729 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1730 } 1731 1732 static inline int phy_ts_info(struct phy_device *phydev, 1733 struct kernel_ethtool_ts_info *tsinfo) 1734 { 1735 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1736 } 1737 1738 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1739 int type) 1740 { 1741 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1742 } 1743 1744 /** 1745 * phy_is_default_hwtstamp - Is the PHY hwtstamp the default timestamp 1746 * @phydev: Pointer to phy_device 1747 * 1748 * This is used to get default timestamping device taking into account 1749 * the new API choice, which is selecting the timestamping from MAC by 1750 * default if the phydev does not have default_timestamp flag enabled. 1751 * 1752 * Return: True if phy is the default hw timestamp, false otherwise. 1753 */ 1754 static inline bool phy_is_default_hwtstamp(struct phy_device *phydev) 1755 { 1756 return phy_has_hwtstamp(phydev) && phydev->default_timestamp; 1757 } 1758 1759 /** 1760 * phy_is_internal - Convenience function for testing if a PHY is internal 1761 * @phydev: the phy_device struct 1762 */ 1763 static inline bool phy_is_internal(struct phy_device *phydev) 1764 { 1765 return phydev->is_internal; 1766 } 1767 1768 /** 1769 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1770 * @phydev: the phy_device struct 1771 */ 1772 static inline bool phy_on_sfp(struct phy_device *phydev) 1773 { 1774 return phydev->is_on_sfp_module; 1775 } 1776 1777 /** 1778 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1779 * PHY interface mode is RGMII (all variants) 1780 * @mode: the &phy_interface_t enum 1781 */ 1782 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1783 { 1784 return mode >= PHY_INTERFACE_MODE_RGMII && 1785 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1786 }; 1787 1788 /** 1789 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1790 * negotiation 1791 * @mode: one of &enum phy_interface_t 1792 * 1793 * Returns true if the PHY interface mode uses the 16-bit negotiation 1794 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1795 */ 1796 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1797 { 1798 return mode == PHY_INTERFACE_MODE_1000BASEX || 1799 mode == PHY_INTERFACE_MODE_2500BASEX; 1800 } 1801 1802 /** 1803 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1804 * is RGMII (all variants) 1805 * @phydev: the phy_device struct 1806 */ 1807 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1808 { 1809 return phy_interface_mode_is_rgmii(phydev->interface); 1810 }; 1811 1812 /** 1813 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1814 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1815 * @phydev: the phy_device struct 1816 */ 1817 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1818 { 1819 return phydev->is_pseudo_fixed_link; 1820 } 1821 1822 int phy_save_page(struct phy_device *phydev); 1823 int phy_select_page(struct phy_device *phydev, int page); 1824 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1825 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1826 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1827 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1828 u16 mask, u16 set); 1829 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1830 u16 mask, u16 set); 1831 1832 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1833 bool is_c45, 1834 struct phy_c45_device_ids *c45_ids); 1835 #if IS_ENABLED(CONFIG_PHYLIB) 1836 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1837 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1838 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1839 struct phy_device *device_phy_find_device(struct device *dev); 1840 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode); 1841 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1842 int phy_device_register(struct phy_device *phy); 1843 void phy_device_free(struct phy_device *phydev); 1844 #else 1845 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1846 { 1847 return 0; 1848 } 1849 static inline 1850 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1851 { 1852 return 0; 1853 } 1854 1855 static inline 1856 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1857 { 1858 return NULL; 1859 } 1860 1861 static inline struct phy_device *device_phy_find_device(struct device *dev) 1862 { 1863 return NULL; 1864 } 1865 1866 static inline 1867 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1868 { 1869 return NULL; 1870 } 1871 1872 static inline 1873 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1874 { 1875 return NULL; 1876 } 1877 1878 static inline int phy_device_register(struct phy_device *phy) 1879 { 1880 return 0; 1881 } 1882 1883 static inline void phy_device_free(struct phy_device *phydev) { } 1884 #endif /* CONFIG_PHYLIB */ 1885 void phy_device_remove(struct phy_device *phydev); 1886 int phy_get_c45_ids(struct phy_device *phydev); 1887 int phy_init_hw(struct phy_device *phydev); 1888 int phy_suspend(struct phy_device *phydev); 1889 int phy_resume(struct phy_device *phydev); 1890 int __phy_resume(struct phy_device *phydev); 1891 int phy_loopback(struct phy_device *phydev, bool enable); 1892 int phy_sfp_connect_phy(void *upstream, struct phy_device *phy); 1893 void phy_sfp_disconnect_phy(void *upstream, struct phy_device *phy); 1894 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1895 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1896 int phy_sfp_probe(struct phy_device *phydev, 1897 const struct sfp_upstream_ops *ops); 1898 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1899 phy_interface_t interface); 1900 struct phy_device *phy_find_first(struct mii_bus *bus); 1901 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1902 u32 flags, phy_interface_t interface); 1903 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1904 void (*handler)(struct net_device *), 1905 phy_interface_t interface); 1906 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1907 void (*handler)(struct net_device *), 1908 phy_interface_t interface); 1909 void phy_disconnect(struct phy_device *phydev); 1910 void phy_detach(struct phy_device *phydev); 1911 void phy_start(struct phy_device *phydev); 1912 void phy_stop(struct phy_device *phydev); 1913 int phy_config_aneg(struct phy_device *phydev); 1914 int _phy_start_aneg(struct phy_device *phydev); 1915 int phy_start_aneg(struct phy_device *phydev); 1916 int phy_aneg_done(struct phy_device *phydev); 1917 unsigned int phy_inband_caps(struct phy_device *phydev, 1918 phy_interface_t interface); 1919 int phy_config_inband(struct phy_device *phydev, unsigned int modes); 1920 int phy_speed_down(struct phy_device *phydev, bool sync); 1921 int phy_speed_up(struct phy_device *phydev); 1922 bool phy_check_valid(int speed, int duplex, unsigned long *features); 1923 1924 int phy_restart_aneg(struct phy_device *phydev); 1925 int phy_reset_after_clk_enable(struct phy_device *phydev); 1926 1927 #if IS_ENABLED(CONFIG_PHYLIB) 1928 int phy_start_cable_test(struct phy_device *phydev, 1929 struct netlink_ext_ack *extack); 1930 int phy_start_cable_test_tdr(struct phy_device *phydev, 1931 struct netlink_ext_ack *extack, 1932 const struct phy_tdr_config *config); 1933 #else 1934 static inline 1935 int phy_start_cable_test(struct phy_device *phydev, 1936 struct netlink_ext_ack *extack) 1937 { 1938 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1939 return -EOPNOTSUPP; 1940 } 1941 static inline 1942 int phy_start_cable_test_tdr(struct phy_device *phydev, 1943 struct netlink_ext_ack *extack, 1944 const struct phy_tdr_config *config) 1945 { 1946 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1947 return -EOPNOTSUPP; 1948 } 1949 #endif 1950 1951 static inline void phy_device_reset(struct phy_device *phydev, int value) 1952 { 1953 mdio_device_reset(&phydev->mdio, value); 1954 } 1955 1956 #define phydev_err(_phydev, format, args...) \ 1957 dev_err(&_phydev->mdio.dev, format, ##args) 1958 1959 #define phydev_err_probe(_phydev, err, format, args...) \ 1960 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1961 1962 #define phydev_info(_phydev, format, args...) \ 1963 dev_info(&_phydev->mdio.dev, format, ##args) 1964 1965 #define phydev_warn(_phydev, format, args...) \ 1966 dev_warn(&_phydev->mdio.dev, format, ##args) 1967 1968 #define phydev_dbg(_phydev, format, args...) \ 1969 dev_dbg(&_phydev->mdio.dev, format, ##args) 1970 1971 static inline const char *phydev_name(const struct phy_device *phydev) 1972 { 1973 return dev_name(&phydev->mdio.dev); 1974 } 1975 1976 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1977 { 1978 mutex_lock(&phydev->mdio.bus->mdio_lock); 1979 } 1980 1981 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1982 { 1983 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1984 } 1985 1986 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1987 __printf(2, 3); 1988 char *phy_attached_info_irq(struct phy_device *phydev) 1989 __malloc; 1990 void phy_attached_info(struct phy_device *phydev); 1991 1992 /* Clause 22 PHY */ 1993 int genphy_read_abilities(struct phy_device *phydev); 1994 int genphy_setup_forced(struct phy_device *phydev); 1995 int genphy_restart_aneg(struct phy_device *phydev); 1996 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1997 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1998 int genphy_aneg_done(struct phy_device *phydev); 1999 int genphy_update_link(struct phy_device *phydev); 2000 int genphy_read_lpa(struct phy_device *phydev); 2001 int genphy_read_status_fixed(struct phy_device *phydev); 2002 int genphy_read_status(struct phy_device *phydev); 2003 int genphy_read_master_slave(struct phy_device *phydev); 2004 int genphy_suspend(struct phy_device *phydev); 2005 int genphy_resume(struct phy_device *phydev); 2006 int genphy_loopback(struct phy_device *phydev, bool enable); 2007 int genphy_soft_reset(struct phy_device *phydev); 2008 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 2009 2010 static inline int genphy_config_aneg(struct phy_device *phydev) 2011 { 2012 return __genphy_config_aneg(phydev, false); 2013 } 2014 2015 static inline int genphy_no_config_intr(struct phy_device *phydev) 2016 { 2017 return 0; 2018 } 2019 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 2020 u16 regnum); 2021 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 2022 u16 regnum, u16 val); 2023 2024 /* Clause 37 */ 2025 int genphy_c37_config_aneg(struct phy_device *phydev); 2026 int genphy_c37_read_status(struct phy_device *phydev, bool *changed); 2027 2028 /* Clause 45 PHY */ 2029 int genphy_c45_restart_aneg(struct phy_device *phydev); 2030 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 2031 int genphy_c45_aneg_done(struct phy_device *phydev); 2032 int genphy_c45_read_link(struct phy_device *phydev); 2033 int genphy_c45_read_lpa(struct phy_device *phydev); 2034 int genphy_c45_read_pma(struct phy_device *phydev); 2035 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 2036 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 2037 int genphy_c45_an_config_aneg(struct phy_device *phydev); 2038 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 2039 int genphy_c45_read_mdix(struct phy_device *phydev); 2040 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 2041 int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev); 2042 int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev); 2043 int genphy_c45_read_eee_abilities(struct phy_device *phydev); 2044 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 2045 int genphy_c45_read_status(struct phy_device *phydev); 2046 int genphy_c45_baset1_read_status(struct phy_device *phydev); 2047 int genphy_c45_config_aneg(struct phy_device *phydev); 2048 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 2049 int genphy_c45_pma_resume(struct phy_device *phydev); 2050 int genphy_c45_pma_suspend(struct phy_device *phydev); 2051 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 2052 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 2053 struct phy_plca_cfg *plca_cfg); 2054 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 2055 const struct phy_plca_cfg *plca_cfg); 2056 int genphy_c45_plca_get_status(struct phy_device *phydev, 2057 struct phy_plca_status *plca_st); 2058 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv, 2059 unsigned long *lp); 2060 int genphy_c45_ethtool_get_eee(struct phy_device *phydev, 2061 struct ethtool_keee *data); 2062 int genphy_c45_ethtool_set_eee(struct phy_device *phydev, 2063 struct ethtool_keee *data); 2064 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev); 2065 int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv); 2066 2067 /* Generic C45 PHY driver */ 2068 extern struct phy_driver genphy_c45_driver; 2069 2070 /* The gen10g_* functions are the old Clause 45 stub */ 2071 int gen10g_config_aneg(struct phy_device *phydev); 2072 2073 static inline int phy_read_status(struct phy_device *phydev) 2074 { 2075 if (!phydev->drv) 2076 return -EIO; 2077 2078 if (phydev->drv->read_status) 2079 return phydev->drv->read_status(phydev); 2080 else 2081 return genphy_read_status(phydev); 2082 } 2083 2084 void phy_driver_unregister(struct phy_driver *drv); 2085 void phy_drivers_unregister(struct phy_driver *drv, int n); 2086 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 2087 int phy_drivers_register(struct phy_driver *new_driver, int n, 2088 struct module *owner); 2089 void phy_error(struct phy_device *phydev); 2090 void phy_state_machine(struct work_struct *work); 2091 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 2092 void phy_trigger_machine(struct phy_device *phydev); 2093 void phy_mac_interrupt(struct phy_device *phydev); 2094 void phy_start_machine(struct phy_device *phydev); 2095 void phy_stop_machine(struct phy_device *phydev); 2096 void phy_ethtool_ksettings_get(struct phy_device *phydev, 2097 struct ethtool_link_ksettings *cmd); 2098 int phy_ethtool_ksettings_set(struct phy_device *phydev, 2099 const struct ethtool_link_ksettings *cmd); 2100 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 2101 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 2102 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 2103 int phy_disable_interrupts(struct phy_device *phydev); 2104 void phy_request_interrupt(struct phy_device *phydev); 2105 void phy_free_interrupt(struct phy_device *phydev); 2106 void phy_print_status(struct phy_device *phydev); 2107 int phy_get_rate_matching(struct phy_device *phydev, 2108 phy_interface_t iface); 2109 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 2110 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 2111 void phy_advertise_supported(struct phy_device *phydev); 2112 void phy_advertise_eee_all(struct phy_device *phydev); 2113 void phy_support_sym_pause(struct phy_device *phydev); 2114 void phy_support_asym_pause(struct phy_device *phydev); 2115 void phy_support_eee(struct phy_device *phydev); 2116 void phy_disable_eee(struct phy_device *phydev); 2117 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 2118 bool autoneg); 2119 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 2120 bool phy_validate_pause(struct phy_device *phydev, 2121 struct ethtool_pauseparam *pp); 2122 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 2123 2124 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 2125 const int *delay_values, int size, bool is_rx); 2126 2127 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 2128 bool *tx_pause, bool *rx_pause); 2129 2130 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 2131 int (*run)(struct phy_device *)); 2132 int phy_register_fixup_for_id(const char *bus_id, 2133 int (*run)(struct phy_device *)); 2134 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 2135 int (*run)(struct phy_device *)); 2136 2137 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 2138 int phy_unregister_fixup_for_id(const char *bus_id); 2139 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 2140 2141 int phy_eee_tx_clock_stop_capable(struct phy_device *phydev); 2142 int phy_eee_rx_clock_stop(struct phy_device *phydev, bool clk_stop_enable); 2143 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 2144 int phy_get_eee_err(struct phy_device *phydev); 2145 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data); 2146 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_keee *data); 2147 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 2148 void phy_ethtool_get_wol(struct phy_device *phydev, 2149 struct ethtool_wolinfo *wol); 2150 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 2151 struct ethtool_link_ksettings *cmd); 2152 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 2153 const struct ethtool_link_ksettings *cmd); 2154 int phy_ethtool_nway_reset(struct net_device *ndev); 2155 int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size); 2156 int of_phy_package_join(struct phy_device *phydev, size_t priv_size); 2157 void phy_package_leave(struct phy_device *phydev); 2158 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 2159 int base_addr, size_t priv_size); 2160 int devm_of_phy_package_join(struct device *dev, struct phy_device *phydev, 2161 size_t priv_size); 2162 2163 int __init mdio_bus_init(void); 2164 void mdio_bus_exit(void); 2165 2166 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 2167 int phy_ethtool_get_sset_count(struct phy_device *phydev); 2168 int phy_ethtool_get_stats(struct phy_device *phydev, 2169 struct ethtool_stats *stats, u64 *data); 2170 2171 void __phy_ethtool_get_phy_stats(struct phy_device *phydev, 2172 struct ethtool_eth_phy_stats *phy_stats, 2173 struct ethtool_phy_stats *phydev_stats); 2174 void __phy_ethtool_get_link_ext_stats(struct phy_device *phydev, 2175 struct ethtool_link_ext_stats *link_stats); 2176 2177 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 2178 struct phy_plca_cfg *plca_cfg); 2179 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 2180 const struct phy_plca_cfg *plca_cfg, 2181 struct netlink_ext_ack *extack); 2182 int phy_ethtool_get_plca_status(struct phy_device *phydev, 2183 struct phy_plca_status *plca_st); 2184 2185 int __phy_hwtstamp_get(struct phy_device *phydev, 2186 struct kernel_hwtstamp_config *config); 2187 int __phy_hwtstamp_set(struct phy_device *phydev, 2188 struct kernel_hwtstamp_config *config, 2189 struct netlink_ext_ack *extack); 2190 2191 static inline int phy_package_address(struct phy_device *phydev, 2192 unsigned int addr_offset) 2193 { 2194 struct phy_package_shared *shared = phydev->shared; 2195 u8 base_addr = shared->base_addr; 2196 2197 if (addr_offset >= PHY_MAX_ADDR - base_addr) 2198 return -EIO; 2199 2200 /* we know that addr will be in the range 0..31 and thus the 2201 * implicit cast to a signed int is not a problem. 2202 */ 2203 return base_addr + addr_offset; 2204 } 2205 2206 static inline int phy_package_read(struct phy_device *phydev, 2207 unsigned int addr_offset, u32 regnum) 2208 { 2209 int addr = phy_package_address(phydev, addr_offset); 2210 2211 if (addr < 0) 2212 return addr; 2213 2214 return mdiobus_read(phydev->mdio.bus, addr, regnum); 2215 } 2216 2217 static inline int __phy_package_read(struct phy_device *phydev, 2218 unsigned int addr_offset, u32 regnum) 2219 { 2220 int addr = phy_package_address(phydev, addr_offset); 2221 2222 if (addr < 0) 2223 return addr; 2224 2225 return __mdiobus_read(phydev->mdio.bus, addr, regnum); 2226 } 2227 2228 static inline int phy_package_write(struct phy_device *phydev, 2229 unsigned int addr_offset, u32 regnum, 2230 u16 val) 2231 { 2232 int addr = phy_package_address(phydev, addr_offset); 2233 2234 if (addr < 0) 2235 return addr; 2236 2237 return mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2238 } 2239 2240 static inline int __phy_package_write(struct phy_device *phydev, 2241 unsigned int addr_offset, u32 regnum, 2242 u16 val) 2243 { 2244 int addr = phy_package_address(phydev, addr_offset); 2245 2246 if (addr < 0) 2247 return addr; 2248 2249 return __mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2250 } 2251 2252 int __phy_package_read_mmd(struct phy_device *phydev, 2253 unsigned int addr_offset, int devad, 2254 u32 regnum); 2255 2256 int phy_package_read_mmd(struct phy_device *phydev, 2257 unsigned int addr_offset, int devad, 2258 u32 regnum); 2259 2260 int __phy_package_write_mmd(struct phy_device *phydev, 2261 unsigned int addr_offset, int devad, 2262 u32 regnum, u16 val); 2263 2264 int phy_package_write_mmd(struct phy_device *phydev, 2265 unsigned int addr_offset, int devad, 2266 u32 regnum, u16 val); 2267 2268 static inline bool __phy_package_set_once(struct phy_device *phydev, 2269 unsigned int b) 2270 { 2271 struct phy_package_shared *shared = phydev->shared; 2272 2273 if (!shared) 2274 return false; 2275 2276 return !test_and_set_bit(b, &shared->flags); 2277 } 2278 2279 static inline bool phy_package_init_once(struct phy_device *phydev) 2280 { 2281 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 2282 } 2283 2284 static inline bool phy_package_probe_once(struct phy_device *phydev) 2285 { 2286 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 2287 } 2288 2289 extern const struct bus_type mdio_bus_type; 2290 2291 struct mdio_board_info { 2292 const char *bus_id; 2293 char modalias[MDIO_NAME_SIZE]; 2294 int mdio_addr; 2295 const void *platform_data; 2296 }; 2297 2298 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 2299 int mdiobus_register_board_info(const struct mdio_board_info *info, 2300 unsigned int n); 2301 #else 2302 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 2303 unsigned int n) 2304 { 2305 return 0; 2306 } 2307 #endif 2308 2309 2310 /** 2311 * phy_module_driver() - Helper macro for registering PHY drivers 2312 * @__phy_drivers: array of PHY drivers to register 2313 * @__count: Numbers of members in array 2314 * 2315 * Helper macro for PHY drivers which do not do anything special in module 2316 * init/exit. Each module may only use this macro once, and calling it 2317 * replaces module_init() and module_exit(). 2318 */ 2319 #define phy_module_driver(__phy_drivers, __count) \ 2320 static int __init phy_module_init(void) \ 2321 { \ 2322 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 2323 } \ 2324 module_init(phy_module_init); \ 2325 static void __exit phy_module_exit(void) \ 2326 { \ 2327 phy_drivers_unregister(__phy_drivers, __count); \ 2328 } \ 2329 module_exit(phy_module_exit) 2330 2331 #define module_phy_driver(__phy_drivers) \ 2332 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 2333 2334 bool phy_driver_is_genphy(struct phy_device *phydev); 2335 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 2336 2337 #endif /* __PHY_H */ 2338