1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/leds.h> 18 #include <linux/linkmode.h> 19 #include <linux/netlink.h> 20 #include <linux/mdio.h> 21 #include <linux/mii.h> 22 #include <linux/mii_timestamper.h> 23 #include <linux/module.h> 24 #include <linux/timer.h> 25 #include <linux/workqueue.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/u64_stats_sync.h> 28 #include <linux/irqreturn.h> 29 #include <linux/iopoll.h> 30 #include <linux/refcount.h> 31 32 #include <linux/atomic.h> 33 #include <net/eee.h> 34 35 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 36 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 37 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 38 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 39 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 40 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 41 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 42 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 43 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 44 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init; 45 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap2_features) __ro_after_init; 46 47 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 48 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 49 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 50 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 51 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 52 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 53 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features) 54 #define PHY_EEE_CAP2_FEATURES ((unsigned long *)&phy_eee_cap2_features) 55 56 extern const int phy_basic_ports_array[3]; 57 58 /* 59 * Set phydev->irq to PHY_POLL if interrupts are not supported, 60 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 61 * the attached MAC driver handles the interrupt 62 */ 63 #define PHY_POLL -1 64 #define PHY_MAC_INTERRUPT -2 65 66 #define PHY_IS_INTERNAL 0x00000001 67 #define PHY_RST_AFTER_CLK_EN 0x00000002 68 #define PHY_POLL_CABLE_TEST 0x00000004 69 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008 70 #define MDIO_DEVICE_IS_PHY 0x80000000 71 72 /** 73 * enum phy_interface_t - Interface Mode definitions 74 * 75 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 76 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 77 * @PHY_INTERFACE_MODE_MII: Media-independent interface 78 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 79 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 80 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 81 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 82 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 83 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 84 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 85 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 86 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 87 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 88 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 89 * @PHY_INTERFACE_MODE_SMII: Serial MII 90 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 91 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 92 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 93 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII 94 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 95 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 96 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 97 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 98 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 99 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 100 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 101 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 102 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 103 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 104 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 105 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 106 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 107 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 108 * @PHY_INTERFACE_MODE_10G_QXGMII: 10G-QXGMII - 4 ports over 10G USXGMII 109 * @PHY_INTERFACE_MODE_MAX: Book keeping 110 * 111 * Describes the interface between the MAC and PHY. 112 */ 113 typedef enum { 114 PHY_INTERFACE_MODE_NA, 115 PHY_INTERFACE_MODE_INTERNAL, 116 PHY_INTERFACE_MODE_MII, 117 PHY_INTERFACE_MODE_GMII, 118 PHY_INTERFACE_MODE_SGMII, 119 PHY_INTERFACE_MODE_TBI, 120 PHY_INTERFACE_MODE_REVMII, 121 PHY_INTERFACE_MODE_RMII, 122 PHY_INTERFACE_MODE_REVRMII, 123 PHY_INTERFACE_MODE_RGMII, 124 PHY_INTERFACE_MODE_RGMII_ID, 125 PHY_INTERFACE_MODE_RGMII_RXID, 126 PHY_INTERFACE_MODE_RGMII_TXID, 127 PHY_INTERFACE_MODE_RTBI, 128 PHY_INTERFACE_MODE_SMII, 129 PHY_INTERFACE_MODE_XGMII, 130 PHY_INTERFACE_MODE_XLGMII, 131 PHY_INTERFACE_MODE_MOCA, 132 PHY_INTERFACE_MODE_PSGMII, 133 PHY_INTERFACE_MODE_QSGMII, 134 PHY_INTERFACE_MODE_TRGMII, 135 PHY_INTERFACE_MODE_100BASEX, 136 PHY_INTERFACE_MODE_1000BASEX, 137 PHY_INTERFACE_MODE_2500BASEX, 138 PHY_INTERFACE_MODE_5GBASER, 139 PHY_INTERFACE_MODE_RXAUI, 140 PHY_INTERFACE_MODE_XAUI, 141 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 142 PHY_INTERFACE_MODE_10GBASER, 143 PHY_INTERFACE_MODE_25GBASER, 144 PHY_INTERFACE_MODE_USXGMII, 145 /* 10GBASE-KR - with Clause 73 AN */ 146 PHY_INTERFACE_MODE_10GKR, 147 PHY_INTERFACE_MODE_QUSGMII, 148 PHY_INTERFACE_MODE_1000BASEKX, 149 PHY_INTERFACE_MODE_10G_QXGMII, 150 PHY_INTERFACE_MODE_MAX, 151 } phy_interface_t; 152 153 /* PHY interface mode bitmap handling */ 154 #define DECLARE_PHY_INTERFACE_MASK(name) \ 155 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 156 157 static inline void phy_interface_zero(unsigned long *intf) 158 { 159 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 160 } 161 162 static inline bool phy_interface_empty(const unsigned long *intf) 163 { 164 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 165 } 166 167 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 168 const unsigned long *b) 169 { 170 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 171 } 172 173 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 174 const unsigned long *b) 175 { 176 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 177 } 178 179 static inline void phy_interface_set_rgmii(unsigned long *intf) 180 { 181 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 182 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 183 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 184 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 185 } 186 187 /* 188 * phy_supported_speeds - return all speeds currently supported by a PHY device 189 */ 190 unsigned int phy_supported_speeds(struct phy_device *phy, 191 unsigned int *speeds, 192 unsigned int size); 193 194 /** 195 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 196 * @interface: enum phy_interface_t value 197 * 198 * Description: maps enum &phy_interface_t defined in this file 199 * into the device tree binding of 'phy-mode', so that Ethernet 200 * device driver can get PHY interface from device tree. 201 */ 202 static inline const char *phy_modes(phy_interface_t interface) 203 { 204 switch (interface) { 205 case PHY_INTERFACE_MODE_NA: 206 return ""; 207 case PHY_INTERFACE_MODE_INTERNAL: 208 return "internal"; 209 case PHY_INTERFACE_MODE_MII: 210 return "mii"; 211 case PHY_INTERFACE_MODE_GMII: 212 return "gmii"; 213 case PHY_INTERFACE_MODE_SGMII: 214 return "sgmii"; 215 case PHY_INTERFACE_MODE_TBI: 216 return "tbi"; 217 case PHY_INTERFACE_MODE_REVMII: 218 return "rev-mii"; 219 case PHY_INTERFACE_MODE_RMII: 220 return "rmii"; 221 case PHY_INTERFACE_MODE_REVRMII: 222 return "rev-rmii"; 223 case PHY_INTERFACE_MODE_RGMII: 224 return "rgmii"; 225 case PHY_INTERFACE_MODE_RGMII_ID: 226 return "rgmii-id"; 227 case PHY_INTERFACE_MODE_RGMII_RXID: 228 return "rgmii-rxid"; 229 case PHY_INTERFACE_MODE_RGMII_TXID: 230 return "rgmii-txid"; 231 case PHY_INTERFACE_MODE_RTBI: 232 return "rtbi"; 233 case PHY_INTERFACE_MODE_SMII: 234 return "smii"; 235 case PHY_INTERFACE_MODE_XGMII: 236 return "xgmii"; 237 case PHY_INTERFACE_MODE_XLGMII: 238 return "xlgmii"; 239 case PHY_INTERFACE_MODE_MOCA: 240 return "moca"; 241 case PHY_INTERFACE_MODE_PSGMII: 242 return "psgmii"; 243 case PHY_INTERFACE_MODE_QSGMII: 244 return "qsgmii"; 245 case PHY_INTERFACE_MODE_TRGMII: 246 return "trgmii"; 247 case PHY_INTERFACE_MODE_1000BASEX: 248 return "1000base-x"; 249 case PHY_INTERFACE_MODE_1000BASEKX: 250 return "1000base-kx"; 251 case PHY_INTERFACE_MODE_2500BASEX: 252 return "2500base-x"; 253 case PHY_INTERFACE_MODE_5GBASER: 254 return "5gbase-r"; 255 case PHY_INTERFACE_MODE_RXAUI: 256 return "rxaui"; 257 case PHY_INTERFACE_MODE_XAUI: 258 return "xaui"; 259 case PHY_INTERFACE_MODE_10GBASER: 260 return "10gbase-r"; 261 case PHY_INTERFACE_MODE_25GBASER: 262 return "25gbase-r"; 263 case PHY_INTERFACE_MODE_USXGMII: 264 return "usxgmii"; 265 case PHY_INTERFACE_MODE_10GKR: 266 return "10gbase-kr"; 267 case PHY_INTERFACE_MODE_100BASEX: 268 return "100base-x"; 269 case PHY_INTERFACE_MODE_QUSGMII: 270 return "qusgmii"; 271 case PHY_INTERFACE_MODE_10G_QXGMII: 272 return "10g-qxgmii"; 273 default: 274 return "unknown"; 275 } 276 } 277 278 /** 279 * rgmii_clock - map link speed to the clock rate 280 * @speed: link speed value 281 * 282 * Description: maps RGMII supported link speeds 283 * into the clock rates. 284 * 285 * Returns: clock rate or negative errno 286 */ 287 static inline long rgmii_clock(int speed) 288 { 289 switch (speed) { 290 case SPEED_10: 291 return 2500000; 292 case SPEED_100: 293 return 25000000; 294 case SPEED_1000: 295 return 125000000; 296 default: 297 return -EINVAL; 298 } 299 } 300 301 #define PHY_MAX_ADDR 32 302 303 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 304 #define PHY_ID_FMT "%s:%02x" 305 306 #define MII_BUS_ID_SIZE 61 307 308 struct device; 309 struct kernel_hwtstamp_config; 310 struct phylink; 311 struct sfp_bus; 312 struct sfp_upstream_ops; 313 struct sk_buff; 314 315 /** 316 * struct mdio_bus_stats - Statistics counters for MDIO busses 317 * @transfers: Total number of transfers, i.e. @writes + @reads 318 * @errors: Number of MDIO transfers that returned an error 319 * @writes: Number of write transfers 320 * @reads: Number of read transfers 321 * @syncp: Synchronisation for incrementing statistics 322 */ 323 struct mdio_bus_stats { 324 u64_stats_t transfers; 325 u64_stats_t errors; 326 u64_stats_t writes; 327 u64_stats_t reads; 328 /* Must be last, add new statistics above */ 329 struct u64_stats_sync syncp; 330 }; 331 332 /** 333 * struct phy_package_shared - Shared information in PHY packages 334 * @base_addr: Base PHY address of PHY package used to combine PHYs 335 * in one package and for offset calculation of phy_package_read/write 336 * @np: Pointer to the Device Node if PHY package defined in DT 337 * @refcnt: Number of PHYs connected to this shared data 338 * @flags: Initialization of PHY package 339 * @priv_size: Size of the shared private data @priv 340 * @priv: Driver private data shared across a PHY package 341 * 342 * Represents a shared structure between different phydev's in the same 343 * package, for example a quad PHY. See phy_package_join() and 344 * phy_package_leave(). 345 */ 346 struct phy_package_shared { 347 u8 base_addr; 348 /* With PHY package defined in DT this points to the PHY package node */ 349 struct device_node *np; 350 refcount_t refcnt; 351 unsigned long flags; 352 size_t priv_size; 353 354 /* private data pointer */ 355 /* note that this pointer is shared between different phydevs and 356 * the user has to take care of appropriate locking. It is allocated 357 * and freed automatically by phy_package_join() and 358 * phy_package_leave(). 359 */ 360 void *priv; 361 }; 362 363 /* used as bit number in atomic bitops */ 364 #define PHY_SHARED_F_INIT_DONE 0 365 #define PHY_SHARED_F_PROBE_DONE 1 366 367 /** 368 * struct mii_bus - Represents an MDIO bus 369 * 370 * @owner: Who owns this device 371 * @name: User friendly name for this MDIO device, or driver name 372 * @id: Unique identifier for this bus, typical from bus hierarchy 373 * @priv: Driver private data 374 * 375 * The Bus class for PHYs. Devices which provide access to 376 * PHYs should register using this structure 377 */ 378 struct mii_bus { 379 struct module *owner; 380 const char *name; 381 char id[MII_BUS_ID_SIZE]; 382 void *priv; 383 /** @read: Perform a read transfer on the bus */ 384 int (*read)(struct mii_bus *bus, int addr, int regnum); 385 /** @write: Perform a write transfer on the bus */ 386 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 387 /** @read_c45: Perform a C45 read transfer on the bus */ 388 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 389 /** @write_c45: Perform a C45 write transfer on the bus */ 390 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 391 int regnum, u16 val); 392 /** @reset: Perform a reset of the bus */ 393 int (*reset)(struct mii_bus *bus); 394 395 /** @stats: Statistic counters per device on the bus */ 396 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 397 398 /** 399 * @mdio_lock: A lock to ensure that only one thing can read/write 400 * the MDIO bus at a time 401 */ 402 struct mutex mdio_lock; 403 404 /** @parent: Parent device of this bus */ 405 struct device *parent; 406 /** @state: State of bus structure */ 407 enum { 408 MDIOBUS_ALLOCATED = 1, 409 MDIOBUS_REGISTERED, 410 MDIOBUS_UNREGISTERED, 411 MDIOBUS_RELEASED, 412 } state; 413 414 /** @dev: Kernel device representation */ 415 struct device dev; 416 417 /** @mdio_map: list of all MDIO devices on bus */ 418 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 419 420 /** @phy_mask: PHY addresses to be ignored when probing */ 421 u32 phy_mask; 422 423 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 424 u32 phy_ignore_ta_mask; 425 426 /** 427 * @irq: An array of interrupts, each PHY's interrupt at the index 428 * matching its address 429 */ 430 int irq[PHY_MAX_ADDR]; 431 432 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 433 int reset_delay_us; 434 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 435 int reset_post_delay_us; 436 /** @reset_gpiod: Reset GPIO descriptor pointer */ 437 struct gpio_desc *reset_gpiod; 438 439 /** @shared_lock: protect access to the shared element */ 440 struct mutex shared_lock; 441 442 /** @shared: shared state across different PHYs */ 443 struct phy_package_shared *shared[PHY_MAX_ADDR]; 444 }; 445 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 446 447 struct mii_bus *mdiobus_alloc_size(size_t size); 448 449 /** 450 * mdiobus_alloc - Allocate an MDIO bus structure 451 * 452 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 453 * for the driver to register the bus. 454 */ 455 static inline struct mii_bus *mdiobus_alloc(void) 456 { 457 return mdiobus_alloc_size(0); 458 } 459 460 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 461 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 462 struct module *owner); 463 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 464 #define devm_mdiobus_register(dev, bus) \ 465 __devm_mdiobus_register(dev, bus, THIS_MODULE) 466 467 void mdiobus_unregister(struct mii_bus *bus); 468 void mdiobus_free(struct mii_bus *bus); 469 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 470 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 471 { 472 return devm_mdiobus_alloc_size(dev, 0); 473 } 474 475 struct mii_bus *mdio_find_bus(const char *mdio_name); 476 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); 477 478 #define PHY_INTERRUPT_DISABLED false 479 #define PHY_INTERRUPT_ENABLED true 480 481 /** 482 * enum phy_state - PHY state machine states: 483 * 484 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 485 * should be called if and only if the PHY is in this state, 486 * given that the PHY device exists. 487 * - PHY driver probe function will set the state to @PHY_READY 488 * 489 * @PHY_READY: PHY is ready to send and receive packets, but the 490 * controller is not. By default, PHYs which do not implement 491 * probe will be set to this state by phy_probe(). 492 * - start will set the state to UP 493 * 494 * @PHY_UP: The PHY and attached device are ready to do work. 495 * Interrupts should be started here. 496 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 497 * 498 * @PHY_NOLINK: PHY is up, but not currently plugged in. 499 * - irq or timer will set @PHY_RUNNING if link comes back 500 * - phy_stop moves to @PHY_HALTED 501 * 502 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 503 * and/or receiving packets 504 * - irq or timer will set @PHY_NOLINK if link goes down 505 * - phy_stop moves to @PHY_HALTED 506 * 507 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 508 * is not expected to work, carrier will be indicated as down. PHY will be 509 * poll once per second, or on interrupt for it current state. 510 * Once complete, move to UP to restart the PHY. 511 * - phy_stop aborts the running test and moves to @PHY_HALTED 512 * 513 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. 514 * - phy_start moves to @PHY_UP 515 * 516 * @PHY_ERROR: PHY is up, but is in an error state. 517 * - phy_stop moves to @PHY_HALTED 518 */ 519 enum phy_state { 520 PHY_DOWN = 0, 521 PHY_READY, 522 PHY_HALTED, 523 PHY_ERROR, 524 PHY_UP, 525 PHY_RUNNING, 526 PHY_NOLINK, 527 PHY_CABLETEST, 528 }; 529 530 #define MDIO_MMD_NUM 32 531 532 /** 533 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 534 * @devices_in_package: IEEE 802.3 devices in package register value. 535 * @mmds_present: bit vector of MMDs present. 536 * @device_ids: The device identifer for each present device. 537 */ 538 struct phy_c45_device_ids { 539 u32 devices_in_package; 540 u32 mmds_present; 541 u32 device_ids[MDIO_MMD_NUM]; 542 }; 543 544 struct macsec_context; 545 struct macsec_ops; 546 547 /** 548 * struct phy_device - An instance of a PHY 549 * 550 * @mdio: MDIO bus this PHY is on 551 * @drv: Pointer to the driver for this PHY instance 552 * @devlink: Create a link between phy dev and mac dev, if the external phy 553 * used by current mac interface is managed by another mac interface. 554 * @phyindex: Unique id across the phy's parent tree of phys to address the PHY 555 * from userspace, similar to ifindex. A zero index means the PHY 556 * wasn't assigned an id yet. 557 * @phy_id: UID for this device found during discovery 558 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 559 * @is_c45: Set to true if this PHY uses clause 45 addressing. 560 * @is_internal: Set to true if this PHY is internal to a MAC. 561 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 562 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 563 * @has_fixups: Set to true if this PHY has fixups/quirks. 564 * @suspended: Set to true if this PHY has been suspended successfully. 565 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 566 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 567 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 568 * @downshifted_rate: Set true if link speed has been downshifted. 569 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 570 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 571 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN 572 * enabled. 573 * @state: State of the PHY for management purposes 574 * @dev_flags: Device-specific flags used by the PHY driver. 575 * 576 * - Bits [15:0] are free to use by the PHY driver to communicate 577 * driver specific behavior. 578 * - Bits [23:16] are currently reserved for future use. 579 * - Bits [31:24] are reserved for defining generic 580 * PHY driver behavior. 581 * @irq: IRQ number of the PHY's interrupt (-1 if none) 582 * @phylink: Pointer to phylink instance for this PHY 583 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 584 * @sfp_bus: SFP bus attached to this PHY's fiber port 585 * @attached_dev: The attached enet driver's device instance ptr 586 * @adjust_link: Callback for the enet controller to respond to changes: in the 587 * link state. 588 * @phy_link_change: Callback for phylink for notification of link change 589 * @macsec_ops: MACsec offloading ops. 590 * 591 * @speed: Current link speed 592 * @duplex: Current duplex 593 * @port: Current port 594 * @pause: Current pause 595 * @asym_pause: Current asymmetric pause 596 * @supported: Combined MAC/PHY supported linkmodes 597 * @advertising: Currently advertised linkmodes 598 * @adv_old: Saved advertised while power saving for WoL 599 * @supported_eee: supported PHY EEE linkmodes 600 * @advertising_eee: Currently advertised EEE linkmodes 601 * @enable_tx_lpi: When True, MAC should transmit LPI to PHY 602 * @eee_active: phylib private state, indicating that EEE has been negotiated 603 * @eee_cfg: User configuration of EEE 604 * @lp_advertising: Current link partner advertised linkmodes 605 * @host_interfaces: PHY interface modes supported by host 606 * @eee_disabled_modes: Energy efficient ethernet modes not to be advertised 607 * @autoneg: Flag autoneg being used 608 * @rate_matching: Current rate matching mode 609 * @link: Current link state 610 * @autoneg_complete: Flag auto negotiation of the link has completed 611 * @mdix: Current crossover 612 * @mdix_ctrl: User setting of crossover 613 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 614 * @interrupts: Flag interrupts have been enabled 615 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 616 * handling shall be postponed until PHY has resumed 617 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 618 * requiring a rerun of the interrupt handler after resume 619 * @default_timestamp: Flag indicating whether we are using the phy 620 * timestamp as the default one 621 * @interface: enum phy_interface_t value 622 * @possible_interfaces: bitmap if interface modes that the attached PHY 623 * will switch between depending on media speed. 624 * @skb: Netlink message for cable diagnostics 625 * @nest: Netlink nest used for cable diagnostics 626 * @ehdr: nNtlink header for cable diagnostics 627 * @phy_led_triggers: Array of LED triggers 628 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 629 * @led_link_trigger: LED trigger for link up/down 630 * @last_triggered: last LED trigger for link speed 631 * @leds: list of PHY LED structures 632 * @master_slave_set: User requested master/slave configuration 633 * @master_slave_get: Current master/slave advertisement 634 * @master_slave_state: Current master/slave configuration 635 * @mii_ts: Pointer to time stamper callbacks 636 * @psec: Pointer to Power Sourcing Equipment control struct 637 * @lock: Mutex for serialization access to PHY 638 * @state_queue: Work queue for state machine 639 * @link_down_events: Number of times link was lost 640 * @shared: Pointer to private data shared by phys in one package 641 * @priv: Pointer to driver private data 642 * 643 * interrupts currently only supports enabled or disabled, 644 * but could be changed in the future to support enabling 645 * and disabling specific interrupts 646 * 647 * Contains some infrastructure for polling and interrupt 648 * handling, as well as handling shifts in PHY hardware state 649 */ 650 struct phy_device { 651 struct mdio_device mdio; 652 653 /* Information about the PHY type */ 654 /* And management functions */ 655 const struct phy_driver *drv; 656 657 struct device_link *devlink; 658 659 u32 phyindex; 660 u32 phy_id; 661 662 struct phy_c45_device_ids c45_ids; 663 unsigned is_c45:1; 664 unsigned is_internal:1; 665 unsigned is_pseudo_fixed_link:1; 666 unsigned is_gigabit_capable:1; 667 unsigned has_fixups:1; 668 unsigned suspended:1; 669 unsigned suspended_by_mdio_bus:1; 670 unsigned sysfs_links:1; 671 unsigned loopback_enabled:1; 672 unsigned downshifted_rate:1; 673 unsigned is_on_sfp_module:1; 674 unsigned mac_managed_pm:1; 675 unsigned wol_enabled:1; 676 677 unsigned autoneg:1; 678 /* The most recently read link state */ 679 unsigned link:1; 680 unsigned autoneg_complete:1; 681 682 /* Interrupts are enabled */ 683 unsigned interrupts:1; 684 unsigned irq_suspended:1; 685 unsigned irq_rerun:1; 686 687 unsigned default_timestamp:1; 688 689 int rate_matching; 690 691 enum phy_state state; 692 693 u32 dev_flags; 694 695 phy_interface_t interface; 696 DECLARE_PHY_INTERFACE_MASK(possible_interfaces); 697 698 /* 699 * forced speed & duplex (no autoneg) 700 * partner speed & duplex & pause (autoneg) 701 */ 702 int speed; 703 int duplex; 704 int port; 705 int pause; 706 int asym_pause; 707 u8 master_slave_get; 708 u8 master_slave_set; 709 u8 master_slave_state; 710 711 /* Union of PHY and Attached devices' supported link modes */ 712 /* See ethtool.h for more info */ 713 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 714 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 715 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 716 /* used with phy_speed_down */ 717 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 718 /* used for eee validation and configuration*/ 719 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee); 720 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee); 721 /* Energy efficient ethernet modes which should be prohibited */ 722 __ETHTOOL_DECLARE_LINK_MODE_MASK(eee_disabled_modes); 723 bool enable_tx_lpi; 724 bool eee_active; 725 struct eee_config eee_cfg; 726 727 /* Host supported PHY interface types. Should be ignored if empty. */ 728 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 729 730 #ifdef CONFIG_LED_TRIGGER_PHY 731 struct phy_led_trigger *phy_led_triggers; 732 unsigned int phy_num_led_triggers; 733 struct phy_led_trigger *last_triggered; 734 735 struct phy_led_trigger *led_link_trigger; 736 #endif 737 struct list_head leds; 738 739 /* 740 * Interrupt number for this PHY 741 * -1 means no interrupt 742 */ 743 int irq; 744 745 /* private data pointer */ 746 /* For use by PHYs to maintain extra state */ 747 void *priv; 748 749 /* shared data pointer */ 750 /* For use by PHYs inside the same package that need a shared state. */ 751 struct phy_package_shared *shared; 752 753 /* Reporting cable test results */ 754 struct sk_buff *skb; 755 void *ehdr; 756 struct nlattr *nest; 757 758 /* Interrupt and Polling infrastructure */ 759 struct delayed_work state_queue; 760 761 struct mutex lock; 762 763 /* This may be modified under the rtnl lock */ 764 bool sfp_bus_attached; 765 struct sfp_bus *sfp_bus; 766 struct phylink *phylink; 767 struct net_device *attached_dev; 768 struct mii_timestamper *mii_ts; 769 struct pse_control *psec; 770 771 u8 mdix; 772 u8 mdix_ctrl; 773 774 int pma_extable; 775 776 unsigned int link_down_events; 777 778 void (*phy_link_change)(struct phy_device *phydev, bool up); 779 void (*adjust_link)(struct net_device *dev); 780 781 #if IS_ENABLED(CONFIG_MACSEC) 782 /* MACsec management functions */ 783 const struct macsec_ops *macsec_ops; 784 #endif 785 }; 786 787 /* Generic phy_device::dev_flags */ 788 #define PHY_F_NO_IRQ 0x80000000 789 #define PHY_F_RXC_ALWAYS_ON 0x40000000 790 791 static inline struct phy_device *to_phy_device(const struct device *dev) 792 { 793 return container_of(to_mdio_device(dev), struct phy_device, mdio); 794 } 795 796 /** 797 * struct phy_tdr_config - Configuration of a TDR raw test 798 * 799 * @first: Distance for first data collection point 800 * @last: Distance for last data collection point 801 * @step: Step between data collection points 802 * @pair: Bitmap of cable pairs to collect data for 803 * 804 * A structure containing possible configuration parameters 805 * for a TDR cable test. The driver does not need to implement 806 * all the parameters, but should report what is actually used. 807 * All distances are in centimeters. 808 */ 809 struct phy_tdr_config { 810 u32 first; 811 u32 last; 812 u32 step; 813 s8 pair; 814 }; 815 #define PHY_PAIR_ALL -1 816 817 /** 818 * enum link_inband_signalling - in-band signalling modes that are supported 819 * 820 * @LINK_INBAND_DISABLE: in-band signalling can be disabled 821 * @LINK_INBAND_ENABLE: in-band signalling can be enabled without bypass 822 * @LINK_INBAND_BYPASS: in-band signalling can be enabled with bypass 823 * 824 * The possible and required bits can only be used if the valid bit is set. 825 * If possible is clear, that means inband signalling can not be used. 826 * Required is only valid when possible is set, and means that inband 827 * signalling must be used. 828 */ 829 enum link_inband_signalling { 830 LINK_INBAND_DISABLE = BIT(0), 831 LINK_INBAND_ENABLE = BIT(1), 832 LINK_INBAND_BYPASS = BIT(2), 833 }; 834 835 /** 836 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 837 * Avoidance) Reconciliation Sublayer. 838 * 839 * @version: read-only PLCA register map version. -1 = not available. Ignored 840 * when setting the configuration. Format is the same as reported by the PLCA 841 * IDVER register (31.CA00). -1 = not available. 842 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 843 * set. 0 = disabled, anything else = enabled. 844 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 845 * Allowed values [0 .. 254]. 255 = node disabled. 846 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 847 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 848 * set. Allowed values [1 .. 255]. 849 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 850 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 851 * more details. The to_timer shall be set equal over all nodes. 852 * -1 = not available / don't set. Allowed values [0 .. 255]. 853 * @burst_cnt: controls how many additional frames a node is allowed to send in 854 * single transmit opportunity (TO). The default value of 0 means that the 855 * node is allowed exactly one frame per TO. A value of 1 allows two frames 856 * per TO, and so on. -1 = not available / don't set. 857 * Allowed values [0 .. 255]. 858 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 859 * frame before interrupting the burst. This value should be set to a value 860 * greater than the MAC inter-packet gap (which is typically 96 bits). 861 * -1 = not available / don't set. Allowed values [0 .. 255]. 862 * 863 * A structure containing configuration parameters for setting/getting the PLCA 864 * RS configuration. The driver does not need to implement all the parameters, 865 * but should report what is actually used. 866 */ 867 struct phy_plca_cfg { 868 int version; 869 int enabled; 870 int node_id; 871 int node_cnt; 872 int to_tmr; 873 int burst_cnt; 874 int burst_tmr; 875 }; 876 877 /** 878 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 879 * Avoidance) Reconciliation Sublayer. 880 * 881 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 882 * register(31.CA03), indicating BEACON activity. 883 * 884 * A structure containing status information of the PLCA RS configuration. 885 * The driver does not need to implement all the parameters, but should report 886 * what is actually used. 887 */ 888 struct phy_plca_status { 889 bool pst; 890 }; 891 892 /* Modes for PHY LED configuration */ 893 enum phy_led_modes { 894 PHY_LED_ACTIVE_HIGH = 0, 895 PHY_LED_ACTIVE_LOW = 1, 896 PHY_LED_INACTIVE_HIGH_IMPEDANCE = 2, 897 898 /* keep it last */ 899 __PHY_LED_MODES_NUM, 900 }; 901 902 /** 903 * struct phy_led: An LED driven by the PHY 904 * 905 * @list: List of LEDs 906 * @phydev: PHY this LED is attached to 907 * @led_cdev: Standard LED class structure 908 * @index: Number of the LED 909 */ 910 struct phy_led { 911 struct list_head list; 912 struct phy_device *phydev; 913 struct led_classdev led_cdev; 914 u8 index; 915 }; 916 917 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev) 918 919 /** 920 * struct phy_driver - Driver structure for a particular PHY type 921 * 922 * @mdiodrv: Data common to all MDIO devices 923 * @phy_id: The result of reading the UID registers of this PHY 924 * type, and ANDing them with the phy_id_mask. This driver 925 * only works for PHYs with IDs which match this field 926 * @name: The friendly name of this PHY type 927 * @phy_id_mask: Defines the important bits of the phy_id 928 * @features: A mandatory list of features (speed, duplex, etc) 929 * supported by this PHY 930 * @flags: A bitfield defining certain other features this PHY 931 * supports (like interrupts) 932 * @driver_data: Static driver data 933 * 934 * All functions are optional. If config_aneg or read_status 935 * are not implemented, the phy core uses the genphy versions. 936 * Note that none of these functions should be called from 937 * interrupt time. The goal is for the bus read/write functions 938 * to be able to block when the bus transaction is happening, 939 * and be freed up by an interrupt (The MPC85xx has this ability, 940 * though it is not currently supported in the driver). 941 */ 942 struct phy_driver { 943 struct mdio_driver_common mdiodrv; 944 u32 phy_id; 945 char *name; 946 u32 phy_id_mask; 947 const unsigned long * const features; 948 u32 flags; 949 const void *driver_data; 950 951 /** 952 * @soft_reset: Called to issue a PHY software reset 953 */ 954 int (*soft_reset)(struct phy_device *phydev); 955 956 /** 957 * @config_init: Called to initialize the PHY, 958 * including after a reset 959 */ 960 int (*config_init)(struct phy_device *phydev); 961 962 /** 963 * @probe: Called during discovery. Used to set 964 * up device-specific structures, if any 965 */ 966 int (*probe)(struct phy_device *phydev); 967 968 /** 969 * @get_features: Probe the hardware to determine what 970 * abilities it has. Should only set phydev->supported. 971 */ 972 int (*get_features)(struct phy_device *phydev); 973 974 /** 975 * @inband_caps: query whether in-band is supported for the given PHY 976 * interface mode. Returns a bitmask of bits defined by enum 977 * link_inband_signalling. 978 */ 979 unsigned int (*inband_caps)(struct phy_device *phydev, 980 phy_interface_t interface); 981 982 /** 983 * @config_inband: configure in-band mode for the PHY 984 */ 985 int (*config_inband)(struct phy_device *phydev, unsigned int modes); 986 987 /** 988 * @get_rate_matching: Get the supported type of rate matching for a 989 * particular phy interface. This is used by phy consumers to determine 990 * whether to advertise lower-speed modes for that interface. It is 991 * assumed that if a rate matching mode is supported on an interface, 992 * then that interface's rate can be adapted to all slower link speeds 993 * supported by the phy. If the interface is not supported, this should 994 * return %RATE_MATCH_NONE. 995 */ 996 int (*get_rate_matching)(struct phy_device *phydev, 997 phy_interface_t iface); 998 999 /* PHY Power Management */ 1000 /** @suspend: Suspend the hardware, saving state if needed */ 1001 int (*suspend)(struct phy_device *phydev); 1002 /** @resume: Resume the hardware, restoring state if needed */ 1003 int (*resume)(struct phy_device *phydev); 1004 1005 /** 1006 * @config_aneg: Configures the advertisement and resets 1007 * autonegotiation if phydev->autoneg is on, 1008 * forces the speed to the current settings in phydev 1009 * if phydev->autoneg is off 1010 */ 1011 int (*config_aneg)(struct phy_device *phydev); 1012 1013 /** @aneg_done: Determines the auto negotiation result */ 1014 int (*aneg_done)(struct phy_device *phydev); 1015 1016 /** @read_status: Determines the negotiated speed and duplex */ 1017 int (*read_status)(struct phy_device *phydev); 1018 1019 /** 1020 * @config_intr: Enables or disables interrupts. 1021 * It should also clear any pending interrupts prior to enabling the 1022 * IRQs and after disabling them. 1023 */ 1024 int (*config_intr)(struct phy_device *phydev); 1025 1026 /** @handle_interrupt: Override default interrupt handling */ 1027 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 1028 1029 /** @remove: Clears up any memory if needed */ 1030 void (*remove)(struct phy_device *phydev); 1031 1032 /** 1033 * @match_phy_device: Returns true if this is a suitable 1034 * driver for the given phydev. If NULL, matching is based on 1035 * phy_id and phy_id_mask. 1036 */ 1037 int (*match_phy_device)(struct phy_device *phydev); 1038 1039 /** 1040 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 1041 * register changes to enable Wake on LAN, so set_wol is 1042 * provided to be called in the ethernet driver's set_wol 1043 * function. 1044 */ 1045 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1046 1047 /** 1048 * @get_wol: See set_wol, but for checking whether Wake on LAN 1049 * is enabled. 1050 */ 1051 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1052 1053 /** 1054 * @link_change_notify: Called to inform a PHY device driver 1055 * when the core is about to change the link state. This 1056 * callback is supposed to be used as fixup hook for drivers 1057 * that need to take action when the link state 1058 * changes. Drivers are by no means allowed to mess with the 1059 * PHY device structure in their implementations. 1060 */ 1061 void (*link_change_notify)(struct phy_device *dev); 1062 1063 /** 1064 * @read_mmd: PHY specific driver override for reading a MMD 1065 * register. This function is optional for PHY specific 1066 * drivers. When not provided, the default MMD read function 1067 * will be used by phy_read_mmd(), which will use either a 1068 * direct read for Clause 45 PHYs or an indirect read for 1069 * Clause 22 PHYs. devnum is the MMD device number within the 1070 * PHY device, regnum is the register within the selected MMD 1071 * device. 1072 */ 1073 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 1074 1075 /** 1076 * @write_mmd: PHY specific driver override for writing a MMD 1077 * register. This function is optional for PHY specific 1078 * drivers. When not provided, the default MMD write function 1079 * will be used by phy_write_mmd(), which will use either a 1080 * direct write for Clause 45 PHYs, or an indirect write for 1081 * Clause 22 PHYs. devnum is the MMD device number within the 1082 * PHY device, regnum is the register within the selected MMD 1083 * device. val is the value to be written. 1084 */ 1085 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 1086 u16 val); 1087 1088 /** @read_page: Return the current PHY register page number */ 1089 int (*read_page)(struct phy_device *dev); 1090 /** @write_page: Set the current PHY register page number */ 1091 int (*write_page)(struct phy_device *dev, int page); 1092 1093 /** 1094 * @module_info: Get the size and type of the eeprom contained 1095 * within a plug-in module 1096 */ 1097 int (*module_info)(struct phy_device *dev, 1098 struct ethtool_modinfo *modinfo); 1099 1100 /** 1101 * @module_eeprom: Get the eeprom information from the plug-in 1102 * module 1103 */ 1104 int (*module_eeprom)(struct phy_device *dev, 1105 struct ethtool_eeprom *ee, u8 *data); 1106 1107 /** @cable_test_start: Start a cable test */ 1108 int (*cable_test_start)(struct phy_device *dev); 1109 1110 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1111 int (*cable_test_tdr_start)(struct phy_device *dev, 1112 const struct phy_tdr_config *config); 1113 1114 /** 1115 * @cable_test_get_status: Once per second, or on interrupt, 1116 * request the status of the test. 1117 */ 1118 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1119 1120 /* Get statistics from the PHY using ethtool */ 1121 /** 1122 * @get_phy_stats: Retrieve PHY statistics. 1123 * @dev: The PHY device for which the statistics are retrieved. 1124 * @eth_stats: structure where Ethernet PHY stats will be stored. 1125 * @stats: structure where additional PHY-specific stats will be stored. 1126 * 1127 * Retrieves the supported PHY statistics and populates the provided 1128 * structures. The input structures are pre-initialized with 1129 * `ETHTOOL_STAT_NOT_SET`, and the driver must only modify members 1130 * corresponding to supported statistics. Unmodified members will remain 1131 * set to `ETHTOOL_STAT_NOT_SET` and will not be returned to userspace. 1132 */ 1133 void (*get_phy_stats)(struct phy_device *dev, 1134 struct ethtool_eth_phy_stats *eth_stats, 1135 struct ethtool_phy_stats *stats); 1136 1137 /** 1138 * @get_link_stats: Retrieve link statistics. 1139 * @dev: The PHY device for which the statistics are retrieved. 1140 * @link_stats: structure where link-specific stats will be stored. 1141 * 1142 * Retrieves link-related statistics for the given PHY device. The input 1143 * structure is pre-initialized with `ETHTOOL_STAT_NOT_SET`, and the 1144 * driver must only modify members corresponding to supported 1145 * statistics. Unmodified members will remain set to 1146 * `ETHTOOL_STAT_NOT_SET` and will not be returned to userspace. 1147 */ 1148 void (*get_link_stats)(struct phy_device *dev, 1149 struct ethtool_link_ext_stats *link_stats); 1150 1151 /** 1152 * @update_stats: Trigger periodic statistics updates. 1153 * @dev: The PHY device for which statistics updates are triggered. 1154 * 1155 * Periodically gathers statistics from the PHY device to update locally 1156 * maintained 64-bit counters. This is necessary for PHYs that implement 1157 * reduced-width counters (e.g., 16-bit or 32-bit) which can overflow 1158 * more frequently compared to 64-bit counters. By invoking this 1159 * callback, drivers can fetch the current counter values, handle 1160 * overflow detection, and accumulate the results into local 64-bit 1161 * counters for accurate reporting through the `get_phy_stats` and 1162 * `get_link_stats` interfaces. 1163 * 1164 * Return: 0 on success or a negative error code on failure. 1165 */ 1166 int (*update_stats)(struct phy_device *dev); 1167 1168 /** @get_sset_count: Number of statistic counters */ 1169 int (*get_sset_count)(struct phy_device *dev); 1170 /** @get_strings: Names of the statistic counters */ 1171 void (*get_strings)(struct phy_device *dev, u8 *data); 1172 /** @get_stats: Return the statistic counter values */ 1173 void (*get_stats)(struct phy_device *dev, 1174 struct ethtool_stats *stats, u64 *data); 1175 1176 /* Get and Set PHY tunables */ 1177 /** @get_tunable: Return the value of a tunable */ 1178 int (*get_tunable)(struct phy_device *dev, 1179 struct ethtool_tunable *tuna, void *data); 1180 /** @set_tunable: Set the value of a tunable */ 1181 int (*set_tunable)(struct phy_device *dev, 1182 struct ethtool_tunable *tuna, 1183 const void *data); 1184 /** @set_loopback: Set the loopback mood of the PHY */ 1185 int (*set_loopback)(struct phy_device *dev, bool enable); 1186 /** @get_sqi: Get the signal quality indication */ 1187 int (*get_sqi)(struct phy_device *dev); 1188 /** @get_sqi_max: Get the maximum signal quality indication */ 1189 int (*get_sqi_max)(struct phy_device *dev); 1190 1191 /* PLCA RS interface */ 1192 /** @get_plca_cfg: Return the current PLCA configuration */ 1193 int (*get_plca_cfg)(struct phy_device *dev, 1194 struct phy_plca_cfg *plca_cfg); 1195 /** @set_plca_cfg: Set the PLCA configuration */ 1196 int (*set_plca_cfg)(struct phy_device *dev, 1197 const struct phy_plca_cfg *plca_cfg); 1198 /** @get_plca_status: Return the current PLCA status info */ 1199 int (*get_plca_status)(struct phy_device *dev, 1200 struct phy_plca_status *plca_st); 1201 1202 /** 1203 * @led_brightness_set: Set a PHY LED brightness. Index 1204 * indicates which of the PHYs led should be set. Value 1205 * follows the standard LED class meaning, e.g. LED_OFF, 1206 * LED_HALF, LED_FULL. 1207 */ 1208 int (*led_brightness_set)(struct phy_device *dev, 1209 u8 index, enum led_brightness value); 1210 1211 /** 1212 * @led_blink_set: Set a PHY LED blinking. Index indicates 1213 * which of the PHYs led should be configured to blink. Delays 1214 * are in milliseconds and if both are zero then a sensible 1215 * default should be chosen. The call should adjust the 1216 * timings in that case and if it can't match the values 1217 * specified exactly. 1218 */ 1219 int (*led_blink_set)(struct phy_device *dev, u8 index, 1220 unsigned long *delay_on, 1221 unsigned long *delay_off); 1222 /** 1223 * @led_hw_is_supported: Can the HW support the given rules. 1224 * @dev: PHY device which has the LED 1225 * @index: Which LED of the PHY device 1226 * @rules The core is interested in these rules 1227 * 1228 * Return 0 if yes, -EOPNOTSUPP if not, or an error code. 1229 */ 1230 int (*led_hw_is_supported)(struct phy_device *dev, u8 index, 1231 unsigned long rules); 1232 /** 1233 * @led_hw_control_set: Set the HW to control the LED 1234 * @dev: PHY device which has the LED 1235 * @index: Which LED of the PHY device 1236 * @rules The rules used to control the LED 1237 * 1238 * Returns 0, or a an error code. 1239 */ 1240 int (*led_hw_control_set)(struct phy_device *dev, u8 index, 1241 unsigned long rules); 1242 /** 1243 * @led_hw_control_get: Get how the HW is controlling the LED 1244 * @dev: PHY device which has the LED 1245 * @index: Which LED of the PHY device 1246 * @rules Pointer to the rules used to control the LED 1247 * 1248 * Set *@rules to how the HW is currently blinking. Returns 0 1249 * on success, or a error code if the current blinking cannot 1250 * be represented in rules, or some other error happens. 1251 */ 1252 int (*led_hw_control_get)(struct phy_device *dev, u8 index, 1253 unsigned long *rules); 1254 1255 /** 1256 * @led_polarity_set: Set the LED polarity modes 1257 * @dev: PHY device which has the LED 1258 * @index: Which LED of the PHY device 1259 * @modes: bitmap of LED polarity modes 1260 * 1261 * Configure LED with all the required polarity modes in @modes 1262 * to make it correctly turn ON or OFF. 1263 * 1264 * Returns 0, or an error code. 1265 */ 1266 int (*led_polarity_set)(struct phy_device *dev, int index, 1267 unsigned long modes); 1268 1269 /** 1270 * @get_next_update_time: Get the time until the next update event 1271 * @dev: PHY device 1272 * 1273 * Callback to determine the time (in jiffies) until the next 1274 * update event for the PHY state machine. Allows PHY drivers to 1275 * dynamically adjust polling intervals based on link state or other 1276 * conditions. 1277 * 1278 * Returns the time in jiffies until the next update event. 1279 */ 1280 unsigned int (*get_next_update_time)(struct phy_device *dev); 1281 }; 1282 #define to_phy_driver(d) container_of_const(to_mdio_common_driver(d), \ 1283 struct phy_driver, mdiodrv) 1284 1285 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 1286 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 1287 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 1288 1289 /** 1290 * phy_id_compare - compare @id1 with @id2 taking account of @mask 1291 * @id1: first PHY ID 1292 * @id2: second PHY ID 1293 * @mask: the PHY ID mask, set bits are significant in matching 1294 * 1295 * Return true if the bits from @id1 and @id2 specified by @mask match. 1296 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask). 1297 */ 1298 static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask) 1299 { 1300 return !((id1 ^ id2) & mask); 1301 } 1302 1303 /** 1304 * phydev_id_compare - compare @id with the PHY's Clause 22 ID 1305 * @phydev: the PHY device 1306 * @id: the PHY ID to be matched 1307 * 1308 * Compare the @phydev clause 22 ID with the provided @id and return true or 1309 * false depending whether it matches, using the bound driver mask. The 1310 * @phydev must be bound to a driver. 1311 */ 1312 static inline bool phydev_id_compare(struct phy_device *phydev, u32 id) 1313 { 1314 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask); 1315 } 1316 1317 const char *phy_speed_to_str(int speed); 1318 const char *phy_duplex_to_str(unsigned int duplex); 1319 const char *phy_rate_matching_to_str(int rate_matching); 1320 1321 int phy_interface_num_ports(phy_interface_t interface); 1322 1323 /* A structure for mapping a particular speed and duplex 1324 * combination to a particular SUPPORTED and ADVERTISED value 1325 */ 1326 struct phy_setting { 1327 u32 speed; 1328 u8 duplex; 1329 u8 bit; 1330 }; 1331 1332 const struct phy_setting * 1333 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 1334 bool exact); 1335 size_t phy_speeds(unsigned int *speeds, size_t size, 1336 unsigned long *mask); 1337 void of_set_phy_supported(struct phy_device *phydev); 1338 void of_set_phy_eee_broken(struct phy_device *phydev); 1339 void of_set_phy_timing_role(struct phy_device *phydev); 1340 int phy_speed_down_core(struct phy_device *phydev); 1341 1342 /** 1343 * phy_is_started - Convenience function to check whether PHY is started 1344 * @phydev: The phy_device struct 1345 */ 1346 static inline bool phy_is_started(struct phy_device *phydev) 1347 { 1348 return phydev->state >= PHY_UP; 1349 } 1350 1351 /** 1352 * phy_disable_eee_mode - Don't advertise an EEE mode. 1353 * @phydev: The phy_device struct 1354 * @link_mode: The EEE mode to be disabled 1355 */ 1356 static inline void phy_disable_eee_mode(struct phy_device *phydev, u32 link_mode) 1357 { 1358 linkmode_set_bit(link_mode, phydev->eee_disabled_modes); 1359 } 1360 1361 void phy_resolve_aneg_pause(struct phy_device *phydev); 1362 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1363 void phy_check_downshift(struct phy_device *phydev); 1364 1365 /** 1366 * phy_read - Convenience function for reading a given PHY register 1367 * @phydev: the phy_device struct 1368 * @regnum: register number to read 1369 * 1370 * NOTE: MUST NOT be called from interrupt context, 1371 * because the bus read/write functions may wait for an interrupt 1372 * to conclude the operation. 1373 */ 1374 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1375 { 1376 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1377 } 1378 1379 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1380 timeout_us, sleep_before_read) \ 1381 ({ \ 1382 int __ret, __val; \ 1383 __ret = read_poll_timeout(__val = phy_read, val, \ 1384 __val < 0 || (cond), \ 1385 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1386 if (__val < 0) \ 1387 __ret = __val; \ 1388 if (__ret) \ 1389 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1390 __ret; \ 1391 }) 1392 1393 /** 1394 * __phy_read - convenience function for reading a given PHY register 1395 * @phydev: the phy_device struct 1396 * @regnum: register number to read 1397 * 1398 * The caller must have taken the MDIO bus lock. 1399 */ 1400 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1401 { 1402 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1403 } 1404 1405 /** 1406 * phy_write - Convenience function for writing a given PHY register 1407 * @phydev: the phy_device struct 1408 * @regnum: register number to write 1409 * @val: value to write to @regnum 1410 * 1411 * NOTE: MUST NOT be called from interrupt context, 1412 * because the bus read/write functions may wait for an interrupt 1413 * to conclude the operation. 1414 */ 1415 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1416 { 1417 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1418 } 1419 1420 /** 1421 * __phy_write - Convenience function for writing a given PHY register 1422 * @phydev: the phy_device struct 1423 * @regnum: register number to write 1424 * @val: value to write to @regnum 1425 * 1426 * The caller must have taken the MDIO bus lock. 1427 */ 1428 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1429 { 1430 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1431 val); 1432 } 1433 1434 /** 1435 * __phy_modify_changed() - Convenience function for modifying a PHY register 1436 * @phydev: a pointer to a &struct phy_device 1437 * @regnum: register number 1438 * @mask: bit mask of bits to clear 1439 * @set: bit mask of bits to set 1440 * 1441 * Unlocked helper function which allows a PHY register to be modified as 1442 * new register value = (old register value & ~mask) | set 1443 * 1444 * Returns negative errno, 0 if there was no change, and 1 in case of change 1445 */ 1446 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1447 u16 mask, u16 set) 1448 { 1449 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1450 regnum, mask, set); 1451 } 1452 1453 /* 1454 * phy_read_mmd - Convenience function for reading a register 1455 * from an MMD on a given PHY. 1456 */ 1457 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1458 1459 /** 1460 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1461 * condition is met or a timeout occurs 1462 * 1463 * @phydev: The phy_device struct 1464 * @devaddr: The MMD to read from 1465 * @regnum: The register on the MMD to read 1466 * @val: Variable to read the register into 1467 * @cond: Break condition (usually involving @val) 1468 * @sleep_us: Maximum time to sleep between reads in us (0 tight-loops). Please 1469 * read usleep_range() function description for details and 1470 * limitations. 1471 * @timeout_us: Timeout in us, 0 means never timeout 1472 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1473 * 1474 * Returns: 0 on success and -ETIMEDOUT upon a timeout. In either 1475 * case, the last read value at @args is stored in @val. Must not 1476 * be called from atomic context if sleep_us or timeout_us are used. 1477 */ 1478 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1479 sleep_us, timeout_us, sleep_before_read) \ 1480 ({ \ 1481 int __ret, __val; \ 1482 __ret = read_poll_timeout(__val = phy_read_mmd, val, \ 1483 __val < 0 || (cond), \ 1484 sleep_us, timeout_us, sleep_before_read, \ 1485 phydev, devaddr, regnum); \ 1486 if (__val < 0) \ 1487 __ret = __val; \ 1488 if (__ret) \ 1489 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1490 __ret; \ 1491 }) 1492 1493 /* 1494 * __phy_read_mmd - Convenience function for reading a register 1495 * from an MMD on a given PHY. 1496 */ 1497 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1498 1499 /* 1500 * phy_write_mmd - Convenience function for writing a register 1501 * on an MMD on a given PHY. 1502 */ 1503 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1504 1505 /* 1506 * __phy_write_mmd - Convenience function for writing a register 1507 * on an MMD on a given PHY. 1508 */ 1509 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1510 1511 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1512 u16 set); 1513 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1514 u16 set); 1515 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1516 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1517 1518 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1519 u16 mask, u16 set); 1520 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1521 u16 mask, u16 set); 1522 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1523 u16 mask, u16 set); 1524 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1525 u16 mask, u16 set); 1526 1527 /** 1528 * __phy_set_bits - Convenience function for setting bits in a PHY register 1529 * @phydev: the phy_device struct 1530 * @regnum: register number to write 1531 * @val: bits to set 1532 * 1533 * The caller must have taken the MDIO bus lock. 1534 */ 1535 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1536 { 1537 return __phy_modify(phydev, regnum, 0, val); 1538 } 1539 1540 /** 1541 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1542 * @phydev: the phy_device struct 1543 * @regnum: register number to write 1544 * @val: bits to clear 1545 * 1546 * The caller must have taken the MDIO bus lock. 1547 */ 1548 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1549 u16 val) 1550 { 1551 return __phy_modify(phydev, regnum, val, 0); 1552 } 1553 1554 /** 1555 * phy_set_bits - Convenience function for setting bits in a PHY register 1556 * @phydev: the phy_device struct 1557 * @regnum: register number to write 1558 * @val: bits to set 1559 */ 1560 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1561 { 1562 return phy_modify(phydev, regnum, 0, val); 1563 } 1564 1565 /** 1566 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1567 * @phydev: the phy_device struct 1568 * @regnum: register number to write 1569 * @val: bits to clear 1570 */ 1571 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1572 { 1573 return phy_modify(phydev, regnum, val, 0); 1574 } 1575 1576 /** 1577 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1578 * on MMD 1579 * @phydev: the phy_device struct 1580 * @devad: the MMD containing register to modify 1581 * @regnum: register number to modify 1582 * @val: bits to set 1583 * 1584 * The caller must have taken the MDIO bus lock. 1585 */ 1586 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1587 u32 regnum, u16 val) 1588 { 1589 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1590 } 1591 1592 /** 1593 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1594 * on MMD 1595 * @phydev: the phy_device struct 1596 * @devad: the MMD containing register to modify 1597 * @regnum: register number to modify 1598 * @val: bits to clear 1599 * 1600 * The caller must have taken the MDIO bus lock. 1601 */ 1602 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1603 u32 regnum, u16 val) 1604 { 1605 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1606 } 1607 1608 /** 1609 * phy_set_bits_mmd - Convenience function for setting bits in a register 1610 * on MMD 1611 * @phydev: the phy_device struct 1612 * @devad: the MMD containing register to modify 1613 * @regnum: register number to modify 1614 * @val: bits to set 1615 */ 1616 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1617 u32 regnum, u16 val) 1618 { 1619 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1620 } 1621 1622 /** 1623 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1624 * on MMD 1625 * @phydev: the phy_device struct 1626 * @devad: the MMD containing register to modify 1627 * @regnum: register number to modify 1628 * @val: bits to clear 1629 */ 1630 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1631 u32 regnum, u16 val) 1632 { 1633 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1634 } 1635 1636 /** 1637 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1638 * @phydev: the phy_device struct 1639 * 1640 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1641 * PHY_MAC_INTERRUPT 1642 */ 1643 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1644 { 1645 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1646 } 1647 1648 /** 1649 * phy_polling_mode - Convenience function for testing whether polling is 1650 * used to detect PHY status changes 1651 * @phydev: the phy_device struct 1652 */ 1653 static inline bool phy_polling_mode(struct phy_device *phydev) 1654 { 1655 if (phydev->state == PHY_CABLETEST) 1656 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1657 return true; 1658 1659 if (phydev->drv->update_stats) 1660 return true; 1661 1662 return phydev->irq == PHY_POLL; 1663 } 1664 1665 /** 1666 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1667 * @phydev: the phy_device struct 1668 */ 1669 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1670 { 1671 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1672 } 1673 1674 /** 1675 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1676 * @phydev: the phy_device struct 1677 */ 1678 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1679 { 1680 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1681 } 1682 1683 /** 1684 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1685 * PTP hardware clock capabilities. 1686 * @phydev: the phy_device struct 1687 */ 1688 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1689 { 1690 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1691 } 1692 1693 /** 1694 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1695 * @phydev: the phy_device struct 1696 */ 1697 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1698 { 1699 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1700 } 1701 1702 static inline int phy_hwtstamp(struct phy_device *phydev, 1703 struct kernel_hwtstamp_config *cfg, 1704 struct netlink_ext_ack *extack) 1705 { 1706 return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack); 1707 } 1708 1709 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1710 int type) 1711 { 1712 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1713 } 1714 1715 static inline int phy_ts_info(struct phy_device *phydev, 1716 struct kernel_ethtool_ts_info *tsinfo) 1717 { 1718 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1719 } 1720 1721 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1722 int type) 1723 { 1724 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1725 } 1726 1727 /** 1728 * phy_is_default_hwtstamp - Is the PHY hwtstamp the default timestamp 1729 * @phydev: Pointer to phy_device 1730 * 1731 * This is used to get default timestamping device taking into account 1732 * the new API choice, which is selecting the timestamping from MAC by 1733 * default if the phydev does not have default_timestamp flag enabled. 1734 * 1735 * Return: True if phy is the default hw timestamp, false otherwise. 1736 */ 1737 static inline bool phy_is_default_hwtstamp(struct phy_device *phydev) 1738 { 1739 return phy_has_hwtstamp(phydev) && phydev->default_timestamp; 1740 } 1741 1742 /** 1743 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1744 * @phydev: the phy_device struct 1745 */ 1746 static inline bool phy_on_sfp(struct phy_device *phydev) 1747 { 1748 return phydev->is_on_sfp_module; 1749 } 1750 1751 /** 1752 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1753 * PHY interface mode is RGMII (all variants) 1754 * @mode: the &phy_interface_t enum 1755 */ 1756 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1757 { 1758 return mode >= PHY_INTERFACE_MODE_RGMII && 1759 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1760 }; 1761 1762 /** 1763 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1764 * negotiation 1765 * @mode: one of &enum phy_interface_t 1766 * 1767 * Returns true if the PHY interface mode uses the 16-bit negotiation 1768 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1769 */ 1770 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1771 { 1772 return mode == PHY_INTERFACE_MODE_1000BASEX || 1773 mode == PHY_INTERFACE_MODE_2500BASEX; 1774 } 1775 1776 /** 1777 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1778 * is RGMII (all variants) 1779 * @phydev: the phy_device struct 1780 */ 1781 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1782 { 1783 return phy_interface_mode_is_rgmii(phydev->interface); 1784 }; 1785 1786 /** 1787 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1788 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1789 * @phydev: the phy_device struct 1790 */ 1791 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1792 { 1793 return phydev->is_pseudo_fixed_link; 1794 } 1795 1796 int phy_save_page(struct phy_device *phydev); 1797 int phy_select_page(struct phy_device *phydev, int page); 1798 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1799 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1800 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1801 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1802 u16 mask, u16 set); 1803 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1804 u16 mask, u16 set); 1805 1806 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1807 bool is_c45, 1808 struct phy_c45_device_ids *c45_ids); 1809 #if IS_ENABLED(CONFIG_PHYLIB) 1810 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1811 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1812 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1813 struct phy_device *device_phy_find_device(struct device *dev); 1814 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode); 1815 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1816 int phy_device_register(struct phy_device *phy); 1817 void phy_device_free(struct phy_device *phydev); 1818 #else 1819 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1820 { 1821 return 0; 1822 } 1823 static inline 1824 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1825 { 1826 return 0; 1827 } 1828 1829 static inline 1830 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1831 { 1832 return NULL; 1833 } 1834 1835 static inline struct phy_device *device_phy_find_device(struct device *dev) 1836 { 1837 return NULL; 1838 } 1839 1840 static inline 1841 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1842 { 1843 return NULL; 1844 } 1845 1846 static inline 1847 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1848 { 1849 return NULL; 1850 } 1851 1852 static inline int phy_device_register(struct phy_device *phy) 1853 { 1854 return 0; 1855 } 1856 1857 static inline void phy_device_free(struct phy_device *phydev) { } 1858 #endif /* CONFIG_PHYLIB */ 1859 void phy_device_remove(struct phy_device *phydev); 1860 int phy_get_c45_ids(struct phy_device *phydev); 1861 int phy_init_hw(struct phy_device *phydev); 1862 int phy_suspend(struct phy_device *phydev); 1863 int phy_resume(struct phy_device *phydev); 1864 int __phy_resume(struct phy_device *phydev); 1865 int phy_loopback(struct phy_device *phydev, bool enable); 1866 int phy_sfp_connect_phy(void *upstream, struct phy_device *phy); 1867 void phy_sfp_disconnect_phy(void *upstream, struct phy_device *phy); 1868 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1869 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1870 int phy_sfp_probe(struct phy_device *phydev, 1871 const struct sfp_upstream_ops *ops); 1872 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1873 phy_interface_t interface); 1874 struct phy_device *phy_find_first(struct mii_bus *bus); 1875 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1876 u32 flags, phy_interface_t interface); 1877 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1878 void (*handler)(struct net_device *), 1879 phy_interface_t interface); 1880 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1881 void (*handler)(struct net_device *), 1882 phy_interface_t interface); 1883 void phy_disconnect(struct phy_device *phydev); 1884 void phy_detach(struct phy_device *phydev); 1885 void phy_start(struct phy_device *phydev); 1886 void phy_stop(struct phy_device *phydev); 1887 int phy_config_aneg(struct phy_device *phydev); 1888 int _phy_start_aneg(struct phy_device *phydev); 1889 int phy_start_aneg(struct phy_device *phydev); 1890 int phy_aneg_done(struct phy_device *phydev); 1891 unsigned int phy_inband_caps(struct phy_device *phydev, 1892 phy_interface_t interface); 1893 int phy_config_inband(struct phy_device *phydev, unsigned int modes); 1894 int phy_speed_down(struct phy_device *phydev, bool sync); 1895 int phy_speed_up(struct phy_device *phydev); 1896 bool phy_check_valid(int speed, int duplex, unsigned long *features); 1897 1898 int phy_restart_aneg(struct phy_device *phydev); 1899 int phy_reset_after_clk_enable(struct phy_device *phydev); 1900 1901 #if IS_ENABLED(CONFIG_PHYLIB) 1902 int phy_start_cable_test(struct phy_device *phydev, 1903 struct netlink_ext_ack *extack); 1904 int phy_start_cable_test_tdr(struct phy_device *phydev, 1905 struct netlink_ext_ack *extack, 1906 const struct phy_tdr_config *config); 1907 #else 1908 static inline 1909 int phy_start_cable_test(struct phy_device *phydev, 1910 struct netlink_ext_ack *extack) 1911 { 1912 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1913 return -EOPNOTSUPP; 1914 } 1915 static inline 1916 int phy_start_cable_test_tdr(struct phy_device *phydev, 1917 struct netlink_ext_ack *extack, 1918 const struct phy_tdr_config *config) 1919 { 1920 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1921 return -EOPNOTSUPP; 1922 } 1923 #endif 1924 1925 static inline void phy_device_reset(struct phy_device *phydev, int value) 1926 { 1927 mdio_device_reset(&phydev->mdio, value); 1928 } 1929 1930 #define phydev_err(_phydev, format, args...) \ 1931 dev_err(&_phydev->mdio.dev, format, ##args) 1932 1933 #define phydev_err_probe(_phydev, err, format, args...) \ 1934 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1935 1936 #define phydev_info(_phydev, format, args...) \ 1937 dev_info(&_phydev->mdio.dev, format, ##args) 1938 1939 #define phydev_warn(_phydev, format, args...) \ 1940 dev_warn(&_phydev->mdio.dev, format, ##args) 1941 1942 #define phydev_dbg(_phydev, format, args...) \ 1943 dev_dbg(&_phydev->mdio.dev, format, ##args) 1944 1945 static inline const char *phydev_name(const struct phy_device *phydev) 1946 { 1947 return dev_name(&phydev->mdio.dev); 1948 } 1949 1950 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1951 { 1952 mutex_lock(&phydev->mdio.bus->mdio_lock); 1953 } 1954 1955 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1956 { 1957 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1958 } 1959 1960 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1961 __printf(2, 3); 1962 char *phy_attached_info_irq(struct phy_device *phydev) 1963 __malloc; 1964 void phy_attached_info(struct phy_device *phydev); 1965 1966 /* Clause 22 PHY */ 1967 int genphy_read_abilities(struct phy_device *phydev); 1968 int genphy_setup_forced(struct phy_device *phydev); 1969 int genphy_restart_aneg(struct phy_device *phydev); 1970 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1971 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1972 int genphy_aneg_done(struct phy_device *phydev); 1973 int genphy_update_link(struct phy_device *phydev); 1974 int genphy_read_lpa(struct phy_device *phydev); 1975 int genphy_read_status_fixed(struct phy_device *phydev); 1976 int genphy_read_status(struct phy_device *phydev); 1977 int genphy_read_master_slave(struct phy_device *phydev); 1978 int genphy_suspend(struct phy_device *phydev); 1979 int genphy_resume(struct phy_device *phydev); 1980 int genphy_loopback(struct phy_device *phydev, bool enable); 1981 int genphy_soft_reset(struct phy_device *phydev); 1982 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1983 1984 static inline int genphy_config_aneg(struct phy_device *phydev) 1985 { 1986 return __genphy_config_aneg(phydev, false); 1987 } 1988 1989 static inline int genphy_no_config_intr(struct phy_device *phydev) 1990 { 1991 return 0; 1992 } 1993 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1994 u16 regnum); 1995 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1996 u16 regnum, u16 val); 1997 1998 /* Clause 37 */ 1999 int genphy_c37_config_aneg(struct phy_device *phydev); 2000 int genphy_c37_read_status(struct phy_device *phydev, bool *changed); 2001 2002 /* Clause 45 PHY */ 2003 int genphy_c45_restart_aneg(struct phy_device *phydev); 2004 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 2005 int genphy_c45_aneg_done(struct phy_device *phydev); 2006 int genphy_c45_read_link(struct phy_device *phydev); 2007 int genphy_c45_read_lpa(struct phy_device *phydev); 2008 int genphy_c45_read_pma(struct phy_device *phydev); 2009 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 2010 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 2011 int genphy_c45_an_config_aneg(struct phy_device *phydev); 2012 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 2013 int genphy_c45_read_mdix(struct phy_device *phydev); 2014 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 2015 int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev); 2016 int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev); 2017 int genphy_c45_read_eee_abilities(struct phy_device *phydev); 2018 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 2019 int genphy_c45_read_status(struct phy_device *phydev); 2020 int genphy_c45_baset1_read_status(struct phy_device *phydev); 2021 int genphy_c45_config_aneg(struct phy_device *phydev); 2022 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 2023 int genphy_c45_pma_resume(struct phy_device *phydev); 2024 int genphy_c45_pma_suspend(struct phy_device *phydev); 2025 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 2026 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 2027 struct phy_plca_cfg *plca_cfg); 2028 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 2029 const struct phy_plca_cfg *plca_cfg); 2030 int genphy_c45_plca_get_status(struct phy_device *phydev, 2031 struct phy_plca_status *plca_st); 2032 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv, 2033 unsigned long *lp); 2034 int genphy_c45_ethtool_get_eee(struct phy_device *phydev, 2035 struct ethtool_keee *data); 2036 int genphy_c45_ethtool_set_eee(struct phy_device *phydev, 2037 struct ethtool_keee *data); 2038 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev); 2039 int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv); 2040 2041 /* Generic C45 PHY driver */ 2042 extern struct phy_driver genphy_c45_driver; 2043 2044 /* The gen10g_* functions are the old Clause 45 stub */ 2045 int gen10g_config_aneg(struct phy_device *phydev); 2046 2047 static inline int phy_read_status(struct phy_device *phydev) 2048 { 2049 if (!phydev->drv) 2050 return -EIO; 2051 2052 if (phydev->drv->read_status) 2053 return phydev->drv->read_status(phydev); 2054 else 2055 return genphy_read_status(phydev); 2056 } 2057 2058 void phy_driver_unregister(struct phy_driver *drv); 2059 void phy_drivers_unregister(struct phy_driver *drv, int n); 2060 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 2061 int phy_drivers_register(struct phy_driver *new_driver, int n, 2062 struct module *owner); 2063 void phy_error(struct phy_device *phydev); 2064 void phy_state_machine(struct work_struct *work); 2065 void phy_trigger_machine(struct phy_device *phydev); 2066 void phy_mac_interrupt(struct phy_device *phydev); 2067 void phy_start_machine(struct phy_device *phydev); 2068 void phy_stop_machine(struct phy_device *phydev); 2069 void phy_ethtool_ksettings_get(struct phy_device *phydev, 2070 struct ethtool_link_ksettings *cmd); 2071 int phy_ethtool_ksettings_set(struct phy_device *phydev, 2072 const struct ethtool_link_ksettings *cmd); 2073 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 2074 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 2075 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 2076 int phy_disable_interrupts(struct phy_device *phydev); 2077 void phy_request_interrupt(struct phy_device *phydev); 2078 void phy_free_interrupt(struct phy_device *phydev); 2079 void phy_print_status(struct phy_device *phydev); 2080 int phy_get_rate_matching(struct phy_device *phydev, 2081 phy_interface_t iface); 2082 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 2083 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 2084 void phy_advertise_supported(struct phy_device *phydev); 2085 void phy_advertise_eee_all(struct phy_device *phydev); 2086 void phy_support_sym_pause(struct phy_device *phydev); 2087 void phy_support_asym_pause(struct phy_device *phydev); 2088 void phy_support_eee(struct phy_device *phydev); 2089 void phy_disable_eee(struct phy_device *phydev); 2090 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 2091 bool autoneg); 2092 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 2093 bool phy_validate_pause(struct phy_device *phydev, 2094 struct ethtool_pauseparam *pp); 2095 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 2096 2097 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 2098 const int *delay_values, int size, bool is_rx); 2099 2100 int phy_get_tx_amplitude_gain(struct phy_device *phydev, struct device *dev, 2101 enum ethtool_link_mode_bit_indices linkmode, 2102 u32 *val); 2103 2104 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 2105 bool *tx_pause, bool *rx_pause); 2106 2107 int phy_register_fixup_for_id(const char *bus_id, 2108 int (*run)(struct phy_device *)); 2109 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 2110 int (*run)(struct phy_device *)); 2111 2112 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 2113 int phy_unregister_fixup_for_id(const char *bus_id); 2114 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 2115 2116 int phy_eee_tx_clock_stop_capable(struct phy_device *phydev); 2117 int phy_eee_rx_clock_stop(struct phy_device *phydev, bool clk_stop_enable); 2118 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 2119 int phy_get_eee_err(struct phy_device *phydev); 2120 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data); 2121 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_keee *data); 2122 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 2123 void phy_ethtool_get_wol(struct phy_device *phydev, 2124 struct ethtool_wolinfo *wol); 2125 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 2126 struct ethtool_link_ksettings *cmd); 2127 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 2128 const struct ethtool_link_ksettings *cmd); 2129 int phy_ethtool_nway_reset(struct net_device *ndev); 2130 int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size); 2131 int of_phy_package_join(struct phy_device *phydev, size_t priv_size); 2132 void phy_package_leave(struct phy_device *phydev); 2133 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 2134 int base_addr, size_t priv_size); 2135 int devm_of_phy_package_join(struct device *dev, struct phy_device *phydev, 2136 size_t priv_size); 2137 2138 int __init mdio_bus_init(void); 2139 void mdio_bus_exit(void); 2140 2141 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 2142 int phy_ethtool_get_sset_count(struct phy_device *phydev); 2143 int phy_ethtool_get_stats(struct phy_device *phydev, 2144 struct ethtool_stats *stats, u64 *data); 2145 2146 void __phy_ethtool_get_phy_stats(struct phy_device *phydev, 2147 struct ethtool_eth_phy_stats *phy_stats, 2148 struct ethtool_phy_stats *phydev_stats); 2149 void __phy_ethtool_get_link_ext_stats(struct phy_device *phydev, 2150 struct ethtool_link_ext_stats *link_stats); 2151 2152 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 2153 struct phy_plca_cfg *plca_cfg); 2154 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 2155 const struct phy_plca_cfg *plca_cfg, 2156 struct netlink_ext_ack *extack); 2157 int phy_ethtool_get_plca_status(struct phy_device *phydev, 2158 struct phy_plca_status *plca_st); 2159 2160 int __phy_hwtstamp_get(struct phy_device *phydev, 2161 struct kernel_hwtstamp_config *config); 2162 int __phy_hwtstamp_set(struct phy_device *phydev, 2163 struct kernel_hwtstamp_config *config, 2164 struct netlink_ext_ack *extack); 2165 2166 static inline int phy_package_address(struct phy_device *phydev, 2167 unsigned int addr_offset) 2168 { 2169 struct phy_package_shared *shared = phydev->shared; 2170 u8 base_addr = shared->base_addr; 2171 2172 if (addr_offset >= PHY_MAX_ADDR - base_addr) 2173 return -EIO; 2174 2175 /* we know that addr will be in the range 0..31 and thus the 2176 * implicit cast to a signed int is not a problem. 2177 */ 2178 return base_addr + addr_offset; 2179 } 2180 2181 static inline int phy_package_read(struct phy_device *phydev, 2182 unsigned int addr_offset, u32 regnum) 2183 { 2184 int addr = phy_package_address(phydev, addr_offset); 2185 2186 if (addr < 0) 2187 return addr; 2188 2189 return mdiobus_read(phydev->mdio.bus, addr, regnum); 2190 } 2191 2192 static inline int __phy_package_read(struct phy_device *phydev, 2193 unsigned int addr_offset, u32 regnum) 2194 { 2195 int addr = phy_package_address(phydev, addr_offset); 2196 2197 if (addr < 0) 2198 return addr; 2199 2200 return __mdiobus_read(phydev->mdio.bus, addr, regnum); 2201 } 2202 2203 static inline int phy_package_write(struct phy_device *phydev, 2204 unsigned int addr_offset, u32 regnum, 2205 u16 val) 2206 { 2207 int addr = phy_package_address(phydev, addr_offset); 2208 2209 if (addr < 0) 2210 return addr; 2211 2212 return mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2213 } 2214 2215 static inline int __phy_package_write(struct phy_device *phydev, 2216 unsigned int addr_offset, u32 regnum, 2217 u16 val) 2218 { 2219 int addr = phy_package_address(phydev, addr_offset); 2220 2221 if (addr < 0) 2222 return addr; 2223 2224 return __mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2225 } 2226 2227 int __phy_package_read_mmd(struct phy_device *phydev, 2228 unsigned int addr_offset, int devad, 2229 u32 regnum); 2230 2231 int phy_package_read_mmd(struct phy_device *phydev, 2232 unsigned int addr_offset, int devad, 2233 u32 regnum); 2234 2235 int __phy_package_write_mmd(struct phy_device *phydev, 2236 unsigned int addr_offset, int devad, 2237 u32 regnum, u16 val); 2238 2239 int phy_package_write_mmd(struct phy_device *phydev, 2240 unsigned int addr_offset, int devad, 2241 u32 regnum, u16 val); 2242 2243 static inline bool __phy_package_set_once(struct phy_device *phydev, 2244 unsigned int b) 2245 { 2246 struct phy_package_shared *shared = phydev->shared; 2247 2248 if (!shared) 2249 return false; 2250 2251 return !test_and_set_bit(b, &shared->flags); 2252 } 2253 2254 static inline bool phy_package_init_once(struct phy_device *phydev) 2255 { 2256 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 2257 } 2258 2259 static inline bool phy_package_probe_once(struct phy_device *phydev) 2260 { 2261 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 2262 } 2263 2264 extern const struct bus_type mdio_bus_type; 2265 2266 struct mdio_board_info { 2267 const char *bus_id; 2268 char modalias[MDIO_NAME_SIZE]; 2269 int mdio_addr; 2270 const void *platform_data; 2271 }; 2272 2273 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 2274 int mdiobus_register_board_info(const struct mdio_board_info *info, 2275 unsigned int n); 2276 #else 2277 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 2278 unsigned int n) 2279 { 2280 return 0; 2281 } 2282 #endif 2283 2284 2285 /** 2286 * phy_module_driver() - Helper macro for registering PHY drivers 2287 * @__phy_drivers: array of PHY drivers to register 2288 * @__count: Numbers of members in array 2289 * 2290 * Helper macro for PHY drivers which do not do anything special in module 2291 * init/exit. Each module may only use this macro once, and calling it 2292 * replaces module_init() and module_exit(). 2293 */ 2294 #define phy_module_driver(__phy_drivers, __count) \ 2295 static int __init phy_module_init(void) \ 2296 { \ 2297 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 2298 } \ 2299 module_init(phy_module_init); \ 2300 static void __exit phy_module_exit(void) \ 2301 { \ 2302 phy_drivers_unregister(__phy_drivers, __count); \ 2303 } \ 2304 module_exit(phy_module_exit) 2305 2306 #define module_phy_driver(__phy_drivers) \ 2307 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 2308 2309 bool phy_driver_is_genphy(struct phy_device *phydev); 2310 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 2311 2312 #endif /* __PHY_H */ 2313