1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/linkmode.h> 18 #include <linux/mdio.h> 19 #include <linux/mii.h> 20 #include <linux/mii_timestamper.h> 21 #include <linux/module.h> 22 #include <linux/timer.h> 23 #include <linux/workqueue.h> 24 #include <linux/mod_devicetable.h> 25 #include <linux/u64_stats_sync.h> 26 #include <linux/irqreturn.h> 27 #include <linux/iopoll.h> 28 29 #include <linux/atomic.h> 30 31 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 32 SUPPORTED_TP | \ 33 SUPPORTED_MII) 34 35 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 36 SUPPORTED_10baseT_Full) 37 38 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 39 SUPPORTED_100baseT_Full) 40 41 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 42 SUPPORTED_1000baseT_Full) 43 44 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 45 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 52 53 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 54 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 55 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 56 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 57 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 58 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 59 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 60 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 61 62 extern const int phy_basic_ports_array[3]; 63 extern const int phy_fibre_port_array[1]; 64 extern const int phy_all_ports_features_array[7]; 65 extern const int phy_10_100_features_array[4]; 66 extern const int phy_basic_t1_features_array[2]; 67 extern const int phy_gbit_features_array[2]; 68 extern const int phy_10gbit_features_array[1]; 69 70 /* 71 * Set phydev->irq to PHY_POLL if interrupts are not supported, 72 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if 73 * the attached driver handles the interrupt 74 */ 75 #define PHY_POLL -1 76 #define PHY_IGNORE_INTERRUPT -2 77 78 #define PHY_IS_INTERNAL 0x00000001 79 #define PHY_RST_AFTER_CLK_EN 0x00000002 80 #define MDIO_DEVICE_IS_PHY 0x80000000 81 82 /* Interface Mode definitions */ 83 typedef enum { 84 PHY_INTERFACE_MODE_NA, 85 PHY_INTERFACE_MODE_INTERNAL, 86 PHY_INTERFACE_MODE_MII, 87 PHY_INTERFACE_MODE_GMII, 88 PHY_INTERFACE_MODE_SGMII, 89 PHY_INTERFACE_MODE_TBI, 90 PHY_INTERFACE_MODE_REVMII, 91 PHY_INTERFACE_MODE_RMII, 92 PHY_INTERFACE_MODE_RGMII, 93 PHY_INTERFACE_MODE_RGMII_ID, 94 PHY_INTERFACE_MODE_RGMII_RXID, 95 PHY_INTERFACE_MODE_RGMII_TXID, 96 PHY_INTERFACE_MODE_RTBI, 97 PHY_INTERFACE_MODE_SMII, 98 PHY_INTERFACE_MODE_XGMII, 99 PHY_INTERFACE_MODE_XLGMII, 100 PHY_INTERFACE_MODE_MOCA, 101 PHY_INTERFACE_MODE_QSGMII, 102 PHY_INTERFACE_MODE_TRGMII, 103 PHY_INTERFACE_MODE_1000BASEX, 104 PHY_INTERFACE_MODE_2500BASEX, 105 PHY_INTERFACE_MODE_RXAUI, 106 PHY_INTERFACE_MODE_XAUI, 107 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 108 PHY_INTERFACE_MODE_10GBASER, 109 PHY_INTERFACE_MODE_USXGMII, 110 /* 10GBASE-KR - with Clause 73 AN */ 111 PHY_INTERFACE_MODE_10GKR, 112 PHY_INTERFACE_MODE_MAX, 113 } phy_interface_t; 114 115 /** 116 * phy_supported_speeds - return all speeds currently supported by a phy device 117 * @phy: The phy device to return supported speeds of. 118 * @speeds: buffer to store supported speeds in. 119 * @size: size of speeds buffer. 120 * 121 * Description: Returns the number of supported speeds, and fills 122 * the speeds buffer with the supported speeds. If speeds buffer is 123 * too small to contain all currently supported speeds, will return as 124 * many speeds as can fit. 125 */ 126 unsigned int phy_supported_speeds(struct phy_device *phy, 127 unsigned int *speeds, 128 unsigned int size); 129 130 /** 131 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 132 * @interface: enum phy_interface_t value 133 * 134 * Description: maps 'enum phy_interface_t' defined in this file 135 * into the device tree binding of 'phy-mode', so that Ethernet 136 * device driver can get phy interface from device tree. 137 */ 138 static inline const char *phy_modes(phy_interface_t interface) 139 { 140 switch (interface) { 141 case PHY_INTERFACE_MODE_NA: 142 return ""; 143 case PHY_INTERFACE_MODE_INTERNAL: 144 return "internal"; 145 case PHY_INTERFACE_MODE_MII: 146 return "mii"; 147 case PHY_INTERFACE_MODE_GMII: 148 return "gmii"; 149 case PHY_INTERFACE_MODE_SGMII: 150 return "sgmii"; 151 case PHY_INTERFACE_MODE_TBI: 152 return "tbi"; 153 case PHY_INTERFACE_MODE_REVMII: 154 return "rev-mii"; 155 case PHY_INTERFACE_MODE_RMII: 156 return "rmii"; 157 case PHY_INTERFACE_MODE_RGMII: 158 return "rgmii"; 159 case PHY_INTERFACE_MODE_RGMII_ID: 160 return "rgmii-id"; 161 case PHY_INTERFACE_MODE_RGMII_RXID: 162 return "rgmii-rxid"; 163 case PHY_INTERFACE_MODE_RGMII_TXID: 164 return "rgmii-txid"; 165 case PHY_INTERFACE_MODE_RTBI: 166 return "rtbi"; 167 case PHY_INTERFACE_MODE_SMII: 168 return "smii"; 169 case PHY_INTERFACE_MODE_XGMII: 170 return "xgmii"; 171 case PHY_INTERFACE_MODE_XLGMII: 172 return "xlgmii"; 173 case PHY_INTERFACE_MODE_MOCA: 174 return "moca"; 175 case PHY_INTERFACE_MODE_QSGMII: 176 return "qsgmii"; 177 case PHY_INTERFACE_MODE_TRGMII: 178 return "trgmii"; 179 case PHY_INTERFACE_MODE_1000BASEX: 180 return "1000base-x"; 181 case PHY_INTERFACE_MODE_2500BASEX: 182 return "2500base-x"; 183 case PHY_INTERFACE_MODE_RXAUI: 184 return "rxaui"; 185 case PHY_INTERFACE_MODE_XAUI: 186 return "xaui"; 187 case PHY_INTERFACE_MODE_10GBASER: 188 return "10gbase-r"; 189 case PHY_INTERFACE_MODE_USXGMII: 190 return "usxgmii"; 191 case PHY_INTERFACE_MODE_10GKR: 192 return "10gbase-kr"; 193 default: 194 return "unknown"; 195 } 196 } 197 198 199 #define PHY_INIT_TIMEOUT 100000 200 #define PHY_FORCE_TIMEOUT 10 201 202 #define PHY_MAX_ADDR 32 203 204 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 205 #define PHY_ID_FMT "%s:%02x" 206 207 #define MII_BUS_ID_SIZE 61 208 209 /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit 210 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */ 211 #define MII_ADDR_C45 (1<<30) 212 #define MII_DEVADDR_C45_SHIFT 16 213 #define MII_REGADDR_C45_MASK GENMASK(15, 0) 214 215 struct device; 216 struct phylink; 217 struct sfp_bus; 218 struct sfp_upstream_ops; 219 struct sk_buff; 220 221 struct mdio_bus_stats { 222 u64_stats_t transfers; 223 u64_stats_t errors; 224 u64_stats_t writes; 225 u64_stats_t reads; 226 /* Must be last, add new statistics above */ 227 struct u64_stats_sync syncp; 228 }; 229 230 /* 231 * The Bus class for PHYs. Devices which provide access to 232 * PHYs should register using this structure 233 */ 234 struct mii_bus { 235 struct module *owner; 236 const char *name; 237 char id[MII_BUS_ID_SIZE]; 238 void *priv; 239 int (*read)(struct mii_bus *bus, int addr, int regnum); 240 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 241 int (*reset)(struct mii_bus *bus); 242 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 243 244 /* 245 * A lock to ensure that only one thing can read/write 246 * the MDIO bus at a time 247 */ 248 struct mutex mdio_lock; 249 250 struct device *parent; 251 enum { 252 MDIOBUS_ALLOCATED = 1, 253 MDIOBUS_REGISTERED, 254 MDIOBUS_UNREGISTERED, 255 MDIOBUS_RELEASED, 256 } state; 257 struct device dev; 258 259 /* list of all PHYs on bus */ 260 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 261 262 /* PHY addresses to be ignored when probing */ 263 u32 phy_mask; 264 265 /* PHY addresses to ignore the TA/read failure */ 266 u32 phy_ignore_ta_mask; 267 268 /* 269 * An array of interrupts, each PHY's interrupt at the index 270 * matching its address 271 */ 272 int irq[PHY_MAX_ADDR]; 273 274 /* GPIO reset pulse width in microseconds */ 275 int reset_delay_us; 276 /* RESET GPIO descriptor pointer */ 277 struct gpio_desc *reset_gpiod; 278 }; 279 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 280 281 struct mii_bus *mdiobus_alloc_size(size_t); 282 static inline struct mii_bus *mdiobus_alloc(void) 283 { 284 return mdiobus_alloc_size(0); 285 } 286 287 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 288 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 289 void mdiobus_unregister(struct mii_bus *bus); 290 void mdiobus_free(struct mii_bus *bus); 291 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 292 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 293 { 294 return devm_mdiobus_alloc_size(dev, 0); 295 } 296 297 struct mii_bus *mdio_find_bus(const char *mdio_name); 298 void devm_mdiobus_free(struct device *dev, struct mii_bus *bus); 299 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); 300 301 #define PHY_INTERRUPT_DISABLED false 302 #define PHY_INTERRUPT_ENABLED true 303 304 /* PHY state machine states: 305 * 306 * DOWN: PHY device and driver are not ready for anything. probe 307 * should be called if and only if the PHY is in this state, 308 * given that the PHY device exists. 309 * - PHY driver probe function will set the state to READY 310 * 311 * READY: PHY is ready to send and receive packets, but the 312 * controller is not. By default, PHYs which do not implement 313 * probe will be set to this state by phy_probe(). 314 * - start will set the state to UP 315 * 316 * UP: The PHY and attached device are ready to do work. 317 * Interrupts should be started here. 318 * - timer moves to NOLINK or RUNNING 319 * 320 * NOLINK: PHY is up, but not currently plugged in. 321 * - irq or timer will set RUNNING if link comes back 322 * - phy_stop moves to HALTED 323 * 324 * RUNNING: PHY is currently up, running, and possibly sending 325 * and/or receiving packets 326 * - irq or timer will set NOLINK if link goes down 327 * - phy_stop moves to HALTED 328 * 329 * HALTED: PHY is up, but no polling or interrupts are done. Or 330 * PHY is in an error state. 331 * - phy_start moves to UP 332 */ 333 enum phy_state { 334 PHY_DOWN = 0, 335 PHY_READY, 336 PHY_HALTED, 337 PHY_UP, 338 PHY_RUNNING, 339 PHY_NOLINK, 340 }; 341 342 /** 343 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 344 * @devices_in_package: Bit vector of devices present. 345 * @device_ids: The device identifer for each present device. 346 */ 347 struct phy_c45_device_ids { 348 u32 devices_in_package; 349 u32 device_ids[8]; 350 }; 351 352 struct macsec_context; 353 struct macsec_ops; 354 355 /* phy_device: An instance of a PHY 356 * 357 * drv: Pointer to the driver for this PHY instance 358 * phy_id: UID for this device found during discovery 359 * c45_ids: 802.3-c45 Device Identifers if is_c45. 360 * is_c45: Set to true if this phy uses clause 45 addressing. 361 * is_internal: Set to true if this phy is internal to a MAC. 362 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc. 363 * is_gigabit_capable: Set to true if PHY supports 1000Mbps 364 * has_fixups: Set to true if this phy has fixups/quirks. 365 * suspended: Set to true if this phy has been suspended successfully. 366 * suspended_by_mdio_bus: Set to true if this phy was suspended by MDIO bus. 367 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 368 * loopback_enabled: Set true if this phy has been loopbacked successfully. 369 * downshifted_rate: Set true if link speed has been downshifted. 370 * state: state of the PHY for management purposes 371 * dev_flags: Device-specific flags used by the PHY driver. 372 * irq: IRQ number of the PHY's interrupt (-1 if none) 373 * phy_timer: The timer for handling the state machine 374 * sfp_bus_attached: flag indicating whether the SFP bus has been attached 375 * sfp_bus: SFP bus attached to this PHY's fiber port 376 * attached_dev: The attached enet driver's device instance ptr 377 * adjust_link: Callback for the enet controller to respond to 378 * changes in the link state. 379 * macsec_ops: MACsec offloading ops. 380 * 381 * speed, duplex, pause, supported, advertising, lp_advertising, 382 * and autoneg are used like in mii_if_info 383 * 384 * interrupts currently only supports enabled or disabled, 385 * but could be changed in the future to support enabling 386 * and disabling specific interrupts 387 * 388 * Contains some infrastructure for polling and interrupt 389 * handling, as well as handling shifts in PHY hardware state 390 */ 391 struct phy_device { 392 struct mdio_device mdio; 393 394 /* Information about the PHY type */ 395 /* And management functions */ 396 struct phy_driver *drv; 397 398 u32 phy_id; 399 400 struct phy_c45_device_ids c45_ids; 401 unsigned is_c45:1; 402 unsigned is_internal:1; 403 unsigned is_pseudo_fixed_link:1; 404 unsigned is_gigabit_capable:1; 405 unsigned has_fixups:1; 406 unsigned suspended:1; 407 unsigned suspended_by_mdio_bus:1; 408 unsigned sysfs_links:1; 409 unsigned loopback_enabled:1; 410 unsigned downshifted_rate:1; 411 412 unsigned autoneg:1; 413 /* The most recently read link state */ 414 unsigned link:1; 415 unsigned autoneg_complete:1; 416 417 /* Interrupts are enabled */ 418 unsigned interrupts:1; 419 420 enum phy_state state; 421 422 u32 dev_flags; 423 424 phy_interface_t interface; 425 426 /* 427 * forced speed & duplex (no autoneg) 428 * partner speed & duplex & pause (autoneg) 429 */ 430 int speed; 431 int duplex; 432 int pause; 433 int asym_pause; 434 435 /* Union of PHY and Attached devices' supported link modes */ 436 /* See ethtool.h for more info */ 437 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 438 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 439 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 440 /* used with phy_speed_down */ 441 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 442 443 /* Energy efficient ethernet modes which should be prohibited */ 444 u32 eee_broken_modes; 445 446 #ifdef CONFIG_LED_TRIGGER_PHY 447 struct phy_led_trigger *phy_led_triggers; 448 unsigned int phy_num_led_triggers; 449 struct phy_led_trigger *last_triggered; 450 451 struct phy_led_trigger *led_link_trigger; 452 #endif 453 454 /* 455 * Interrupt number for this PHY 456 * -1 means no interrupt 457 */ 458 int irq; 459 460 /* private data pointer */ 461 /* For use by PHYs to maintain extra state */ 462 void *priv; 463 464 /* Interrupt and Polling infrastructure */ 465 struct delayed_work state_queue; 466 467 struct mutex lock; 468 469 /* This may be modified under the rtnl lock */ 470 bool sfp_bus_attached; 471 struct sfp_bus *sfp_bus; 472 struct phylink *phylink; 473 struct net_device *attached_dev; 474 struct mii_timestamper *mii_ts; 475 476 u8 mdix; 477 u8 mdix_ctrl; 478 479 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier); 480 void (*adjust_link)(struct net_device *dev); 481 482 #if IS_ENABLED(CONFIG_MACSEC) 483 /* MACsec management functions */ 484 const struct macsec_ops *macsec_ops; 485 #endif 486 }; 487 #define to_phy_device(d) container_of(to_mdio_device(d), \ 488 struct phy_device, mdio) 489 490 /* struct phy_driver: Driver structure for a particular PHY type 491 * 492 * driver_data: static driver data 493 * phy_id: The result of reading the UID registers of this PHY 494 * type, and ANDing them with the phy_id_mask. This driver 495 * only works for PHYs with IDs which match this field 496 * name: The friendly name of this PHY type 497 * phy_id_mask: Defines the important bits of the phy_id 498 * features: A mandatory list of features (speed, duplex, etc) 499 * supported by this PHY 500 * flags: A bitfield defining certain other features this PHY 501 * supports (like interrupts) 502 * 503 * All functions are optional. If config_aneg or read_status 504 * are not implemented, the phy core uses the genphy versions. 505 * Note that none of these functions should be called from 506 * interrupt time. The goal is for the bus read/write functions 507 * to be able to block when the bus transaction is happening, 508 * and be freed up by an interrupt (The MPC85xx has this ability, 509 * though it is not currently supported in the driver). 510 */ 511 struct phy_driver { 512 struct mdio_driver_common mdiodrv; 513 u32 phy_id; 514 char *name; 515 u32 phy_id_mask; 516 const unsigned long * const features; 517 u32 flags; 518 const void *driver_data; 519 520 /* 521 * Called to issue a PHY software reset 522 */ 523 int (*soft_reset)(struct phy_device *phydev); 524 525 /* 526 * Called to initialize the PHY, 527 * including after a reset 528 */ 529 int (*config_init)(struct phy_device *phydev); 530 531 /* 532 * Called during discovery. Used to set 533 * up device-specific structures, if any 534 */ 535 int (*probe)(struct phy_device *phydev); 536 537 /* 538 * Probe the hardware to determine what abilities it has. 539 * Should only set phydev->supported. 540 */ 541 int (*get_features)(struct phy_device *phydev); 542 543 /* PHY Power Management */ 544 int (*suspend)(struct phy_device *phydev); 545 int (*resume)(struct phy_device *phydev); 546 547 /* 548 * Configures the advertisement and resets 549 * autonegotiation if phydev->autoneg is on, 550 * forces the speed to the current settings in phydev 551 * if phydev->autoneg is off 552 */ 553 int (*config_aneg)(struct phy_device *phydev); 554 555 /* Determines the auto negotiation result */ 556 int (*aneg_done)(struct phy_device *phydev); 557 558 /* Determines the negotiated speed and duplex */ 559 int (*read_status)(struct phy_device *phydev); 560 561 /* Clears any pending interrupts */ 562 int (*ack_interrupt)(struct phy_device *phydev); 563 564 /* Enables or disables interrupts */ 565 int (*config_intr)(struct phy_device *phydev); 566 567 /* 568 * Checks if the PHY generated an interrupt. 569 * For multi-PHY devices with shared PHY interrupt pin 570 * Set interrupt bits have to be cleared. 571 */ 572 int (*did_interrupt)(struct phy_device *phydev); 573 574 /* Override default interrupt handling */ 575 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 576 577 /* Clears up any memory if needed */ 578 void (*remove)(struct phy_device *phydev); 579 580 /* Returns true if this is a suitable driver for the given 581 * phydev. If NULL, matching is based on phy_id and 582 * phy_id_mask. 583 */ 584 int (*match_phy_device)(struct phy_device *phydev); 585 586 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to 587 * enable Wake on LAN, so set_wol is provided to be called in the 588 * ethernet driver's set_wol function. */ 589 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 590 591 /* See set_wol, but for checking whether Wake on LAN is enabled. */ 592 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 593 594 /* 595 * Called to inform a PHY device driver when the core is about to 596 * change the link state. This callback is supposed to be used as 597 * fixup hook for drivers that need to take action when the link 598 * state changes. Drivers are by no means allowed to mess with the 599 * PHY device structure in their implementations. 600 */ 601 void (*link_change_notify)(struct phy_device *dev); 602 603 /* 604 * Phy specific driver override for reading a MMD register. 605 * This function is optional for PHY specific drivers. When 606 * not provided, the default MMD read function will be used 607 * by phy_read_mmd(), which will use either a direct read for 608 * Clause 45 PHYs or an indirect read for Clause 22 PHYs. 609 * devnum is the MMD device number within the PHY device, 610 * regnum is the register within the selected MMD device. 611 */ 612 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 613 614 /* 615 * Phy specific driver override for writing a MMD register. 616 * This function is optional for PHY specific drivers. When 617 * not provided, the default MMD write function will be used 618 * by phy_write_mmd(), which will use either a direct write for 619 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs. 620 * devnum is the MMD device number within the PHY device, 621 * regnum is the register within the selected MMD device. 622 * val is the value to be written. 623 */ 624 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 625 u16 val); 626 627 int (*read_page)(struct phy_device *dev); 628 int (*write_page)(struct phy_device *dev, int page); 629 630 /* Get the size and type of the eeprom contained within a plug-in 631 * module */ 632 int (*module_info)(struct phy_device *dev, 633 struct ethtool_modinfo *modinfo); 634 635 /* Get the eeprom information from the plug-in module */ 636 int (*module_eeprom)(struct phy_device *dev, 637 struct ethtool_eeprom *ee, u8 *data); 638 639 /* Get statistics from the phy using ethtool */ 640 int (*get_sset_count)(struct phy_device *dev); 641 void (*get_strings)(struct phy_device *dev, u8 *data); 642 void (*get_stats)(struct phy_device *dev, 643 struct ethtool_stats *stats, u64 *data); 644 645 /* Get and Set PHY tunables */ 646 int (*get_tunable)(struct phy_device *dev, 647 struct ethtool_tunable *tuna, void *data); 648 int (*set_tunable)(struct phy_device *dev, 649 struct ethtool_tunable *tuna, 650 const void *data); 651 int (*set_loopback)(struct phy_device *dev, bool enable); 652 }; 653 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 654 struct phy_driver, mdiodrv) 655 656 #define PHY_ANY_ID "MATCH ANY PHY" 657 #define PHY_ANY_UID 0xffffffff 658 659 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 660 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 661 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 662 663 /* A Structure for boards to register fixups with the PHY Lib */ 664 struct phy_fixup { 665 struct list_head list; 666 char bus_id[MII_BUS_ID_SIZE + 3]; 667 u32 phy_uid; 668 u32 phy_uid_mask; 669 int (*run)(struct phy_device *phydev); 670 }; 671 672 const char *phy_speed_to_str(int speed); 673 const char *phy_duplex_to_str(unsigned int duplex); 674 675 /* A structure for mapping a particular speed and duplex 676 * combination to a particular SUPPORTED and ADVERTISED value 677 */ 678 struct phy_setting { 679 u32 speed; 680 u8 duplex; 681 u8 bit; 682 }; 683 684 const struct phy_setting * 685 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 686 bool exact); 687 size_t phy_speeds(unsigned int *speeds, size_t size, 688 unsigned long *mask); 689 void of_set_phy_supported(struct phy_device *phydev); 690 void of_set_phy_eee_broken(struct phy_device *phydev); 691 int phy_speed_down_core(struct phy_device *phydev); 692 693 /** 694 * phy_is_started - Convenience function to check whether PHY is started 695 * @phydev: The phy_device struct 696 */ 697 static inline bool phy_is_started(struct phy_device *phydev) 698 { 699 return phydev->state >= PHY_UP; 700 } 701 702 void phy_resolve_aneg_pause(struct phy_device *phydev); 703 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 704 void phy_check_downshift(struct phy_device *phydev); 705 706 /** 707 * phy_read - Convenience function for reading a given PHY register 708 * @phydev: the phy_device struct 709 * @regnum: register number to read 710 * 711 * NOTE: MUST NOT be called from interrupt context, 712 * because the bus read/write functions may wait for an interrupt 713 * to conclude the operation. 714 */ 715 static inline int phy_read(struct phy_device *phydev, u32 regnum) 716 { 717 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 718 } 719 720 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 721 timeout_us, sleep_before_read) \ 722 ({ \ 723 int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \ 724 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 725 if (val < 0) \ 726 __ret = val; \ 727 if (__ret) \ 728 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 729 __ret; \ 730 }) 731 732 733 /** 734 * __phy_read - convenience function for reading a given PHY register 735 * @phydev: the phy_device struct 736 * @regnum: register number to read 737 * 738 * The caller must have taken the MDIO bus lock. 739 */ 740 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 741 { 742 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 743 } 744 745 /** 746 * phy_write - Convenience function for writing a given PHY register 747 * @phydev: the phy_device struct 748 * @regnum: register number to write 749 * @val: value to write to @regnum 750 * 751 * NOTE: MUST NOT be called from interrupt context, 752 * because the bus read/write functions may wait for an interrupt 753 * to conclude the operation. 754 */ 755 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 756 { 757 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 758 } 759 760 /** 761 * __phy_write - Convenience function for writing a given PHY register 762 * @phydev: the phy_device struct 763 * @regnum: register number to write 764 * @val: value to write to @regnum 765 * 766 * The caller must have taken the MDIO bus lock. 767 */ 768 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 769 { 770 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 771 val); 772 } 773 774 /** 775 * __phy_modify_changed() - Convenience function for modifying a PHY register 776 * @phydev: a pointer to a &struct phy_device 777 * @regnum: register number 778 * @mask: bit mask of bits to clear 779 * @set: bit mask of bits to set 780 * 781 * Unlocked helper function which allows a PHY register to be modified as 782 * new register value = (old register value & ~mask) | set 783 * 784 * Returns negative errno, 0 if there was no change, and 1 in case of change 785 */ 786 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 787 u16 mask, u16 set) 788 { 789 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 790 regnum, mask, set); 791 } 792 793 /** 794 * phy_read_mmd - Convenience function for reading a register 795 * from an MMD on a given PHY. 796 * @phydev: The phy_device struct 797 * @devad: The MMD to read from 798 * @regnum: The register on the MMD to read 799 * 800 * Same rules as for phy_read(); 801 */ 802 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 803 804 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 805 sleep_us, timeout_us, sleep_before_read) \ 806 ({ \ 807 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \ 808 sleep_us, timeout_us, sleep_before_read, \ 809 phydev, devaddr, regnum); \ 810 if (val < 0) \ 811 __ret = val; \ 812 if (__ret) \ 813 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 814 __ret; \ 815 }) 816 817 /** 818 * __phy_read_mmd - Convenience function for reading a register 819 * from an MMD on a given PHY. 820 * @phydev: The phy_device struct 821 * @devad: The MMD to read from 822 * @regnum: The register on the MMD to read 823 * 824 * Same rules as for __phy_read(); 825 */ 826 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 827 828 /** 829 * phy_write_mmd - Convenience function for writing a register 830 * on an MMD on a given PHY. 831 * @phydev: The phy_device struct 832 * @devad: The MMD to write to 833 * @regnum: The register on the MMD to read 834 * @val: value to write to @regnum 835 * 836 * Same rules as for phy_write(); 837 */ 838 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 839 840 /** 841 * __phy_write_mmd - Convenience function for writing a register 842 * on an MMD on a given PHY. 843 * @phydev: The phy_device struct 844 * @devad: The MMD to write to 845 * @regnum: The register on the MMD to read 846 * @val: value to write to @regnum 847 * 848 * Same rules as for __phy_write(); 849 */ 850 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 851 852 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 853 u16 set); 854 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 855 u16 set); 856 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 857 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 858 859 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 860 u16 mask, u16 set); 861 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 862 u16 mask, u16 set); 863 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 864 u16 mask, u16 set); 865 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 866 u16 mask, u16 set); 867 868 /** 869 * __phy_set_bits - Convenience function for setting bits in a PHY register 870 * @phydev: the phy_device struct 871 * @regnum: register number to write 872 * @val: bits to set 873 * 874 * The caller must have taken the MDIO bus lock. 875 */ 876 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 877 { 878 return __phy_modify(phydev, regnum, 0, val); 879 } 880 881 /** 882 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 883 * @phydev: the phy_device struct 884 * @regnum: register number to write 885 * @val: bits to clear 886 * 887 * The caller must have taken the MDIO bus lock. 888 */ 889 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 890 u16 val) 891 { 892 return __phy_modify(phydev, regnum, val, 0); 893 } 894 895 /** 896 * phy_set_bits - Convenience function for setting bits in a PHY register 897 * @phydev: the phy_device struct 898 * @regnum: register number to write 899 * @val: bits to set 900 */ 901 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 902 { 903 return phy_modify(phydev, regnum, 0, val); 904 } 905 906 /** 907 * phy_clear_bits - Convenience function for clearing bits in a PHY register 908 * @phydev: the phy_device struct 909 * @regnum: register number to write 910 * @val: bits to clear 911 */ 912 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 913 { 914 return phy_modify(phydev, regnum, val, 0); 915 } 916 917 /** 918 * __phy_set_bits_mmd - Convenience function for setting bits in a register 919 * on MMD 920 * @phydev: the phy_device struct 921 * @devad: the MMD containing register to modify 922 * @regnum: register number to modify 923 * @val: bits to set 924 * 925 * The caller must have taken the MDIO bus lock. 926 */ 927 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 928 u32 regnum, u16 val) 929 { 930 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 931 } 932 933 /** 934 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 935 * on MMD 936 * @phydev: the phy_device struct 937 * @devad: the MMD containing register to modify 938 * @regnum: register number to modify 939 * @val: bits to clear 940 * 941 * The caller must have taken the MDIO bus lock. 942 */ 943 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 944 u32 regnum, u16 val) 945 { 946 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 947 } 948 949 /** 950 * phy_set_bits_mmd - Convenience function for setting bits in a register 951 * on MMD 952 * @phydev: the phy_device struct 953 * @devad: the MMD containing register to modify 954 * @regnum: register number to modify 955 * @val: bits to set 956 */ 957 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 958 u32 regnum, u16 val) 959 { 960 return phy_modify_mmd(phydev, devad, regnum, 0, val); 961 } 962 963 /** 964 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 965 * on MMD 966 * @phydev: the phy_device struct 967 * @devad: the MMD containing register to modify 968 * @regnum: register number to modify 969 * @val: bits to clear 970 */ 971 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 972 u32 regnum, u16 val) 973 { 974 return phy_modify_mmd(phydev, devad, regnum, val, 0); 975 } 976 977 /** 978 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 979 * @phydev: the phy_device struct 980 * 981 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 982 * PHY_IGNORE_INTERRUPT 983 */ 984 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 985 { 986 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT; 987 } 988 989 /** 990 * phy_polling_mode - Convenience function for testing whether polling is 991 * used to detect PHY status changes 992 * @phydev: the phy_device struct 993 */ 994 static inline bool phy_polling_mode(struct phy_device *phydev) 995 { 996 return phydev->irq == PHY_POLL; 997 } 998 999 /** 1000 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1001 * @phydev: the phy_device struct 1002 */ 1003 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1004 { 1005 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1006 } 1007 1008 /** 1009 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1010 * @phydev: the phy_device struct 1011 */ 1012 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1013 { 1014 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1015 } 1016 1017 /** 1018 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1019 * PTP hardware clock capabilities. 1020 * @phydev: the phy_device struct 1021 */ 1022 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1023 { 1024 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1025 } 1026 1027 /** 1028 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1029 * @phydev: the phy_device struct 1030 */ 1031 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1032 { 1033 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1034 } 1035 1036 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) 1037 { 1038 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); 1039 } 1040 1041 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1042 int type) 1043 { 1044 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1045 } 1046 1047 static inline int phy_ts_info(struct phy_device *phydev, 1048 struct ethtool_ts_info *tsinfo) 1049 { 1050 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1051 } 1052 1053 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1054 int type) 1055 { 1056 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1057 } 1058 1059 /** 1060 * phy_is_internal - Convenience function for testing if a PHY is internal 1061 * @phydev: the phy_device struct 1062 */ 1063 static inline bool phy_is_internal(struct phy_device *phydev) 1064 { 1065 return phydev->is_internal; 1066 } 1067 1068 /** 1069 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1070 * PHY interface mode is RGMII (all variants) 1071 * @mode: the phy_interface_t enum 1072 */ 1073 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1074 { 1075 return mode >= PHY_INTERFACE_MODE_RGMII && 1076 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1077 }; 1078 1079 /** 1080 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z 1081 * negotiation 1082 * @mode: one of &enum phy_interface_t 1083 * 1084 * Returns true if the phy interface mode uses the 16-bit negotiation 1085 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1086 */ 1087 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1088 { 1089 return mode == PHY_INTERFACE_MODE_1000BASEX || 1090 mode == PHY_INTERFACE_MODE_2500BASEX; 1091 } 1092 1093 /** 1094 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1095 * is RGMII (all variants) 1096 * @phydev: the phy_device struct 1097 */ 1098 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1099 { 1100 return phy_interface_mode_is_rgmii(phydev->interface); 1101 }; 1102 1103 /* 1104 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1105 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1106 * @phydev: the phy_device struct 1107 */ 1108 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1109 { 1110 return phydev->is_pseudo_fixed_link; 1111 } 1112 1113 int phy_save_page(struct phy_device *phydev); 1114 int phy_select_page(struct phy_device *phydev, int page); 1115 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1116 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1117 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1118 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1119 u16 mask, u16 set); 1120 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1121 u16 mask, u16 set); 1122 1123 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1124 bool is_c45, 1125 struct phy_c45_device_ids *c45_ids); 1126 #if IS_ENABLED(CONFIG_PHYLIB) 1127 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1128 int phy_device_register(struct phy_device *phy); 1129 void phy_device_free(struct phy_device *phydev); 1130 #else 1131 static inline 1132 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1133 { 1134 return NULL; 1135 } 1136 1137 static inline int phy_device_register(struct phy_device *phy) 1138 { 1139 return 0; 1140 } 1141 1142 static inline void phy_device_free(struct phy_device *phydev) { } 1143 #endif /* CONFIG_PHYLIB */ 1144 void phy_device_remove(struct phy_device *phydev); 1145 int phy_init_hw(struct phy_device *phydev); 1146 int phy_suspend(struct phy_device *phydev); 1147 int phy_resume(struct phy_device *phydev); 1148 int __phy_resume(struct phy_device *phydev); 1149 int phy_loopback(struct phy_device *phydev, bool enable); 1150 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1151 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1152 int phy_sfp_probe(struct phy_device *phydev, 1153 const struct sfp_upstream_ops *ops); 1154 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1155 phy_interface_t interface); 1156 struct phy_device *phy_find_first(struct mii_bus *bus); 1157 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1158 u32 flags, phy_interface_t interface); 1159 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1160 void (*handler)(struct net_device *), 1161 phy_interface_t interface); 1162 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1163 void (*handler)(struct net_device *), 1164 phy_interface_t interface); 1165 void phy_disconnect(struct phy_device *phydev); 1166 void phy_detach(struct phy_device *phydev); 1167 void phy_start(struct phy_device *phydev); 1168 void phy_stop(struct phy_device *phydev); 1169 int phy_start_aneg(struct phy_device *phydev); 1170 int phy_aneg_done(struct phy_device *phydev); 1171 int phy_speed_down(struct phy_device *phydev, bool sync); 1172 int phy_speed_up(struct phy_device *phydev); 1173 1174 int phy_restart_aneg(struct phy_device *phydev); 1175 int phy_reset_after_clk_enable(struct phy_device *phydev); 1176 1177 static inline void phy_device_reset(struct phy_device *phydev, int value) 1178 { 1179 mdio_device_reset(&phydev->mdio, value); 1180 } 1181 1182 #define phydev_err(_phydev, format, args...) \ 1183 dev_err(&_phydev->mdio.dev, format, ##args) 1184 1185 #define phydev_info(_phydev, format, args...) \ 1186 dev_info(&_phydev->mdio.dev, format, ##args) 1187 1188 #define phydev_warn(_phydev, format, args...) \ 1189 dev_warn(&_phydev->mdio.dev, format, ##args) 1190 1191 #define phydev_dbg(_phydev, format, args...) \ 1192 dev_dbg(&_phydev->mdio.dev, format, ##args) 1193 1194 static inline const char *phydev_name(const struct phy_device *phydev) 1195 { 1196 return dev_name(&phydev->mdio.dev); 1197 } 1198 1199 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1200 { 1201 mutex_lock(&phydev->mdio.bus->mdio_lock); 1202 } 1203 1204 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1205 { 1206 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1207 } 1208 1209 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1210 __printf(2, 3); 1211 char *phy_attached_info_irq(struct phy_device *phydev) 1212 __malloc; 1213 void phy_attached_info(struct phy_device *phydev); 1214 1215 /* Clause 22 PHY */ 1216 int genphy_read_abilities(struct phy_device *phydev); 1217 int genphy_setup_forced(struct phy_device *phydev); 1218 int genphy_restart_aneg(struct phy_device *phydev); 1219 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1220 int genphy_config_eee_advert(struct phy_device *phydev); 1221 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1222 int genphy_aneg_done(struct phy_device *phydev); 1223 int genphy_update_link(struct phy_device *phydev); 1224 int genphy_read_lpa(struct phy_device *phydev); 1225 int genphy_read_status_fixed(struct phy_device *phydev); 1226 int genphy_read_status(struct phy_device *phydev); 1227 int genphy_suspend(struct phy_device *phydev); 1228 int genphy_resume(struct phy_device *phydev); 1229 int genphy_loopback(struct phy_device *phydev, bool enable); 1230 int genphy_soft_reset(struct phy_device *phydev); 1231 1232 static inline int genphy_config_aneg(struct phy_device *phydev) 1233 { 1234 return __genphy_config_aneg(phydev, false); 1235 } 1236 1237 static inline int genphy_no_soft_reset(struct phy_device *phydev) 1238 { 1239 return 0; 1240 } 1241 static inline int genphy_no_ack_interrupt(struct phy_device *phydev) 1242 { 1243 return 0; 1244 } 1245 static inline int genphy_no_config_intr(struct phy_device *phydev) 1246 { 1247 return 0; 1248 } 1249 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1250 u16 regnum); 1251 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1252 u16 regnum, u16 val); 1253 1254 /* Clause 37 */ 1255 int genphy_c37_config_aneg(struct phy_device *phydev); 1256 int genphy_c37_read_status(struct phy_device *phydev); 1257 1258 /* Clause 45 PHY */ 1259 int genphy_c45_restart_aneg(struct phy_device *phydev); 1260 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1261 int genphy_c45_aneg_done(struct phy_device *phydev); 1262 int genphy_c45_read_link(struct phy_device *phydev); 1263 int genphy_c45_read_lpa(struct phy_device *phydev); 1264 int genphy_c45_read_pma(struct phy_device *phydev); 1265 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1266 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1267 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1268 int genphy_c45_read_mdix(struct phy_device *phydev); 1269 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1270 int genphy_c45_read_status(struct phy_device *phydev); 1271 int genphy_c45_config_aneg(struct phy_device *phydev); 1272 1273 /* The gen10g_* functions are the old Clause 45 stub */ 1274 int gen10g_config_aneg(struct phy_device *phydev); 1275 1276 static inline int phy_read_status(struct phy_device *phydev) 1277 { 1278 if (!phydev->drv) 1279 return -EIO; 1280 1281 if (phydev->drv->read_status) 1282 return phydev->drv->read_status(phydev); 1283 else 1284 return genphy_read_status(phydev); 1285 } 1286 1287 void phy_driver_unregister(struct phy_driver *drv); 1288 void phy_drivers_unregister(struct phy_driver *drv, int n); 1289 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1290 int phy_drivers_register(struct phy_driver *new_driver, int n, 1291 struct module *owner); 1292 void phy_state_machine(struct work_struct *work); 1293 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1294 void phy_mac_interrupt(struct phy_device *phydev); 1295 void phy_start_machine(struct phy_device *phydev); 1296 void phy_stop_machine(struct phy_device *phydev); 1297 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1298 struct ethtool_link_ksettings *cmd); 1299 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1300 const struct ethtool_link_ksettings *cmd); 1301 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1302 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1303 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1304 void phy_request_interrupt(struct phy_device *phydev); 1305 void phy_free_interrupt(struct phy_device *phydev); 1306 void phy_print_status(struct phy_device *phydev); 1307 int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1308 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1309 void phy_advertise_supported(struct phy_device *phydev); 1310 void phy_support_sym_pause(struct phy_device *phydev); 1311 void phy_support_asym_pause(struct phy_device *phydev); 1312 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1313 bool autoneg); 1314 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1315 bool phy_validate_pause(struct phy_device *phydev, 1316 struct ethtool_pauseparam *pp); 1317 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1318 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1319 bool *tx_pause, bool *rx_pause); 1320 1321 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1322 int (*run)(struct phy_device *)); 1323 int phy_register_fixup_for_id(const char *bus_id, 1324 int (*run)(struct phy_device *)); 1325 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1326 int (*run)(struct phy_device *)); 1327 1328 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1329 int phy_unregister_fixup_for_id(const char *bus_id); 1330 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1331 1332 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1333 int phy_get_eee_err(struct phy_device *phydev); 1334 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1335 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1336 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1337 void phy_ethtool_get_wol(struct phy_device *phydev, 1338 struct ethtool_wolinfo *wol); 1339 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1340 struct ethtool_link_ksettings *cmd); 1341 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1342 const struct ethtool_link_ksettings *cmd); 1343 int phy_ethtool_nway_reset(struct net_device *ndev); 1344 1345 #if IS_ENABLED(CONFIG_PHYLIB) 1346 int __init mdio_bus_init(void); 1347 void mdio_bus_exit(void); 1348 #endif 1349 1350 /* Inline function for use within net/core/ethtool.c (built-in) */ 1351 static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data) 1352 { 1353 if (!phydev->drv) 1354 return -EIO; 1355 1356 mutex_lock(&phydev->lock); 1357 phydev->drv->get_strings(phydev, data); 1358 mutex_unlock(&phydev->lock); 1359 1360 return 0; 1361 } 1362 1363 static inline int phy_ethtool_get_sset_count(struct phy_device *phydev) 1364 { 1365 int ret; 1366 1367 if (!phydev->drv) 1368 return -EIO; 1369 1370 if (phydev->drv->get_sset_count && 1371 phydev->drv->get_strings && 1372 phydev->drv->get_stats) { 1373 mutex_lock(&phydev->lock); 1374 ret = phydev->drv->get_sset_count(phydev); 1375 mutex_unlock(&phydev->lock); 1376 1377 return ret; 1378 } 1379 1380 return -EOPNOTSUPP; 1381 } 1382 1383 static inline int phy_ethtool_get_stats(struct phy_device *phydev, 1384 struct ethtool_stats *stats, u64 *data) 1385 { 1386 if (!phydev->drv) 1387 return -EIO; 1388 1389 mutex_lock(&phydev->lock); 1390 phydev->drv->get_stats(phydev, stats, data); 1391 mutex_unlock(&phydev->lock); 1392 1393 return 0; 1394 } 1395 1396 extern struct bus_type mdio_bus_type; 1397 1398 struct mdio_board_info { 1399 const char *bus_id; 1400 char modalias[MDIO_NAME_SIZE]; 1401 int mdio_addr; 1402 const void *platform_data; 1403 }; 1404 1405 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1406 int mdiobus_register_board_info(const struct mdio_board_info *info, 1407 unsigned int n); 1408 #else 1409 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1410 unsigned int n) 1411 { 1412 return 0; 1413 } 1414 #endif 1415 1416 1417 /** 1418 * module_phy_driver() - Helper macro for registering PHY drivers 1419 * @__phy_drivers: array of PHY drivers to register 1420 * 1421 * Helper macro for PHY drivers which do not do anything special in module 1422 * init/exit. Each module may only use this macro once, and calling it 1423 * replaces module_init() and module_exit(). 1424 */ 1425 #define phy_module_driver(__phy_drivers, __count) \ 1426 static int __init phy_module_init(void) \ 1427 { \ 1428 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 1429 } \ 1430 module_init(phy_module_init); \ 1431 static void __exit phy_module_exit(void) \ 1432 { \ 1433 phy_drivers_unregister(__phy_drivers, __count); \ 1434 } \ 1435 module_exit(phy_module_exit) 1436 1437 #define module_phy_driver(__phy_drivers) \ 1438 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 1439 1440 bool phy_driver_is_genphy(struct phy_device *phydev); 1441 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 1442 1443 #endif /* __PHY_H */ 1444