1 /* 2 * Framework and drivers for configuring and reading different PHYs 3 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 4 * 5 * Author: Andy Fleming 6 * 7 * Copyright (c) 2004 Freescale Semiconductor, Inc. 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or (at your 12 * option) any later version. 13 * 14 */ 15 16 #ifndef __PHY_H 17 #define __PHY_H 18 19 #include <linux/compiler.h> 20 #include <linux/spinlock.h> 21 #include <linux/ethtool.h> 22 #include <linux/linkmode.h> 23 #include <linux/mdio.h> 24 #include <linux/mii.h> 25 #include <linux/module.h> 26 #include <linux/timer.h> 27 #include <linux/workqueue.h> 28 #include <linux/mod_devicetable.h> 29 30 #include <linux/atomic.h> 31 32 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 33 SUPPORTED_TP | \ 34 SUPPORTED_MII) 35 36 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 37 SUPPORTED_10baseT_Full) 38 39 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 40 SUPPORTED_100baseT_Full) 41 42 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 43 SUPPORTED_1000baseT_Full) 44 45 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 53 54 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 55 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 56 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 57 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 58 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 59 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 60 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 61 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 62 63 extern const int phy_10_100_features_array[4]; 64 extern const int phy_basic_t1_features_array[2]; 65 extern const int phy_gbit_features_array[2]; 66 extern const int phy_10gbit_features_array[1]; 67 68 /* 69 * Set phydev->irq to PHY_POLL if interrupts are not supported, 70 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if 71 * the attached driver handles the interrupt 72 */ 73 #define PHY_POLL -1 74 #define PHY_IGNORE_INTERRUPT -2 75 76 #define PHY_IS_INTERNAL 0x00000001 77 #define PHY_RST_AFTER_CLK_EN 0x00000002 78 #define MDIO_DEVICE_IS_PHY 0x80000000 79 80 /* Interface Mode definitions */ 81 typedef enum { 82 PHY_INTERFACE_MODE_NA, 83 PHY_INTERFACE_MODE_INTERNAL, 84 PHY_INTERFACE_MODE_MII, 85 PHY_INTERFACE_MODE_GMII, 86 PHY_INTERFACE_MODE_SGMII, 87 PHY_INTERFACE_MODE_TBI, 88 PHY_INTERFACE_MODE_REVMII, 89 PHY_INTERFACE_MODE_RMII, 90 PHY_INTERFACE_MODE_RGMII, 91 PHY_INTERFACE_MODE_RGMII_ID, 92 PHY_INTERFACE_MODE_RGMII_RXID, 93 PHY_INTERFACE_MODE_RGMII_TXID, 94 PHY_INTERFACE_MODE_RTBI, 95 PHY_INTERFACE_MODE_SMII, 96 PHY_INTERFACE_MODE_XGMII, 97 PHY_INTERFACE_MODE_MOCA, 98 PHY_INTERFACE_MODE_QSGMII, 99 PHY_INTERFACE_MODE_TRGMII, 100 PHY_INTERFACE_MODE_1000BASEX, 101 PHY_INTERFACE_MODE_2500BASEX, 102 PHY_INTERFACE_MODE_RXAUI, 103 PHY_INTERFACE_MODE_XAUI, 104 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */ 105 PHY_INTERFACE_MODE_10GKR, 106 PHY_INTERFACE_MODE_USXGMII, 107 PHY_INTERFACE_MODE_MAX, 108 } phy_interface_t; 109 110 /** 111 * phy_supported_speeds - return all speeds currently supported by a phy device 112 * @phy: The phy device to return supported speeds of. 113 * @speeds: buffer to store supported speeds in. 114 * @size: size of speeds buffer. 115 * 116 * Description: Returns the number of supported speeds, and fills 117 * the speeds buffer with the supported speeds. If speeds buffer is 118 * too small to contain all currently supported speeds, will return as 119 * many speeds as can fit. 120 */ 121 unsigned int phy_supported_speeds(struct phy_device *phy, 122 unsigned int *speeds, 123 unsigned int size); 124 125 /** 126 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 127 * @interface: enum phy_interface_t value 128 * 129 * Description: maps 'enum phy_interface_t' defined in this file 130 * into the device tree binding of 'phy-mode', so that Ethernet 131 * device driver can get phy interface from device tree. 132 */ 133 static inline const char *phy_modes(phy_interface_t interface) 134 { 135 switch (interface) { 136 case PHY_INTERFACE_MODE_NA: 137 return ""; 138 case PHY_INTERFACE_MODE_INTERNAL: 139 return "internal"; 140 case PHY_INTERFACE_MODE_MII: 141 return "mii"; 142 case PHY_INTERFACE_MODE_GMII: 143 return "gmii"; 144 case PHY_INTERFACE_MODE_SGMII: 145 return "sgmii"; 146 case PHY_INTERFACE_MODE_TBI: 147 return "tbi"; 148 case PHY_INTERFACE_MODE_REVMII: 149 return "rev-mii"; 150 case PHY_INTERFACE_MODE_RMII: 151 return "rmii"; 152 case PHY_INTERFACE_MODE_RGMII: 153 return "rgmii"; 154 case PHY_INTERFACE_MODE_RGMII_ID: 155 return "rgmii-id"; 156 case PHY_INTERFACE_MODE_RGMII_RXID: 157 return "rgmii-rxid"; 158 case PHY_INTERFACE_MODE_RGMII_TXID: 159 return "rgmii-txid"; 160 case PHY_INTERFACE_MODE_RTBI: 161 return "rtbi"; 162 case PHY_INTERFACE_MODE_SMII: 163 return "smii"; 164 case PHY_INTERFACE_MODE_XGMII: 165 return "xgmii"; 166 case PHY_INTERFACE_MODE_MOCA: 167 return "moca"; 168 case PHY_INTERFACE_MODE_QSGMII: 169 return "qsgmii"; 170 case PHY_INTERFACE_MODE_TRGMII: 171 return "trgmii"; 172 case PHY_INTERFACE_MODE_1000BASEX: 173 return "1000base-x"; 174 case PHY_INTERFACE_MODE_2500BASEX: 175 return "2500base-x"; 176 case PHY_INTERFACE_MODE_RXAUI: 177 return "rxaui"; 178 case PHY_INTERFACE_MODE_XAUI: 179 return "xaui"; 180 case PHY_INTERFACE_MODE_10GKR: 181 return "10gbase-kr"; 182 case PHY_INTERFACE_MODE_USXGMII: 183 return "usxgmii"; 184 default: 185 return "unknown"; 186 } 187 } 188 189 190 #define PHY_INIT_TIMEOUT 100000 191 #define PHY_STATE_TIME 1 192 #define PHY_FORCE_TIMEOUT 10 193 194 #define PHY_MAX_ADDR 32 195 196 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 197 #define PHY_ID_FMT "%s:%02x" 198 199 #define MII_BUS_ID_SIZE 61 200 201 /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit 202 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */ 203 #define MII_ADDR_C45 (1<<30) 204 205 struct device; 206 struct phylink; 207 struct sk_buff; 208 209 /* 210 * The Bus class for PHYs. Devices which provide access to 211 * PHYs should register using this structure 212 */ 213 struct mii_bus { 214 struct module *owner; 215 const char *name; 216 char id[MII_BUS_ID_SIZE]; 217 void *priv; 218 int (*read)(struct mii_bus *bus, int addr, int regnum); 219 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 220 int (*reset)(struct mii_bus *bus); 221 222 /* 223 * A lock to ensure that only one thing can read/write 224 * the MDIO bus at a time 225 */ 226 struct mutex mdio_lock; 227 228 struct device *parent; 229 enum { 230 MDIOBUS_ALLOCATED = 1, 231 MDIOBUS_REGISTERED, 232 MDIOBUS_UNREGISTERED, 233 MDIOBUS_RELEASED, 234 } state; 235 struct device dev; 236 237 /* list of all PHYs on bus */ 238 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 239 240 /* PHY addresses to be ignored when probing */ 241 u32 phy_mask; 242 243 /* PHY addresses to ignore the TA/read failure */ 244 u32 phy_ignore_ta_mask; 245 246 /* 247 * An array of interrupts, each PHY's interrupt at the index 248 * matching its address 249 */ 250 int irq[PHY_MAX_ADDR]; 251 252 /* GPIO reset pulse width in microseconds */ 253 int reset_delay_us; 254 /* RESET GPIO descriptor pointer */ 255 struct gpio_desc *reset_gpiod; 256 }; 257 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 258 259 struct mii_bus *mdiobus_alloc_size(size_t); 260 static inline struct mii_bus *mdiobus_alloc(void) 261 { 262 return mdiobus_alloc_size(0); 263 } 264 265 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 266 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 267 void mdiobus_unregister(struct mii_bus *bus); 268 void mdiobus_free(struct mii_bus *bus); 269 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 270 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 271 { 272 return devm_mdiobus_alloc_size(dev, 0); 273 } 274 275 void devm_mdiobus_free(struct device *dev, struct mii_bus *bus); 276 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); 277 278 #define PHY_INTERRUPT_DISABLED false 279 #define PHY_INTERRUPT_ENABLED true 280 281 /* PHY state machine states: 282 * 283 * DOWN: PHY device and driver are not ready for anything. probe 284 * should be called if and only if the PHY is in this state, 285 * given that the PHY device exists. 286 * - PHY driver probe function will set the state to READY 287 * 288 * READY: PHY is ready to send and receive packets, but the 289 * controller is not. By default, PHYs which do not implement 290 * probe will be set to this state by phy_probe(). 291 * - start will set the state to UP 292 * 293 * UP: The PHY and attached device are ready to do work. 294 * Interrupts should be started here. 295 * - timer moves to NOLINK or RUNNING 296 * 297 * NOLINK: PHY is up, but not currently plugged in. 298 * - irq or timer will set RUNNING if link comes back 299 * - phy_stop moves to HALTED 300 * 301 * FORCING: PHY is being configured with forced settings 302 * - if link is up, move to RUNNING 303 * - If link is down, we drop to the next highest setting, and 304 * retry (FORCING) after a timeout 305 * - phy_stop moves to HALTED 306 * 307 * RUNNING: PHY is currently up, running, and possibly sending 308 * and/or receiving packets 309 * - irq or timer will set NOLINK if link goes down 310 * - phy_stop moves to HALTED 311 * 312 * HALTED: PHY is up, but no polling or interrupts are done. Or 313 * PHY is in an error state. 314 * - phy_start moves to UP 315 */ 316 enum phy_state { 317 PHY_DOWN = 0, 318 PHY_READY, 319 PHY_HALTED, 320 PHY_UP, 321 PHY_RUNNING, 322 PHY_NOLINK, 323 PHY_FORCING, 324 }; 325 326 /** 327 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 328 * @devices_in_package: Bit vector of devices present. 329 * @device_ids: The device identifer for each present device. 330 */ 331 struct phy_c45_device_ids { 332 u32 devices_in_package; 333 u32 device_ids[8]; 334 }; 335 336 /* phy_device: An instance of a PHY 337 * 338 * drv: Pointer to the driver for this PHY instance 339 * phy_id: UID for this device found during discovery 340 * c45_ids: 802.3-c45 Device Identifers if is_c45. 341 * is_c45: Set to true if this phy uses clause 45 addressing. 342 * is_internal: Set to true if this phy is internal to a MAC. 343 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc. 344 * is_gigabit_capable: Set to true if PHY supports 1000Mbps 345 * has_fixups: Set to true if this phy has fixups/quirks. 346 * suspended: Set to true if this phy has been suspended successfully. 347 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 348 * loopback_enabled: Set true if this phy has been loopbacked successfully. 349 * state: state of the PHY for management purposes 350 * dev_flags: Device-specific flags used by the PHY driver. 351 * link_timeout: The number of timer firings to wait before the 352 * giving up on the current attempt at acquiring a link 353 * irq: IRQ number of the PHY's interrupt (-1 if none) 354 * phy_timer: The timer for handling the state machine 355 * attached_dev: The attached enet driver's device instance ptr 356 * adjust_link: Callback for the enet controller to respond to 357 * changes in the link state. 358 * 359 * speed, duplex, pause, supported, advertising, lp_advertising, 360 * and autoneg are used like in mii_if_info 361 * 362 * interrupts currently only supports enabled or disabled, 363 * but could be changed in the future to support enabling 364 * and disabling specific interrupts 365 * 366 * Contains some infrastructure for polling and interrupt 367 * handling, as well as handling shifts in PHY hardware state 368 */ 369 struct phy_device { 370 struct mdio_device mdio; 371 372 /* Information about the PHY type */ 373 /* And management functions */ 374 struct phy_driver *drv; 375 376 u32 phy_id; 377 378 struct phy_c45_device_ids c45_ids; 379 unsigned is_c45:1; 380 unsigned is_internal:1; 381 unsigned is_pseudo_fixed_link:1; 382 unsigned is_gigabit_capable:1; 383 unsigned has_fixups:1; 384 unsigned suspended:1; 385 unsigned sysfs_links:1; 386 unsigned loopback_enabled:1; 387 388 unsigned autoneg:1; 389 /* The most recently read link state */ 390 unsigned link:1; 391 unsigned autoneg_complete:1; 392 393 /* Interrupts are enabled */ 394 unsigned interrupts:1; 395 396 enum phy_state state; 397 398 u32 dev_flags; 399 400 phy_interface_t interface; 401 402 /* 403 * forced speed & duplex (no autoneg) 404 * partner speed & duplex & pause (autoneg) 405 */ 406 int speed; 407 int duplex; 408 int pause; 409 int asym_pause; 410 411 /* Union of PHY and Attached devices' supported link modes */ 412 /* See ethtool.h for more info */ 413 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 414 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 415 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 416 417 /* Energy efficient ethernet modes which should be prohibited */ 418 u32 eee_broken_modes; 419 420 int link_timeout; 421 422 #ifdef CONFIG_LED_TRIGGER_PHY 423 struct phy_led_trigger *phy_led_triggers; 424 unsigned int phy_num_led_triggers; 425 struct phy_led_trigger *last_triggered; 426 427 struct phy_led_trigger *led_link_trigger; 428 #endif 429 430 /* 431 * Interrupt number for this PHY 432 * -1 means no interrupt 433 */ 434 int irq; 435 436 /* private data pointer */ 437 /* For use by PHYs to maintain extra state */ 438 void *priv; 439 440 /* Interrupt and Polling infrastructure */ 441 struct delayed_work state_queue; 442 443 struct mutex lock; 444 445 struct phylink *phylink; 446 struct net_device *attached_dev; 447 448 u8 mdix; 449 u8 mdix_ctrl; 450 451 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier); 452 void (*adjust_link)(struct net_device *dev); 453 }; 454 #define to_phy_device(d) container_of(to_mdio_device(d), \ 455 struct phy_device, mdio) 456 457 /* struct phy_driver: Driver structure for a particular PHY type 458 * 459 * driver_data: static driver data 460 * phy_id: The result of reading the UID registers of this PHY 461 * type, and ANDing them with the phy_id_mask. This driver 462 * only works for PHYs with IDs which match this field 463 * name: The friendly name of this PHY type 464 * phy_id_mask: Defines the important bits of the phy_id 465 * features: A mandatory list of features (speed, duplex, etc) 466 * supported by this PHY 467 * flags: A bitfield defining certain other features this PHY 468 * supports (like interrupts) 469 * 470 * All functions are optional. If config_aneg or read_status 471 * are not implemented, the phy core uses the genphy versions. 472 * Note that none of these functions should be called from 473 * interrupt time. The goal is for the bus read/write functions 474 * to be able to block when the bus transaction is happening, 475 * and be freed up by an interrupt (The MPC85xx has this ability, 476 * though it is not currently supported in the driver). 477 */ 478 struct phy_driver { 479 struct mdio_driver_common mdiodrv; 480 u32 phy_id; 481 char *name; 482 u32 phy_id_mask; 483 const unsigned long * const features; 484 u32 flags; 485 const void *driver_data; 486 487 /* 488 * Called to issue a PHY software reset 489 */ 490 int (*soft_reset)(struct phy_device *phydev); 491 492 /* 493 * Called to initialize the PHY, 494 * including after a reset 495 */ 496 int (*config_init)(struct phy_device *phydev); 497 498 /* 499 * Called during discovery. Used to set 500 * up device-specific structures, if any 501 */ 502 int (*probe)(struct phy_device *phydev); 503 504 /* 505 * Probe the hardware to determine what abilities it has. 506 * Should only set phydev->supported. 507 */ 508 int (*get_features)(struct phy_device *phydev); 509 510 /* PHY Power Management */ 511 int (*suspend)(struct phy_device *phydev); 512 int (*resume)(struct phy_device *phydev); 513 514 /* 515 * Configures the advertisement and resets 516 * autonegotiation if phydev->autoneg is on, 517 * forces the speed to the current settings in phydev 518 * if phydev->autoneg is off 519 */ 520 int (*config_aneg)(struct phy_device *phydev); 521 522 /* Determines the auto negotiation result */ 523 int (*aneg_done)(struct phy_device *phydev); 524 525 /* Determines the negotiated speed and duplex */ 526 int (*read_status)(struct phy_device *phydev); 527 528 /* Clears any pending interrupts */ 529 int (*ack_interrupt)(struct phy_device *phydev); 530 531 /* Enables or disables interrupts */ 532 int (*config_intr)(struct phy_device *phydev); 533 534 /* 535 * Checks if the PHY generated an interrupt. 536 * For multi-PHY devices with shared PHY interrupt pin 537 */ 538 int (*did_interrupt)(struct phy_device *phydev); 539 540 /* Clears up any memory if needed */ 541 void (*remove)(struct phy_device *phydev); 542 543 /* Returns true if this is a suitable driver for the given 544 * phydev. If NULL, matching is based on phy_id and 545 * phy_id_mask. 546 */ 547 int (*match_phy_device)(struct phy_device *phydev); 548 549 /* Handles ethtool queries for hardware time stamping. */ 550 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti); 551 552 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */ 553 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr); 554 555 /* 556 * Requests a Rx timestamp for 'skb'. If the skb is accepted, 557 * the phy driver promises to deliver it using netif_rx() as 558 * soon as a timestamp becomes available. One of the 559 * PTP_CLASS_ values is passed in 'type'. The function must 560 * return true if the skb is accepted for delivery. 561 */ 562 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); 563 564 /* 565 * Requests a Tx timestamp for 'skb'. The phy driver promises 566 * to deliver it using skb_complete_tx_timestamp() as soon as a 567 * timestamp becomes available. One of the PTP_CLASS_ values 568 * is passed in 'type'. 569 */ 570 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); 571 572 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to 573 * enable Wake on LAN, so set_wol is provided to be called in the 574 * ethernet driver's set_wol function. */ 575 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 576 577 /* See set_wol, but for checking whether Wake on LAN is enabled. */ 578 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 579 580 /* 581 * Called to inform a PHY device driver when the core is about to 582 * change the link state. This callback is supposed to be used as 583 * fixup hook for drivers that need to take action when the link 584 * state changes. Drivers are by no means allowed to mess with the 585 * PHY device structure in their implementations. 586 */ 587 void (*link_change_notify)(struct phy_device *dev); 588 589 /* 590 * Phy specific driver override for reading a MMD register. 591 * This function is optional for PHY specific drivers. When 592 * not provided, the default MMD read function will be used 593 * by phy_read_mmd(), which will use either a direct read for 594 * Clause 45 PHYs or an indirect read for Clause 22 PHYs. 595 * devnum is the MMD device number within the PHY device, 596 * regnum is the register within the selected MMD device. 597 */ 598 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 599 600 /* 601 * Phy specific driver override for writing a MMD register. 602 * This function is optional for PHY specific drivers. When 603 * not provided, the default MMD write function will be used 604 * by phy_write_mmd(), which will use either a direct write for 605 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs. 606 * devnum is the MMD device number within the PHY device, 607 * regnum is the register within the selected MMD device. 608 * val is the value to be written. 609 */ 610 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 611 u16 val); 612 613 int (*read_page)(struct phy_device *dev); 614 int (*write_page)(struct phy_device *dev, int page); 615 616 /* Get the size and type of the eeprom contained within a plug-in 617 * module */ 618 int (*module_info)(struct phy_device *dev, 619 struct ethtool_modinfo *modinfo); 620 621 /* Get the eeprom information from the plug-in module */ 622 int (*module_eeprom)(struct phy_device *dev, 623 struct ethtool_eeprom *ee, u8 *data); 624 625 /* Get statistics from the phy using ethtool */ 626 int (*get_sset_count)(struct phy_device *dev); 627 void (*get_strings)(struct phy_device *dev, u8 *data); 628 void (*get_stats)(struct phy_device *dev, 629 struct ethtool_stats *stats, u64 *data); 630 631 /* Get and Set PHY tunables */ 632 int (*get_tunable)(struct phy_device *dev, 633 struct ethtool_tunable *tuna, void *data); 634 int (*set_tunable)(struct phy_device *dev, 635 struct ethtool_tunable *tuna, 636 const void *data); 637 int (*set_loopback)(struct phy_device *dev, bool enable); 638 }; 639 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 640 struct phy_driver, mdiodrv) 641 642 #define PHY_ANY_ID "MATCH ANY PHY" 643 #define PHY_ANY_UID 0xffffffff 644 645 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 646 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 647 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 648 649 /* A Structure for boards to register fixups with the PHY Lib */ 650 struct phy_fixup { 651 struct list_head list; 652 char bus_id[MII_BUS_ID_SIZE + 3]; 653 u32 phy_uid; 654 u32 phy_uid_mask; 655 int (*run)(struct phy_device *phydev); 656 }; 657 658 const char *phy_speed_to_str(int speed); 659 const char *phy_duplex_to_str(unsigned int duplex); 660 661 /* A structure for mapping a particular speed and duplex 662 * combination to a particular SUPPORTED and ADVERTISED value 663 */ 664 struct phy_setting { 665 u32 speed; 666 u8 duplex; 667 u8 bit; 668 }; 669 670 const struct phy_setting * 671 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 672 bool exact); 673 size_t phy_speeds(unsigned int *speeds, size_t size, 674 unsigned long *mask); 675 void of_set_phy_supported(struct phy_device *phydev); 676 void of_set_phy_eee_broken(struct phy_device *phydev); 677 678 /** 679 * phy_is_started - Convenience function to check whether PHY is started 680 * @phydev: The phy_device struct 681 */ 682 static inline bool phy_is_started(struct phy_device *phydev) 683 { 684 return phydev->state >= PHY_UP; 685 } 686 687 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 688 689 /** 690 * phy_read - Convenience function for reading a given PHY register 691 * @phydev: the phy_device struct 692 * @regnum: register number to read 693 * 694 * NOTE: MUST NOT be called from interrupt context, 695 * because the bus read/write functions may wait for an interrupt 696 * to conclude the operation. 697 */ 698 static inline int phy_read(struct phy_device *phydev, u32 regnum) 699 { 700 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 701 } 702 703 /** 704 * __phy_read - convenience function for reading a given PHY register 705 * @phydev: the phy_device struct 706 * @regnum: register number to read 707 * 708 * The caller must have taken the MDIO bus lock. 709 */ 710 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 711 { 712 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 713 } 714 715 /** 716 * phy_write - Convenience function for writing a given PHY register 717 * @phydev: the phy_device struct 718 * @regnum: register number to write 719 * @val: value to write to @regnum 720 * 721 * NOTE: MUST NOT be called from interrupt context, 722 * because the bus read/write functions may wait for an interrupt 723 * to conclude the operation. 724 */ 725 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 726 { 727 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 728 } 729 730 /** 731 * __phy_write - Convenience function for writing a given PHY register 732 * @phydev: the phy_device struct 733 * @regnum: register number to write 734 * @val: value to write to @regnum 735 * 736 * The caller must have taken the MDIO bus lock. 737 */ 738 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 739 { 740 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 741 val); 742 } 743 744 /** 745 * phy_read_mmd - Convenience function for reading a register 746 * from an MMD on a given PHY. 747 * @phydev: The phy_device struct 748 * @devad: The MMD to read from 749 * @regnum: The register on the MMD to read 750 * 751 * Same rules as for phy_read(); 752 */ 753 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 754 755 /** 756 * __phy_read_mmd - Convenience function for reading a register 757 * from an MMD on a given PHY. 758 * @phydev: The phy_device struct 759 * @devad: The MMD to read from 760 * @regnum: The register on the MMD to read 761 * 762 * Same rules as for __phy_read(); 763 */ 764 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 765 766 /** 767 * phy_write_mmd - Convenience function for writing a register 768 * on an MMD on a given PHY. 769 * @phydev: The phy_device struct 770 * @devad: The MMD to write to 771 * @regnum: The register on the MMD to read 772 * @val: value to write to @regnum 773 * 774 * Same rules as for phy_write(); 775 */ 776 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 777 778 /** 779 * __phy_write_mmd - Convenience function for writing a register 780 * on an MMD on a given PHY. 781 * @phydev: The phy_device struct 782 * @devad: The MMD to write to 783 * @regnum: The register on the MMD to read 784 * @val: value to write to @regnum 785 * 786 * Same rules as for __phy_write(); 787 */ 788 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 789 790 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 791 u16 set); 792 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 793 u16 set); 794 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 795 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 796 797 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 798 u16 mask, u16 set); 799 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 800 u16 mask, u16 set); 801 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 802 u16 mask, u16 set); 803 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 804 u16 mask, u16 set); 805 806 /** 807 * __phy_set_bits - Convenience function for setting bits in a PHY register 808 * @phydev: the phy_device struct 809 * @regnum: register number to write 810 * @val: bits to set 811 * 812 * The caller must have taken the MDIO bus lock. 813 */ 814 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 815 { 816 return __phy_modify(phydev, regnum, 0, val); 817 } 818 819 /** 820 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 821 * @phydev: the phy_device struct 822 * @regnum: register number to write 823 * @val: bits to clear 824 * 825 * The caller must have taken the MDIO bus lock. 826 */ 827 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 828 u16 val) 829 { 830 return __phy_modify(phydev, regnum, val, 0); 831 } 832 833 /** 834 * phy_set_bits - Convenience function for setting bits in a PHY register 835 * @phydev: the phy_device struct 836 * @regnum: register number to write 837 * @val: bits to set 838 */ 839 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 840 { 841 return phy_modify(phydev, regnum, 0, val); 842 } 843 844 /** 845 * phy_clear_bits - Convenience function for clearing bits in a PHY register 846 * @phydev: the phy_device struct 847 * @regnum: register number to write 848 * @val: bits to clear 849 */ 850 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 851 { 852 return phy_modify(phydev, regnum, val, 0); 853 } 854 855 /** 856 * __phy_set_bits_mmd - Convenience function for setting bits in a register 857 * on MMD 858 * @phydev: the phy_device struct 859 * @devad: the MMD containing register to modify 860 * @regnum: register number to modify 861 * @val: bits to set 862 * 863 * The caller must have taken the MDIO bus lock. 864 */ 865 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 866 u32 regnum, u16 val) 867 { 868 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 869 } 870 871 /** 872 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 873 * on MMD 874 * @phydev: the phy_device struct 875 * @devad: the MMD containing register to modify 876 * @regnum: register number to modify 877 * @val: bits to clear 878 * 879 * The caller must have taken the MDIO bus lock. 880 */ 881 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 882 u32 regnum, u16 val) 883 { 884 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 885 } 886 887 /** 888 * phy_set_bits_mmd - Convenience function for setting bits in a register 889 * on MMD 890 * @phydev: the phy_device struct 891 * @devad: the MMD containing register to modify 892 * @regnum: register number to modify 893 * @val: bits to set 894 */ 895 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 896 u32 regnum, u16 val) 897 { 898 return phy_modify_mmd(phydev, devad, regnum, 0, val); 899 } 900 901 /** 902 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 903 * on MMD 904 * @phydev: the phy_device struct 905 * @devad: the MMD containing register to modify 906 * @regnum: register number to modify 907 * @val: bits to clear 908 */ 909 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 910 u32 regnum, u16 val) 911 { 912 return phy_modify_mmd(phydev, devad, regnum, val, 0); 913 } 914 915 /** 916 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 917 * @phydev: the phy_device struct 918 * 919 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 920 * PHY_IGNORE_INTERRUPT 921 */ 922 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 923 { 924 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT; 925 } 926 927 /** 928 * phy_polling_mode - Convenience function for testing whether polling is 929 * used to detect PHY status changes 930 * @phydev: the phy_device struct 931 */ 932 static inline bool phy_polling_mode(struct phy_device *phydev) 933 { 934 return phydev->irq == PHY_POLL; 935 } 936 937 /** 938 * phy_is_internal - Convenience function for testing if a PHY is internal 939 * @phydev: the phy_device struct 940 */ 941 static inline bool phy_is_internal(struct phy_device *phydev) 942 { 943 return phydev->is_internal; 944 } 945 946 /** 947 * phy_interface_mode_is_rgmii - Convenience function for testing if a 948 * PHY interface mode is RGMII (all variants) 949 * @mode: the phy_interface_t enum 950 */ 951 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 952 { 953 return mode >= PHY_INTERFACE_MODE_RGMII && 954 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 955 }; 956 957 /** 958 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z 959 * negotiation 960 * @mode: one of &enum phy_interface_t 961 * 962 * Returns true if the phy interface mode uses the 16-bit negotiation 963 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 964 */ 965 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 966 { 967 return mode == PHY_INTERFACE_MODE_1000BASEX || 968 mode == PHY_INTERFACE_MODE_2500BASEX; 969 } 970 971 /** 972 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 973 * is RGMII (all variants) 974 * @phydev: the phy_device struct 975 */ 976 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 977 { 978 return phy_interface_mode_is_rgmii(phydev->interface); 979 }; 980 981 /* 982 * phy_is_pseudo_fixed_link - Convenience function for testing if this 983 * PHY is the CPU port facing side of an Ethernet switch, or similar. 984 * @phydev: the phy_device struct 985 */ 986 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 987 { 988 return phydev->is_pseudo_fixed_link; 989 } 990 991 int phy_save_page(struct phy_device *phydev); 992 int phy_select_page(struct phy_device *phydev, int page); 993 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 994 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 995 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 996 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 997 u16 mask, u16 set); 998 999 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id, 1000 bool is_c45, 1001 struct phy_c45_device_ids *c45_ids); 1002 #if IS_ENABLED(CONFIG_PHYLIB) 1003 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1004 int phy_device_register(struct phy_device *phy); 1005 void phy_device_free(struct phy_device *phydev); 1006 #else 1007 static inline 1008 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1009 { 1010 return NULL; 1011 } 1012 1013 static inline int phy_device_register(struct phy_device *phy) 1014 { 1015 return 0; 1016 } 1017 1018 static inline void phy_device_free(struct phy_device *phydev) { } 1019 #endif /* CONFIG_PHYLIB */ 1020 void phy_device_remove(struct phy_device *phydev); 1021 int phy_init_hw(struct phy_device *phydev); 1022 int phy_suspend(struct phy_device *phydev); 1023 int phy_resume(struct phy_device *phydev); 1024 int __phy_resume(struct phy_device *phydev); 1025 int phy_loopback(struct phy_device *phydev, bool enable); 1026 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1027 phy_interface_t interface); 1028 struct phy_device *phy_find_first(struct mii_bus *bus); 1029 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1030 u32 flags, phy_interface_t interface); 1031 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1032 void (*handler)(struct net_device *), 1033 phy_interface_t interface); 1034 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1035 void (*handler)(struct net_device *), 1036 phy_interface_t interface); 1037 void phy_disconnect(struct phy_device *phydev); 1038 void phy_detach(struct phy_device *phydev); 1039 void phy_start(struct phy_device *phydev); 1040 void phy_stop(struct phy_device *phydev); 1041 int phy_start_aneg(struct phy_device *phydev); 1042 int phy_aneg_done(struct phy_device *phydev); 1043 int phy_speed_down(struct phy_device *phydev, bool sync); 1044 int phy_speed_up(struct phy_device *phydev); 1045 1046 int phy_restart_aneg(struct phy_device *phydev); 1047 int phy_reset_after_clk_enable(struct phy_device *phydev); 1048 1049 static inline void phy_device_reset(struct phy_device *phydev, int value) 1050 { 1051 mdio_device_reset(&phydev->mdio, value); 1052 } 1053 1054 #define phydev_err(_phydev, format, args...) \ 1055 dev_err(&_phydev->mdio.dev, format, ##args) 1056 1057 #define phydev_info(_phydev, format, args...) \ 1058 dev_info(&_phydev->mdio.dev, format, ##args) 1059 1060 #define phydev_warn(_phydev, format, args...) \ 1061 dev_warn(&_phydev->mdio.dev, format, ##args) 1062 1063 #define phydev_dbg(_phydev, format, args...) \ 1064 dev_dbg(&_phydev->mdio.dev, format, ##args) 1065 1066 static inline const char *phydev_name(const struct phy_device *phydev) 1067 { 1068 return dev_name(&phydev->mdio.dev); 1069 } 1070 1071 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1072 __printf(2, 3); 1073 void phy_attached_info(struct phy_device *phydev); 1074 1075 /* Clause 22 PHY */ 1076 int genphy_config_init(struct phy_device *phydev); 1077 int genphy_read_abilities(struct phy_device *phydev); 1078 int genphy_setup_forced(struct phy_device *phydev); 1079 int genphy_restart_aneg(struct phy_device *phydev); 1080 int genphy_config_eee_advert(struct phy_device *phydev); 1081 int genphy_config_aneg(struct phy_device *phydev); 1082 int genphy_aneg_done(struct phy_device *phydev); 1083 int genphy_update_link(struct phy_device *phydev); 1084 int genphy_read_status(struct phy_device *phydev); 1085 int genphy_suspend(struct phy_device *phydev); 1086 int genphy_resume(struct phy_device *phydev); 1087 int genphy_loopback(struct phy_device *phydev, bool enable); 1088 int genphy_soft_reset(struct phy_device *phydev); 1089 static inline int genphy_no_soft_reset(struct phy_device *phydev) 1090 { 1091 return 0; 1092 } 1093 static inline int genphy_no_ack_interrupt(struct phy_device *phydev) 1094 { 1095 return 0; 1096 } 1097 static inline int genphy_no_config_intr(struct phy_device *phydev) 1098 { 1099 return 0; 1100 } 1101 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1102 u16 regnum); 1103 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1104 u16 regnum, u16 val); 1105 1106 /* Clause 45 PHY */ 1107 int genphy_c45_restart_aneg(struct phy_device *phydev); 1108 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1109 int genphy_c45_aneg_done(struct phy_device *phydev); 1110 int genphy_c45_read_link(struct phy_device *phydev); 1111 int genphy_c45_read_lpa(struct phy_device *phydev); 1112 int genphy_c45_read_pma(struct phy_device *phydev); 1113 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1114 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1115 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1116 int genphy_c45_read_mdix(struct phy_device *phydev); 1117 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1118 int genphy_c45_read_status(struct phy_device *phydev); 1119 1120 /* The gen10g_* functions are the old Clause 45 stub */ 1121 int gen10g_config_aneg(struct phy_device *phydev); 1122 1123 static inline int phy_read_status(struct phy_device *phydev) 1124 { 1125 if (!phydev->drv) 1126 return -EIO; 1127 1128 if (phydev->drv->read_status) 1129 return phydev->drv->read_status(phydev); 1130 else 1131 return genphy_read_status(phydev); 1132 } 1133 1134 void phy_driver_unregister(struct phy_driver *drv); 1135 void phy_drivers_unregister(struct phy_driver *drv, int n); 1136 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1137 int phy_drivers_register(struct phy_driver *new_driver, int n, 1138 struct module *owner); 1139 void phy_state_machine(struct work_struct *work); 1140 void phy_mac_interrupt(struct phy_device *phydev); 1141 void phy_start_machine(struct phy_device *phydev); 1142 void phy_stop_machine(struct phy_device *phydev); 1143 int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd); 1144 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1145 struct ethtool_link_ksettings *cmd); 1146 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1147 const struct ethtool_link_ksettings *cmd); 1148 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1149 void phy_request_interrupt(struct phy_device *phydev); 1150 void phy_print_status(struct phy_device *phydev); 1151 int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1152 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1153 void phy_advertise_supported(struct phy_device *phydev); 1154 void phy_support_sym_pause(struct phy_device *phydev); 1155 void phy_support_asym_pause(struct phy_device *phydev); 1156 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1157 bool autoneg); 1158 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1159 bool phy_validate_pause(struct phy_device *phydev, 1160 struct ethtool_pauseparam *pp); 1161 1162 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1163 int (*run)(struct phy_device *)); 1164 int phy_register_fixup_for_id(const char *bus_id, 1165 int (*run)(struct phy_device *)); 1166 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1167 int (*run)(struct phy_device *)); 1168 1169 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1170 int phy_unregister_fixup_for_id(const char *bus_id); 1171 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1172 1173 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1174 int phy_get_eee_err(struct phy_device *phydev); 1175 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1176 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1177 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1178 void phy_ethtool_get_wol(struct phy_device *phydev, 1179 struct ethtool_wolinfo *wol); 1180 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1181 struct ethtool_link_ksettings *cmd); 1182 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1183 const struct ethtool_link_ksettings *cmd); 1184 int phy_ethtool_nway_reset(struct net_device *ndev); 1185 1186 #if IS_ENABLED(CONFIG_PHYLIB) 1187 int __init mdio_bus_init(void); 1188 void mdio_bus_exit(void); 1189 #endif 1190 1191 /* Inline function for use within net/core/ethtool.c (built-in) */ 1192 static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data) 1193 { 1194 if (!phydev->drv) 1195 return -EIO; 1196 1197 mutex_lock(&phydev->lock); 1198 phydev->drv->get_strings(phydev, data); 1199 mutex_unlock(&phydev->lock); 1200 1201 return 0; 1202 } 1203 1204 static inline int phy_ethtool_get_sset_count(struct phy_device *phydev) 1205 { 1206 int ret; 1207 1208 if (!phydev->drv) 1209 return -EIO; 1210 1211 if (phydev->drv->get_sset_count && 1212 phydev->drv->get_strings && 1213 phydev->drv->get_stats) { 1214 mutex_lock(&phydev->lock); 1215 ret = phydev->drv->get_sset_count(phydev); 1216 mutex_unlock(&phydev->lock); 1217 1218 return ret; 1219 } 1220 1221 return -EOPNOTSUPP; 1222 } 1223 1224 static inline int phy_ethtool_get_stats(struct phy_device *phydev, 1225 struct ethtool_stats *stats, u64 *data) 1226 { 1227 if (!phydev->drv) 1228 return -EIO; 1229 1230 mutex_lock(&phydev->lock); 1231 phydev->drv->get_stats(phydev, stats, data); 1232 mutex_unlock(&phydev->lock); 1233 1234 return 0; 1235 } 1236 1237 extern struct bus_type mdio_bus_type; 1238 1239 struct mdio_board_info { 1240 const char *bus_id; 1241 char modalias[MDIO_NAME_SIZE]; 1242 int mdio_addr; 1243 const void *platform_data; 1244 }; 1245 1246 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1247 int mdiobus_register_board_info(const struct mdio_board_info *info, 1248 unsigned int n); 1249 #else 1250 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1251 unsigned int n) 1252 { 1253 return 0; 1254 } 1255 #endif 1256 1257 1258 /** 1259 * module_phy_driver() - Helper macro for registering PHY drivers 1260 * @__phy_drivers: array of PHY drivers to register 1261 * 1262 * Helper macro for PHY drivers which do not do anything special in module 1263 * init/exit. Each module may only use this macro once, and calling it 1264 * replaces module_init() and module_exit(). 1265 */ 1266 #define phy_module_driver(__phy_drivers, __count) \ 1267 static int __init phy_module_init(void) \ 1268 { \ 1269 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 1270 } \ 1271 module_init(phy_module_init); \ 1272 static void __exit phy_module_exit(void) \ 1273 { \ 1274 phy_drivers_unregister(__phy_drivers, __count); \ 1275 } \ 1276 module_exit(phy_module_exit) 1277 1278 #define module_phy_driver(__phy_drivers) \ 1279 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 1280 1281 bool phy_driver_is_genphy(struct phy_device *phydev); 1282 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 1283 1284 #endif /* __PHY_H */ 1285