1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/leds.h> 18 #include <linux/linkmode.h> 19 #include <linux/netlink.h> 20 #include <linux/mdio.h> 21 #include <linux/mii.h> 22 #include <linux/mii_timestamper.h> 23 #include <linux/module.h> 24 #include <linux/timer.h> 25 #include <linux/workqueue.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/u64_stats_sync.h> 28 #include <linux/irqreturn.h> 29 #include <linux/iopoll.h> 30 #include <linux/refcount.h> 31 32 #include <linux/atomic.h> 33 #include <net/eee.h> 34 35 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 36 SUPPORTED_TP | \ 37 SUPPORTED_MII) 38 39 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 40 SUPPORTED_10baseT_Full) 41 42 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 43 SUPPORTED_100baseT_Full) 44 45 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 46 SUPPORTED_1000baseT_Full) 47 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 54 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 55 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 56 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 57 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init; 58 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap2_features) __ro_after_init; 59 60 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 61 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 62 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 63 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 64 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 65 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 66 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 67 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 68 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 69 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features) 70 #define PHY_EEE_CAP2_FEATURES ((unsigned long *)&phy_eee_cap2_features) 71 72 extern const int phy_basic_ports_array[3]; 73 extern const int phy_fibre_port_array[1]; 74 extern const int phy_all_ports_features_array[7]; 75 extern const int phy_10_100_features_array[4]; 76 extern const int phy_basic_t1_features_array[3]; 77 extern const int phy_basic_t1s_p2mp_features_array[2]; 78 extern const int phy_gbit_features_array[2]; 79 extern const int phy_10gbit_features_array[1]; 80 81 /* 82 * Set phydev->irq to PHY_POLL if interrupts are not supported, 83 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 84 * the attached MAC driver handles the interrupt 85 */ 86 #define PHY_POLL -1 87 #define PHY_MAC_INTERRUPT -2 88 89 #define PHY_IS_INTERNAL 0x00000001 90 #define PHY_RST_AFTER_CLK_EN 0x00000002 91 #define PHY_POLL_CABLE_TEST 0x00000004 92 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008 93 #define MDIO_DEVICE_IS_PHY 0x80000000 94 95 /** 96 * enum phy_interface_t - Interface Mode definitions 97 * 98 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 99 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 100 * @PHY_INTERFACE_MODE_MII: Media-independent interface 101 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 102 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 103 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 104 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 105 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 106 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 107 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 108 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 109 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 110 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 111 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 112 * @PHY_INTERFACE_MODE_SMII: Serial MII 113 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 114 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 115 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 116 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII 117 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 118 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 119 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 120 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 121 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 122 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 123 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 124 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 125 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 126 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 127 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 128 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 129 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 130 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 131 * @PHY_INTERFACE_MODE_MAX: Book keeping 132 * 133 * Describes the interface between the MAC and PHY. 134 */ 135 typedef enum { 136 PHY_INTERFACE_MODE_NA, 137 PHY_INTERFACE_MODE_INTERNAL, 138 PHY_INTERFACE_MODE_MII, 139 PHY_INTERFACE_MODE_GMII, 140 PHY_INTERFACE_MODE_SGMII, 141 PHY_INTERFACE_MODE_TBI, 142 PHY_INTERFACE_MODE_REVMII, 143 PHY_INTERFACE_MODE_RMII, 144 PHY_INTERFACE_MODE_REVRMII, 145 PHY_INTERFACE_MODE_RGMII, 146 PHY_INTERFACE_MODE_RGMII_ID, 147 PHY_INTERFACE_MODE_RGMII_RXID, 148 PHY_INTERFACE_MODE_RGMII_TXID, 149 PHY_INTERFACE_MODE_RTBI, 150 PHY_INTERFACE_MODE_SMII, 151 PHY_INTERFACE_MODE_XGMII, 152 PHY_INTERFACE_MODE_XLGMII, 153 PHY_INTERFACE_MODE_MOCA, 154 PHY_INTERFACE_MODE_PSGMII, 155 PHY_INTERFACE_MODE_QSGMII, 156 PHY_INTERFACE_MODE_TRGMII, 157 PHY_INTERFACE_MODE_100BASEX, 158 PHY_INTERFACE_MODE_1000BASEX, 159 PHY_INTERFACE_MODE_2500BASEX, 160 PHY_INTERFACE_MODE_5GBASER, 161 PHY_INTERFACE_MODE_RXAUI, 162 PHY_INTERFACE_MODE_XAUI, 163 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 164 PHY_INTERFACE_MODE_10GBASER, 165 PHY_INTERFACE_MODE_25GBASER, 166 PHY_INTERFACE_MODE_USXGMII, 167 /* 10GBASE-KR - with Clause 73 AN */ 168 PHY_INTERFACE_MODE_10GKR, 169 PHY_INTERFACE_MODE_QUSGMII, 170 PHY_INTERFACE_MODE_1000BASEKX, 171 PHY_INTERFACE_MODE_MAX, 172 } phy_interface_t; 173 174 /* PHY interface mode bitmap handling */ 175 #define DECLARE_PHY_INTERFACE_MASK(name) \ 176 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 177 178 static inline void phy_interface_zero(unsigned long *intf) 179 { 180 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 181 } 182 183 static inline bool phy_interface_empty(const unsigned long *intf) 184 { 185 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 186 } 187 188 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 189 const unsigned long *b) 190 { 191 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 192 } 193 194 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 195 const unsigned long *b) 196 { 197 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 198 } 199 200 static inline void phy_interface_set_rgmii(unsigned long *intf) 201 { 202 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 203 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 204 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 205 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 206 } 207 208 /* 209 * phy_supported_speeds - return all speeds currently supported by a PHY device 210 */ 211 unsigned int phy_supported_speeds(struct phy_device *phy, 212 unsigned int *speeds, 213 unsigned int size); 214 215 /** 216 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 217 * @interface: enum phy_interface_t value 218 * 219 * Description: maps enum &phy_interface_t defined in this file 220 * into the device tree binding of 'phy-mode', so that Ethernet 221 * device driver can get PHY interface from device tree. 222 */ 223 static inline const char *phy_modes(phy_interface_t interface) 224 { 225 switch (interface) { 226 case PHY_INTERFACE_MODE_NA: 227 return ""; 228 case PHY_INTERFACE_MODE_INTERNAL: 229 return "internal"; 230 case PHY_INTERFACE_MODE_MII: 231 return "mii"; 232 case PHY_INTERFACE_MODE_GMII: 233 return "gmii"; 234 case PHY_INTERFACE_MODE_SGMII: 235 return "sgmii"; 236 case PHY_INTERFACE_MODE_TBI: 237 return "tbi"; 238 case PHY_INTERFACE_MODE_REVMII: 239 return "rev-mii"; 240 case PHY_INTERFACE_MODE_RMII: 241 return "rmii"; 242 case PHY_INTERFACE_MODE_REVRMII: 243 return "rev-rmii"; 244 case PHY_INTERFACE_MODE_RGMII: 245 return "rgmii"; 246 case PHY_INTERFACE_MODE_RGMII_ID: 247 return "rgmii-id"; 248 case PHY_INTERFACE_MODE_RGMII_RXID: 249 return "rgmii-rxid"; 250 case PHY_INTERFACE_MODE_RGMII_TXID: 251 return "rgmii-txid"; 252 case PHY_INTERFACE_MODE_RTBI: 253 return "rtbi"; 254 case PHY_INTERFACE_MODE_SMII: 255 return "smii"; 256 case PHY_INTERFACE_MODE_XGMII: 257 return "xgmii"; 258 case PHY_INTERFACE_MODE_XLGMII: 259 return "xlgmii"; 260 case PHY_INTERFACE_MODE_MOCA: 261 return "moca"; 262 case PHY_INTERFACE_MODE_PSGMII: 263 return "psgmii"; 264 case PHY_INTERFACE_MODE_QSGMII: 265 return "qsgmii"; 266 case PHY_INTERFACE_MODE_TRGMII: 267 return "trgmii"; 268 case PHY_INTERFACE_MODE_1000BASEX: 269 return "1000base-x"; 270 case PHY_INTERFACE_MODE_1000BASEKX: 271 return "1000base-kx"; 272 case PHY_INTERFACE_MODE_2500BASEX: 273 return "2500base-x"; 274 case PHY_INTERFACE_MODE_5GBASER: 275 return "5gbase-r"; 276 case PHY_INTERFACE_MODE_RXAUI: 277 return "rxaui"; 278 case PHY_INTERFACE_MODE_XAUI: 279 return "xaui"; 280 case PHY_INTERFACE_MODE_10GBASER: 281 return "10gbase-r"; 282 case PHY_INTERFACE_MODE_25GBASER: 283 return "25gbase-r"; 284 case PHY_INTERFACE_MODE_USXGMII: 285 return "usxgmii"; 286 case PHY_INTERFACE_MODE_10GKR: 287 return "10gbase-kr"; 288 case PHY_INTERFACE_MODE_100BASEX: 289 return "100base-x"; 290 case PHY_INTERFACE_MODE_QUSGMII: 291 return "qusgmii"; 292 default: 293 return "unknown"; 294 } 295 } 296 297 #define PHY_INIT_TIMEOUT 100000 298 #define PHY_FORCE_TIMEOUT 10 299 300 #define PHY_MAX_ADDR 32 301 302 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 303 #define PHY_ID_FMT "%s:%02x" 304 305 #define MII_BUS_ID_SIZE 61 306 307 struct device; 308 struct kernel_hwtstamp_config; 309 struct phylink; 310 struct sfp_bus; 311 struct sfp_upstream_ops; 312 struct sk_buff; 313 314 /** 315 * struct mdio_bus_stats - Statistics counters for MDIO busses 316 * @transfers: Total number of transfers, i.e. @writes + @reads 317 * @errors: Number of MDIO transfers that returned an error 318 * @writes: Number of write transfers 319 * @reads: Number of read transfers 320 * @syncp: Synchronisation for incrementing statistics 321 */ 322 struct mdio_bus_stats { 323 u64_stats_t transfers; 324 u64_stats_t errors; 325 u64_stats_t writes; 326 u64_stats_t reads; 327 /* Must be last, add new statistics above */ 328 struct u64_stats_sync syncp; 329 }; 330 331 /** 332 * struct phy_package_shared - Shared information in PHY packages 333 * @base_addr: Base PHY address of PHY package used to combine PHYs 334 * in one package and for offset calculation of phy_package_read/write 335 * @np: Pointer to the Device Node if PHY package defined in DT 336 * @refcnt: Number of PHYs connected to this shared data 337 * @flags: Initialization of PHY package 338 * @priv_size: Size of the shared private data @priv 339 * @priv: Driver private data shared across a PHY package 340 * 341 * Represents a shared structure between different phydev's in the same 342 * package, for example a quad PHY. See phy_package_join() and 343 * phy_package_leave(). 344 */ 345 struct phy_package_shared { 346 u8 base_addr; 347 /* With PHY package defined in DT this points to the PHY package node */ 348 struct device_node *np; 349 refcount_t refcnt; 350 unsigned long flags; 351 size_t priv_size; 352 353 /* private data pointer */ 354 /* note that this pointer is shared between different phydevs and 355 * the user has to take care of appropriate locking. It is allocated 356 * and freed automatically by phy_package_join() and 357 * phy_package_leave(). 358 */ 359 void *priv; 360 }; 361 362 /* used as bit number in atomic bitops */ 363 #define PHY_SHARED_F_INIT_DONE 0 364 #define PHY_SHARED_F_PROBE_DONE 1 365 366 /** 367 * struct mii_bus - Represents an MDIO bus 368 * 369 * @owner: Who owns this device 370 * @name: User friendly name for this MDIO device, or driver name 371 * @id: Unique identifier for this bus, typical from bus hierarchy 372 * @priv: Driver private data 373 * 374 * The Bus class for PHYs. Devices which provide access to 375 * PHYs should register using this structure 376 */ 377 struct mii_bus { 378 struct module *owner; 379 const char *name; 380 char id[MII_BUS_ID_SIZE]; 381 void *priv; 382 /** @read: Perform a read transfer on the bus */ 383 int (*read)(struct mii_bus *bus, int addr, int regnum); 384 /** @write: Perform a write transfer on the bus */ 385 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 386 /** @read_c45: Perform a C45 read transfer on the bus */ 387 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 388 /** @write_c45: Perform a C45 write transfer on the bus */ 389 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 390 int regnum, u16 val); 391 /** @reset: Perform a reset of the bus */ 392 int (*reset)(struct mii_bus *bus); 393 394 /** @stats: Statistic counters per device on the bus */ 395 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 396 397 /** 398 * @mdio_lock: A lock to ensure that only one thing can read/write 399 * the MDIO bus at a time 400 */ 401 struct mutex mdio_lock; 402 403 /** @parent: Parent device of this bus */ 404 struct device *parent; 405 /** @state: State of bus structure */ 406 enum { 407 MDIOBUS_ALLOCATED = 1, 408 MDIOBUS_REGISTERED, 409 MDIOBUS_UNREGISTERED, 410 MDIOBUS_RELEASED, 411 } state; 412 413 /** @dev: Kernel device representation */ 414 struct device dev; 415 416 /** @mdio_map: list of all MDIO devices on bus */ 417 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 418 419 /** @phy_mask: PHY addresses to be ignored when probing */ 420 u32 phy_mask; 421 422 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 423 u32 phy_ignore_ta_mask; 424 425 /** 426 * @irq: An array of interrupts, each PHY's interrupt at the index 427 * matching its address 428 */ 429 int irq[PHY_MAX_ADDR]; 430 431 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 432 int reset_delay_us; 433 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 434 int reset_post_delay_us; 435 /** @reset_gpiod: Reset GPIO descriptor pointer */ 436 struct gpio_desc *reset_gpiod; 437 438 /** @shared_lock: protect access to the shared element */ 439 struct mutex shared_lock; 440 441 /** @shared: shared state across different PHYs */ 442 struct phy_package_shared *shared[PHY_MAX_ADDR]; 443 }; 444 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 445 446 struct mii_bus *mdiobus_alloc_size(size_t size); 447 448 /** 449 * mdiobus_alloc - Allocate an MDIO bus structure 450 * 451 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 452 * for the driver to register the bus. 453 */ 454 static inline struct mii_bus *mdiobus_alloc(void) 455 { 456 return mdiobus_alloc_size(0); 457 } 458 459 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 460 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 461 struct module *owner); 462 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 463 #define devm_mdiobus_register(dev, bus) \ 464 __devm_mdiobus_register(dev, bus, THIS_MODULE) 465 466 void mdiobus_unregister(struct mii_bus *bus); 467 void mdiobus_free(struct mii_bus *bus); 468 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 469 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 470 { 471 return devm_mdiobus_alloc_size(dev, 0); 472 } 473 474 struct mii_bus *mdio_find_bus(const char *mdio_name); 475 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); 476 477 #define PHY_INTERRUPT_DISABLED false 478 #define PHY_INTERRUPT_ENABLED true 479 480 /** 481 * enum phy_state - PHY state machine states: 482 * 483 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 484 * should be called if and only if the PHY is in this state, 485 * given that the PHY device exists. 486 * - PHY driver probe function will set the state to @PHY_READY 487 * 488 * @PHY_READY: PHY is ready to send and receive packets, but the 489 * controller is not. By default, PHYs which do not implement 490 * probe will be set to this state by phy_probe(). 491 * - start will set the state to UP 492 * 493 * @PHY_UP: The PHY and attached device are ready to do work. 494 * Interrupts should be started here. 495 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 496 * 497 * @PHY_NOLINK: PHY is up, but not currently plugged in. 498 * - irq or timer will set @PHY_RUNNING if link comes back 499 * - phy_stop moves to @PHY_HALTED 500 * 501 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 502 * and/or receiving packets 503 * - irq or timer will set @PHY_NOLINK if link goes down 504 * - phy_stop moves to @PHY_HALTED 505 * 506 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 507 * is not expected to work, carrier will be indicated as down. PHY will be 508 * poll once per second, or on interrupt for it current state. 509 * Once complete, move to UP to restart the PHY. 510 * - phy_stop aborts the running test and moves to @PHY_HALTED 511 * 512 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. 513 * - phy_start moves to @PHY_UP 514 * 515 * @PHY_ERROR: PHY is up, but is in an error state. 516 * - phy_stop moves to @PHY_HALTED 517 */ 518 enum phy_state { 519 PHY_DOWN = 0, 520 PHY_READY, 521 PHY_HALTED, 522 PHY_ERROR, 523 PHY_UP, 524 PHY_RUNNING, 525 PHY_NOLINK, 526 PHY_CABLETEST, 527 }; 528 529 #define MDIO_MMD_NUM 32 530 531 /** 532 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 533 * @devices_in_package: IEEE 802.3 devices in package register value. 534 * @mmds_present: bit vector of MMDs present. 535 * @device_ids: The device identifer for each present device. 536 */ 537 struct phy_c45_device_ids { 538 u32 devices_in_package; 539 u32 mmds_present; 540 u32 device_ids[MDIO_MMD_NUM]; 541 }; 542 543 struct macsec_context; 544 struct macsec_ops; 545 546 /** 547 * struct phy_device - An instance of a PHY 548 * 549 * @mdio: MDIO bus this PHY is on 550 * @drv: Pointer to the driver for this PHY instance 551 * @devlink: Create a link between phy dev and mac dev, if the external phy 552 * used by current mac interface is managed by another mac interface. 553 * @phy_id: UID for this device found during discovery 554 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 555 * @is_c45: Set to true if this PHY uses clause 45 addressing. 556 * @is_internal: Set to true if this PHY is internal to a MAC. 557 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 558 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 559 * @has_fixups: Set to true if this PHY has fixups/quirks. 560 * @suspended: Set to true if this PHY has been suspended successfully. 561 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 562 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 563 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 564 * @downshifted_rate: Set true if link speed has been downshifted. 565 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 566 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 567 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN 568 * enabled. 569 * @state: State of the PHY for management purposes 570 * @dev_flags: Device-specific flags used by the PHY driver. 571 * 572 * - Bits [15:0] are free to use by the PHY driver to communicate 573 * driver specific behavior. 574 * - Bits [23:16] are currently reserved for future use. 575 * - Bits [31:24] are reserved for defining generic 576 * PHY driver behavior. 577 * @irq: IRQ number of the PHY's interrupt (-1 if none) 578 * @phylink: Pointer to phylink instance for this PHY 579 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 580 * @sfp_bus: SFP bus attached to this PHY's fiber port 581 * @attached_dev: The attached enet driver's device instance ptr 582 * @adjust_link: Callback for the enet controller to respond to changes: in the 583 * link state. 584 * @phy_link_change: Callback for phylink for notification of link change 585 * @macsec_ops: MACsec offloading ops. 586 * 587 * @speed: Current link speed 588 * @duplex: Current duplex 589 * @port: Current port 590 * @pause: Current pause 591 * @asym_pause: Current asymmetric pause 592 * @supported: Combined MAC/PHY supported linkmodes 593 * @advertising: Currently advertised linkmodes 594 * @adv_old: Saved advertised while power saving for WoL 595 * @supported_eee: supported PHY EEE linkmodes 596 * @advertising_eee: Currently advertised EEE linkmodes 597 * @eee_enabled: Flag indicating whether the EEE feature is enabled 598 * @enable_tx_lpi: When True, MAC should transmit LPI to PHY 599 * @eee_cfg: User configuration of EEE 600 * @lp_advertising: Current link partner advertised linkmodes 601 * @host_interfaces: PHY interface modes supported by host 602 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 603 * @autoneg: Flag autoneg being used 604 * @rate_matching: Current rate matching mode 605 * @link: Current link state 606 * @autoneg_complete: Flag auto negotiation of the link has completed 607 * @mdix: Current crossover 608 * @mdix_ctrl: User setting of crossover 609 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 610 * @interrupts: Flag interrupts have been enabled 611 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 612 * handling shall be postponed until PHY has resumed 613 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 614 * requiring a rerun of the interrupt handler after resume 615 * @interface: enum phy_interface_t value 616 * @possible_interfaces: bitmap if interface modes that the attached PHY 617 * will switch between depending on media speed. 618 * @skb: Netlink message for cable diagnostics 619 * @nest: Netlink nest used for cable diagnostics 620 * @ehdr: nNtlink header for cable diagnostics 621 * @phy_led_triggers: Array of LED triggers 622 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 623 * @led_link_trigger: LED trigger for link up/down 624 * @last_triggered: last LED trigger for link speed 625 * @leds: list of PHY LED structures 626 * @master_slave_set: User requested master/slave configuration 627 * @master_slave_get: Current master/slave advertisement 628 * @master_slave_state: Current master/slave configuration 629 * @mii_ts: Pointer to time stamper callbacks 630 * @psec: Pointer to Power Sourcing Equipment control struct 631 * @lock: Mutex for serialization access to PHY 632 * @state_queue: Work queue for state machine 633 * @link_down_events: Number of times link was lost 634 * @shared: Pointer to private data shared by phys in one package 635 * @priv: Pointer to driver private data 636 * 637 * interrupts currently only supports enabled or disabled, 638 * but could be changed in the future to support enabling 639 * and disabling specific interrupts 640 * 641 * Contains some infrastructure for polling and interrupt 642 * handling, as well as handling shifts in PHY hardware state 643 */ 644 struct phy_device { 645 struct mdio_device mdio; 646 647 /* Information about the PHY type */ 648 /* And management functions */ 649 const struct phy_driver *drv; 650 651 struct device_link *devlink; 652 653 u32 phy_id; 654 655 struct phy_c45_device_ids c45_ids; 656 unsigned is_c45:1; 657 unsigned is_internal:1; 658 unsigned is_pseudo_fixed_link:1; 659 unsigned is_gigabit_capable:1; 660 unsigned has_fixups:1; 661 unsigned suspended:1; 662 unsigned suspended_by_mdio_bus:1; 663 unsigned sysfs_links:1; 664 unsigned loopback_enabled:1; 665 unsigned downshifted_rate:1; 666 unsigned is_on_sfp_module:1; 667 unsigned mac_managed_pm:1; 668 unsigned wol_enabled:1; 669 670 unsigned autoneg:1; 671 /* The most recently read link state */ 672 unsigned link:1; 673 unsigned autoneg_complete:1; 674 675 /* Interrupts are enabled */ 676 unsigned interrupts:1; 677 unsigned irq_suspended:1; 678 unsigned irq_rerun:1; 679 680 int rate_matching; 681 682 enum phy_state state; 683 684 u32 dev_flags; 685 686 phy_interface_t interface; 687 DECLARE_PHY_INTERFACE_MASK(possible_interfaces); 688 689 /* 690 * forced speed & duplex (no autoneg) 691 * partner speed & duplex & pause (autoneg) 692 */ 693 int speed; 694 int duplex; 695 int port; 696 int pause; 697 int asym_pause; 698 u8 master_slave_get; 699 u8 master_slave_set; 700 u8 master_slave_state; 701 702 /* Union of PHY and Attached devices' supported link modes */ 703 /* See ethtool.h for more info */ 704 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 705 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 706 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 707 /* used with phy_speed_down */ 708 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 709 /* used for eee validation and configuration*/ 710 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee); 711 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee); 712 bool eee_enabled; 713 714 /* Host supported PHY interface types. Should be ignored if empty. */ 715 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 716 717 /* Energy efficient ethernet modes which should be prohibited */ 718 u32 eee_broken_modes; 719 bool enable_tx_lpi; 720 struct eee_config eee_cfg; 721 722 #ifdef CONFIG_LED_TRIGGER_PHY 723 struct phy_led_trigger *phy_led_triggers; 724 unsigned int phy_num_led_triggers; 725 struct phy_led_trigger *last_triggered; 726 727 struct phy_led_trigger *led_link_trigger; 728 #endif 729 struct list_head leds; 730 731 /* 732 * Interrupt number for this PHY 733 * -1 means no interrupt 734 */ 735 int irq; 736 737 /* private data pointer */ 738 /* For use by PHYs to maintain extra state */ 739 void *priv; 740 741 /* shared data pointer */ 742 /* For use by PHYs inside the same package that need a shared state. */ 743 struct phy_package_shared *shared; 744 745 /* Reporting cable test results */ 746 struct sk_buff *skb; 747 void *ehdr; 748 struct nlattr *nest; 749 750 /* Interrupt and Polling infrastructure */ 751 struct delayed_work state_queue; 752 753 struct mutex lock; 754 755 /* This may be modified under the rtnl lock */ 756 bool sfp_bus_attached; 757 struct sfp_bus *sfp_bus; 758 struct phylink *phylink; 759 struct net_device *attached_dev; 760 struct mii_timestamper *mii_ts; 761 struct pse_control *psec; 762 763 u8 mdix; 764 u8 mdix_ctrl; 765 766 int pma_extable; 767 768 unsigned int link_down_events; 769 770 void (*phy_link_change)(struct phy_device *phydev, bool up); 771 void (*adjust_link)(struct net_device *dev); 772 773 #if IS_ENABLED(CONFIG_MACSEC) 774 /* MACsec management functions */ 775 const struct macsec_ops *macsec_ops; 776 #endif 777 }; 778 779 /* Generic phy_device::dev_flags */ 780 #define PHY_F_NO_IRQ 0x80000000 781 #define PHY_F_RXC_ALWAYS_ON 0x40000000 782 783 static inline struct phy_device *to_phy_device(const struct device *dev) 784 { 785 return container_of(to_mdio_device(dev), struct phy_device, mdio); 786 } 787 788 /** 789 * struct phy_tdr_config - Configuration of a TDR raw test 790 * 791 * @first: Distance for first data collection point 792 * @last: Distance for last data collection point 793 * @step: Step between data collection points 794 * @pair: Bitmap of cable pairs to collect data for 795 * 796 * A structure containing possible configuration parameters 797 * for a TDR cable test. The driver does not need to implement 798 * all the parameters, but should report what is actually used. 799 * All distances are in centimeters. 800 */ 801 struct phy_tdr_config { 802 u32 first; 803 u32 last; 804 u32 step; 805 s8 pair; 806 }; 807 #define PHY_PAIR_ALL -1 808 809 /** 810 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 811 * Avoidance) Reconciliation Sublayer. 812 * 813 * @version: read-only PLCA register map version. -1 = not available. Ignored 814 * when setting the configuration. Format is the same as reported by the PLCA 815 * IDVER register (31.CA00). -1 = not available. 816 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 817 * set. 0 = disabled, anything else = enabled. 818 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 819 * Allowed values [0 .. 254]. 255 = node disabled. 820 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 821 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 822 * set. Allowed values [1 .. 255]. 823 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 824 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 825 * more details. The to_timer shall be set equal over all nodes. 826 * -1 = not available / don't set. Allowed values [0 .. 255]. 827 * @burst_cnt: controls how many additional frames a node is allowed to send in 828 * single transmit opportunity (TO). The default value of 0 means that the 829 * node is allowed exactly one frame per TO. A value of 1 allows two frames 830 * per TO, and so on. -1 = not available / don't set. 831 * Allowed values [0 .. 255]. 832 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 833 * frame before interrupting the burst. This value should be set to a value 834 * greater than the MAC inter-packet gap (which is typically 96 bits). 835 * -1 = not available / don't set. Allowed values [0 .. 255]. 836 * 837 * A structure containing configuration parameters for setting/getting the PLCA 838 * RS configuration. The driver does not need to implement all the parameters, 839 * but should report what is actually used. 840 */ 841 struct phy_plca_cfg { 842 int version; 843 int enabled; 844 int node_id; 845 int node_cnt; 846 int to_tmr; 847 int burst_cnt; 848 int burst_tmr; 849 }; 850 851 /** 852 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 853 * Avoidance) Reconciliation Sublayer. 854 * 855 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 856 * register(31.CA03), indicating BEACON activity. 857 * 858 * A structure containing status information of the PLCA RS configuration. 859 * The driver does not need to implement all the parameters, but should report 860 * what is actually used. 861 */ 862 struct phy_plca_status { 863 bool pst; 864 }; 865 866 /* Modes for PHY LED configuration */ 867 enum phy_led_modes { 868 PHY_LED_ACTIVE_LOW = 0, 869 PHY_LED_INACTIVE_HIGH_IMPEDANCE = 1, 870 871 /* keep it last */ 872 __PHY_LED_MODES_NUM, 873 }; 874 875 /** 876 * struct phy_led: An LED driven by the PHY 877 * 878 * @list: List of LEDs 879 * @phydev: PHY this LED is attached to 880 * @led_cdev: Standard LED class structure 881 * @index: Number of the LED 882 */ 883 struct phy_led { 884 struct list_head list; 885 struct phy_device *phydev; 886 struct led_classdev led_cdev; 887 u8 index; 888 }; 889 890 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev) 891 892 /** 893 * struct phy_driver - Driver structure for a particular PHY type 894 * 895 * @mdiodrv: Data common to all MDIO devices 896 * @phy_id: The result of reading the UID registers of this PHY 897 * type, and ANDing them with the phy_id_mask. This driver 898 * only works for PHYs with IDs which match this field 899 * @name: The friendly name of this PHY type 900 * @phy_id_mask: Defines the important bits of the phy_id 901 * @features: A mandatory list of features (speed, duplex, etc) 902 * supported by this PHY 903 * @flags: A bitfield defining certain other features this PHY 904 * supports (like interrupts) 905 * @driver_data: Static driver data 906 * 907 * All functions are optional. If config_aneg or read_status 908 * are not implemented, the phy core uses the genphy versions. 909 * Note that none of these functions should be called from 910 * interrupt time. The goal is for the bus read/write functions 911 * to be able to block when the bus transaction is happening, 912 * and be freed up by an interrupt (The MPC85xx has this ability, 913 * though it is not currently supported in the driver). 914 */ 915 struct phy_driver { 916 struct mdio_driver_common mdiodrv; 917 u32 phy_id; 918 char *name; 919 u32 phy_id_mask; 920 const unsigned long * const features; 921 u32 flags; 922 const void *driver_data; 923 924 /** 925 * @soft_reset: Called to issue a PHY software reset 926 */ 927 int (*soft_reset)(struct phy_device *phydev); 928 929 /** 930 * @config_init: Called to initialize the PHY, 931 * including after a reset 932 */ 933 int (*config_init)(struct phy_device *phydev); 934 935 /** 936 * @probe: Called during discovery. Used to set 937 * up device-specific structures, if any 938 */ 939 int (*probe)(struct phy_device *phydev); 940 941 /** 942 * @get_features: Probe the hardware to determine what 943 * abilities it has. Should only set phydev->supported. 944 */ 945 int (*get_features)(struct phy_device *phydev); 946 947 /** 948 * @get_rate_matching: Get the supported type of rate matching for a 949 * particular phy interface. This is used by phy consumers to determine 950 * whether to advertise lower-speed modes for that interface. It is 951 * assumed that if a rate matching mode is supported on an interface, 952 * then that interface's rate can be adapted to all slower link speeds 953 * supported by the phy. If the interface is not supported, this should 954 * return %RATE_MATCH_NONE. 955 */ 956 int (*get_rate_matching)(struct phy_device *phydev, 957 phy_interface_t iface); 958 959 /* PHY Power Management */ 960 /** @suspend: Suspend the hardware, saving state if needed */ 961 int (*suspend)(struct phy_device *phydev); 962 /** @resume: Resume the hardware, restoring state if needed */ 963 int (*resume)(struct phy_device *phydev); 964 965 /** 966 * @config_aneg: Configures the advertisement and resets 967 * autonegotiation if phydev->autoneg is on, 968 * forces the speed to the current settings in phydev 969 * if phydev->autoneg is off 970 */ 971 int (*config_aneg)(struct phy_device *phydev); 972 973 /** @aneg_done: Determines the auto negotiation result */ 974 int (*aneg_done)(struct phy_device *phydev); 975 976 /** @read_status: Determines the negotiated speed and duplex */ 977 int (*read_status)(struct phy_device *phydev); 978 979 /** 980 * @config_intr: Enables or disables interrupts. 981 * It should also clear any pending interrupts prior to enabling the 982 * IRQs and after disabling them. 983 */ 984 int (*config_intr)(struct phy_device *phydev); 985 986 /** @handle_interrupt: Override default interrupt handling */ 987 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 988 989 /** @remove: Clears up any memory if needed */ 990 void (*remove)(struct phy_device *phydev); 991 992 /** 993 * @match_phy_device: Returns true if this is a suitable 994 * driver for the given phydev. If NULL, matching is based on 995 * phy_id and phy_id_mask. 996 */ 997 int (*match_phy_device)(struct phy_device *phydev); 998 999 /** 1000 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 1001 * register changes to enable Wake on LAN, so set_wol is 1002 * provided to be called in the ethernet driver's set_wol 1003 * function. 1004 */ 1005 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1006 1007 /** 1008 * @get_wol: See set_wol, but for checking whether Wake on LAN 1009 * is enabled. 1010 */ 1011 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1012 1013 /** 1014 * @link_change_notify: Called to inform a PHY device driver 1015 * when the core is about to change the link state. This 1016 * callback is supposed to be used as fixup hook for drivers 1017 * that need to take action when the link state 1018 * changes. Drivers are by no means allowed to mess with the 1019 * PHY device structure in their implementations. 1020 */ 1021 void (*link_change_notify)(struct phy_device *dev); 1022 1023 /** 1024 * @read_mmd: PHY specific driver override for reading a MMD 1025 * register. This function is optional for PHY specific 1026 * drivers. When not provided, the default MMD read function 1027 * will be used by phy_read_mmd(), which will use either a 1028 * direct read for Clause 45 PHYs or an indirect read for 1029 * Clause 22 PHYs. devnum is the MMD device number within the 1030 * PHY device, regnum is the register within the selected MMD 1031 * device. 1032 */ 1033 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 1034 1035 /** 1036 * @write_mmd: PHY specific driver override for writing a MMD 1037 * register. This function is optional for PHY specific 1038 * drivers. When not provided, the default MMD write function 1039 * will be used by phy_write_mmd(), which will use either a 1040 * direct write for Clause 45 PHYs, or an indirect write for 1041 * Clause 22 PHYs. devnum is the MMD device number within the 1042 * PHY device, regnum is the register within the selected MMD 1043 * device. val is the value to be written. 1044 */ 1045 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 1046 u16 val); 1047 1048 /** @read_page: Return the current PHY register page number */ 1049 int (*read_page)(struct phy_device *dev); 1050 /** @write_page: Set the current PHY register page number */ 1051 int (*write_page)(struct phy_device *dev, int page); 1052 1053 /** 1054 * @module_info: Get the size and type of the eeprom contained 1055 * within a plug-in module 1056 */ 1057 int (*module_info)(struct phy_device *dev, 1058 struct ethtool_modinfo *modinfo); 1059 1060 /** 1061 * @module_eeprom: Get the eeprom information from the plug-in 1062 * module 1063 */ 1064 int (*module_eeprom)(struct phy_device *dev, 1065 struct ethtool_eeprom *ee, u8 *data); 1066 1067 /** @cable_test_start: Start a cable test */ 1068 int (*cable_test_start)(struct phy_device *dev); 1069 1070 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1071 int (*cable_test_tdr_start)(struct phy_device *dev, 1072 const struct phy_tdr_config *config); 1073 1074 /** 1075 * @cable_test_get_status: Once per second, or on interrupt, 1076 * request the status of the test. 1077 */ 1078 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1079 1080 /* Get statistics from the PHY using ethtool */ 1081 /** @get_sset_count: Number of statistic counters */ 1082 int (*get_sset_count)(struct phy_device *dev); 1083 /** @get_strings: Names of the statistic counters */ 1084 void (*get_strings)(struct phy_device *dev, u8 *data); 1085 /** @get_stats: Return the statistic counter values */ 1086 void (*get_stats)(struct phy_device *dev, 1087 struct ethtool_stats *stats, u64 *data); 1088 1089 /* Get and Set PHY tunables */ 1090 /** @get_tunable: Return the value of a tunable */ 1091 int (*get_tunable)(struct phy_device *dev, 1092 struct ethtool_tunable *tuna, void *data); 1093 /** @set_tunable: Set the value of a tunable */ 1094 int (*set_tunable)(struct phy_device *dev, 1095 struct ethtool_tunable *tuna, 1096 const void *data); 1097 /** @set_loopback: Set the loopback mood of the PHY */ 1098 int (*set_loopback)(struct phy_device *dev, bool enable); 1099 /** @get_sqi: Get the signal quality indication */ 1100 int (*get_sqi)(struct phy_device *dev); 1101 /** @get_sqi_max: Get the maximum signal quality indication */ 1102 int (*get_sqi_max)(struct phy_device *dev); 1103 1104 /* PLCA RS interface */ 1105 /** @get_plca_cfg: Return the current PLCA configuration */ 1106 int (*get_plca_cfg)(struct phy_device *dev, 1107 struct phy_plca_cfg *plca_cfg); 1108 /** @set_plca_cfg: Set the PLCA configuration */ 1109 int (*set_plca_cfg)(struct phy_device *dev, 1110 const struct phy_plca_cfg *plca_cfg); 1111 /** @get_plca_status: Return the current PLCA status info */ 1112 int (*get_plca_status)(struct phy_device *dev, 1113 struct phy_plca_status *plca_st); 1114 1115 /** 1116 * @led_brightness_set: Set a PHY LED brightness. Index 1117 * indicates which of the PHYs led should be set. Value 1118 * follows the standard LED class meaning, e.g. LED_OFF, 1119 * LED_HALF, LED_FULL. 1120 */ 1121 int (*led_brightness_set)(struct phy_device *dev, 1122 u8 index, enum led_brightness value); 1123 1124 /** 1125 * @led_blink_set: Set a PHY LED brightness. Index indicates 1126 * which of the PHYs led should be configured to blink. Delays 1127 * are in milliseconds and if both are zero then a sensible 1128 * default should be chosen. The call should adjust the 1129 * timings in that case and if it can't match the values 1130 * specified exactly. 1131 */ 1132 int (*led_blink_set)(struct phy_device *dev, u8 index, 1133 unsigned long *delay_on, 1134 unsigned long *delay_off); 1135 /** 1136 * @led_hw_is_supported: Can the HW support the given rules. 1137 * @dev: PHY device which has the LED 1138 * @index: Which LED of the PHY device 1139 * @rules The core is interested in these rules 1140 * 1141 * Return 0 if yes, -EOPNOTSUPP if not, or an error code. 1142 */ 1143 int (*led_hw_is_supported)(struct phy_device *dev, u8 index, 1144 unsigned long rules); 1145 /** 1146 * @led_hw_control_set: Set the HW to control the LED 1147 * @dev: PHY device which has the LED 1148 * @index: Which LED of the PHY device 1149 * @rules The rules used to control the LED 1150 * 1151 * Returns 0, or a an error code. 1152 */ 1153 int (*led_hw_control_set)(struct phy_device *dev, u8 index, 1154 unsigned long rules); 1155 /** 1156 * @led_hw_control_get: Get how the HW is controlling the LED 1157 * @dev: PHY device which has the LED 1158 * @index: Which LED of the PHY device 1159 * @rules Pointer to the rules used to control the LED 1160 * 1161 * Set *@rules to how the HW is currently blinking. Returns 0 1162 * on success, or a error code if the current blinking cannot 1163 * be represented in rules, or some other error happens. 1164 */ 1165 int (*led_hw_control_get)(struct phy_device *dev, u8 index, 1166 unsigned long *rules); 1167 1168 /** 1169 * @led_polarity_set: Set the LED polarity modes 1170 * @dev: PHY device which has the LED 1171 * @index: Which LED of the PHY device 1172 * @modes: bitmap of LED polarity modes 1173 * 1174 * Configure LED with all the required polarity modes in @modes 1175 * to make it correctly turn ON or OFF. 1176 * 1177 * Returns 0, or an error code. 1178 */ 1179 int (*led_polarity_set)(struct phy_device *dev, int index, 1180 unsigned long modes); 1181 }; 1182 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 1183 struct phy_driver, mdiodrv) 1184 1185 #define PHY_ANY_ID "MATCH ANY PHY" 1186 #define PHY_ANY_UID 0xffffffff 1187 1188 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 1189 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 1190 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 1191 1192 /** 1193 * phy_id_compare - compare @id1 with @id2 taking account of @mask 1194 * @id1: first PHY ID 1195 * @id2: second PHY ID 1196 * @mask: the PHY ID mask, set bits are significant in matching 1197 * 1198 * Return true if the bits from @id1 and @id2 specified by @mask match. 1199 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask). 1200 */ 1201 static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask) 1202 { 1203 return !((id1 ^ id2) & mask); 1204 } 1205 1206 /** 1207 * phydev_id_compare - compare @id with the PHY's Clause 22 ID 1208 * @phydev: the PHY device 1209 * @id: the PHY ID to be matched 1210 * 1211 * Compare the @phydev clause 22 ID with the provided @id and return true or 1212 * false depending whether it matches, using the bound driver mask. The 1213 * @phydev must be bound to a driver. 1214 */ 1215 static inline bool phydev_id_compare(struct phy_device *phydev, u32 id) 1216 { 1217 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask); 1218 } 1219 1220 /* A Structure for boards to register fixups with the PHY Lib */ 1221 struct phy_fixup { 1222 struct list_head list; 1223 char bus_id[MII_BUS_ID_SIZE + 3]; 1224 u32 phy_uid; 1225 u32 phy_uid_mask; 1226 int (*run)(struct phy_device *phydev); 1227 }; 1228 1229 const char *phy_speed_to_str(int speed); 1230 const char *phy_duplex_to_str(unsigned int duplex); 1231 const char *phy_rate_matching_to_str(int rate_matching); 1232 1233 int phy_interface_num_ports(phy_interface_t interface); 1234 1235 /* A structure for mapping a particular speed and duplex 1236 * combination to a particular SUPPORTED and ADVERTISED value 1237 */ 1238 struct phy_setting { 1239 u32 speed; 1240 u8 duplex; 1241 u8 bit; 1242 }; 1243 1244 const struct phy_setting * 1245 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 1246 bool exact); 1247 size_t phy_speeds(unsigned int *speeds, size_t size, 1248 unsigned long *mask); 1249 void of_set_phy_supported(struct phy_device *phydev); 1250 void of_set_phy_eee_broken(struct phy_device *phydev); 1251 int phy_speed_down_core(struct phy_device *phydev); 1252 1253 /** 1254 * phy_is_started - Convenience function to check whether PHY is started 1255 * @phydev: The phy_device struct 1256 */ 1257 static inline bool phy_is_started(struct phy_device *phydev) 1258 { 1259 return phydev->state >= PHY_UP; 1260 } 1261 1262 void phy_resolve_aneg_pause(struct phy_device *phydev); 1263 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1264 void phy_check_downshift(struct phy_device *phydev); 1265 1266 /** 1267 * phy_read - Convenience function for reading a given PHY register 1268 * @phydev: the phy_device struct 1269 * @regnum: register number to read 1270 * 1271 * NOTE: MUST NOT be called from interrupt context, 1272 * because the bus read/write functions may wait for an interrupt 1273 * to conclude the operation. 1274 */ 1275 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1276 { 1277 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1278 } 1279 1280 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1281 timeout_us, sleep_before_read) \ 1282 ({ \ 1283 int __ret, __val; \ 1284 __ret = read_poll_timeout(__val = phy_read, val, \ 1285 __val < 0 || (cond), \ 1286 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1287 if (__val < 0) \ 1288 __ret = __val; \ 1289 if (__ret) \ 1290 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1291 __ret; \ 1292 }) 1293 1294 /** 1295 * __phy_read - convenience function for reading a given PHY register 1296 * @phydev: the phy_device struct 1297 * @regnum: register number to read 1298 * 1299 * The caller must have taken the MDIO bus lock. 1300 */ 1301 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1302 { 1303 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1304 } 1305 1306 /** 1307 * phy_write - Convenience function for writing a given PHY register 1308 * @phydev: the phy_device struct 1309 * @regnum: register number to write 1310 * @val: value to write to @regnum 1311 * 1312 * NOTE: MUST NOT be called from interrupt context, 1313 * because the bus read/write functions may wait for an interrupt 1314 * to conclude the operation. 1315 */ 1316 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1317 { 1318 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1319 } 1320 1321 /** 1322 * __phy_write - Convenience function for writing a given PHY register 1323 * @phydev: the phy_device struct 1324 * @regnum: register number to write 1325 * @val: value to write to @regnum 1326 * 1327 * The caller must have taken the MDIO bus lock. 1328 */ 1329 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1330 { 1331 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1332 val); 1333 } 1334 1335 /** 1336 * __phy_modify_changed() - Convenience function for modifying a PHY register 1337 * @phydev: a pointer to a &struct phy_device 1338 * @regnum: register number 1339 * @mask: bit mask of bits to clear 1340 * @set: bit mask of bits to set 1341 * 1342 * Unlocked helper function which allows a PHY register to be modified as 1343 * new register value = (old register value & ~mask) | set 1344 * 1345 * Returns negative errno, 0 if there was no change, and 1 in case of change 1346 */ 1347 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1348 u16 mask, u16 set) 1349 { 1350 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1351 regnum, mask, set); 1352 } 1353 1354 /* 1355 * phy_read_mmd - Convenience function for reading a register 1356 * from an MMD on a given PHY. 1357 */ 1358 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1359 1360 /** 1361 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1362 * condition is met or a timeout occurs 1363 * 1364 * @phydev: The phy_device struct 1365 * @devaddr: The MMD to read from 1366 * @regnum: The register on the MMD to read 1367 * @val: Variable to read the register into 1368 * @cond: Break condition (usually involving @val) 1369 * @sleep_us: Maximum time to sleep between reads in us (0 1370 * tight-loops). Should be less than ~20ms since usleep_range 1371 * is used (see Documentation/timers/timers-howto.rst). 1372 * @timeout_us: Timeout in us, 0 means never timeout 1373 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1374 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either 1375 * case, the last read value at @args is stored in @val. Must not 1376 * be called from atomic context if sleep_us or timeout_us are used. 1377 */ 1378 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1379 sleep_us, timeout_us, sleep_before_read) \ 1380 ({ \ 1381 int __ret, __val; \ 1382 __ret = read_poll_timeout(__val = phy_read_mmd, val, \ 1383 __val < 0 || (cond), \ 1384 sleep_us, timeout_us, sleep_before_read, \ 1385 phydev, devaddr, regnum); \ 1386 if (__val < 0) \ 1387 __ret = __val; \ 1388 if (__ret) \ 1389 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1390 __ret; \ 1391 }) 1392 1393 /* 1394 * __phy_read_mmd - Convenience function for reading a register 1395 * from an MMD on a given PHY. 1396 */ 1397 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1398 1399 /* 1400 * phy_write_mmd - Convenience function for writing a register 1401 * on an MMD on a given PHY. 1402 */ 1403 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1404 1405 /* 1406 * __phy_write_mmd - Convenience function for writing a register 1407 * on an MMD on a given PHY. 1408 */ 1409 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1410 1411 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1412 u16 set); 1413 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1414 u16 set); 1415 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1416 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1417 1418 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1419 u16 mask, u16 set); 1420 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1421 u16 mask, u16 set); 1422 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1423 u16 mask, u16 set); 1424 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1425 u16 mask, u16 set); 1426 1427 /** 1428 * __phy_set_bits - Convenience function for setting bits in a PHY register 1429 * @phydev: the phy_device struct 1430 * @regnum: register number to write 1431 * @val: bits to set 1432 * 1433 * The caller must have taken the MDIO bus lock. 1434 */ 1435 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1436 { 1437 return __phy_modify(phydev, regnum, 0, val); 1438 } 1439 1440 /** 1441 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1442 * @phydev: the phy_device struct 1443 * @regnum: register number to write 1444 * @val: bits to clear 1445 * 1446 * The caller must have taken the MDIO bus lock. 1447 */ 1448 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1449 u16 val) 1450 { 1451 return __phy_modify(phydev, regnum, val, 0); 1452 } 1453 1454 /** 1455 * phy_set_bits - Convenience function for setting bits in a PHY register 1456 * @phydev: the phy_device struct 1457 * @regnum: register number to write 1458 * @val: bits to set 1459 */ 1460 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1461 { 1462 return phy_modify(phydev, regnum, 0, val); 1463 } 1464 1465 /** 1466 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1467 * @phydev: the phy_device struct 1468 * @regnum: register number to write 1469 * @val: bits to clear 1470 */ 1471 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1472 { 1473 return phy_modify(phydev, regnum, val, 0); 1474 } 1475 1476 /** 1477 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1478 * on MMD 1479 * @phydev: the phy_device struct 1480 * @devad: the MMD containing register to modify 1481 * @regnum: register number to modify 1482 * @val: bits to set 1483 * 1484 * The caller must have taken the MDIO bus lock. 1485 */ 1486 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1487 u32 regnum, u16 val) 1488 { 1489 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1490 } 1491 1492 /** 1493 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1494 * on MMD 1495 * @phydev: the phy_device struct 1496 * @devad: the MMD containing register to modify 1497 * @regnum: register number to modify 1498 * @val: bits to clear 1499 * 1500 * The caller must have taken the MDIO bus lock. 1501 */ 1502 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1503 u32 regnum, u16 val) 1504 { 1505 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1506 } 1507 1508 /** 1509 * phy_set_bits_mmd - Convenience function for setting bits in a register 1510 * on MMD 1511 * @phydev: the phy_device struct 1512 * @devad: the MMD containing register to modify 1513 * @regnum: register number to modify 1514 * @val: bits to set 1515 */ 1516 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1517 u32 regnum, u16 val) 1518 { 1519 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1520 } 1521 1522 /** 1523 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1524 * on MMD 1525 * @phydev: the phy_device struct 1526 * @devad: the MMD containing register to modify 1527 * @regnum: register number to modify 1528 * @val: bits to clear 1529 */ 1530 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1531 u32 regnum, u16 val) 1532 { 1533 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1534 } 1535 1536 /** 1537 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1538 * @phydev: the phy_device struct 1539 * 1540 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1541 * PHY_MAC_INTERRUPT 1542 */ 1543 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1544 { 1545 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1546 } 1547 1548 /** 1549 * phy_polling_mode - Convenience function for testing whether polling is 1550 * used to detect PHY status changes 1551 * @phydev: the phy_device struct 1552 */ 1553 static inline bool phy_polling_mode(struct phy_device *phydev) 1554 { 1555 if (phydev->state == PHY_CABLETEST) 1556 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1557 return true; 1558 1559 return phydev->irq == PHY_POLL; 1560 } 1561 1562 /** 1563 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1564 * @phydev: the phy_device struct 1565 */ 1566 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1567 { 1568 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1569 } 1570 1571 /** 1572 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1573 * @phydev: the phy_device struct 1574 */ 1575 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1576 { 1577 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1578 } 1579 1580 /** 1581 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1582 * PTP hardware clock capabilities. 1583 * @phydev: the phy_device struct 1584 */ 1585 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1586 { 1587 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1588 } 1589 1590 /** 1591 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1592 * @phydev: the phy_device struct 1593 */ 1594 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1595 { 1596 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1597 } 1598 1599 static inline int phy_hwtstamp(struct phy_device *phydev, 1600 struct kernel_hwtstamp_config *cfg, 1601 struct netlink_ext_ack *extack) 1602 { 1603 return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack); 1604 } 1605 1606 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1607 int type) 1608 { 1609 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1610 } 1611 1612 static inline int phy_ts_info(struct phy_device *phydev, 1613 struct ethtool_ts_info *tsinfo) 1614 { 1615 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1616 } 1617 1618 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1619 int type) 1620 { 1621 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1622 } 1623 1624 /** 1625 * phy_is_internal - Convenience function for testing if a PHY is internal 1626 * @phydev: the phy_device struct 1627 */ 1628 static inline bool phy_is_internal(struct phy_device *phydev) 1629 { 1630 return phydev->is_internal; 1631 } 1632 1633 /** 1634 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1635 * @phydev: the phy_device struct 1636 */ 1637 static inline bool phy_on_sfp(struct phy_device *phydev) 1638 { 1639 return phydev->is_on_sfp_module; 1640 } 1641 1642 /** 1643 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1644 * PHY interface mode is RGMII (all variants) 1645 * @mode: the &phy_interface_t enum 1646 */ 1647 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1648 { 1649 return mode >= PHY_INTERFACE_MODE_RGMII && 1650 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1651 }; 1652 1653 /** 1654 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1655 * negotiation 1656 * @mode: one of &enum phy_interface_t 1657 * 1658 * Returns true if the PHY interface mode uses the 16-bit negotiation 1659 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1660 */ 1661 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1662 { 1663 return mode == PHY_INTERFACE_MODE_1000BASEX || 1664 mode == PHY_INTERFACE_MODE_2500BASEX; 1665 } 1666 1667 /** 1668 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1669 * is RGMII (all variants) 1670 * @phydev: the phy_device struct 1671 */ 1672 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1673 { 1674 return phy_interface_mode_is_rgmii(phydev->interface); 1675 }; 1676 1677 /** 1678 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1679 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1680 * @phydev: the phy_device struct 1681 */ 1682 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1683 { 1684 return phydev->is_pseudo_fixed_link; 1685 } 1686 1687 int phy_save_page(struct phy_device *phydev); 1688 int phy_select_page(struct phy_device *phydev, int page); 1689 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1690 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1691 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1692 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1693 u16 mask, u16 set); 1694 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1695 u16 mask, u16 set); 1696 1697 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1698 bool is_c45, 1699 struct phy_c45_device_ids *c45_ids); 1700 #if IS_ENABLED(CONFIG_PHYLIB) 1701 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1702 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1703 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1704 struct phy_device *device_phy_find_device(struct device *dev); 1705 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode); 1706 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1707 int phy_device_register(struct phy_device *phy); 1708 void phy_device_free(struct phy_device *phydev); 1709 #else 1710 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1711 { 1712 return 0; 1713 } 1714 static inline 1715 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1716 { 1717 return 0; 1718 } 1719 1720 static inline 1721 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1722 { 1723 return NULL; 1724 } 1725 1726 static inline struct phy_device *device_phy_find_device(struct device *dev) 1727 { 1728 return NULL; 1729 } 1730 1731 static inline 1732 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1733 { 1734 return NULL; 1735 } 1736 1737 static inline 1738 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1739 { 1740 return NULL; 1741 } 1742 1743 static inline int phy_device_register(struct phy_device *phy) 1744 { 1745 return 0; 1746 } 1747 1748 static inline void phy_device_free(struct phy_device *phydev) { } 1749 #endif /* CONFIG_PHYLIB */ 1750 void phy_device_remove(struct phy_device *phydev); 1751 int phy_get_c45_ids(struct phy_device *phydev); 1752 int phy_init_hw(struct phy_device *phydev); 1753 int phy_suspend(struct phy_device *phydev); 1754 int phy_resume(struct phy_device *phydev); 1755 int __phy_resume(struct phy_device *phydev); 1756 int phy_loopback(struct phy_device *phydev, bool enable); 1757 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1758 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1759 int phy_sfp_probe(struct phy_device *phydev, 1760 const struct sfp_upstream_ops *ops); 1761 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1762 phy_interface_t interface); 1763 struct phy_device *phy_find_first(struct mii_bus *bus); 1764 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1765 u32 flags, phy_interface_t interface); 1766 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1767 void (*handler)(struct net_device *), 1768 phy_interface_t interface); 1769 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1770 void (*handler)(struct net_device *), 1771 phy_interface_t interface); 1772 void phy_disconnect(struct phy_device *phydev); 1773 void phy_detach(struct phy_device *phydev); 1774 void phy_start(struct phy_device *phydev); 1775 void phy_stop(struct phy_device *phydev); 1776 int phy_config_aneg(struct phy_device *phydev); 1777 int _phy_start_aneg(struct phy_device *phydev); 1778 int phy_start_aneg(struct phy_device *phydev); 1779 int phy_aneg_done(struct phy_device *phydev); 1780 int phy_speed_down(struct phy_device *phydev, bool sync); 1781 int phy_speed_up(struct phy_device *phydev); 1782 bool phy_check_valid(int speed, int duplex, unsigned long *features); 1783 1784 int phy_restart_aneg(struct phy_device *phydev); 1785 int phy_reset_after_clk_enable(struct phy_device *phydev); 1786 1787 #if IS_ENABLED(CONFIG_PHYLIB) 1788 int phy_start_cable_test(struct phy_device *phydev, 1789 struct netlink_ext_ack *extack); 1790 int phy_start_cable_test_tdr(struct phy_device *phydev, 1791 struct netlink_ext_ack *extack, 1792 const struct phy_tdr_config *config); 1793 #else 1794 static inline 1795 int phy_start_cable_test(struct phy_device *phydev, 1796 struct netlink_ext_ack *extack) 1797 { 1798 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1799 return -EOPNOTSUPP; 1800 } 1801 static inline 1802 int phy_start_cable_test_tdr(struct phy_device *phydev, 1803 struct netlink_ext_ack *extack, 1804 const struct phy_tdr_config *config) 1805 { 1806 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1807 return -EOPNOTSUPP; 1808 } 1809 #endif 1810 1811 static inline void phy_device_reset(struct phy_device *phydev, int value) 1812 { 1813 mdio_device_reset(&phydev->mdio, value); 1814 } 1815 1816 #define phydev_err(_phydev, format, args...) \ 1817 dev_err(&_phydev->mdio.dev, format, ##args) 1818 1819 #define phydev_err_probe(_phydev, err, format, args...) \ 1820 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1821 1822 #define phydev_info(_phydev, format, args...) \ 1823 dev_info(&_phydev->mdio.dev, format, ##args) 1824 1825 #define phydev_warn(_phydev, format, args...) \ 1826 dev_warn(&_phydev->mdio.dev, format, ##args) 1827 1828 #define phydev_dbg(_phydev, format, args...) \ 1829 dev_dbg(&_phydev->mdio.dev, format, ##args) 1830 1831 static inline const char *phydev_name(const struct phy_device *phydev) 1832 { 1833 return dev_name(&phydev->mdio.dev); 1834 } 1835 1836 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1837 { 1838 mutex_lock(&phydev->mdio.bus->mdio_lock); 1839 } 1840 1841 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1842 { 1843 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1844 } 1845 1846 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1847 __printf(2, 3); 1848 char *phy_attached_info_irq(struct phy_device *phydev) 1849 __malloc; 1850 void phy_attached_info(struct phy_device *phydev); 1851 1852 /* Clause 22 PHY */ 1853 int genphy_read_abilities(struct phy_device *phydev); 1854 int genphy_setup_forced(struct phy_device *phydev); 1855 int genphy_restart_aneg(struct phy_device *phydev); 1856 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1857 int genphy_config_eee_advert(struct phy_device *phydev); 1858 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1859 int genphy_aneg_done(struct phy_device *phydev); 1860 int genphy_update_link(struct phy_device *phydev); 1861 int genphy_read_lpa(struct phy_device *phydev); 1862 int genphy_read_status_fixed(struct phy_device *phydev); 1863 int genphy_read_status(struct phy_device *phydev); 1864 int genphy_read_master_slave(struct phy_device *phydev); 1865 int genphy_suspend(struct phy_device *phydev); 1866 int genphy_resume(struct phy_device *phydev); 1867 int genphy_loopback(struct phy_device *phydev, bool enable); 1868 int genphy_soft_reset(struct phy_device *phydev); 1869 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1870 1871 static inline int genphy_config_aneg(struct phy_device *phydev) 1872 { 1873 return __genphy_config_aneg(phydev, false); 1874 } 1875 1876 static inline int genphy_no_config_intr(struct phy_device *phydev) 1877 { 1878 return 0; 1879 } 1880 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1881 u16 regnum); 1882 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1883 u16 regnum, u16 val); 1884 1885 /* Clause 37 */ 1886 int genphy_c37_config_aneg(struct phy_device *phydev); 1887 int genphy_c37_read_status(struct phy_device *phydev, bool *changed); 1888 1889 /* Clause 45 PHY */ 1890 int genphy_c45_restart_aneg(struct phy_device *phydev); 1891 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1892 int genphy_c45_aneg_done(struct phy_device *phydev); 1893 int genphy_c45_read_link(struct phy_device *phydev); 1894 int genphy_c45_read_lpa(struct phy_device *phydev); 1895 int genphy_c45_read_pma(struct phy_device *phydev); 1896 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1897 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 1898 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1899 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1900 int genphy_c45_read_mdix(struct phy_device *phydev); 1901 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1902 int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev); 1903 int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev); 1904 int genphy_c45_read_eee_abilities(struct phy_device *phydev); 1905 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 1906 int genphy_c45_read_status(struct phy_device *phydev); 1907 int genphy_c45_baset1_read_status(struct phy_device *phydev); 1908 int genphy_c45_config_aneg(struct phy_device *phydev); 1909 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1910 int genphy_c45_pma_resume(struct phy_device *phydev); 1911 int genphy_c45_pma_suspend(struct phy_device *phydev); 1912 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 1913 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 1914 struct phy_plca_cfg *plca_cfg); 1915 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 1916 const struct phy_plca_cfg *plca_cfg); 1917 int genphy_c45_plca_get_status(struct phy_device *phydev, 1918 struct phy_plca_status *plca_st); 1919 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv, 1920 unsigned long *lp, bool *is_enabled); 1921 int genphy_c45_ethtool_get_eee(struct phy_device *phydev, 1922 struct ethtool_keee *data); 1923 int genphy_c45_ethtool_set_eee(struct phy_device *phydev, 1924 struct ethtool_keee *data); 1925 int genphy_c45_write_eee_adv(struct phy_device *phydev, unsigned long *adv); 1926 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev); 1927 int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv); 1928 1929 /* Generic C45 PHY driver */ 1930 extern struct phy_driver genphy_c45_driver; 1931 1932 /* The gen10g_* functions are the old Clause 45 stub */ 1933 int gen10g_config_aneg(struct phy_device *phydev); 1934 1935 static inline int phy_read_status(struct phy_device *phydev) 1936 { 1937 if (!phydev->drv) 1938 return -EIO; 1939 1940 if (phydev->drv->read_status) 1941 return phydev->drv->read_status(phydev); 1942 else 1943 return genphy_read_status(phydev); 1944 } 1945 1946 void phy_driver_unregister(struct phy_driver *drv); 1947 void phy_drivers_unregister(struct phy_driver *drv, int n); 1948 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1949 int phy_drivers_register(struct phy_driver *new_driver, int n, 1950 struct module *owner); 1951 void phy_error(struct phy_device *phydev); 1952 void phy_state_machine(struct work_struct *work); 1953 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1954 void phy_trigger_machine(struct phy_device *phydev); 1955 void phy_mac_interrupt(struct phy_device *phydev); 1956 void phy_start_machine(struct phy_device *phydev); 1957 void phy_stop_machine(struct phy_device *phydev); 1958 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1959 struct ethtool_link_ksettings *cmd); 1960 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1961 const struct ethtool_link_ksettings *cmd); 1962 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1963 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1964 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1965 int phy_disable_interrupts(struct phy_device *phydev); 1966 void phy_request_interrupt(struct phy_device *phydev); 1967 void phy_free_interrupt(struct phy_device *phydev); 1968 void phy_print_status(struct phy_device *phydev); 1969 int phy_get_rate_matching(struct phy_device *phydev, 1970 phy_interface_t iface); 1971 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1972 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1973 void phy_advertise_supported(struct phy_device *phydev); 1974 void phy_advertise_eee_all(struct phy_device *phydev); 1975 void phy_support_sym_pause(struct phy_device *phydev); 1976 void phy_support_asym_pause(struct phy_device *phydev); 1977 void phy_support_eee(struct phy_device *phydev); 1978 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1979 bool autoneg); 1980 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1981 bool phy_validate_pause(struct phy_device *phydev, 1982 struct ethtool_pauseparam *pp); 1983 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1984 1985 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 1986 const int *delay_values, int size, bool is_rx); 1987 1988 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1989 bool *tx_pause, bool *rx_pause); 1990 1991 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1992 int (*run)(struct phy_device *)); 1993 int phy_register_fixup_for_id(const char *bus_id, 1994 int (*run)(struct phy_device *)); 1995 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1996 int (*run)(struct phy_device *)); 1997 1998 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1999 int phy_unregister_fixup_for_id(const char *bus_id); 2000 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 2001 2002 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 2003 int phy_get_eee_err(struct phy_device *phydev); 2004 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data); 2005 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_keee *data); 2006 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 2007 void phy_ethtool_get_wol(struct phy_device *phydev, 2008 struct ethtool_wolinfo *wol); 2009 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 2010 struct ethtool_link_ksettings *cmd); 2011 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 2012 const struct ethtool_link_ksettings *cmd); 2013 int phy_ethtool_nway_reset(struct net_device *ndev); 2014 int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size); 2015 int of_phy_package_join(struct phy_device *phydev, size_t priv_size); 2016 void phy_package_leave(struct phy_device *phydev); 2017 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 2018 int base_addr, size_t priv_size); 2019 int devm_of_phy_package_join(struct device *dev, struct phy_device *phydev, 2020 size_t priv_size); 2021 2022 int __init mdio_bus_init(void); 2023 void mdio_bus_exit(void); 2024 2025 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 2026 int phy_ethtool_get_sset_count(struct phy_device *phydev); 2027 int phy_ethtool_get_stats(struct phy_device *phydev, 2028 struct ethtool_stats *stats, u64 *data); 2029 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 2030 struct phy_plca_cfg *plca_cfg); 2031 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 2032 const struct phy_plca_cfg *plca_cfg, 2033 struct netlink_ext_ack *extack); 2034 int phy_ethtool_get_plca_status(struct phy_device *phydev, 2035 struct phy_plca_status *plca_st); 2036 2037 int __phy_hwtstamp_get(struct phy_device *phydev, 2038 struct kernel_hwtstamp_config *config); 2039 int __phy_hwtstamp_set(struct phy_device *phydev, 2040 struct kernel_hwtstamp_config *config, 2041 struct netlink_ext_ack *extack); 2042 2043 static inline int phy_package_address(struct phy_device *phydev, 2044 unsigned int addr_offset) 2045 { 2046 struct phy_package_shared *shared = phydev->shared; 2047 u8 base_addr = shared->base_addr; 2048 2049 if (addr_offset >= PHY_MAX_ADDR - base_addr) 2050 return -EIO; 2051 2052 /* we know that addr will be in the range 0..31 and thus the 2053 * implicit cast to a signed int is not a problem. 2054 */ 2055 return base_addr + addr_offset; 2056 } 2057 2058 static inline int phy_package_read(struct phy_device *phydev, 2059 unsigned int addr_offset, u32 regnum) 2060 { 2061 int addr = phy_package_address(phydev, addr_offset); 2062 2063 if (addr < 0) 2064 return addr; 2065 2066 return mdiobus_read(phydev->mdio.bus, addr, regnum); 2067 } 2068 2069 static inline int __phy_package_read(struct phy_device *phydev, 2070 unsigned int addr_offset, u32 regnum) 2071 { 2072 int addr = phy_package_address(phydev, addr_offset); 2073 2074 if (addr < 0) 2075 return addr; 2076 2077 return __mdiobus_read(phydev->mdio.bus, addr, regnum); 2078 } 2079 2080 static inline int phy_package_write(struct phy_device *phydev, 2081 unsigned int addr_offset, u32 regnum, 2082 u16 val) 2083 { 2084 int addr = phy_package_address(phydev, addr_offset); 2085 2086 if (addr < 0) 2087 return addr; 2088 2089 return mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2090 } 2091 2092 static inline int __phy_package_write(struct phy_device *phydev, 2093 unsigned int addr_offset, u32 regnum, 2094 u16 val) 2095 { 2096 int addr = phy_package_address(phydev, addr_offset); 2097 2098 if (addr < 0) 2099 return addr; 2100 2101 return __mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2102 } 2103 2104 int __phy_package_read_mmd(struct phy_device *phydev, 2105 unsigned int addr_offset, int devad, 2106 u32 regnum); 2107 2108 int phy_package_read_mmd(struct phy_device *phydev, 2109 unsigned int addr_offset, int devad, 2110 u32 regnum); 2111 2112 int __phy_package_write_mmd(struct phy_device *phydev, 2113 unsigned int addr_offset, int devad, 2114 u32 regnum, u16 val); 2115 2116 int phy_package_write_mmd(struct phy_device *phydev, 2117 unsigned int addr_offset, int devad, 2118 u32 regnum, u16 val); 2119 2120 static inline bool __phy_package_set_once(struct phy_device *phydev, 2121 unsigned int b) 2122 { 2123 struct phy_package_shared *shared = phydev->shared; 2124 2125 if (!shared) 2126 return false; 2127 2128 return !test_and_set_bit(b, &shared->flags); 2129 } 2130 2131 static inline bool phy_package_init_once(struct phy_device *phydev) 2132 { 2133 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 2134 } 2135 2136 static inline bool phy_package_probe_once(struct phy_device *phydev) 2137 { 2138 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 2139 } 2140 2141 extern const struct bus_type mdio_bus_type; 2142 2143 struct mdio_board_info { 2144 const char *bus_id; 2145 char modalias[MDIO_NAME_SIZE]; 2146 int mdio_addr; 2147 const void *platform_data; 2148 }; 2149 2150 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 2151 int mdiobus_register_board_info(const struct mdio_board_info *info, 2152 unsigned int n); 2153 #else 2154 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 2155 unsigned int n) 2156 { 2157 return 0; 2158 } 2159 #endif 2160 2161 2162 /** 2163 * phy_module_driver() - Helper macro for registering PHY drivers 2164 * @__phy_drivers: array of PHY drivers to register 2165 * @__count: Numbers of members in array 2166 * 2167 * Helper macro for PHY drivers which do not do anything special in module 2168 * init/exit. Each module may only use this macro once, and calling it 2169 * replaces module_init() and module_exit(). 2170 */ 2171 #define phy_module_driver(__phy_drivers, __count) \ 2172 static int __init phy_module_init(void) \ 2173 { \ 2174 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 2175 } \ 2176 module_init(phy_module_init); \ 2177 static void __exit phy_module_exit(void) \ 2178 { \ 2179 phy_drivers_unregister(__phy_drivers, __count); \ 2180 } \ 2181 module_exit(phy_module_exit) 2182 2183 #define module_phy_driver(__phy_drivers) \ 2184 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 2185 2186 bool phy_driver_is_genphy(struct phy_device *phydev); 2187 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 2188 2189 #endif /* __PHY_H */ 2190