1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/leds.h> 18 #include <linux/linkmode.h> 19 #include <linux/netlink.h> 20 #include <linux/mdio.h> 21 #include <linux/mii.h> 22 #include <linux/mii_timestamper.h> 23 #include <linux/module.h> 24 #include <linux/timer.h> 25 #include <linux/workqueue.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/u64_stats_sync.h> 28 #include <linux/irqreturn.h> 29 #include <linux/iopoll.h> 30 #include <linux/refcount.h> 31 32 #include <linux/atomic.h> 33 34 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 35 SUPPORTED_TP | \ 36 SUPPORTED_MII) 37 38 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 39 SUPPORTED_10baseT_Full) 40 41 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 42 SUPPORTED_100baseT_Full) 43 44 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 45 SUPPORTED_1000baseT_Full) 46 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 54 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 55 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 56 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init; 57 58 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 59 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 60 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 61 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 62 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 63 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 64 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 65 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 66 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 67 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features) 68 69 extern const int phy_basic_ports_array[3]; 70 extern const int phy_fibre_port_array[1]; 71 extern const int phy_all_ports_features_array[7]; 72 extern const int phy_10_100_features_array[4]; 73 extern const int phy_basic_t1_features_array[3]; 74 extern const int phy_basic_t1s_p2mp_features_array[2]; 75 extern const int phy_gbit_features_array[2]; 76 extern const int phy_10gbit_features_array[1]; 77 78 /* 79 * Set phydev->irq to PHY_POLL if interrupts are not supported, 80 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 81 * the attached MAC driver handles the interrupt 82 */ 83 #define PHY_POLL -1 84 #define PHY_MAC_INTERRUPT -2 85 86 #define PHY_IS_INTERNAL 0x00000001 87 #define PHY_RST_AFTER_CLK_EN 0x00000002 88 #define PHY_POLL_CABLE_TEST 0x00000004 89 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008 90 #define MDIO_DEVICE_IS_PHY 0x80000000 91 92 /** 93 * enum phy_interface_t - Interface Mode definitions 94 * 95 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 96 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 97 * @PHY_INTERFACE_MODE_MII: Media-independent interface 98 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 99 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 100 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 101 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 102 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 103 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 104 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 105 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 106 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 107 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 108 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 109 * @PHY_INTERFACE_MODE_SMII: Serial MII 110 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 111 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 112 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 113 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII 114 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 115 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 116 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 117 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 118 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 119 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 120 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 121 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 122 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 123 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 124 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 125 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 126 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 127 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 128 * @PHY_INTERFACE_MODE_MAX: Book keeping 129 * 130 * Describes the interface between the MAC and PHY. 131 */ 132 typedef enum { 133 PHY_INTERFACE_MODE_NA, 134 PHY_INTERFACE_MODE_INTERNAL, 135 PHY_INTERFACE_MODE_MII, 136 PHY_INTERFACE_MODE_GMII, 137 PHY_INTERFACE_MODE_SGMII, 138 PHY_INTERFACE_MODE_TBI, 139 PHY_INTERFACE_MODE_REVMII, 140 PHY_INTERFACE_MODE_RMII, 141 PHY_INTERFACE_MODE_REVRMII, 142 PHY_INTERFACE_MODE_RGMII, 143 PHY_INTERFACE_MODE_RGMII_ID, 144 PHY_INTERFACE_MODE_RGMII_RXID, 145 PHY_INTERFACE_MODE_RGMII_TXID, 146 PHY_INTERFACE_MODE_RTBI, 147 PHY_INTERFACE_MODE_SMII, 148 PHY_INTERFACE_MODE_XGMII, 149 PHY_INTERFACE_MODE_XLGMII, 150 PHY_INTERFACE_MODE_MOCA, 151 PHY_INTERFACE_MODE_PSGMII, 152 PHY_INTERFACE_MODE_QSGMII, 153 PHY_INTERFACE_MODE_TRGMII, 154 PHY_INTERFACE_MODE_100BASEX, 155 PHY_INTERFACE_MODE_1000BASEX, 156 PHY_INTERFACE_MODE_2500BASEX, 157 PHY_INTERFACE_MODE_5GBASER, 158 PHY_INTERFACE_MODE_RXAUI, 159 PHY_INTERFACE_MODE_XAUI, 160 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 161 PHY_INTERFACE_MODE_10GBASER, 162 PHY_INTERFACE_MODE_25GBASER, 163 PHY_INTERFACE_MODE_USXGMII, 164 /* 10GBASE-KR - with Clause 73 AN */ 165 PHY_INTERFACE_MODE_10GKR, 166 PHY_INTERFACE_MODE_QUSGMII, 167 PHY_INTERFACE_MODE_1000BASEKX, 168 PHY_INTERFACE_MODE_MAX, 169 } phy_interface_t; 170 171 /* PHY interface mode bitmap handling */ 172 #define DECLARE_PHY_INTERFACE_MASK(name) \ 173 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 174 175 static inline void phy_interface_zero(unsigned long *intf) 176 { 177 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 178 } 179 180 static inline bool phy_interface_empty(const unsigned long *intf) 181 { 182 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 183 } 184 185 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 186 const unsigned long *b) 187 { 188 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 189 } 190 191 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 192 const unsigned long *b) 193 { 194 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 195 } 196 197 static inline void phy_interface_set_rgmii(unsigned long *intf) 198 { 199 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 200 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 201 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 202 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 203 } 204 205 /* 206 * phy_supported_speeds - return all speeds currently supported by a PHY device 207 */ 208 unsigned int phy_supported_speeds(struct phy_device *phy, 209 unsigned int *speeds, 210 unsigned int size); 211 212 /** 213 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 214 * @interface: enum phy_interface_t value 215 * 216 * Description: maps enum &phy_interface_t defined in this file 217 * into the device tree binding of 'phy-mode', so that Ethernet 218 * device driver can get PHY interface from device tree. 219 */ 220 static inline const char *phy_modes(phy_interface_t interface) 221 { 222 switch (interface) { 223 case PHY_INTERFACE_MODE_NA: 224 return ""; 225 case PHY_INTERFACE_MODE_INTERNAL: 226 return "internal"; 227 case PHY_INTERFACE_MODE_MII: 228 return "mii"; 229 case PHY_INTERFACE_MODE_GMII: 230 return "gmii"; 231 case PHY_INTERFACE_MODE_SGMII: 232 return "sgmii"; 233 case PHY_INTERFACE_MODE_TBI: 234 return "tbi"; 235 case PHY_INTERFACE_MODE_REVMII: 236 return "rev-mii"; 237 case PHY_INTERFACE_MODE_RMII: 238 return "rmii"; 239 case PHY_INTERFACE_MODE_REVRMII: 240 return "rev-rmii"; 241 case PHY_INTERFACE_MODE_RGMII: 242 return "rgmii"; 243 case PHY_INTERFACE_MODE_RGMII_ID: 244 return "rgmii-id"; 245 case PHY_INTERFACE_MODE_RGMII_RXID: 246 return "rgmii-rxid"; 247 case PHY_INTERFACE_MODE_RGMII_TXID: 248 return "rgmii-txid"; 249 case PHY_INTERFACE_MODE_RTBI: 250 return "rtbi"; 251 case PHY_INTERFACE_MODE_SMII: 252 return "smii"; 253 case PHY_INTERFACE_MODE_XGMII: 254 return "xgmii"; 255 case PHY_INTERFACE_MODE_XLGMII: 256 return "xlgmii"; 257 case PHY_INTERFACE_MODE_MOCA: 258 return "moca"; 259 case PHY_INTERFACE_MODE_PSGMII: 260 return "psgmii"; 261 case PHY_INTERFACE_MODE_QSGMII: 262 return "qsgmii"; 263 case PHY_INTERFACE_MODE_TRGMII: 264 return "trgmii"; 265 case PHY_INTERFACE_MODE_1000BASEX: 266 return "1000base-x"; 267 case PHY_INTERFACE_MODE_1000BASEKX: 268 return "1000base-kx"; 269 case PHY_INTERFACE_MODE_2500BASEX: 270 return "2500base-x"; 271 case PHY_INTERFACE_MODE_5GBASER: 272 return "5gbase-r"; 273 case PHY_INTERFACE_MODE_RXAUI: 274 return "rxaui"; 275 case PHY_INTERFACE_MODE_XAUI: 276 return "xaui"; 277 case PHY_INTERFACE_MODE_10GBASER: 278 return "10gbase-r"; 279 case PHY_INTERFACE_MODE_25GBASER: 280 return "25gbase-r"; 281 case PHY_INTERFACE_MODE_USXGMII: 282 return "usxgmii"; 283 case PHY_INTERFACE_MODE_10GKR: 284 return "10gbase-kr"; 285 case PHY_INTERFACE_MODE_100BASEX: 286 return "100base-x"; 287 case PHY_INTERFACE_MODE_QUSGMII: 288 return "qusgmii"; 289 default: 290 return "unknown"; 291 } 292 } 293 294 #define PHY_INIT_TIMEOUT 100000 295 #define PHY_FORCE_TIMEOUT 10 296 297 #define PHY_MAX_ADDR 32 298 299 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 300 #define PHY_ID_FMT "%s:%02x" 301 302 #define MII_BUS_ID_SIZE 61 303 304 struct device; 305 struct kernel_hwtstamp_config; 306 struct phylink; 307 struct sfp_bus; 308 struct sfp_upstream_ops; 309 struct sk_buff; 310 311 /** 312 * struct mdio_bus_stats - Statistics counters for MDIO busses 313 * @transfers: Total number of transfers, i.e. @writes + @reads 314 * @errors: Number of MDIO transfers that returned an error 315 * @writes: Number of write transfers 316 * @reads: Number of read transfers 317 * @syncp: Synchronisation for incrementing statistics 318 */ 319 struct mdio_bus_stats { 320 u64_stats_t transfers; 321 u64_stats_t errors; 322 u64_stats_t writes; 323 u64_stats_t reads; 324 /* Must be last, add new statistics above */ 325 struct u64_stats_sync syncp; 326 }; 327 328 /** 329 * struct phy_package_shared - Shared information in PHY packages 330 * @base_addr: Base PHY address of PHY package used to combine PHYs 331 * in one package and for offset calculation of phy_package_read/write 332 * @np: Pointer to the Device Node if PHY package defined in DT 333 * @refcnt: Number of PHYs connected to this shared data 334 * @flags: Initialization of PHY package 335 * @priv_size: Size of the shared private data @priv 336 * @priv: Driver private data shared across a PHY package 337 * 338 * Represents a shared structure between different phydev's in the same 339 * package, for example a quad PHY. See phy_package_join() and 340 * phy_package_leave(). 341 */ 342 struct phy_package_shared { 343 u8 base_addr; 344 /* With PHY package defined in DT this points to the PHY package node */ 345 struct device_node *np; 346 refcount_t refcnt; 347 unsigned long flags; 348 size_t priv_size; 349 350 /* private data pointer */ 351 /* note that this pointer is shared between different phydevs and 352 * the user has to take care of appropriate locking. It is allocated 353 * and freed automatically by phy_package_join() and 354 * phy_package_leave(). 355 */ 356 void *priv; 357 }; 358 359 /* used as bit number in atomic bitops */ 360 #define PHY_SHARED_F_INIT_DONE 0 361 #define PHY_SHARED_F_PROBE_DONE 1 362 363 /** 364 * struct mii_bus - Represents an MDIO bus 365 * 366 * @owner: Who owns this device 367 * @name: User friendly name for this MDIO device, or driver name 368 * @id: Unique identifier for this bus, typical from bus hierarchy 369 * @priv: Driver private data 370 * 371 * The Bus class for PHYs. Devices which provide access to 372 * PHYs should register using this structure 373 */ 374 struct mii_bus { 375 struct module *owner; 376 const char *name; 377 char id[MII_BUS_ID_SIZE]; 378 void *priv; 379 /** @read: Perform a read transfer on the bus */ 380 int (*read)(struct mii_bus *bus, int addr, int regnum); 381 /** @write: Perform a write transfer on the bus */ 382 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 383 /** @read_c45: Perform a C45 read transfer on the bus */ 384 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 385 /** @write_c45: Perform a C45 write transfer on the bus */ 386 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 387 int regnum, u16 val); 388 /** @reset: Perform a reset of the bus */ 389 int (*reset)(struct mii_bus *bus); 390 391 /** @stats: Statistic counters per device on the bus */ 392 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 393 394 /** 395 * @mdio_lock: A lock to ensure that only one thing can read/write 396 * the MDIO bus at a time 397 */ 398 struct mutex mdio_lock; 399 400 /** @parent: Parent device of this bus */ 401 struct device *parent; 402 /** @state: State of bus structure */ 403 enum { 404 MDIOBUS_ALLOCATED = 1, 405 MDIOBUS_REGISTERED, 406 MDIOBUS_UNREGISTERED, 407 MDIOBUS_RELEASED, 408 } state; 409 410 /** @dev: Kernel device representation */ 411 struct device dev; 412 413 /** @mdio_map: list of all MDIO devices on bus */ 414 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 415 416 /** @phy_mask: PHY addresses to be ignored when probing */ 417 u32 phy_mask; 418 419 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 420 u32 phy_ignore_ta_mask; 421 422 /** 423 * @irq: An array of interrupts, each PHY's interrupt at the index 424 * matching its address 425 */ 426 int irq[PHY_MAX_ADDR]; 427 428 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 429 int reset_delay_us; 430 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 431 int reset_post_delay_us; 432 /** @reset_gpiod: Reset GPIO descriptor pointer */ 433 struct gpio_desc *reset_gpiod; 434 435 /** @shared_lock: protect access to the shared element */ 436 struct mutex shared_lock; 437 438 /** @shared: shared state across different PHYs */ 439 struct phy_package_shared *shared[PHY_MAX_ADDR]; 440 }; 441 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 442 443 struct mii_bus *mdiobus_alloc_size(size_t size); 444 445 /** 446 * mdiobus_alloc - Allocate an MDIO bus structure 447 * 448 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 449 * for the driver to register the bus. 450 */ 451 static inline struct mii_bus *mdiobus_alloc(void) 452 { 453 return mdiobus_alloc_size(0); 454 } 455 456 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 457 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 458 struct module *owner); 459 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 460 #define devm_mdiobus_register(dev, bus) \ 461 __devm_mdiobus_register(dev, bus, THIS_MODULE) 462 463 void mdiobus_unregister(struct mii_bus *bus); 464 void mdiobus_free(struct mii_bus *bus); 465 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 466 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 467 { 468 return devm_mdiobus_alloc_size(dev, 0); 469 } 470 471 struct mii_bus *mdio_find_bus(const char *mdio_name); 472 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); 473 474 #define PHY_INTERRUPT_DISABLED false 475 #define PHY_INTERRUPT_ENABLED true 476 477 /** 478 * enum phy_state - PHY state machine states: 479 * 480 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 481 * should be called if and only if the PHY is in this state, 482 * given that the PHY device exists. 483 * - PHY driver probe function will set the state to @PHY_READY 484 * 485 * @PHY_READY: PHY is ready to send and receive packets, but the 486 * controller is not. By default, PHYs which do not implement 487 * probe will be set to this state by phy_probe(). 488 * - start will set the state to UP 489 * 490 * @PHY_UP: The PHY and attached device are ready to do work. 491 * Interrupts should be started here. 492 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 493 * 494 * @PHY_NOLINK: PHY is up, but not currently plugged in. 495 * - irq or timer will set @PHY_RUNNING if link comes back 496 * - phy_stop moves to @PHY_HALTED 497 * 498 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 499 * and/or receiving packets 500 * - irq or timer will set @PHY_NOLINK if link goes down 501 * - phy_stop moves to @PHY_HALTED 502 * 503 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 504 * is not expected to work, carrier will be indicated as down. PHY will be 505 * poll once per second, or on interrupt for it current state. 506 * Once complete, move to UP to restart the PHY. 507 * - phy_stop aborts the running test and moves to @PHY_HALTED 508 * 509 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. 510 * - phy_start moves to @PHY_UP 511 * 512 * @PHY_ERROR: PHY is up, but is in an error state. 513 * - phy_stop moves to @PHY_HALTED 514 */ 515 enum phy_state { 516 PHY_DOWN = 0, 517 PHY_READY, 518 PHY_HALTED, 519 PHY_ERROR, 520 PHY_UP, 521 PHY_RUNNING, 522 PHY_NOLINK, 523 PHY_CABLETEST, 524 }; 525 526 #define MDIO_MMD_NUM 32 527 528 /** 529 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 530 * @devices_in_package: IEEE 802.3 devices in package register value. 531 * @mmds_present: bit vector of MMDs present. 532 * @device_ids: The device identifer for each present device. 533 */ 534 struct phy_c45_device_ids { 535 u32 devices_in_package; 536 u32 mmds_present; 537 u32 device_ids[MDIO_MMD_NUM]; 538 }; 539 540 struct macsec_context; 541 struct macsec_ops; 542 543 /** 544 * struct phy_device - An instance of a PHY 545 * 546 * @mdio: MDIO bus this PHY is on 547 * @drv: Pointer to the driver for this PHY instance 548 * @devlink: Create a link between phy dev and mac dev, if the external phy 549 * used by current mac interface is managed by another mac interface. 550 * @phy_id: UID for this device found during discovery 551 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 552 * @is_c45: Set to true if this PHY uses clause 45 addressing. 553 * @is_internal: Set to true if this PHY is internal to a MAC. 554 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 555 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 556 * @has_fixups: Set to true if this PHY has fixups/quirks. 557 * @suspended: Set to true if this PHY has been suspended successfully. 558 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 559 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 560 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 561 * @downshifted_rate: Set true if link speed has been downshifted. 562 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 563 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 564 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN 565 * enabled. 566 * @state: State of the PHY for management purposes 567 * @dev_flags: Device-specific flags used by the PHY driver. 568 * 569 * - Bits [15:0] are free to use by the PHY driver to communicate 570 * driver specific behavior. 571 * - Bits [23:16] are currently reserved for future use. 572 * - Bits [31:24] are reserved for defining generic 573 * PHY driver behavior. 574 * @irq: IRQ number of the PHY's interrupt (-1 if none) 575 * @phylink: Pointer to phylink instance for this PHY 576 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 577 * @sfp_bus: SFP bus attached to this PHY's fiber port 578 * @attached_dev: The attached enet driver's device instance ptr 579 * @adjust_link: Callback for the enet controller to respond to changes: in the 580 * link state. 581 * @phy_link_change: Callback for phylink for notification of link change 582 * @macsec_ops: MACsec offloading ops. 583 * 584 * @speed: Current link speed 585 * @duplex: Current duplex 586 * @port: Current port 587 * @pause: Current pause 588 * @asym_pause: Current asymmetric pause 589 * @supported: Combined MAC/PHY supported linkmodes 590 * @advertising: Currently advertised linkmodes 591 * @adv_old: Saved advertised while power saving for WoL 592 * @supported_eee: supported PHY EEE linkmodes 593 * @advertising_eee: Currently advertised EEE linkmodes 594 * @eee_enabled: Flag indicating whether the EEE feature is enabled 595 * @lp_advertising: Current link partner advertised linkmodes 596 * @host_interfaces: PHY interface modes supported by host 597 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 598 * @autoneg: Flag autoneg being used 599 * @rate_matching: Current rate matching mode 600 * @link: Current link state 601 * @autoneg_complete: Flag auto negotiation of the link has completed 602 * @mdix: Current crossover 603 * @mdix_ctrl: User setting of crossover 604 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 605 * @interrupts: Flag interrupts have been enabled 606 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 607 * handling shall be postponed until PHY has resumed 608 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 609 * requiring a rerun of the interrupt handler after resume 610 * @interface: enum phy_interface_t value 611 * @possible_interfaces: bitmap if interface modes that the attached PHY 612 * will switch between depending on media speed. 613 * @skb: Netlink message for cable diagnostics 614 * @nest: Netlink nest used for cable diagnostics 615 * @ehdr: nNtlink header for cable diagnostics 616 * @phy_led_triggers: Array of LED triggers 617 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 618 * @led_link_trigger: LED trigger for link up/down 619 * @last_triggered: last LED trigger for link speed 620 * @leds: list of PHY LED structures 621 * @master_slave_set: User requested master/slave configuration 622 * @master_slave_get: Current master/slave advertisement 623 * @master_slave_state: Current master/slave configuration 624 * @mii_ts: Pointer to time stamper callbacks 625 * @psec: Pointer to Power Sourcing Equipment control struct 626 * @lock: Mutex for serialization access to PHY 627 * @state_queue: Work queue for state machine 628 * @link_down_events: Number of times link was lost 629 * @shared: Pointer to private data shared by phys in one package 630 * @priv: Pointer to driver private data 631 * 632 * interrupts currently only supports enabled or disabled, 633 * but could be changed in the future to support enabling 634 * and disabling specific interrupts 635 * 636 * Contains some infrastructure for polling and interrupt 637 * handling, as well as handling shifts in PHY hardware state 638 */ 639 struct phy_device { 640 struct mdio_device mdio; 641 642 /* Information about the PHY type */ 643 /* And management functions */ 644 const struct phy_driver *drv; 645 646 struct device_link *devlink; 647 648 u32 phy_id; 649 650 struct phy_c45_device_ids c45_ids; 651 unsigned is_c45:1; 652 unsigned is_internal:1; 653 unsigned is_pseudo_fixed_link:1; 654 unsigned is_gigabit_capable:1; 655 unsigned has_fixups:1; 656 unsigned suspended:1; 657 unsigned suspended_by_mdio_bus:1; 658 unsigned sysfs_links:1; 659 unsigned loopback_enabled:1; 660 unsigned downshifted_rate:1; 661 unsigned is_on_sfp_module:1; 662 unsigned mac_managed_pm:1; 663 unsigned wol_enabled:1; 664 665 unsigned autoneg:1; 666 /* The most recently read link state */ 667 unsigned link:1; 668 unsigned autoneg_complete:1; 669 670 /* Interrupts are enabled */ 671 unsigned interrupts:1; 672 unsigned irq_suspended:1; 673 unsigned irq_rerun:1; 674 675 int rate_matching; 676 677 enum phy_state state; 678 679 u32 dev_flags; 680 681 phy_interface_t interface; 682 DECLARE_PHY_INTERFACE_MASK(possible_interfaces); 683 684 /* 685 * forced speed & duplex (no autoneg) 686 * partner speed & duplex & pause (autoneg) 687 */ 688 int speed; 689 int duplex; 690 int port; 691 int pause; 692 int asym_pause; 693 u8 master_slave_get; 694 u8 master_slave_set; 695 u8 master_slave_state; 696 697 /* Union of PHY and Attached devices' supported link modes */ 698 /* See ethtool.h for more info */ 699 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 700 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 701 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 702 /* used with phy_speed_down */ 703 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 704 /* used for eee validation */ 705 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee); 706 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee); 707 bool eee_enabled; 708 709 /* Host supported PHY interface types. Should be ignored if empty. */ 710 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 711 712 /* Energy efficient ethernet modes which should be prohibited */ 713 u32 eee_broken_modes; 714 715 #ifdef CONFIG_LED_TRIGGER_PHY 716 struct phy_led_trigger *phy_led_triggers; 717 unsigned int phy_num_led_triggers; 718 struct phy_led_trigger *last_triggered; 719 720 struct phy_led_trigger *led_link_trigger; 721 #endif 722 struct list_head leds; 723 724 /* 725 * Interrupt number for this PHY 726 * -1 means no interrupt 727 */ 728 int irq; 729 730 /* private data pointer */ 731 /* For use by PHYs to maintain extra state */ 732 void *priv; 733 734 /* shared data pointer */ 735 /* For use by PHYs inside the same package that need a shared state. */ 736 struct phy_package_shared *shared; 737 738 /* Reporting cable test results */ 739 struct sk_buff *skb; 740 void *ehdr; 741 struct nlattr *nest; 742 743 /* Interrupt and Polling infrastructure */ 744 struct delayed_work state_queue; 745 746 struct mutex lock; 747 748 /* This may be modified under the rtnl lock */ 749 bool sfp_bus_attached; 750 struct sfp_bus *sfp_bus; 751 struct phylink *phylink; 752 struct net_device *attached_dev; 753 struct mii_timestamper *mii_ts; 754 struct pse_control *psec; 755 756 u8 mdix; 757 u8 mdix_ctrl; 758 759 int pma_extable; 760 761 unsigned int link_down_events; 762 763 void (*phy_link_change)(struct phy_device *phydev, bool up); 764 void (*adjust_link)(struct net_device *dev); 765 766 #if IS_ENABLED(CONFIG_MACSEC) 767 /* MACsec management functions */ 768 const struct macsec_ops *macsec_ops; 769 #endif 770 }; 771 772 /* Generic phy_device::dev_flags */ 773 #define PHY_F_NO_IRQ 0x80000000 774 775 static inline struct phy_device *to_phy_device(const struct device *dev) 776 { 777 return container_of(to_mdio_device(dev), struct phy_device, mdio); 778 } 779 780 /** 781 * struct phy_tdr_config - Configuration of a TDR raw test 782 * 783 * @first: Distance for first data collection point 784 * @last: Distance for last data collection point 785 * @step: Step between data collection points 786 * @pair: Bitmap of cable pairs to collect data for 787 * 788 * A structure containing possible configuration parameters 789 * for a TDR cable test. The driver does not need to implement 790 * all the parameters, but should report what is actually used. 791 * All distances are in centimeters. 792 */ 793 struct phy_tdr_config { 794 u32 first; 795 u32 last; 796 u32 step; 797 s8 pair; 798 }; 799 #define PHY_PAIR_ALL -1 800 801 /** 802 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 803 * Avoidance) Reconciliation Sublayer. 804 * 805 * @version: read-only PLCA register map version. -1 = not available. Ignored 806 * when setting the configuration. Format is the same as reported by the PLCA 807 * IDVER register (31.CA00). -1 = not available. 808 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 809 * set. 0 = disabled, anything else = enabled. 810 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 811 * Allowed values [0 .. 254]. 255 = node disabled. 812 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 813 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 814 * set. Allowed values [1 .. 255]. 815 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 816 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 817 * more details. The to_timer shall be set equal over all nodes. 818 * -1 = not available / don't set. Allowed values [0 .. 255]. 819 * @burst_cnt: controls how many additional frames a node is allowed to send in 820 * single transmit opportunity (TO). The default value of 0 means that the 821 * node is allowed exactly one frame per TO. A value of 1 allows two frames 822 * per TO, and so on. -1 = not available / don't set. 823 * Allowed values [0 .. 255]. 824 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 825 * frame before interrupting the burst. This value should be set to a value 826 * greater than the MAC inter-packet gap (which is typically 96 bits). 827 * -1 = not available / don't set. Allowed values [0 .. 255]. 828 * 829 * A structure containing configuration parameters for setting/getting the PLCA 830 * RS configuration. The driver does not need to implement all the parameters, 831 * but should report what is actually used. 832 */ 833 struct phy_plca_cfg { 834 int version; 835 int enabled; 836 int node_id; 837 int node_cnt; 838 int to_tmr; 839 int burst_cnt; 840 int burst_tmr; 841 }; 842 843 /** 844 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 845 * Avoidance) Reconciliation Sublayer. 846 * 847 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 848 * register(31.CA03), indicating BEACON activity. 849 * 850 * A structure containing status information of the PLCA RS configuration. 851 * The driver does not need to implement all the parameters, but should report 852 * what is actually used. 853 */ 854 struct phy_plca_status { 855 bool pst; 856 }; 857 858 /* Modes for PHY LED configuration */ 859 enum phy_led_modes { 860 PHY_LED_ACTIVE_LOW = 0, 861 PHY_LED_INACTIVE_HIGH_IMPEDANCE = 1, 862 863 /* keep it last */ 864 __PHY_LED_MODES_NUM, 865 }; 866 867 /** 868 * struct phy_led: An LED driven by the PHY 869 * 870 * @list: List of LEDs 871 * @phydev: PHY this LED is attached to 872 * @led_cdev: Standard LED class structure 873 * @index: Number of the LED 874 */ 875 struct phy_led { 876 struct list_head list; 877 struct phy_device *phydev; 878 struct led_classdev led_cdev; 879 u8 index; 880 }; 881 882 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev) 883 884 /** 885 * struct phy_driver - Driver structure for a particular PHY type 886 * 887 * @mdiodrv: Data common to all MDIO devices 888 * @phy_id: The result of reading the UID registers of this PHY 889 * type, and ANDing them with the phy_id_mask. This driver 890 * only works for PHYs with IDs which match this field 891 * @name: The friendly name of this PHY type 892 * @phy_id_mask: Defines the important bits of the phy_id 893 * @features: A mandatory list of features (speed, duplex, etc) 894 * supported by this PHY 895 * @flags: A bitfield defining certain other features this PHY 896 * supports (like interrupts) 897 * @driver_data: Static driver data 898 * 899 * All functions are optional. If config_aneg or read_status 900 * are not implemented, the phy core uses the genphy versions. 901 * Note that none of these functions should be called from 902 * interrupt time. The goal is for the bus read/write functions 903 * to be able to block when the bus transaction is happening, 904 * and be freed up by an interrupt (The MPC85xx has this ability, 905 * though it is not currently supported in the driver). 906 */ 907 struct phy_driver { 908 struct mdio_driver_common mdiodrv; 909 u32 phy_id; 910 char *name; 911 u32 phy_id_mask; 912 const unsigned long * const features; 913 u32 flags; 914 const void *driver_data; 915 916 /** 917 * @soft_reset: Called to issue a PHY software reset 918 */ 919 int (*soft_reset)(struct phy_device *phydev); 920 921 /** 922 * @config_init: Called to initialize the PHY, 923 * including after a reset 924 */ 925 int (*config_init)(struct phy_device *phydev); 926 927 /** 928 * @probe: Called during discovery. Used to set 929 * up device-specific structures, if any 930 */ 931 int (*probe)(struct phy_device *phydev); 932 933 /** 934 * @get_features: Probe the hardware to determine what 935 * abilities it has. Should only set phydev->supported. 936 */ 937 int (*get_features)(struct phy_device *phydev); 938 939 /** 940 * @get_rate_matching: Get the supported type of rate matching for a 941 * particular phy interface. This is used by phy consumers to determine 942 * whether to advertise lower-speed modes for that interface. It is 943 * assumed that if a rate matching mode is supported on an interface, 944 * then that interface's rate can be adapted to all slower link speeds 945 * supported by the phy. If the interface is not supported, this should 946 * return %RATE_MATCH_NONE. 947 */ 948 int (*get_rate_matching)(struct phy_device *phydev, 949 phy_interface_t iface); 950 951 /* PHY Power Management */ 952 /** @suspend: Suspend the hardware, saving state if needed */ 953 int (*suspend)(struct phy_device *phydev); 954 /** @resume: Resume the hardware, restoring state if needed */ 955 int (*resume)(struct phy_device *phydev); 956 957 /** 958 * @config_aneg: Configures the advertisement and resets 959 * autonegotiation if phydev->autoneg is on, 960 * forces the speed to the current settings in phydev 961 * if phydev->autoneg is off 962 */ 963 int (*config_aneg)(struct phy_device *phydev); 964 965 /** @aneg_done: Determines the auto negotiation result */ 966 int (*aneg_done)(struct phy_device *phydev); 967 968 /** @read_status: Determines the negotiated speed and duplex */ 969 int (*read_status)(struct phy_device *phydev); 970 971 /** 972 * @config_intr: Enables or disables interrupts. 973 * It should also clear any pending interrupts prior to enabling the 974 * IRQs and after disabling them. 975 */ 976 int (*config_intr)(struct phy_device *phydev); 977 978 /** @handle_interrupt: Override default interrupt handling */ 979 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 980 981 /** @remove: Clears up any memory if needed */ 982 void (*remove)(struct phy_device *phydev); 983 984 /** 985 * @match_phy_device: Returns true if this is a suitable 986 * driver for the given phydev. If NULL, matching is based on 987 * phy_id and phy_id_mask. 988 */ 989 int (*match_phy_device)(struct phy_device *phydev); 990 991 /** 992 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 993 * register changes to enable Wake on LAN, so set_wol is 994 * provided to be called in the ethernet driver's set_wol 995 * function. 996 */ 997 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 998 999 /** 1000 * @get_wol: See set_wol, but for checking whether Wake on LAN 1001 * is enabled. 1002 */ 1003 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1004 1005 /** 1006 * @link_change_notify: Called to inform a PHY device driver 1007 * when the core is about to change the link state. This 1008 * callback is supposed to be used as fixup hook for drivers 1009 * that need to take action when the link state 1010 * changes. Drivers are by no means allowed to mess with the 1011 * PHY device structure in their implementations. 1012 */ 1013 void (*link_change_notify)(struct phy_device *dev); 1014 1015 /** 1016 * @read_mmd: PHY specific driver override for reading a MMD 1017 * register. This function is optional for PHY specific 1018 * drivers. When not provided, the default MMD read function 1019 * will be used by phy_read_mmd(), which will use either a 1020 * direct read for Clause 45 PHYs or an indirect read for 1021 * Clause 22 PHYs. devnum is the MMD device number within the 1022 * PHY device, regnum is the register within the selected MMD 1023 * device. 1024 */ 1025 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 1026 1027 /** 1028 * @write_mmd: PHY specific driver override for writing a MMD 1029 * register. This function is optional for PHY specific 1030 * drivers. When not provided, the default MMD write function 1031 * will be used by phy_write_mmd(), which will use either a 1032 * direct write for Clause 45 PHYs, or an indirect write for 1033 * Clause 22 PHYs. devnum is the MMD device number within the 1034 * PHY device, regnum is the register within the selected MMD 1035 * device. val is the value to be written. 1036 */ 1037 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 1038 u16 val); 1039 1040 /** @read_page: Return the current PHY register page number */ 1041 int (*read_page)(struct phy_device *dev); 1042 /** @write_page: Set the current PHY register page number */ 1043 int (*write_page)(struct phy_device *dev, int page); 1044 1045 /** 1046 * @module_info: Get the size and type of the eeprom contained 1047 * within a plug-in module 1048 */ 1049 int (*module_info)(struct phy_device *dev, 1050 struct ethtool_modinfo *modinfo); 1051 1052 /** 1053 * @module_eeprom: Get the eeprom information from the plug-in 1054 * module 1055 */ 1056 int (*module_eeprom)(struct phy_device *dev, 1057 struct ethtool_eeprom *ee, u8 *data); 1058 1059 /** @cable_test_start: Start a cable test */ 1060 int (*cable_test_start)(struct phy_device *dev); 1061 1062 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1063 int (*cable_test_tdr_start)(struct phy_device *dev, 1064 const struct phy_tdr_config *config); 1065 1066 /** 1067 * @cable_test_get_status: Once per second, or on interrupt, 1068 * request the status of the test. 1069 */ 1070 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1071 1072 /* Get statistics from the PHY using ethtool */ 1073 /** @get_sset_count: Number of statistic counters */ 1074 int (*get_sset_count)(struct phy_device *dev); 1075 /** @get_strings: Names of the statistic counters */ 1076 void (*get_strings)(struct phy_device *dev, u8 *data); 1077 /** @get_stats: Return the statistic counter values */ 1078 void (*get_stats)(struct phy_device *dev, 1079 struct ethtool_stats *stats, u64 *data); 1080 1081 /* Get and Set PHY tunables */ 1082 /** @get_tunable: Return the value of a tunable */ 1083 int (*get_tunable)(struct phy_device *dev, 1084 struct ethtool_tunable *tuna, void *data); 1085 /** @set_tunable: Set the value of a tunable */ 1086 int (*set_tunable)(struct phy_device *dev, 1087 struct ethtool_tunable *tuna, 1088 const void *data); 1089 /** @set_loopback: Set the loopback mood of the PHY */ 1090 int (*set_loopback)(struct phy_device *dev, bool enable); 1091 /** @get_sqi: Get the signal quality indication */ 1092 int (*get_sqi)(struct phy_device *dev); 1093 /** @get_sqi_max: Get the maximum signal quality indication */ 1094 int (*get_sqi_max)(struct phy_device *dev); 1095 1096 /* PLCA RS interface */ 1097 /** @get_plca_cfg: Return the current PLCA configuration */ 1098 int (*get_plca_cfg)(struct phy_device *dev, 1099 struct phy_plca_cfg *plca_cfg); 1100 /** @set_plca_cfg: Set the PLCA configuration */ 1101 int (*set_plca_cfg)(struct phy_device *dev, 1102 const struct phy_plca_cfg *plca_cfg); 1103 /** @get_plca_status: Return the current PLCA status info */ 1104 int (*get_plca_status)(struct phy_device *dev, 1105 struct phy_plca_status *plca_st); 1106 1107 /** 1108 * @led_brightness_set: Set a PHY LED brightness. Index 1109 * indicates which of the PHYs led should be set. Value 1110 * follows the standard LED class meaning, e.g. LED_OFF, 1111 * LED_HALF, LED_FULL. 1112 */ 1113 int (*led_brightness_set)(struct phy_device *dev, 1114 u8 index, enum led_brightness value); 1115 1116 /** 1117 * @led_blink_set: Set a PHY LED brightness. Index indicates 1118 * which of the PHYs led should be configured to blink. Delays 1119 * are in milliseconds and if both are zero then a sensible 1120 * default should be chosen. The call should adjust the 1121 * timings in that case and if it can't match the values 1122 * specified exactly. 1123 */ 1124 int (*led_blink_set)(struct phy_device *dev, u8 index, 1125 unsigned long *delay_on, 1126 unsigned long *delay_off); 1127 /** 1128 * @led_hw_is_supported: Can the HW support the given rules. 1129 * @dev: PHY device which has the LED 1130 * @index: Which LED of the PHY device 1131 * @rules The core is interested in these rules 1132 * 1133 * Return 0 if yes, -EOPNOTSUPP if not, or an error code. 1134 */ 1135 int (*led_hw_is_supported)(struct phy_device *dev, u8 index, 1136 unsigned long rules); 1137 /** 1138 * @led_hw_control_set: Set the HW to control the LED 1139 * @dev: PHY device which has the LED 1140 * @index: Which LED of the PHY device 1141 * @rules The rules used to control the LED 1142 * 1143 * Returns 0, or a an error code. 1144 */ 1145 int (*led_hw_control_set)(struct phy_device *dev, u8 index, 1146 unsigned long rules); 1147 /** 1148 * @led_hw_control_get: Get how the HW is controlling the LED 1149 * @dev: PHY device which has the LED 1150 * @index: Which LED of the PHY device 1151 * @rules Pointer to the rules used to control the LED 1152 * 1153 * Set *@rules to how the HW is currently blinking. Returns 0 1154 * on success, or a error code if the current blinking cannot 1155 * be represented in rules, or some other error happens. 1156 */ 1157 int (*led_hw_control_get)(struct phy_device *dev, u8 index, 1158 unsigned long *rules); 1159 1160 /** 1161 * @led_polarity_set: Set the LED polarity modes 1162 * @dev: PHY device which has the LED 1163 * @index: Which LED of the PHY device 1164 * @modes: bitmap of LED polarity modes 1165 * 1166 * Configure LED with all the required polarity modes in @modes 1167 * to make it correctly turn ON or OFF. 1168 * 1169 * Returns 0, or an error code. 1170 */ 1171 int (*led_polarity_set)(struct phy_device *dev, int index, 1172 unsigned long modes); 1173 }; 1174 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 1175 struct phy_driver, mdiodrv) 1176 1177 #define PHY_ANY_ID "MATCH ANY PHY" 1178 #define PHY_ANY_UID 0xffffffff 1179 1180 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 1181 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 1182 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 1183 1184 /** 1185 * phy_id_compare - compare @id1 with @id2 taking account of @mask 1186 * @id1: first PHY ID 1187 * @id2: second PHY ID 1188 * @mask: the PHY ID mask, set bits are significant in matching 1189 * 1190 * Return true if the bits from @id1 and @id2 specified by @mask match. 1191 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask). 1192 */ 1193 static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask) 1194 { 1195 return !((id1 ^ id2) & mask); 1196 } 1197 1198 /** 1199 * phydev_id_compare - compare @id with the PHY's Clause 22 ID 1200 * @phydev: the PHY device 1201 * @id: the PHY ID to be matched 1202 * 1203 * Compare the @phydev clause 22 ID with the provided @id and return true or 1204 * false depending whether it matches, using the bound driver mask. The 1205 * @phydev must be bound to a driver. 1206 */ 1207 static inline bool phydev_id_compare(struct phy_device *phydev, u32 id) 1208 { 1209 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask); 1210 } 1211 1212 /* A Structure for boards to register fixups with the PHY Lib */ 1213 struct phy_fixup { 1214 struct list_head list; 1215 char bus_id[MII_BUS_ID_SIZE + 3]; 1216 u32 phy_uid; 1217 u32 phy_uid_mask; 1218 int (*run)(struct phy_device *phydev); 1219 }; 1220 1221 const char *phy_speed_to_str(int speed); 1222 const char *phy_duplex_to_str(unsigned int duplex); 1223 const char *phy_rate_matching_to_str(int rate_matching); 1224 1225 int phy_interface_num_ports(phy_interface_t interface); 1226 1227 /* A structure for mapping a particular speed and duplex 1228 * combination to a particular SUPPORTED and ADVERTISED value 1229 */ 1230 struct phy_setting { 1231 u32 speed; 1232 u8 duplex; 1233 u8 bit; 1234 }; 1235 1236 const struct phy_setting * 1237 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 1238 bool exact); 1239 size_t phy_speeds(unsigned int *speeds, size_t size, 1240 unsigned long *mask); 1241 void of_set_phy_supported(struct phy_device *phydev); 1242 void of_set_phy_eee_broken(struct phy_device *phydev); 1243 int phy_speed_down_core(struct phy_device *phydev); 1244 1245 /** 1246 * phy_is_started - Convenience function to check whether PHY is started 1247 * @phydev: The phy_device struct 1248 */ 1249 static inline bool phy_is_started(struct phy_device *phydev) 1250 { 1251 return phydev->state >= PHY_UP; 1252 } 1253 1254 void phy_resolve_aneg_pause(struct phy_device *phydev); 1255 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1256 void phy_check_downshift(struct phy_device *phydev); 1257 1258 /** 1259 * phy_read - Convenience function for reading a given PHY register 1260 * @phydev: the phy_device struct 1261 * @regnum: register number to read 1262 * 1263 * NOTE: MUST NOT be called from interrupt context, 1264 * because the bus read/write functions may wait for an interrupt 1265 * to conclude the operation. 1266 */ 1267 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1268 { 1269 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1270 } 1271 1272 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1273 timeout_us, sleep_before_read) \ 1274 ({ \ 1275 int __ret, __val; \ 1276 __ret = read_poll_timeout(__val = phy_read, val, \ 1277 __val < 0 || (cond), \ 1278 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1279 if (__val < 0) \ 1280 __ret = __val; \ 1281 if (__ret) \ 1282 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1283 __ret; \ 1284 }) 1285 1286 /** 1287 * __phy_read - convenience function for reading a given PHY register 1288 * @phydev: the phy_device struct 1289 * @regnum: register number to read 1290 * 1291 * The caller must have taken the MDIO bus lock. 1292 */ 1293 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1294 { 1295 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1296 } 1297 1298 /** 1299 * phy_write - Convenience function for writing a given PHY register 1300 * @phydev: the phy_device struct 1301 * @regnum: register number to write 1302 * @val: value to write to @regnum 1303 * 1304 * NOTE: MUST NOT be called from interrupt context, 1305 * because the bus read/write functions may wait for an interrupt 1306 * to conclude the operation. 1307 */ 1308 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1309 { 1310 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1311 } 1312 1313 /** 1314 * __phy_write - Convenience function for writing a given PHY register 1315 * @phydev: the phy_device struct 1316 * @regnum: register number to write 1317 * @val: value to write to @regnum 1318 * 1319 * The caller must have taken the MDIO bus lock. 1320 */ 1321 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1322 { 1323 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1324 val); 1325 } 1326 1327 /** 1328 * __phy_modify_changed() - Convenience function for modifying a PHY register 1329 * @phydev: a pointer to a &struct phy_device 1330 * @regnum: register number 1331 * @mask: bit mask of bits to clear 1332 * @set: bit mask of bits to set 1333 * 1334 * Unlocked helper function which allows a PHY register to be modified as 1335 * new register value = (old register value & ~mask) | set 1336 * 1337 * Returns negative errno, 0 if there was no change, and 1 in case of change 1338 */ 1339 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1340 u16 mask, u16 set) 1341 { 1342 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1343 regnum, mask, set); 1344 } 1345 1346 /* 1347 * phy_read_mmd - Convenience function for reading a register 1348 * from an MMD on a given PHY. 1349 */ 1350 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1351 1352 /** 1353 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1354 * condition is met or a timeout occurs 1355 * 1356 * @phydev: The phy_device struct 1357 * @devaddr: The MMD to read from 1358 * @regnum: The register on the MMD to read 1359 * @val: Variable to read the register into 1360 * @cond: Break condition (usually involving @val) 1361 * @sleep_us: Maximum time to sleep between reads in us (0 1362 * tight-loops). Should be less than ~20ms since usleep_range 1363 * is used (see Documentation/timers/timers-howto.rst). 1364 * @timeout_us: Timeout in us, 0 means never timeout 1365 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1366 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either 1367 * case, the last read value at @args is stored in @val. Must not 1368 * be called from atomic context if sleep_us or timeout_us are used. 1369 */ 1370 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1371 sleep_us, timeout_us, sleep_before_read) \ 1372 ({ \ 1373 int __ret, __val; \ 1374 __ret = read_poll_timeout(__val = phy_read_mmd, val, \ 1375 __val < 0 || (cond), \ 1376 sleep_us, timeout_us, sleep_before_read, \ 1377 phydev, devaddr, regnum); \ 1378 if (__val < 0) \ 1379 __ret = __val; \ 1380 if (__ret) \ 1381 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1382 __ret; \ 1383 }) 1384 1385 /* 1386 * __phy_read_mmd - Convenience function for reading a register 1387 * from an MMD on a given PHY. 1388 */ 1389 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1390 1391 /* 1392 * phy_write_mmd - Convenience function for writing a register 1393 * on an MMD on a given PHY. 1394 */ 1395 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1396 1397 /* 1398 * __phy_write_mmd - Convenience function for writing a register 1399 * on an MMD on a given PHY. 1400 */ 1401 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1402 1403 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1404 u16 set); 1405 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1406 u16 set); 1407 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1408 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1409 1410 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1411 u16 mask, u16 set); 1412 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1413 u16 mask, u16 set); 1414 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1415 u16 mask, u16 set); 1416 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1417 u16 mask, u16 set); 1418 1419 /** 1420 * __phy_set_bits - Convenience function for setting bits in a PHY register 1421 * @phydev: the phy_device struct 1422 * @regnum: register number to write 1423 * @val: bits to set 1424 * 1425 * The caller must have taken the MDIO bus lock. 1426 */ 1427 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1428 { 1429 return __phy_modify(phydev, regnum, 0, val); 1430 } 1431 1432 /** 1433 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1434 * @phydev: the phy_device struct 1435 * @regnum: register number to write 1436 * @val: bits to clear 1437 * 1438 * The caller must have taken the MDIO bus lock. 1439 */ 1440 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1441 u16 val) 1442 { 1443 return __phy_modify(phydev, regnum, val, 0); 1444 } 1445 1446 /** 1447 * phy_set_bits - Convenience function for setting bits in a PHY register 1448 * @phydev: the phy_device struct 1449 * @regnum: register number to write 1450 * @val: bits to set 1451 */ 1452 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1453 { 1454 return phy_modify(phydev, regnum, 0, val); 1455 } 1456 1457 /** 1458 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1459 * @phydev: the phy_device struct 1460 * @regnum: register number to write 1461 * @val: bits to clear 1462 */ 1463 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1464 { 1465 return phy_modify(phydev, regnum, val, 0); 1466 } 1467 1468 /** 1469 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1470 * on MMD 1471 * @phydev: the phy_device struct 1472 * @devad: the MMD containing register to modify 1473 * @regnum: register number to modify 1474 * @val: bits to set 1475 * 1476 * The caller must have taken the MDIO bus lock. 1477 */ 1478 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1479 u32 regnum, u16 val) 1480 { 1481 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1482 } 1483 1484 /** 1485 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1486 * on MMD 1487 * @phydev: the phy_device struct 1488 * @devad: the MMD containing register to modify 1489 * @regnum: register number to modify 1490 * @val: bits to clear 1491 * 1492 * The caller must have taken the MDIO bus lock. 1493 */ 1494 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1495 u32 regnum, u16 val) 1496 { 1497 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1498 } 1499 1500 /** 1501 * phy_set_bits_mmd - Convenience function for setting bits in a register 1502 * on MMD 1503 * @phydev: the phy_device struct 1504 * @devad: the MMD containing register to modify 1505 * @regnum: register number to modify 1506 * @val: bits to set 1507 */ 1508 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1509 u32 regnum, u16 val) 1510 { 1511 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1512 } 1513 1514 /** 1515 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1516 * on MMD 1517 * @phydev: the phy_device struct 1518 * @devad: the MMD containing register to modify 1519 * @regnum: register number to modify 1520 * @val: bits to clear 1521 */ 1522 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1523 u32 regnum, u16 val) 1524 { 1525 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1526 } 1527 1528 /** 1529 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1530 * @phydev: the phy_device struct 1531 * 1532 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1533 * PHY_MAC_INTERRUPT 1534 */ 1535 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1536 { 1537 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1538 } 1539 1540 /** 1541 * phy_polling_mode - Convenience function for testing whether polling is 1542 * used to detect PHY status changes 1543 * @phydev: the phy_device struct 1544 */ 1545 static inline bool phy_polling_mode(struct phy_device *phydev) 1546 { 1547 if (phydev->state == PHY_CABLETEST) 1548 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1549 return true; 1550 1551 return phydev->irq == PHY_POLL; 1552 } 1553 1554 /** 1555 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1556 * @phydev: the phy_device struct 1557 */ 1558 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1559 { 1560 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1561 } 1562 1563 /** 1564 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1565 * @phydev: the phy_device struct 1566 */ 1567 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1568 { 1569 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1570 } 1571 1572 /** 1573 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1574 * PTP hardware clock capabilities. 1575 * @phydev: the phy_device struct 1576 */ 1577 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1578 { 1579 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1580 } 1581 1582 /** 1583 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1584 * @phydev: the phy_device struct 1585 */ 1586 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1587 { 1588 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1589 } 1590 1591 static inline int phy_hwtstamp(struct phy_device *phydev, 1592 struct kernel_hwtstamp_config *cfg, 1593 struct netlink_ext_ack *extack) 1594 { 1595 return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack); 1596 } 1597 1598 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1599 int type) 1600 { 1601 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1602 } 1603 1604 static inline int phy_ts_info(struct phy_device *phydev, 1605 struct ethtool_ts_info *tsinfo) 1606 { 1607 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1608 } 1609 1610 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1611 int type) 1612 { 1613 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1614 } 1615 1616 /** 1617 * phy_is_internal - Convenience function for testing if a PHY is internal 1618 * @phydev: the phy_device struct 1619 */ 1620 static inline bool phy_is_internal(struct phy_device *phydev) 1621 { 1622 return phydev->is_internal; 1623 } 1624 1625 /** 1626 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1627 * @phydev: the phy_device struct 1628 */ 1629 static inline bool phy_on_sfp(struct phy_device *phydev) 1630 { 1631 return phydev->is_on_sfp_module; 1632 } 1633 1634 /** 1635 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1636 * PHY interface mode is RGMII (all variants) 1637 * @mode: the &phy_interface_t enum 1638 */ 1639 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1640 { 1641 return mode >= PHY_INTERFACE_MODE_RGMII && 1642 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1643 }; 1644 1645 /** 1646 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1647 * negotiation 1648 * @mode: one of &enum phy_interface_t 1649 * 1650 * Returns true if the PHY interface mode uses the 16-bit negotiation 1651 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1652 */ 1653 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1654 { 1655 return mode == PHY_INTERFACE_MODE_1000BASEX || 1656 mode == PHY_INTERFACE_MODE_2500BASEX; 1657 } 1658 1659 /** 1660 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1661 * is RGMII (all variants) 1662 * @phydev: the phy_device struct 1663 */ 1664 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1665 { 1666 return phy_interface_mode_is_rgmii(phydev->interface); 1667 }; 1668 1669 /** 1670 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1671 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1672 * @phydev: the phy_device struct 1673 */ 1674 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1675 { 1676 return phydev->is_pseudo_fixed_link; 1677 } 1678 1679 int phy_save_page(struct phy_device *phydev); 1680 int phy_select_page(struct phy_device *phydev, int page); 1681 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1682 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1683 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1684 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1685 u16 mask, u16 set); 1686 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1687 u16 mask, u16 set); 1688 1689 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1690 bool is_c45, 1691 struct phy_c45_device_ids *c45_ids); 1692 #if IS_ENABLED(CONFIG_PHYLIB) 1693 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1694 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1695 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1696 struct phy_device *device_phy_find_device(struct device *dev); 1697 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode); 1698 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1699 int phy_device_register(struct phy_device *phy); 1700 void phy_device_free(struct phy_device *phydev); 1701 #else 1702 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1703 { 1704 return 0; 1705 } 1706 static inline 1707 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1708 { 1709 return 0; 1710 } 1711 1712 static inline 1713 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1714 { 1715 return NULL; 1716 } 1717 1718 static inline struct phy_device *device_phy_find_device(struct device *dev) 1719 { 1720 return NULL; 1721 } 1722 1723 static inline 1724 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1725 { 1726 return NULL; 1727 } 1728 1729 static inline 1730 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1731 { 1732 return NULL; 1733 } 1734 1735 static inline int phy_device_register(struct phy_device *phy) 1736 { 1737 return 0; 1738 } 1739 1740 static inline void phy_device_free(struct phy_device *phydev) { } 1741 #endif /* CONFIG_PHYLIB */ 1742 void phy_device_remove(struct phy_device *phydev); 1743 int phy_get_c45_ids(struct phy_device *phydev); 1744 int phy_init_hw(struct phy_device *phydev); 1745 int phy_suspend(struct phy_device *phydev); 1746 int phy_resume(struct phy_device *phydev); 1747 int __phy_resume(struct phy_device *phydev); 1748 int phy_loopback(struct phy_device *phydev, bool enable); 1749 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1750 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1751 int phy_sfp_probe(struct phy_device *phydev, 1752 const struct sfp_upstream_ops *ops); 1753 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1754 phy_interface_t interface); 1755 struct phy_device *phy_find_first(struct mii_bus *bus); 1756 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1757 u32 flags, phy_interface_t interface); 1758 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1759 void (*handler)(struct net_device *), 1760 phy_interface_t interface); 1761 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1762 void (*handler)(struct net_device *), 1763 phy_interface_t interface); 1764 void phy_disconnect(struct phy_device *phydev); 1765 void phy_detach(struct phy_device *phydev); 1766 void phy_start(struct phy_device *phydev); 1767 void phy_stop(struct phy_device *phydev); 1768 int phy_config_aneg(struct phy_device *phydev); 1769 int _phy_start_aneg(struct phy_device *phydev); 1770 int phy_start_aneg(struct phy_device *phydev); 1771 int phy_aneg_done(struct phy_device *phydev); 1772 int phy_speed_down(struct phy_device *phydev, bool sync); 1773 int phy_speed_up(struct phy_device *phydev); 1774 bool phy_check_valid(int speed, int duplex, unsigned long *features); 1775 1776 int phy_restart_aneg(struct phy_device *phydev); 1777 int phy_reset_after_clk_enable(struct phy_device *phydev); 1778 1779 #if IS_ENABLED(CONFIG_PHYLIB) 1780 int phy_start_cable_test(struct phy_device *phydev, 1781 struct netlink_ext_ack *extack); 1782 int phy_start_cable_test_tdr(struct phy_device *phydev, 1783 struct netlink_ext_ack *extack, 1784 const struct phy_tdr_config *config); 1785 #else 1786 static inline 1787 int phy_start_cable_test(struct phy_device *phydev, 1788 struct netlink_ext_ack *extack) 1789 { 1790 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1791 return -EOPNOTSUPP; 1792 } 1793 static inline 1794 int phy_start_cable_test_tdr(struct phy_device *phydev, 1795 struct netlink_ext_ack *extack, 1796 const struct phy_tdr_config *config) 1797 { 1798 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1799 return -EOPNOTSUPP; 1800 } 1801 #endif 1802 1803 static inline void phy_device_reset(struct phy_device *phydev, int value) 1804 { 1805 mdio_device_reset(&phydev->mdio, value); 1806 } 1807 1808 #define phydev_err(_phydev, format, args...) \ 1809 dev_err(&_phydev->mdio.dev, format, ##args) 1810 1811 #define phydev_err_probe(_phydev, err, format, args...) \ 1812 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1813 1814 #define phydev_info(_phydev, format, args...) \ 1815 dev_info(&_phydev->mdio.dev, format, ##args) 1816 1817 #define phydev_warn(_phydev, format, args...) \ 1818 dev_warn(&_phydev->mdio.dev, format, ##args) 1819 1820 #define phydev_dbg(_phydev, format, args...) \ 1821 dev_dbg(&_phydev->mdio.dev, format, ##args) 1822 1823 static inline const char *phydev_name(const struct phy_device *phydev) 1824 { 1825 return dev_name(&phydev->mdio.dev); 1826 } 1827 1828 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1829 { 1830 mutex_lock(&phydev->mdio.bus->mdio_lock); 1831 } 1832 1833 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1834 { 1835 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1836 } 1837 1838 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1839 __printf(2, 3); 1840 char *phy_attached_info_irq(struct phy_device *phydev) 1841 __malloc; 1842 void phy_attached_info(struct phy_device *phydev); 1843 1844 /* Clause 22 PHY */ 1845 int genphy_read_abilities(struct phy_device *phydev); 1846 int genphy_setup_forced(struct phy_device *phydev); 1847 int genphy_restart_aneg(struct phy_device *phydev); 1848 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1849 int genphy_config_eee_advert(struct phy_device *phydev); 1850 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1851 int genphy_aneg_done(struct phy_device *phydev); 1852 int genphy_update_link(struct phy_device *phydev); 1853 int genphy_read_lpa(struct phy_device *phydev); 1854 int genphy_read_status_fixed(struct phy_device *phydev); 1855 int genphy_read_status(struct phy_device *phydev); 1856 int genphy_read_master_slave(struct phy_device *phydev); 1857 int genphy_suspend(struct phy_device *phydev); 1858 int genphy_resume(struct phy_device *phydev); 1859 int genphy_loopback(struct phy_device *phydev, bool enable); 1860 int genphy_soft_reset(struct phy_device *phydev); 1861 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1862 1863 static inline int genphy_config_aneg(struct phy_device *phydev) 1864 { 1865 return __genphy_config_aneg(phydev, false); 1866 } 1867 1868 static inline int genphy_no_config_intr(struct phy_device *phydev) 1869 { 1870 return 0; 1871 } 1872 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1873 u16 regnum); 1874 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1875 u16 regnum, u16 val); 1876 1877 /* Clause 37 */ 1878 int genphy_c37_config_aneg(struct phy_device *phydev); 1879 int genphy_c37_read_status(struct phy_device *phydev); 1880 1881 /* Clause 45 PHY */ 1882 int genphy_c45_restart_aneg(struct phy_device *phydev); 1883 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1884 int genphy_c45_aneg_done(struct phy_device *phydev); 1885 int genphy_c45_read_link(struct phy_device *phydev); 1886 int genphy_c45_read_lpa(struct phy_device *phydev); 1887 int genphy_c45_read_pma(struct phy_device *phydev); 1888 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1889 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 1890 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1891 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1892 int genphy_c45_read_mdix(struct phy_device *phydev); 1893 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1894 int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev); 1895 int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev); 1896 int genphy_c45_read_eee_abilities(struct phy_device *phydev); 1897 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 1898 int genphy_c45_read_status(struct phy_device *phydev); 1899 int genphy_c45_baset1_read_status(struct phy_device *phydev); 1900 int genphy_c45_config_aneg(struct phy_device *phydev); 1901 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1902 int genphy_c45_pma_resume(struct phy_device *phydev); 1903 int genphy_c45_pma_suspend(struct phy_device *phydev); 1904 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 1905 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 1906 struct phy_plca_cfg *plca_cfg); 1907 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 1908 const struct phy_plca_cfg *plca_cfg); 1909 int genphy_c45_plca_get_status(struct phy_device *phydev, 1910 struct phy_plca_status *plca_st); 1911 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv, 1912 unsigned long *lp, bool *is_enabled); 1913 int genphy_c45_ethtool_get_eee(struct phy_device *phydev, 1914 struct ethtool_keee *data); 1915 int genphy_c45_ethtool_set_eee(struct phy_device *phydev, 1916 struct ethtool_keee *data); 1917 int genphy_c45_write_eee_adv(struct phy_device *phydev, unsigned long *adv); 1918 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev); 1919 int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv); 1920 1921 /* Generic C45 PHY driver */ 1922 extern struct phy_driver genphy_c45_driver; 1923 1924 /* The gen10g_* functions are the old Clause 45 stub */ 1925 int gen10g_config_aneg(struct phy_device *phydev); 1926 1927 static inline int phy_read_status(struct phy_device *phydev) 1928 { 1929 if (!phydev->drv) 1930 return -EIO; 1931 1932 if (phydev->drv->read_status) 1933 return phydev->drv->read_status(phydev); 1934 else 1935 return genphy_read_status(phydev); 1936 } 1937 1938 void phy_driver_unregister(struct phy_driver *drv); 1939 void phy_drivers_unregister(struct phy_driver *drv, int n); 1940 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1941 int phy_drivers_register(struct phy_driver *new_driver, int n, 1942 struct module *owner); 1943 void phy_error(struct phy_device *phydev); 1944 void phy_state_machine(struct work_struct *work); 1945 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1946 void phy_trigger_machine(struct phy_device *phydev); 1947 void phy_mac_interrupt(struct phy_device *phydev); 1948 void phy_start_machine(struct phy_device *phydev); 1949 void phy_stop_machine(struct phy_device *phydev); 1950 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1951 struct ethtool_link_ksettings *cmd); 1952 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1953 const struct ethtool_link_ksettings *cmd); 1954 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1955 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1956 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1957 int phy_disable_interrupts(struct phy_device *phydev); 1958 void phy_request_interrupt(struct phy_device *phydev); 1959 void phy_free_interrupt(struct phy_device *phydev); 1960 void phy_print_status(struct phy_device *phydev); 1961 int phy_get_rate_matching(struct phy_device *phydev, 1962 phy_interface_t iface); 1963 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1964 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1965 void phy_advertise_supported(struct phy_device *phydev); 1966 void phy_advertise_eee_all(struct phy_device *phydev); 1967 void phy_support_sym_pause(struct phy_device *phydev); 1968 void phy_support_asym_pause(struct phy_device *phydev); 1969 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1970 bool autoneg); 1971 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1972 bool phy_validate_pause(struct phy_device *phydev, 1973 struct ethtool_pauseparam *pp); 1974 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1975 1976 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 1977 const int *delay_values, int size, bool is_rx); 1978 1979 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1980 bool *tx_pause, bool *rx_pause); 1981 1982 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1983 int (*run)(struct phy_device *)); 1984 int phy_register_fixup_for_id(const char *bus_id, 1985 int (*run)(struct phy_device *)); 1986 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1987 int (*run)(struct phy_device *)); 1988 1989 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1990 int phy_unregister_fixup_for_id(const char *bus_id); 1991 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1992 1993 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1994 int phy_get_eee_err(struct phy_device *phydev); 1995 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data); 1996 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_keee *data); 1997 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1998 void phy_ethtool_get_wol(struct phy_device *phydev, 1999 struct ethtool_wolinfo *wol); 2000 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 2001 struct ethtool_link_ksettings *cmd); 2002 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 2003 const struct ethtool_link_ksettings *cmd); 2004 int phy_ethtool_nway_reset(struct net_device *ndev); 2005 int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size); 2006 int of_phy_package_join(struct phy_device *phydev, size_t priv_size); 2007 void phy_package_leave(struct phy_device *phydev); 2008 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 2009 int base_addr, size_t priv_size); 2010 int devm_of_phy_package_join(struct device *dev, struct phy_device *phydev, 2011 size_t priv_size); 2012 2013 int __init mdio_bus_init(void); 2014 void mdio_bus_exit(void); 2015 2016 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 2017 int phy_ethtool_get_sset_count(struct phy_device *phydev); 2018 int phy_ethtool_get_stats(struct phy_device *phydev, 2019 struct ethtool_stats *stats, u64 *data); 2020 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 2021 struct phy_plca_cfg *plca_cfg); 2022 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 2023 const struct phy_plca_cfg *plca_cfg, 2024 struct netlink_ext_ack *extack); 2025 int phy_ethtool_get_plca_status(struct phy_device *phydev, 2026 struct phy_plca_status *plca_st); 2027 2028 int __phy_hwtstamp_get(struct phy_device *phydev, 2029 struct kernel_hwtstamp_config *config); 2030 int __phy_hwtstamp_set(struct phy_device *phydev, 2031 struct kernel_hwtstamp_config *config, 2032 struct netlink_ext_ack *extack); 2033 2034 static inline int phy_package_address(struct phy_device *phydev, 2035 unsigned int addr_offset) 2036 { 2037 struct phy_package_shared *shared = phydev->shared; 2038 u8 base_addr = shared->base_addr; 2039 2040 if (addr_offset >= PHY_MAX_ADDR - base_addr) 2041 return -EIO; 2042 2043 /* we know that addr will be in the range 0..31 and thus the 2044 * implicit cast to a signed int is not a problem. 2045 */ 2046 return base_addr + addr_offset; 2047 } 2048 2049 static inline int phy_package_read(struct phy_device *phydev, 2050 unsigned int addr_offset, u32 regnum) 2051 { 2052 int addr = phy_package_address(phydev, addr_offset); 2053 2054 if (addr < 0) 2055 return addr; 2056 2057 return mdiobus_read(phydev->mdio.bus, addr, regnum); 2058 } 2059 2060 static inline int __phy_package_read(struct phy_device *phydev, 2061 unsigned int addr_offset, u32 regnum) 2062 { 2063 int addr = phy_package_address(phydev, addr_offset); 2064 2065 if (addr < 0) 2066 return addr; 2067 2068 return __mdiobus_read(phydev->mdio.bus, addr, regnum); 2069 } 2070 2071 static inline int phy_package_write(struct phy_device *phydev, 2072 unsigned int addr_offset, u32 regnum, 2073 u16 val) 2074 { 2075 int addr = phy_package_address(phydev, addr_offset); 2076 2077 if (addr < 0) 2078 return addr; 2079 2080 return mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2081 } 2082 2083 static inline int __phy_package_write(struct phy_device *phydev, 2084 unsigned int addr_offset, u32 regnum, 2085 u16 val) 2086 { 2087 int addr = phy_package_address(phydev, addr_offset); 2088 2089 if (addr < 0) 2090 return addr; 2091 2092 return __mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2093 } 2094 2095 int __phy_package_read_mmd(struct phy_device *phydev, 2096 unsigned int addr_offset, int devad, 2097 u32 regnum); 2098 2099 int phy_package_read_mmd(struct phy_device *phydev, 2100 unsigned int addr_offset, int devad, 2101 u32 regnum); 2102 2103 int __phy_package_write_mmd(struct phy_device *phydev, 2104 unsigned int addr_offset, int devad, 2105 u32 regnum, u16 val); 2106 2107 int phy_package_write_mmd(struct phy_device *phydev, 2108 unsigned int addr_offset, int devad, 2109 u32 regnum, u16 val); 2110 2111 static inline bool __phy_package_set_once(struct phy_device *phydev, 2112 unsigned int b) 2113 { 2114 struct phy_package_shared *shared = phydev->shared; 2115 2116 if (!shared) 2117 return false; 2118 2119 return !test_and_set_bit(b, &shared->flags); 2120 } 2121 2122 static inline bool phy_package_init_once(struct phy_device *phydev) 2123 { 2124 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 2125 } 2126 2127 static inline bool phy_package_probe_once(struct phy_device *phydev) 2128 { 2129 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 2130 } 2131 2132 extern struct bus_type mdio_bus_type; 2133 2134 struct mdio_board_info { 2135 const char *bus_id; 2136 char modalias[MDIO_NAME_SIZE]; 2137 int mdio_addr; 2138 const void *platform_data; 2139 }; 2140 2141 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 2142 int mdiobus_register_board_info(const struct mdio_board_info *info, 2143 unsigned int n); 2144 #else 2145 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 2146 unsigned int n) 2147 { 2148 return 0; 2149 } 2150 #endif 2151 2152 2153 /** 2154 * phy_module_driver() - Helper macro for registering PHY drivers 2155 * @__phy_drivers: array of PHY drivers to register 2156 * @__count: Numbers of members in array 2157 * 2158 * Helper macro for PHY drivers which do not do anything special in module 2159 * init/exit. Each module may only use this macro once, and calling it 2160 * replaces module_init() and module_exit(). 2161 */ 2162 #define phy_module_driver(__phy_drivers, __count) \ 2163 static int __init phy_module_init(void) \ 2164 { \ 2165 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 2166 } \ 2167 module_init(phy_module_init); \ 2168 static void __exit phy_module_exit(void) \ 2169 { \ 2170 phy_drivers_unregister(__phy_drivers, __count); \ 2171 } \ 2172 module_exit(phy_module_exit) 2173 2174 #define module_phy_driver(__phy_drivers) \ 2175 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 2176 2177 bool phy_driver_is_genphy(struct phy_device *phydev); 2178 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 2179 2180 #endif /* __PHY_H */ 2181