1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/linkmode.h> 18 #include <linux/netlink.h> 19 #include <linux/mdio.h> 20 #include <linux/mii.h> 21 #include <linux/mii_timestamper.h> 22 #include <linux/module.h> 23 #include <linux/timer.h> 24 #include <linux/workqueue.h> 25 #include <linux/mod_devicetable.h> 26 #include <linux/u64_stats_sync.h> 27 #include <linux/irqreturn.h> 28 #include <linux/iopoll.h> 29 #include <linux/refcount.h> 30 31 #include <linux/atomic.h> 32 33 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 34 SUPPORTED_TP | \ 35 SUPPORTED_MII) 36 37 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 38 SUPPORTED_10baseT_Full) 39 40 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 41 SUPPORTED_100baseT_Full) 42 43 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 44 SUPPORTED_1000baseT_Full) 45 46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 54 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 55 56 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 57 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 58 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 59 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 60 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 61 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 62 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 63 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 64 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 65 66 extern const int phy_basic_ports_array[3]; 67 extern const int phy_fibre_port_array[1]; 68 extern const int phy_all_ports_features_array[7]; 69 extern const int phy_10_100_features_array[4]; 70 extern const int phy_basic_t1_features_array[3]; 71 extern const int phy_basic_t1s_p2mp_features_array[2]; 72 extern const int phy_gbit_features_array[2]; 73 extern const int phy_10gbit_features_array[1]; 74 75 /* 76 * Set phydev->irq to PHY_POLL if interrupts are not supported, 77 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 78 * the attached MAC driver handles the interrupt 79 */ 80 #define PHY_POLL -1 81 #define PHY_MAC_INTERRUPT -2 82 83 #define PHY_IS_INTERNAL 0x00000001 84 #define PHY_RST_AFTER_CLK_EN 0x00000002 85 #define PHY_POLL_CABLE_TEST 0x00000004 86 #define MDIO_DEVICE_IS_PHY 0x80000000 87 88 /** 89 * enum phy_interface_t - Interface Mode definitions 90 * 91 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 92 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 93 * @PHY_INTERFACE_MODE_MII: Media-independent interface 94 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 95 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 96 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 97 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 98 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 99 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 100 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 101 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 102 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 103 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 104 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 105 * @PHY_INTERFACE_MODE_SMII: Serial MII 106 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 107 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 108 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 109 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 110 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 111 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 112 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 113 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 114 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 115 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 116 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 117 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 118 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 119 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 120 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 121 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 122 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 123 * @PHY_INTERFACE_MODE_MAX: Book keeping 124 * 125 * Describes the interface between the MAC and PHY. 126 */ 127 typedef enum { 128 PHY_INTERFACE_MODE_NA, 129 PHY_INTERFACE_MODE_INTERNAL, 130 PHY_INTERFACE_MODE_MII, 131 PHY_INTERFACE_MODE_GMII, 132 PHY_INTERFACE_MODE_SGMII, 133 PHY_INTERFACE_MODE_TBI, 134 PHY_INTERFACE_MODE_REVMII, 135 PHY_INTERFACE_MODE_RMII, 136 PHY_INTERFACE_MODE_REVRMII, 137 PHY_INTERFACE_MODE_RGMII, 138 PHY_INTERFACE_MODE_RGMII_ID, 139 PHY_INTERFACE_MODE_RGMII_RXID, 140 PHY_INTERFACE_MODE_RGMII_TXID, 141 PHY_INTERFACE_MODE_RTBI, 142 PHY_INTERFACE_MODE_SMII, 143 PHY_INTERFACE_MODE_XGMII, 144 PHY_INTERFACE_MODE_XLGMII, 145 PHY_INTERFACE_MODE_MOCA, 146 PHY_INTERFACE_MODE_QSGMII, 147 PHY_INTERFACE_MODE_TRGMII, 148 PHY_INTERFACE_MODE_100BASEX, 149 PHY_INTERFACE_MODE_1000BASEX, 150 PHY_INTERFACE_MODE_2500BASEX, 151 PHY_INTERFACE_MODE_5GBASER, 152 PHY_INTERFACE_MODE_RXAUI, 153 PHY_INTERFACE_MODE_XAUI, 154 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 155 PHY_INTERFACE_MODE_10GBASER, 156 PHY_INTERFACE_MODE_25GBASER, 157 PHY_INTERFACE_MODE_USXGMII, 158 /* 10GBASE-KR - with Clause 73 AN */ 159 PHY_INTERFACE_MODE_10GKR, 160 PHY_INTERFACE_MODE_QUSGMII, 161 PHY_INTERFACE_MODE_1000BASEKX, 162 PHY_INTERFACE_MODE_MAX, 163 } phy_interface_t; 164 165 /* PHY interface mode bitmap handling */ 166 #define DECLARE_PHY_INTERFACE_MASK(name) \ 167 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 168 169 static inline void phy_interface_zero(unsigned long *intf) 170 { 171 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 172 } 173 174 static inline bool phy_interface_empty(const unsigned long *intf) 175 { 176 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 177 } 178 179 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 180 const unsigned long *b) 181 { 182 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 183 } 184 185 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 186 const unsigned long *b) 187 { 188 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 189 } 190 191 static inline void phy_interface_set_rgmii(unsigned long *intf) 192 { 193 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 194 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 195 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 196 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 197 } 198 199 /* 200 * phy_supported_speeds - return all speeds currently supported by a PHY device 201 */ 202 unsigned int phy_supported_speeds(struct phy_device *phy, 203 unsigned int *speeds, 204 unsigned int size); 205 206 /** 207 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 208 * @interface: enum phy_interface_t value 209 * 210 * Description: maps enum &phy_interface_t defined in this file 211 * into the device tree binding of 'phy-mode', so that Ethernet 212 * device driver can get PHY interface from device tree. 213 */ 214 static inline const char *phy_modes(phy_interface_t interface) 215 { 216 switch (interface) { 217 case PHY_INTERFACE_MODE_NA: 218 return ""; 219 case PHY_INTERFACE_MODE_INTERNAL: 220 return "internal"; 221 case PHY_INTERFACE_MODE_MII: 222 return "mii"; 223 case PHY_INTERFACE_MODE_GMII: 224 return "gmii"; 225 case PHY_INTERFACE_MODE_SGMII: 226 return "sgmii"; 227 case PHY_INTERFACE_MODE_TBI: 228 return "tbi"; 229 case PHY_INTERFACE_MODE_REVMII: 230 return "rev-mii"; 231 case PHY_INTERFACE_MODE_RMII: 232 return "rmii"; 233 case PHY_INTERFACE_MODE_REVRMII: 234 return "rev-rmii"; 235 case PHY_INTERFACE_MODE_RGMII: 236 return "rgmii"; 237 case PHY_INTERFACE_MODE_RGMII_ID: 238 return "rgmii-id"; 239 case PHY_INTERFACE_MODE_RGMII_RXID: 240 return "rgmii-rxid"; 241 case PHY_INTERFACE_MODE_RGMII_TXID: 242 return "rgmii-txid"; 243 case PHY_INTERFACE_MODE_RTBI: 244 return "rtbi"; 245 case PHY_INTERFACE_MODE_SMII: 246 return "smii"; 247 case PHY_INTERFACE_MODE_XGMII: 248 return "xgmii"; 249 case PHY_INTERFACE_MODE_XLGMII: 250 return "xlgmii"; 251 case PHY_INTERFACE_MODE_MOCA: 252 return "moca"; 253 case PHY_INTERFACE_MODE_QSGMII: 254 return "qsgmii"; 255 case PHY_INTERFACE_MODE_TRGMII: 256 return "trgmii"; 257 case PHY_INTERFACE_MODE_1000BASEX: 258 return "1000base-x"; 259 case PHY_INTERFACE_MODE_1000BASEKX: 260 return "1000base-kx"; 261 case PHY_INTERFACE_MODE_2500BASEX: 262 return "2500base-x"; 263 case PHY_INTERFACE_MODE_5GBASER: 264 return "5gbase-r"; 265 case PHY_INTERFACE_MODE_RXAUI: 266 return "rxaui"; 267 case PHY_INTERFACE_MODE_XAUI: 268 return "xaui"; 269 case PHY_INTERFACE_MODE_10GBASER: 270 return "10gbase-r"; 271 case PHY_INTERFACE_MODE_25GBASER: 272 return "25gbase-r"; 273 case PHY_INTERFACE_MODE_USXGMII: 274 return "usxgmii"; 275 case PHY_INTERFACE_MODE_10GKR: 276 return "10gbase-kr"; 277 case PHY_INTERFACE_MODE_100BASEX: 278 return "100base-x"; 279 case PHY_INTERFACE_MODE_QUSGMII: 280 return "qusgmii"; 281 default: 282 return "unknown"; 283 } 284 } 285 286 #define PHY_INIT_TIMEOUT 100000 287 #define PHY_FORCE_TIMEOUT 10 288 289 #define PHY_MAX_ADDR 32 290 291 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 292 #define PHY_ID_FMT "%s:%02x" 293 294 #define MII_BUS_ID_SIZE 61 295 296 struct device; 297 struct phylink; 298 struct sfp_bus; 299 struct sfp_upstream_ops; 300 struct sk_buff; 301 302 /** 303 * struct mdio_bus_stats - Statistics counters for MDIO busses 304 * @transfers: Total number of transfers, i.e. @writes + @reads 305 * @errors: Number of MDIO transfers that returned an error 306 * @writes: Number of write transfers 307 * @reads: Number of read transfers 308 * @syncp: Synchronisation for incrementing statistics 309 */ 310 struct mdio_bus_stats { 311 u64_stats_t transfers; 312 u64_stats_t errors; 313 u64_stats_t writes; 314 u64_stats_t reads; 315 /* Must be last, add new statistics above */ 316 struct u64_stats_sync syncp; 317 }; 318 319 /** 320 * struct phy_package_shared - Shared information in PHY packages 321 * @addr: Common PHY address used to combine PHYs in one package 322 * @refcnt: Number of PHYs connected to this shared data 323 * @flags: Initialization of PHY package 324 * @priv_size: Size of the shared private data @priv 325 * @priv: Driver private data shared across a PHY package 326 * 327 * Represents a shared structure between different phydev's in the same 328 * package, for example a quad PHY. See phy_package_join() and 329 * phy_package_leave(). 330 */ 331 struct phy_package_shared { 332 int addr; 333 refcount_t refcnt; 334 unsigned long flags; 335 size_t priv_size; 336 337 /* private data pointer */ 338 /* note that this pointer is shared between different phydevs and 339 * the user has to take care of appropriate locking. It is allocated 340 * and freed automatically by phy_package_join() and 341 * phy_package_leave(). 342 */ 343 void *priv; 344 }; 345 346 /* used as bit number in atomic bitops */ 347 #define PHY_SHARED_F_INIT_DONE 0 348 #define PHY_SHARED_F_PROBE_DONE 1 349 350 /** 351 * struct mii_bus - Represents an MDIO bus 352 * 353 * @owner: Who owns this device 354 * @name: User friendly name for this MDIO device, or driver name 355 * @id: Unique identifier for this bus, typical from bus hierarchy 356 * @priv: Driver private data 357 * 358 * The Bus class for PHYs. Devices which provide access to 359 * PHYs should register using this structure 360 */ 361 struct mii_bus { 362 struct module *owner; 363 const char *name; 364 char id[MII_BUS_ID_SIZE]; 365 void *priv; 366 /** @read: Perform a read transfer on the bus */ 367 int (*read)(struct mii_bus *bus, int addr, int regnum); 368 /** @write: Perform a write transfer on the bus */ 369 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 370 /** @read_c45: Perform a C45 read transfer on the bus */ 371 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 372 /** @write_c45: Perform a C45 write transfer on the bus */ 373 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 374 int regnum, u16 val); 375 /** @reset: Perform a reset of the bus */ 376 int (*reset)(struct mii_bus *bus); 377 378 /** @stats: Statistic counters per device on the bus */ 379 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 380 381 /** 382 * @mdio_lock: A lock to ensure that only one thing can read/write 383 * the MDIO bus at a time 384 */ 385 struct mutex mdio_lock; 386 387 /** @parent: Parent device of this bus */ 388 struct device *parent; 389 /** @state: State of bus structure */ 390 enum { 391 MDIOBUS_ALLOCATED = 1, 392 MDIOBUS_REGISTERED, 393 MDIOBUS_UNREGISTERED, 394 MDIOBUS_RELEASED, 395 } state; 396 397 /** @dev: Kernel device representation */ 398 struct device dev; 399 400 /** @mdio_map: list of all MDIO devices on bus */ 401 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 402 403 /** @phy_mask: PHY addresses to be ignored when probing */ 404 u32 phy_mask; 405 406 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 407 u32 phy_ignore_ta_mask; 408 409 /** 410 * @irq: An array of interrupts, each PHY's interrupt at the index 411 * matching its address 412 */ 413 int irq[PHY_MAX_ADDR]; 414 415 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 416 int reset_delay_us; 417 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 418 int reset_post_delay_us; 419 /** @reset_gpiod: Reset GPIO descriptor pointer */ 420 struct gpio_desc *reset_gpiod; 421 422 /** @probe_capabilities: bus capabilities, used for probing */ 423 enum { 424 MDIOBUS_NO_CAP = 0, 425 MDIOBUS_C22, 426 MDIOBUS_C45, 427 MDIOBUS_C22_C45, 428 } probe_capabilities; 429 430 /** @shared_lock: protect access to the shared element */ 431 struct mutex shared_lock; 432 433 /** @shared: shared state across different PHYs */ 434 struct phy_package_shared *shared[PHY_MAX_ADDR]; 435 }; 436 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 437 438 struct mii_bus *mdiobus_alloc_size(size_t size); 439 440 /** 441 * mdiobus_alloc - Allocate an MDIO bus structure 442 * 443 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 444 * for the driver to register the bus. 445 */ 446 static inline struct mii_bus *mdiobus_alloc(void) 447 { 448 return mdiobus_alloc_size(0); 449 } 450 451 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 452 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 453 struct module *owner); 454 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 455 #define devm_mdiobus_register(dev, bus) \ 456 __devm_mdiobus_register(dev, bus, THIS_MODULE) 457 458 void mdiobus_unregister(struct mii_bus *bus); 459 void mdiobus_free(struct mii_bus *bus); 460 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 461 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 462 { 463 return devm_mdiobus_alloc_size(dev, 0); 464 } 465 466 struct mii_bus *mdio_find_bus(const char *mdio_name); 467 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); 468 469 #define PHY_INTERRUPT_DISABLED false 470 #define PHY_INTERRUPT_ENABLED true 471 472 /** 473 * enum phy_state - PHY state machine states: 474 * 475 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 476 * should be called if and only if the PHY is in this state, 477 * given that the PHY device exists. 478 * - PHY driver probe function will set the state to @PHY_READY 479 * 480 * @PHY_READY: PHY is ready to send and receive packets, but the 481 * controller is not. By default, PHYs which do not implement 482 * probe will be set to this state by phy_probe(). 483 * - start will set the state to UP 484 * 485 * @PHY_UP: The PHY and attached device are ready to do work. 486 * Interrupts should be started here. 487 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 488 * 489 * @PHY_NOLINK: PHY is up, but not currently plugged in. 490 * - irq or timer will set @PHY_RUNNING if link comes back 491 * - phy_stop moves to @PHY_HALTED 492 * 493 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 494 * and/or receiving packets 495 * - irq or timer will set @PHY_NOLINK if link goes down 496 * - phy_stop moves to @PHY_HALTED 497 * 498 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 499 * is not expected to work, carrier will be indicated as down. PHY will be 500 * poll once per second, or on interrupt for it current state. 501 * Once complete, move to UP to restart the PHY. 502 * - phy_stop aborts the running test and moves to @PHY_HALTED 503 * 504 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or 505 * PHY is in an error state. 506 * - phy_start moves to @PHY_UP 507 */ 508 enum phy_state { 509 PHY_DOWN = 0, 510 PHY_READY, 511 PHY_HALTED, 512 PHY_UP, 513 PHY_RUNNING, 514 PHY_NOLINK, 515 PHY_CABLETEST, 516 }; 517 518 #define MDIO_MMD_NUM 32 519 520 /** 521 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 522 * @devices_in_package: IEEE 802.3 devices in package register value. 523 * @mmds_present: bit vector of MMDs present. 524 * @device_ids: The device identifer for each present device. 525 */ 526 struct phy_c45_device_ids { 527 u32 devices_in_package; 528 u32 mmds_present; 529 u32 device_ids[MDIO_MMD_NUM]; 530 }; 531 532 struct macsec_context; 533 struct macsec_ops; 534 535 /** 536 * struct phy_device - An instance of a PHY 537 * 538 * @mdio: MDIO bus this PHY is on 539 * @drv: Pointer to the driver for this PHY instance 540 * @devlink: Create a link between phy dev and mac dev, if the external phy 541 * used by current mac interface is managed by another mac interface. 542 * @phy_id: UID for this device found during discovery 543 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 544 * @is_c45: Set to true if this PHY uses clause 45 addressing. 545 * @is_internal: Set to true if this PHY is internal to a MAC. 546 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 547 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 548 * @has_fixups: Set to true if this PHY has fixups/quirks. 549 * @suspended: Set to true if this PHY has been suspended successfully. 550 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 551 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 552 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 553 * @downshifted_rate: Set true if link speed has been downshifted. 554 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 555 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 556 * @state: State of the PHY for management purposes 557 * @dev_flags: Device-specific flags used by the PHY driver. 558 * 559 * - Bits [15:0] are free to use by the PHY driver to communicate 560 * driver specific behavior. 561 * - Bits [23:16] are currently reserved for future use. 562 * - Bits [31:24] are reserved for defining generic 563 * PHY driver behavior. 564 * @irq: IRQ number of the PHY's interrupt (-1 if none) 565 * @phy_timer: The timer for handling the state machine 566 * @phylink: Pointer to phylink instance for this PHY 567 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 568 * @sfp_bus: SFP bus attached to this PHY's fiber port 569 * @attached_dev: The attached enet driver's device instance ptr 570 * @adjust_link: Callback for the enet controller to respond to changes: in the 571 * link state. 572 * @phy_link_change: Callback for phylink for notification of link change 573 * @macsec_ops: MACsec offloading ops. 574 * 575 * @speed: Current link speed 576 * @duplex: Current duplex 577 * @port: Current port 578 * @pause: Current pause 579 * @asym_pause: Current asymmetric pause 580 * @supported: Combined MAC/PHY supported linkmodes 581 * @advertising: Currently advertised linkmodes 582 * @adv_old: Saved advertised while power saving for WoL 583 * @lp_advertising: Current link partner advertised linkmodes 584 * @host_interfaces: PHY interface modes supported by host 585 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 586 * @autoneg: Flag autoneg being used 587 * @rate_matching: Current rate matching mode 588 * @link: Current link state 589 * @autoneg_complete: Flag auto negotiation of the link has completed 590 * @mdix: Current crossover 591 * @mdix_ctrl: User setting of crossover 592 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 593 * @interrupts: Flag interrupts have been enabled 594 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 595 * handling shall be postponed until PHY has resumed 596 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 597 * requiring a rerun of the interrupt handler after resume 598 * @interface: enum phy_interface_t value 599 * @skb: Netlink message for cable diagnostics 600 * @nest: Netlink nest used for cable diagnostics 601 * @ehdr: nNtlink header for cable diagnostics 602 * @phy_led_triggers: Array of LED triggers 603 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 604 * @led_link_trigger: LED trigger for link up/down 605 * @last_triggered: last LED trigger for link speed 606 * @master_slave_set: User requested master/slave configuration 607 * @master_slave_get: Current master/slave advertisement 608 * @master_slave_state: Current master/slave configuration 609 * @mii_ts: Pointer to time stamper callbacks 610 * @psec: Pointer to Power Sourcing Equipment control struct 611 * @lock: Mutex for serialization access to PHY 612 * @state_queue: Work queue for state machine 613 * @link_down_events: Number of times link was lost 614 * @shared: Pointer to private data shared by phys in one package 615 * @priv: Pointer to driver private data 616 * 617 * interrupts currently only supports enabled or disabled, 618 * but could be changed in the future to support enabling 619 * and disabling specific interrupts 620 * 621 * Contains some infrastructure for polling and interrupt 622 * handling, as well as handling shifts in PHY hardware state 623 */ 624 struct phy_device { 625 struct mdio_device mdio; 626 627 /* Information about the PHY type */ 628 /* And management functions */ 629 struct phy_driver *drv; 630 631 struct device_link *devlink; 632 633 u32 phy_id; 634 635 struct phy_c45_device_ids c45_ids; 636 unsigned is_c45:1; 637 unsigned is_internal:1; 638 unsigned is_pseudo_fixed_link:1; 639 unsigned is_gigabit_capable:1; 640 unsigned has_fixups:1; 641 unsigned suspended:1; 642 unsigned suspended_by_mdio_bus:1; 643 unsigned sysfs_links:1; 644 unsigned loopback_enabled:1; 645 unsigned downshifted_rate:1; 646 unsigned is_on_sfp_module:1; 647 unsigned mac_managed_pm:1; 648 649 unsigned autoneg:1; 650 /* The most recently read link state */ 651 unsigned link:1; 652 unsigned autoneg_complete:1; 653 654 /* Interrupts are enabled */ 655 unsigned interrupts:1; 656 unsigned irq_suspended:1; 657 unsigned irq_rerun:1; 658 659 int rate_matching; 660 661 enum phy_state state; 662 663 u32 dev_flags; 664 665 phy_interface_t interface; 666 667 /* 668 * forced speed & duplex (no autoneg) 669 * partner speed & duplex & pause (autoneg) 670 */ 671 int speed; 672 int duplex; 673 int port; 674 int pause; 675 int asym_pause; 676 u8 master_slave_get; 677 u8 master_slave_set; 678 u8 master_slave_state; 679 680 /* Union of PHY and Attached devices' supported link modes */ 681 /* See ethtool.h for more info */ 682 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 683 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 684 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 685 /* used with phy_speed_down */ 686 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 687 688 /* Host supported PHY interface types. Should be ignored if empty. */ 689 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 690 691 /* Energy efficient ethernet modes which should be prohibited */ 692 u32 eee_broken_modes; 693 694 #ifdef CONFIG_LED_TRIGGER_PHY 695 struct phy_led_trigger *phy_led_triggers; 696 unsigned int phy_num_led_triggers; 697 struct phy_led_trigger *last_triggered; 698 699 struct phy_led_trigger *led_link_trigger; 700 #endif 701 702 /* 703 * Interrupt number for this PHY 704 * -1 means no interrupt 705 */ 706 int irq; 707 708 /* private data pointer */ 709 /* For use by PHYs to maintain extra state */ 710 void *priv; 711 712 /* shared data pointer */ 713 /* For use by PHYs inside the same package that need a shared state. */ 714 struct phy_package_shared *shared; 715 716 /* Reporting cable test results */ 717 struct sk_buff *skb; 718 void *ehdr; 719 struct nlattr *nest; 720 721 /* Interrupt and Polling infrastructure */ 722 struct delayed_work state_queue; 723 724 struct mutex lock; 725 726 /* This may be modified under the rtnl lock */ 727 bool sfp_bus_attached; 728 struct sfp_bus *sfp_bus; 729 struct phylink *phylink; 730 struct net_device *attached_dev; 731 struct mii_timestamper *mii_ts; 732 struct pse_control *psec; 733 734 u8 mdix; 735 u8 mdix_ctrl; 736 737 int pma_extable; 738 739 unsigned int link_down_events; 740 741 void (*phy_link_change)(struct phy_device *phydev, bool up); 742 void (*adjust_link)(struct net_device *dev); 743 744 #if IS_ENABLED(CONFIG_MACSEC) 745 /* MACsec management functions */ 746 const struct macsec_ops *macsec_ops; 747 #endif 748 }; 749 750 /* Generic phy_device::dev_flags */ 751 #define PHY_F_NO_IRQ 0x80000000 752 753 static inline struct phy_device *to_phy_device(const struct device *dev) 754 { 755 return container_of(to_mdio_device(dev), struct phy_device, mdio); 756 } 757 758 /** 759 * struct phy_tdr_config - Configuration of a TDR raw test 760 * 761 * @first: Distance for first data collection point 762 * @last: Distance for last data collection point 763 * @step: Step between data collection points 764 * @pair: Bitmap of cable pairs to collect data for 765 * 766 * A structure containing possible configuration parameters 767 * for a TDR cable test. The driver does not need to implement 768 * all the parameters, but should report what is actually used. 769 * All distances are in centimeters. 770 */ 771 struct phy_tdr_config { 772 u32 first; 773 u32 last; 774 u32 step; 775 s8 pair; 776 }; 777 #define PHY_PAIR_ALL -1 778 779 /** 780 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 781 * Avoidance) Reconciliation Sublayer. 782 * 783 * @version: read-only PLCA register map version. -1 = not available. Ignored 784 * when setting the configuration. Format is the same as reported by the PLCA 785 * IDVER register (31.CA00). -1 = not available. 786 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 787 * set. 0 = disabled, anything else = enabled. 788 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 789 * Allowed values [0 .. 254]. 255 = node disabled. 790 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 791 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 792 * set. Allowed values [1 .. 255]. 793 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 794 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 795 * more details. The to_timer shall be set equal over all nodes. 796 * -1 = not available / don't set. Allowed values [0 .. 255]. 797 * @burst_cnt: controls how many additional frames a node is allowed to send in 798 * single transmit opportunity (TO). The default value of 0 means that the 799 * node is allowed exactly one frame per TO. A value of 1 allows two frames 800 * per TO, and so on. -1 = not available / don't set. 801 * Allowed values [0 .. 255]. 802 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 803 * frame before interrupting the burst. This value should be set to a value 804 * greater than the MAC inter-packet gap (which is typically 96 bits). 805 * -1 = not available / don't set. Allowed values [0 .. 255]. 806 * 807 * A structure containing configuration parameters for setting/getting the PLCA 808 * RS configuration. The driver does not need to implement all the parameters, 809 * but should report what is actually used. 810 */ 811 struct phy_plca_cfg { 812 int version; 813 int enabled; 814 int node_id; 815 int node_cnt; 816 int to_tmr; 817 int burst_cnt; 818 int burst_tmr; 819 }; 820 821 /** 822 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 823 * Avoidance) Reconciliation Sublayer. 824 * 825 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 826 * register(31.CA03), indicating BEACON activity. 827 * 828 * A structure containing status information of the PLCA RS configuration. 829 * The driver does not need to implement all the parameters, but should report 830 * what is actually used. 831 */ 832 struct phy_plca_status { 833 bool pst; 834 }; 835 836 /** 837 * struct phy_driver - Driver structure for a particular PHY type 838 * 839 * @mdiodrv: Data common to all MDIO devices 840 * @phy_id: The result of reading the UID registers of this PHY 841 * type, and ANDing them with the phy_id_mask. This driver 842 * only works for PHYs with IDs which match this field 843 * @name: The friendly name of this PHY type 844 * @phy_id_mask: Defines the important bits of the phy_id 845 * @features: A mandatory list of features (speed, duplex, etc) 846 * supported by this PHY 847 * @flags: A bitfield defining certain other features this PHY 848 * supports (like interrupts) 849 * @driver_data: Static driver data 850 * 851 * All functions are optional. If config_aneg or read_status 852 * are not implemented, the phy core uses the genphy versions. 853 * Note that none of these functions should be called from 854 * interrupt time. The goal is for the bus read/write functions 855 * to be able to block when the bus transaction is happening, 856 * and be freed up by an interrupt (The MPC85xx has this ability, 857 * though it is not currently supported in the driver). 858 */ 859 struct phy_driver { 860 struct mdio_driver_common mdiodrv; 861 u32 phy_id; 862 char *name; 863 u32 phy_id_mask; 864 const unsigned long * const features; 865 u32 flags; 866 const void *driver_data; 867 868 /** 869 * @soft_reset: Called to issue a PHY software reset 870 */ 871 int (*soft_reset)(struct phy_device *phydev); 872 873 /** 874 * @config_init: Called to initialize the PHY, 875 * including after a reset 876 */ 877 int (*config_init)(struct phy_device *phydev); 878 879 /** 880 * @probe: Called during discovery. Used to set 881 * up device-specific structures, if any 882 */ 883 int (*probe)(struct phy_device *phydev); 884 885 /** 886 * @get_features: Probe the hardware to determine what 887 * abilities it has. Should only set phydev->supported. 888 */ 889 int (*get_features)(struct phy_device *phydev); 890 891 /** 892 * @get_rate_matching: Get the supported type of rate matching for a 893 * particular phy interface. This is used by phy consumers to determine 894 * whether to advertise lower-speed modes for that interface. It is 895 * assumed that if a rate matching mode is supported on an interface, 896 * then that interface's rate can be adapted to all slower link speeds 897 * supported by the phy. If the interface is not supported, this should 898 * return %RATE_MATCH_NONE. 899 */ 900 int (*get_rate_matching)(struct phy_device *phydev, 901 phy_interface_t iface); 902 903 /* PHY Power Management */ 904 /** @suspend: Suspend the hardware, saving state if needed */ 905 int (*suspend)(struct phy_device *phydev); 906 /** @resume: Resume the hardware, restoring state if needed */ 907 int (*resume)(struct phy_device *phydev); 908 909 /** 910 * @config_aneg: Configures the advertisement and resets 911 * autonegotiation if phydev->autoneg is on, 912 * forces the speed to the current settings in phydev 913 * if phydev->autoneg is off 914 */ 915 int (*config_aneg)(struct phy_device *phydev); 916 917 /** @aneg_done: Determines the auto negotiation result */ 918 int (*aneg_done)(struct phy_device *phydev); 919 920 /** @read_status: Determines the negotiated speed and duplex */ 921 int (*read_status)(struct phy_device *phydev); 922 923 /** 924 * @config_intr: Enables or disables interrupts. 925 * It should also clear any pending interrupts prior to enabling the 926 * IRQs and after disabling them. 927 */ 928 int (*config_intr)(struct phy_device *phydev); 929 930 /** @handle_interrupt: Override default interrupt handling */ 931 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 932 933 /** @remove: Clears up any memory if needed */ 934 void (*remove)(struct phy_device *phydev); 935 936 /** 937 * @match_phy_device: Returns true if this is a suitable 938 * driver for the given phydev. If NULL, matching is based on 939 * phy_id and phy_id_mask. 940 */ 941 int (*match_phy_device)(struct phy_device *phydev); 942 943 /** 944 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 945 * register changes to enable Wake on LAN, so set_wol is 946 * provided to be called in the ethernet driver's set_wol 947 * function. 948 */ 949 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 950 951 /** 952 * @get_wol: See set_wol, but for checking whether Wake on LAN 953 * is enabled. 954 */ 955 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 956 957 /** 958 * @link_change_notify: Called to inform a PHY device driver 959 * when the core is about to change the link state. This 960 * callback is supposed to be used as fixup hook for drivers 961 * that need to take action when the link state 962 * changes. Drivers are by no means allowed to mess with the 963 * PHY device structure in their implementations. 964 */ 965 void (*link_change_notify)(struct phy_device *dev); 966 967 /** 968 * @read_mmd: PHY specific driver override for reading a MMD 969 * register. This function is optional for PHY specific 970 * drivers. When not provided, the default MMD read function 971 * will be used by phy_read_mmd(), which will use either a 972 * direct read for Clause 45 PHYs or an indirect read for 973 * Clause 22 PHYs. devnum is the MMD device number within the 974 * PHY device, regnum is the register within the selected MMD 975 * device. 976 */ 977 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 978 979 /** 980 * @write_mmd: PHY specific driver override for writing a MMD 981 * register. This function is optional for PHY specific 982 * drivers. When not provided, the default MMD write function 983 * will be used by phy_write_mmd(), which will use either a 984 * direct write for Clause 45 PHYs, or an indirect write for 985 * Clause 22 PHYs. devnum is the MMD device number within the 986 * PHY device, regnum is the register within the selected MMD 987 * device. val is the value to be written. 988 */ 989 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 990 u16 val); 991 992 /** @read_page: Return the current PHY register page number */ 993 int (*read_page)(struct phy_device *dev); 994 /** @write_page: Set the current PHY register page number */ 995 int (*write_page)(struct phy_device *dev, int page); 996 997 /** 998 * @module_info: Get the size and type of the eeprom contained 999 * within a plug-in module 1000 */ 1001 int (*module_info)(struct phy_device *dev, 1002 struct ethtool_modinfo *modinfo); 1003 1004 /** 1005 * @module_eeprom: Get the eeprom information from the plug-in 1006 * module 1007 */ 1008 int (*module_eeprom)(struct phy_device *dev, 1009 struct ethtool_eeprom *ee, u8 *data); 1010 1011 /** @cable_test_start: Start a cable test */ 1012 int (*cable_test_start)(struct phy_device *dev); 1013 1014 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1015 int (*cable_test_tdr_start)(struct phy_device *dev, 1016 const struct phy_tdr_config *config); 1017 1018 /** 1019 * @cable_test_get_status: Once per second, or on interrupt, 1020 * request the status of the test. 1021 */ 1022 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1023 1024 /* Get statistics from the PHY using ethtool */ 1025 /** @get_sset_count: Number of statistic counters */ 1026 int (*get_sset_count)(struct phy_device *dev); 1027 /** @get_strings: Names of the statistic counters */ 1028 void (*get_strings)(struct phy_device *dev, u8 *data); 1029 /** @get_stats: Return the statistic counter values */ 1030 void (*get_stats)(struct phy_device *dev, 1031 struct ethtool_stats *stats, u64 *data); 1032 1033 /* Get and Set PHY tunables */ 1034 /** @get_tunable: Return the value of a tunable */ 1035 int (*get_tunable)(struct phy_device *dev, 1036 struct ethtool_tunable *tuna, void *data); 1037 /** @set_tunable: Set the value of a tunable */ 1038 int (*set_tunable)(struct phy_device *dev, 1039 struct ethtool_tunable *tuna, 1040 const void *data); 1041 /** @set_loopback: Set the loopback mood of the PHY */ 1042 int (*set_loopback)(struct phy_device *dev, bool enable); 1043 /** @get_sqi: Get the signal quality indication */ 1044 int (*get_sqi)(struct phy_device *dev); 1045 /** @get_sqi_max: Get the maximum signal quality indication */ 1046 int (*get_sqi_max)(struct phy_device *dev); 1047 1048 /* PLCA RS interface */ 1049 /** @get_plca_cfg: Return the current PLCA configuration */ 1050 int (*get_plca_cfg)(struct phy_device *dev, 1051 struct phy_plca_cfg *plca_cfg); 1052 /** @set_plca_cfg: Set the PLCA configuration */ 1053 int (*set_plca_cfg)(struct phy_device *dev, 1054 const struct phy_plca_cfg *plca_cfg); 1055 /** @get_plca_status: Return the current PLCA status info */ 1056 int (*get_plca_status)(struct phy_device *dev, 1057 struct phy_plca_status *plca_st); 1058 }; 1059 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 1060 struct phy_driver, mdiodrv) 1061 1062 #define PHY_ANY_ID "MATCH ANY PHY" 1063 #define PHY_ANY_UID 0xffffffff 1064 1065 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 1066 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 1067 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 1068 1069 /* A Structure for boards to register fixups with the PHY Lib */ 1070 struct phy_fixup { 1071 struct list_head list; 1072 char bus_id[MII_BUS_ID_SIZE + 3]; 1073 u32 phy_uid; 1074 u32 phy_uid_mask; 1075 int (*run)(struct phy_device *phydev); 1076 }; 1077 1078 const char *phy_speed_to_str(int speed); 1079 const char *phy_duplex_to_str(unsigned int duplex); 1080 const char *phy_rate_matching_to_str(int rate_matching); 1081 1082 int phy_interface_num_ports(phy_interface_t interface); 1083 1084 /* A structure for mapping a particular speed and duplex 1085 * combination to a particular SUPPORTED and ADVERTISED value 1086 */ 1087 struct phy_setting { 1088 u32 speed; 1089 u8 duplex; 1090 u8 bit; 1091 }; 1092 1093 const struct phy_setting * 1094 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 1095 bool exact); 1096 size_t phy_speeds(unsigned int *speeds, size_t size, 1097 unsigned long *mask); 1098 void of_set_phy_supported(struct phy_device *phydev); 1099 void of_set_phy_eee_broken(struct phy_device *phydev); 1100 int phy_speed_down_core(struct phy_device *phydev); 1101 1102 /** 1103 * phy_is_started - Convenience function to check whether PHY is started 1104 * @phydev: The phy_device struct 1105 */ 1106 static inline bool phy_is_started(struct phy_device *phydev) 1107 { 1108 return phydev->state >= PHY_UP; 1109 } 1110 1111 void phy_resolve_aneg_pause(struct phy_device *phydev); 1112 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1113 void phy_check_downshift(struct phy_device *phydev); 1114 1115 /** 1116 * phy_read - Convenience function for reading a given PHY register 1117 * @phydev: the phy_device struct 1118 * @regnum: register number to read 1119 * 1120 * NOTE: MUST NOT be called from interrupt context, 1121 * because the bus read/write functions may wait for an interrupt 1122 * to conclude the operation. 1123 */ 1124 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1125 { 1126 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1127 } 1128 1129 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1130 timeout_us, sleep_before_read) \ 1131 ({ \ 1132 int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \ 1133 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1134 if (val < 0) \ 1135 __ret = val; \ 1136 if (__ret) \ 1137 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1138 __ret; \ 1139 }) 1140 1141 1142 /** 1143 * __phy_read - convenience function for reading a given PHY register 1144 * @phydev: the phy_device struct 1145 * @regnum: register number to read 1146 * 1147 * The caller must have taken the MDIO bus lock. 1148 */ 1149 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1150 { 1151 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1152 } 1153 1154 /** 1155 * phy_write - Convenience function for writing a given PHY register 1156 * @phydev: the phy_device struct 1157 * @regnum: register number to write 1158 * @val: value to write to @regnum 1159 * 1160 * NOTE: MUST NOT be called from interrupt context, 1161 * because the bus read/write functions may wait for an interrupt 1162 * to conclude the operation. 1163 */ 1164 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1165 { 1166 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1167 } 1168 1169 /** 1170 * __phy_write - Convenience function for writing a given PHY register 1171 * @phydev: the phy_device struct 1172 * @regnum: register number to write 1173 * @val: value to write to @regnum 1174 * 1175 * The caller must have taken the MDIO bus lock. 1176 */ 1177 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1178 { 1179 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1180 val); 1181 } 1182 1183 /** 1184 * __phy_modify_changed() - Convenience function for modifying a PHY register 1185 * @phydev: a pointer to a &struct phy_device 1186 * @regnum: register number 1187 * @mask: bit mask of bits to clear 1188 * @set: bit mask of bits to set 1189 * 1190 * Unlocked helper function which allows a PHY register to be modified as 1191 * new register value = (old register value & ~mask) | set 1192 * 1193 * Returns negative errno, 0 if there was no change, and 1 in case of change 1194 */ 1195 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1196 u16 mask, u16 set) 1197 { 1198 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1199 regnum, mask, set); 1200 } 1201 1202 /* 1203 * phy_read_mmd - Convenience function for reading a register 1204 * from an MMD on a given PHY. 1205 */ 1206 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1207 1208 /** 1209 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1210 * condition is met or a timeout occurs 1211 * 1212 * @phydev: The phy_device struct 1213 * @devaddr: The MMD to read from 1214 * @regnum: The register on the MMD to read 1215 * @val: Variable to read the register into 1216 * @cond: Break condition (usually involving @val) 1217 * @sleep_us: Maximum time to sleep between reads in us (0 1218 * tight-loops). Should be less than ~20ms since usleep_range 1219 * is used (see Documentation/timers/timers-howto.rst). 1220 * @timeout_us: Timeout in us, 0 means never timeout 1221 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1222 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either 1223 * case, the last read value at @args is stored in @val. Must not 1224 * be called from atomic context if sleep_us or timeout_us are used. 1225 */ 1226 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1227 sleep_us, timeout_us, sleep_before_read) \ 1228 ({ \ 1229 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \ 1230 sleep_us, timeout_us, sleep_before_read, \ 1231 phydev, devaddr, regnum); \ 1232 if (val < 0) \ 1233 __ret = val; \ 1234 if (__ret) \ 1235 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1236 __ret; \ 1237 }) 1238 1239 /* 1240 * __phy_read_mmd - Convenience function for reading a register 1241 * from an MMD on a given PHY. 1242 */ 1243 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1244 1245 /* 1246 * phy_write_mmd - Convenience function for writing a register 1247 * on an MMD on a given PHY. 1248 */ 1249 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1250 1251 /* 1252 * __phy_write_mmd - Convenience function for writing a register 1253 * on an MMD on a given PHY. 1254 */ 1255 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1256 1257 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1258 u16 set); 1259 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1260 u16 set); 1261 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1262 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1263 1264 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1265 u16 mask, u16 set); 1266 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1267 u16 mask, u16 set); 1268 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1269 u16 mask, u16 set); 1270 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1271 u16 mask, u16 set); 1272 1273 /** 1274 * __phy_set_bits - Convenience function for setting bits in a PHY register 1275 * @phydev: the phy_device struct 1276 * @regnum: register number to write 1277 * @val: bits to set 1278 * 1279 * The caller must have taken the MDIO bus lock. 1280 */ 1281 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1282 { 1283 return __phy_modify(phydev, regnum, 0, val); 1284 } 1285 1286 /** 1287 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1288 * @phydev: the phy_device struct 1289 * @regnum: register number to write 1290 * @val: bits to clear 1291 * 1292 * The caller must have taken the MDIO bus lock. 1293 */ 1294 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1295 u16 val) 1296 { 1297 return __phy_modify(phydev, regnum, val, 0); 1298 } 1299 1300 /** 1301 * phy_set_bits - Convenience function for setting bits in a PHY register 1302 * @phydev: the phy_device struct 1303 * @regnum: register number to write 1304 * @val: bits to set 1305 */ 1306 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1307 { 1308 return phy_modify(phydev, regnum, 0, val); 1309 } 1310 1311 /** 1312 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1313 * @phydev: the phy_device struct 1314 * @regnum: register number to write 1315 * @val: bits to clear 1316 */ 1317 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1318 { 1319 return phy_modify(phydev, regnum, val, 0); 1320 } 1321 1322 /** 1323 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1324 * on MMD 1325 * @phydev: the phy_device struct 1326 * @devad: the MMD containing register to modify 1327 * @regnum: register number to modify 1328 * @val: bits to set 1329 * 1330 * The caller must have taken the MDIO bus lock. 1331 */ 1332 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1333 u32 regnum, u16 val) 1334 { 1335 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1336 } 1337 1338 /** 1339 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1340 * on MMD 1341 * @phydev: the phy_device struct 1342 * @devad: the MMD containing register to modify 1343 * @regnum: register number to modify 1344 * @val: bits to clear 1345 * 1346 * The caller must have taken the MDIO bus lock. 1347 */ 1348 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1349 u32 regnum, u16 val) 1350 { 1351 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1352 } 1353 1354 /** 1355 * phy_set_bits_mmd - Convenience function for setting bits in a register 1356 * on MMD 1357 * @phydev: the phy_device struct 1358 * @devad: the MMD containing register to modify 1359 * @regnum: register number to modify 1360 * @val: bits to set 1361 */ 1362 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1363 u32 regnum, u16 val) 1364 { 1365 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1366 } 1367 1368 /** 1369 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1370 * on MMD 1371 * @phydev: the phy_device struct 1372 * @devad: the MMD containing register to modify 1373 * @regnum: register number to modify 1374 * @val: bits to clear 1375 */ 1376 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1377 u32 regnum, u16 val) 1378 { 1379 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1380 } 1381 1382 /** 1383 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1384 * @phydev: the phy_device struct 1385 * 1386 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1387 * PHY_MAC_INTERRUPT 1388 */ 1389 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1390 { 1391 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1392 } 1393 1394 /** 1395 * phy_polling_mode - Convenience function for testing whether polling is 1396 * used to detect PHY status changes 1397 * @phydev: the phy_device struct 1398 */ 1399 static inline bool phy_polling_mode(struct phy_device *phydev) 1400 { 1401 if (phydev->state == PHY_CABLETEST) 1402 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1403 return true; 1404 1405 return phydev->irq == PHY_POLL; 1406 } 1407 1408 /** 1409 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1410 * @phydev: the phy_device struct 1411 */ 1412 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1413 { 1414 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1415 } 1416 1417 /** 1418 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1419 * @phydev: the phy_device struct 1420 */ 1421 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1422 { 1423 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1424 } 1425 1426 /** 1427 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1428 * PTP hardware clock capabilities. 1429 * @phydev: the phy_device struct 1430 */ 1431 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1432 { 1433 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1434 } 1435 1436 /** 1437 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1438 * @phydev: the phy_device struct 1439 */ 1440 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1441 { 1442 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1443 } 1444 1445 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) 1446 { 1447 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); 1448 } 1449 1450 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1451 int type) 1452 { 1453 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1454 } 1455 1456 static inline int phy_ts_info(struct phy_device *phydev, 1457 struct ethtool_ts_info *tsinfo) 1458 { 1459 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1460 } 1461 1462 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1463 int type) 1464 { 1465 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1466 } 1467 1468 /** 1469 * phy_is_internal - Convenience function for testing if a PHY is internal 1470 * @phydev: the phy_device struct 1471 */ 1472 static inline bool phy_is_internal(struct phy_device *phydev) 1473 { 1474 return phydev->is_internal; 1475 } 1476 1477 /** 1478 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1479 * @phydev: the phy_device struct 1480 */ 1481 static inline bool phy_on_sfp(struct phy_device *phydev) 1482 { 1483 return phydev->is_on_sfp_module; 1484 } 1485 1486 /** 1487 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1488 * PHY interface mode is RGMII (all variants) 1489 * @mode: the &phy_interface_t enum 1490 */ 1491 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1492 { 1493 return mode >= PHY_INTERFACE_MODE_RGMII && 1494 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1495 }; 1496 1497 /** 1498 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1499 * negotiation 1500 * @mode: one of &enum phy_interface_t 1501 * 1502 * Returns true if the PHY interface mode uses the 16-bit negotiation 1503 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1504 */ 1505 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1506 { 1507 return mode == PHY_INTERFACE_MODE_1000BASEX || 1508 mode == PHY_INTERFACE_MODE_2500BASEX; 1509 } 1510 1511 /** 1512 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1513 * is RGMII (all variants) 1514 * @phydev: the phy_device struct 1515 */ 1516 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1517 { 1518 return phy_interface_mode_is_rgmii(phydev->interface); 1519 }; 1520 1521 /** 1522 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1523 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1524 * @phydev: the phy_device struct 1525 */ 1526 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1527 { 1528 return phydev->is_pseudo_fixed_link; 1529 } 1530 1531 int phy_save_page(struct phy_device *phydev); 1532 int phy_select_page(struct phy_device *phydev, int page); 1533 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1534 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1535 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1536 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1537 u16 mask, u16 set); 1538 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1539 u16 mask, u16 set); 1540 1541 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1542 bool is_c45, 1543 struct phy_c45_device_ids *c45_ids); 1544 #if IS_ENABLED(CONFIG_PHYLIB) 1545 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1546 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1547 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1548 struct phy_device *device_phy_find_device(struct device *dev); 1549 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode); 1550 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1551 int phy_device_register(struct phy_device *phy); 1552 void phy_device_free(struct phy_device *phydev); 1553 #else 1554 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1555 { 1556 return 0; 1557 } 1558 static inline 1559 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1560 { 1561 return 0; 1562 } 1563 1564 static inline 1565 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1566 { 1567 return NULL; 1568 } 1569 1570 static inline struct phy_device *device_phy_find_device(struct device *dev) 1571 { 1572 return NULL; 1573 } 1574 1575 static inline 1576 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1577 { 1578 return NULL; 1579 } 1580 1581 static inline 1582 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1583 { 1584 return NULL; 1585 } 1586 1587 static inline int phy_device_register(struct phy_device *phy) 1588 { 1589 return 0; 1590 } 1591 1592 static inline void phy_device_free(struct phy_device *phydev) { } 1593 #endif /* CONFIG_PHYLIB */ 1594 void phy_device_remove(struct phy_device *phydev); 1595 int phy_get_c45_ids(struct phy_device *phydev); 1596 int phy_init_hw(struct phy_device *phydev); 1597 int phy_suspend(struct phy_device *phydev); 1598 int phy_resume(struct phy_device *phydev); 1599 int __phy_resume(struct phy_device *phydev); 1600 int phy_loopback(struct phy_device *phydev, bool enable); 1601 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1602 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1603 int phy_sfp_probe(struct phy_device *phydev, 1604 const struct sfp_upstream_ops *ops); 1605 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1606 phy_interface_t interface); 1607 struct phy_device *phy_find_first(struct mii_bus *bus); 1608 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1609 u32 flags, phy_interface_t interface); 1610 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1611 void (*handler)(struct net_device *), 1612 phy_interface_t interface); 1613 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1614 void (*handler)(struct net_device *), 1615 phy_interface_t interface); 1616 void phy_disconnect(struct phy_device *phydev); 1617 void phy_detach(struct phy_device *phydev); 1618 void phy_start(struct phy_device *phydev); 1619 void phy_stop(struct phy_device *phydev); 1620 int phy_config_aneg(struct phy_device *phydev); 1621 int phy_start_aneg(struct phy_device *phydev); 1622 int phy_aneg_done(struct phy_device *phydev); 1623 int phy_speed_down(struct phy_device *phydev, bool sync); 1624 int phy_speed_up(struct phy_device *phydev); 1625 1626 int phy_restart_aneg(struct phy_device *phydev); 1627 int phy_reset_after_clk_enable(struct phy_device *phydev); 1628 1629 #if IS_ENABLED(CONFIG_PHYLIB) 1630 int phy_start_cable_test(struct phy_device *phydev, 1631 struct netlink_ext_ack *extack); 1632 int phy_start_cable_test_tdr(struct phy_device *phydev, 1633 struct netlink_ext_ack *extack, 1634 const struct phy_tdr_config *config); 1635 #else 1636 static inline 1637 int phy_start_cable_test(struct phy_device *phydev, 1638 struct netlink_ext_ack *extack) 1639 { 1640 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1641 return -EOPNOTSUPP; 1642 } 1643 static inline 1644 int phy_start_cable_test_tdr(struct phy_device *phydev, 1645 struct netlink_ext_ack *extack, 1646 const struct phy_tdr_config *config) 1647 { 1648 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1649 return -EOPNOTSUPP; 1650 } 1651 #endif 1652 1653 int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result); 1654 int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair, 1655 u16 cm); 1656 1657 static inline void phy_device_reset(struct phy_device *phydev, int value) 1658 { 1659 mdio_device_reset(&phydev->mdio, value); 1660 } 1661 1662 #define phydev_err(_phydev, format, args...) \ 1663 dev_err(&_phydev->mdio.dev, format, ##args) 1664 1665 #define phydev_err_probe(_phydev, err, format, args...) \ 1666 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1667 1668 #define phydev_info(_phydev, format, args...) \ 1669 dev_info(&_phydev->mdio.dev, format, ##args) 1670 1671 #define phydev_warn(_phydev, format, args...) \ 1672 dev_warn(&_phydev->mdio.dev, format, ##args) 1673 1674 #define phydev_dbg(_phydev, format, args...) \ 1675 dev_dbg(&_phydev->mdio.dev, format, ##args) 1676 1677 static inline const char *phydev_name(const struct phy_device *phydev) 1678 { 1679 return dev_name(&phydev->mdio.dev); 1680 } 1681 1682 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1683 { 1684 mutex_lock(&phydev->mdio.bus->mdio_lock); 1685 } 1686 1687 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1688 { 1689 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1690 } 1691 1692 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1693 __printf(2, 3); 1694 char *phy_attached_info_irq(struct phy_device *phydev) 1695 __malloc; 1696 void phy_attached_info(struct phy_device *phydev); 1697 1698 /* Clause 22 PHY */ 1699 int genphy_read_abilities(struct phy_device *phydev); 1700 int genphy_setup_forced(struct phy_device *phydev); 1701 int genphy_restart_aneg(struct phy_device *phydev); 1702 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1703 int genphy_config_eee_advert(struct phy_device *phydev); 1704 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1705 int genphy_aneg_done(struct phy_device *phydev); 1706 int genphy_update_link(struct phy_device *phydev); 1707 int genphy_read_lpa(struct phy_device *phydev); 1708 int genphy_read_status_fixed(struct phy_device *phydev); 1709 int genphy_read_status(struct phy_device *phydev); 1710 int genphy_read_master_slave(struct phy_device *phydev); 1711 int genphy_suspend(struct phy_device *phydev); 1712 int genphy_resume(struct phy_device *phydev); 1713 int genphy_loopback(struct phy_device *phydev, bool enable); 1714 int genphy_soft_reset(struct phy_device *phydev); 1715 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1716 1717 static inline int genphy_config_aneg(struct phy_device *phydev) 1718 { 1719 return __genphy_config_aneg(phydev, false); 1720 } 1721 1722 static inline int genphy_no_config_intr(struct phy_device *phydev) 1723 { 1724 return 0; 1725 } 1726 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1727 u16 regnum); 1728 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1729 u16 regnum, u16 val); 1730 1731 /* Clause 37 */ 1732 int genphy_c37_config_aneg(struct phy_device *phydev); 1733 int genphy_c37_read_status(struct phy_device *phydev); 1734 1735 /* Clause 45 PHY */ 1736 int genphy_c45_restart_aneg(struct phy_device *phydev); 1737 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1738 int genphy_c45_aneg_done(struct phy_device *phydev); 1739 int genphy_c45_read_link(struct phy_device *phydev); 1740 int genphy_c45_read_lpa(struct phy_device *phydev); 1741 int genphy_c45_read_pma(struct phy_device *phydev); 1742 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1743 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 1744 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1745 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1746 int genphy_c45_read_mdix(struct phy_device *phydev); 1747 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1748 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 1749 int genphy_c45_read_status(struct phy_device *phydev); 1750 int genphy_c45_baset1_read_status(struct phy_device *phydev); 1751 int genphy_c45_config_aneg(struct phy_device *phydev); 1752 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1753 int genphy_c45_pma_resume(struct phy_device *phydev); 1754 int genphy_c45_pma_suspend(struct phy_device *phydev); 1755 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 1756 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 1757 struct phy_plca_cfg *plca_cfg); 1758 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 1759 const struct phy_plca_cfg *plca_cfg); 1760 int genphy_c45_plca_get_status(struct phy_device *phydev, 1761 struct phy_plca_status *plca_st); 1762 1763 /* Generic C45 PHY driver */ 1764 extern struct phy_driver genphy_c45_driver; 1765 1766 /* The gen10g_* functions are the old Clause 45 stub */ 1767 int gen10g_config_aneg(struct phy_device *phydev); 1768 1769 static inline int phy_read_status(struct phy_device *phydev) 1770 { 1771 if (!phydev->drv) 1772 return -EIO; 1773 1774 if (phydev->drv->read_status) 1775 return phydev->drv->read_status(phydev); 1776 else 1777 return genphy_read_status(phydev); 1778 } 1779 1780 void phy_driver_unregister(struct phy_driver *drv); 1781 void phy_drivers_unregister(struct phy_driver *drv, int n); 1782 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1783 int phy_drivers_register(struct phy_driver *new_driver, int n, 1784 struct module *owner); 1785 void phy_error(struct phy_device *phydev); 1786 void phy_state_machine(struct work_struct *work); 1787 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1788 void phy_trigger_machine(struct phy_device *phydev); 1789 void phy_mac_interrupt(struct phy_device *phydev); 1790 void phy_start_machine(struct phy_device *phydev); 1791 void phy_stop_machine(struct phy_device *phydev); 1792 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1793 struct ethtool_link_ksettings *cmd); 1794 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1795 const struct ethtool_link_ksettings *cmd); 1796 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1797 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1798 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1799 int phy_disable_interrupts(struct phy_device *phydev); 1800 void phy_request_interrupt(struct phy_device *phydev); 1801 void phy_free_interrupt(struct phy_device *phydev); 1802 void phy_print_status(struct phy_device *phydev); 1803 int phy_get_rate_matching(struct phy_device *phydev, 1804 phy_interface_t iface); 1805 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1806 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1807 void phy_advertise_supported(struct phy_device *phydev); 1808 void phy_support_sym_pause(struct phy_device *phydev); 1809 void phy_support_asym_pause(struct phy_device *phydev); 1810 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1811 bool autoneg); 1812 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1813 bool phy_validate_pause(struct phy_device *phydev, 1814 struct ethtool_pauseparam *pp); 1815 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1816 1817 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 1818 const int *delay_values, int size, bool is_rx); 1819 1820 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1821 bool *tx_pause, bool *rx_pause); 1822 1823 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1824 int (*run)(struct phy_device *)); 1825 int phy_register_fixup_for_id(const char *bus_id, 1826 int (*run)(struct phy_device *)); 1827 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1828 int (*run)(struct phy_device *)); 1829 1830 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1831 int phy_unregister_fixup_for_id(const char *bus_id); 1832 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1833 1834 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1835 int phy_get_eee_err(struct phy_device *phydev); 1836 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1837 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1838 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1839 void phy_ethtool_get_wol(struct phy_device *phydev, 1840 struct ethtool_wolinfo *wol); 1841 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1842 struct ethtool_link_ksettings *cmd); 1843 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1844 const struct ethtool_link_ksettings *cmd); 1845 int phy_ethtool_nway_reset(struct net_device *ndev); 1846 int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size); 1847 void phy_package_leave(struct phy_device *phydev); 1848 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 1849 int addr, size_t priv_size); 1850 1851 #if IS_ENABLED(CONFIG_PHYLIB) 1852 int __init mdio_bus_init(void); 1853 void mdio_bus_exit(void); 1854 #endif 1855 1856 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 1857 int phy_ethtool_get_sset_count(struct phy_device *phydev); 1858 int phy_ethtool_get_stats(struct phy_device *phydev, 1859 struct ethtool_stats *stats, u64 *data); 1860 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 1861 struct phy_plca_cfg *plca_cfg); 1862 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 1863 const struct phy_plca_cfg *plca_cfg, 1864 struct netlink_ext_ack *extack); 1865 int phy_ethtool_get_plca_status(struct phy_device *phydev, 1866 struct phy_plca_status *plca_st); 1867 1868 static inline int phy_package_read(struct phy_device *phydev, u32 regnum) 1869 { 1870 struct phy_package_shared *shared = phydev->shared; 1871 1872 if (!shared) 1873 return -EIO; 1874 1875 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1876 } 1877 1878 static inline int __phy_package_read(struct phy_device *phydev, u32 regnum) 1879 { 1880 struct phy_package_shared *shared = phydev->shared; 1881 1882 if (!shared) 1883 return -EIO; 1884 1885 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1886 } 1887 1888 static inline int phy_package_write(struct phy_device *phydev, 1889 u32 regnum, u16 val) 1890 { 1891 struct phy_package_shared *shared = phydev->shared; 1892 1893 if (!shared) 1894 return -EIO; 1895 1896 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1897 } 1898 1899 static inline int __phy_package_write(struct phy_device *phydev, 1900 u32 regnum, u16 val) 1901 { 1902 struct phy_package_shared *shared = phydev->shared; 1903 1904 if (!shared) 1905 return -EIO; 1906 1907 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1908 } 1909 1910 static inline bool __phy_package_set_once(struct phy_device *phydev, 1911 unsigned int b) 1912 { 1913 struct phy_package_shared *shared = phydev->shared; 1914 1915 if (!shared) 1916 return false; 1917 1918 return !test_and_set_bit(b, &shared->flags); 1919 } 1920 1921 static inline bool phy_package_init_once(struct phy_device *phydev) 1922 { 1923 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 1924 } 1925 1926 static inline bool phy_package_probe_once(struct phy_device *phydev) 1927 { 1928 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 1929 } 1930 1931 extern struct bus_type mdio_bus_type; 1932 1933 struct mdio_board_info { 1934 const char *bus_id; 1935 char modalias[MDIO_NAME_SIZE]; 1936 int mdio_addr; 1937 const void *platform_data; 1938 }; 1939 1940 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1941 int mdiobus_register_board_info(const struct mdio_board_info *info, 1942 unsigned int n); 1943 #else 1944 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1945 unsigned int n) 1946 { 1947 return 0; 1948 } 1949 #endif 1950 1951 1952 /** 1953 * phy_module_driver() - Helper macro for registering PHY drivers 1954 * @__phy_drivers: array of PHY drivers to register 1955 * @__count: Numbers of members in array 1956 * 1957 * Helper macro for PHY drivers which do not do anything special in module 1958 * init/exit. Each module may only use this macro once, and calling it 1959 * replaces module_init() and module_exit(). 1960 */ 1961 #define phy_module_driver(__phy_drivers, __count) \ 1962 static int __init phy_module_init(void) \ 1963 { \ 1964 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 1965 } \ 1966 module_init(phy_module_init); \ 1967 static void __exit phy_module_exit(void) \ 1968 { \ 1969 phy_drivers_unregister(__phy_drivers, __count); \ 1970 } \ 1971 module_exit(phy_module_exit) 1972 1973 #define module_phy_driver(__phy_drivers) \ 1974 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 1975 1976 bool phy_driver_is_genphy(struct phy_device *phydev); 1977 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 1978 1979 #endif /* __PHY_H */ 1980