1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/leds.h> 18 #include <linux/linkmode.h> 19 #include <linux/netlink.h> 20 #include <linux/mdio.h> 21 #include <linux/mii.h> 22 #include <linux/mii_timestamper.h> 23 #include <linux/module.h> 24 #include <linux/timer.h> 25 #include <linux/workqueue.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/u64_stats_sync.h> 28 #include <linux/irqreturn.h> 29 #include <linux/iopoll.h> 30 #include <linux/refcount.h> 31 32 #include <linux/atomic.h> 33 34 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 35 SUPPORTED_TP | \ 36 SUPPORTED_MII) 37 38 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 39 SUPPORTED_10baseT_Full) 40 41 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 42 SUPPORTED_100baseT_Full) 43 44 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 45 SUPPORTED_1000baseT_Full) 46 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 54 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 55 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 56 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init; 57 58 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 59 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 60 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 61 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 62 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 63 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 64 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 65 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 66 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 67 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features) 68 69 extern const int phy_basic_ports_array[3]; 70 extern const int phy_fibre_port_array[1]; 71 extern const int phy_all_ports_features_array[7]; 72 extern const int phy_10_100_features_array[4]; 73 extern const int phy_basic_t1_features_array[3]; 74 extern const int phy_basic_t1s_p2mp_features_array[2]; 75 extern const int phy_gbit_features_array[2]; 76 extern const int phy_10gbit_features_array[1]; 77 78 /* 79 * Set phydev->irq to PHY_POLL if interrupts are not supported, 80 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 81 * the attached MAC driver handles the interrupt 82 */ 83 #define PHY_POLL -1 84 #define PHY_MAC_INTERRUPT -2 85 86 #define PHY_IS_INTERNAL 0x00000001 87 #define PHY_RST_AFTER_CLK_EN 0x00000002 88 #define PHY_POLL_CABLE_TEST 0x00000004 89 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008 90 #define MDIO_DEVICE_IS_PHY 0x80000000 91 92 /** 93 * enum phy_interface_t - Interface Mode definitions 94 * 95 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 96 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 97 * @PHY_INTERFACE_MODE_MII: Media-independent interface 98 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 99 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 100 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 101 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 102 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 103 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 104 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 105 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 106 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 107 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 108 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 109 * @PHY_INTERFACE_MODE_SMII: Serial MII 110 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 111 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 112 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 113 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 114 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 115 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 116 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 117 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 118 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 119 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 120 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 121 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 122 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 123 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 124 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 125 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 126 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 127 * @PHY_INTERFACE_MODE_MAX: Book keeping 128 * 129 * Describes the interface between the MAC and PHY. 130 */ 131 typedef enum { 132 PHY_INTERFACE_MODE_NA, 133 PHY_INTERFACE_MODE_INTERNAL, 134 PHY_INTERFACE_MODE_MII, 135 PHY_INTERFACE_MODE_GMII, 136 PHY_INTERFACE_MODE_SGMII, 137 PHY_INTERFACE_MODE_TBI, 138 PHY_INTERFACE_MODE_REVMII, 139 PHY_INTERFACE_MODE_RMII, 140 PHY_INTERFACE_MODE_REVRMII, 141 PHY_INTERFACE_MODE_RGMII, 142 PHY_INTERFACE_MODE_RGMII_ID, 143 PHY_INTERFACE_MODE_RGMII_RXID, 144 PHY_INTERFACE_MODE_RGMII_TXID, 145 PHY_INTERFACE_MODE_RTBI, 146 PHY_INTERFACE_MODE_SMII, 147 PHY_INTERFACE_MODE_XGMII, 148 PHY_INTERFACE_MODE_XLGMII, 149 PHY_INTERFACE_MODE_MOCA, 150 PHY_INTERFACE_MODE_QSGMII, 151 PHY_INTERFACE_MODE_TRGMII, 152 PHY_INTERFACE_MODE_100BASEX, 153 PHY_INTERFACE_MODE_1000BASEX, 154 PHY_INTERFACE_MODE_2500BASEX, 155 PHY_INTERFACE_MODE_5GBASER, 156 PHY_INTERFACE_MODE_RXAUI, 157 PHY_INTERFACE_MODE_XAUI, 158 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 159 PHY_INTERFACE_MODE_10GBASER, 160 PHY_INTERFACE_MODE_25GBASER, 161 PHY_INTERFACE_MODE_USXGMII, 162 /* 10GBASE-KR - with Clause 73 AN */ 163 PHY_INTERFACE_MODE_10GKR, 164 PHY_INTERFACE_MODE_QUSGMII, 165 PHY_INTERFACE_MODE_1000BASEKX, 166 PHY_INTERFACE_MODE_MAX, 167 } phy_interface_t; 168 169 /* PHY interface mode bitmap handling */ 170 #define DECLARE_PHY_INTERFACE_MASK(name) \ 171 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 172 173 static inline void phy_interface_zero(unsigned long *intf) 174 { 175 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 176 } 177 178 static inline bool phy_interface_empty(const unsigned long *intf) 179 { 180 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 181 } 182 183 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 184 const unsigned long *b) 185 { 186 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 187 } 188 189 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 190 const unsigned long *b) 191 { 192 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 193 } 194 195 static inline void phy_interface_set_rgmii(unsigned long *intf) 196 { 197 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 198 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 199 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 200 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 201 } 202 203 /* 204 * phy_supported_speeds - return all speeds currently supported by a PHY device 205 */ 206 unsigned int phy_supported_speeds(struct phy_device *phy, 207 unsigned int *speeds, 208 unsigned int size); 209 210 /** 211 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 212 * @interface: enum phy_interface_t value 213 * 214 * Description: maps enum &phy_interface_t defined in this file 215 * into the device tree binding of 'phy-mode', so that Ethernet 216 * device driver can get PHY interface from device tree. 217 */ 218 static inline const char *phy_modes(phy_interface_t interface) 219 { 220 switch (interface) { 221 case PHY_INTERFACE_MODE_NA: 222 return ""; 223 case PHY_INTERFACE_MODE_INTERNAL: 224 return "internal"; 225 case PHY_INTERFACE_MODE_MII: 226 return "mii"; 227 case PHY_INTERFACE_MODE_GMII: 228 return "gmii"; 229 case PHY_INTERFACE_MODE_SGMII: 230 return "sgmii"; 231 case PHY_INTERFACE_MODE_TBI: 232 return "tbi"; 233 case PHY_INTERFACE_MODE_REVMII: 234 return "rev-mii"; 235 case PHY_INTERFACE_MODE_RMII: 236 return "rmii"; 237 case PHY_INTERFACE_MODE_REVRMII: 238 return "rev-rmii"; 239 case PHY_INTERFACE_MODE_RGMII: 240 return "rgmii"; 241 case PHY_INTERFACE_MODE_RGMII_ID: 242 return "rgmii-id"; 243 case PHY_INTERFACE_MODE_RGMII_RXID: 244 return "rgmii-rxid"; 245 case PHY_INTERFACE_MODE_RGMII_TXID: 246 return "rgmii-txid"; 247 case PHY_INTERFACE_MODE_RTBI: 248 return "rtbi"; 249 case PHY_INTERFACE_MODE_SMII: 250 return "smii"; 251 case PHY_INTERFACE_MODE_XGMII: 252 return "xgmii"; 253 case PHY_INTERFACE_MODE_XLGMII: 254 return "xlgmii"; 255 case PHY_INTERFACE_MODE_MOCA: 256 return "moca"; 257 case PHY_INTERFACE_MODE_QSGMII: 258 return "qsgmii"; 259 case PHY_INTERFACE_MODE_TRGMII: 260 return "trgmii"; 261 case PHY_INTERFACE_MODE_1000BASEX: 262 return "1000base-x"; 263 case PHY_INTERFACE_MODE_1000BASEKX: 264 return "1000base-kx"; 265 case PHY_INTERFACE_MODE_2500BASEX: 266 return "2500base-x"; 267 case PHY_INTERFACE_MODE_5GBASER: 268 return "5gbase-r"; 269 case PHY_INTERFACE_MODE_RXAUI: 270 return "rxaui"; 271 case PHY_INTERFACE_MODE_XAUI: 272 return "xaui"; 273 case PHY_INTERFACE_MODE_10GBASER: 274 return "10gbase-r"; 275 case PHY_INTERFACE_MODE_25GBASER: 276 return "25gbase-r"; 277 case PHY_INTERFACE_MODE_USXGMII: 278 return "usxgmii"; 279 case PHY_INTERFACE_MODE_10GKR: 280 return "10gbase-kr"; 281 case PHY_INTERFACE_MODE_100BASEX: 282 return "100base-x"; 283 case PHY_INTERFACE_MODE_QUSGMII: 284 return "qusgmii"; 285 default: 286 return "unknown"; 287 } 288 } 289 290 #define PHY_INIT_TIMEOUT 100000 291 #define PHY_FORCE_TIMEOUT 10 292 293 #define PHY_MAX_ADDR 32 294 295 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 296 #define PHY_ID_FMT "%s:%02x" 297 298 #define MII_BUS_ID_SIZE 61 299 300 struct device; 301 struct phylink; 302 struct sfp_bus; 303 struct sfp_upstream_ops; 304 struct sk_buff; 305 306 /** 307 * struct mdio_bus_stats - Statistics counters for MDIO busses 308 * @transfers: Total number of transfers, i.e. @writes + @reads 309 * @errors: Number of MDIO transfers that returned an error 310 * @writes: Number of write transfers 311 * @reads: Number of read transfers 312 * @syncp: Synchronisation for incrementing statistics 313 */ 314 struct mdio_bus_stats { 315 u64_stats_t transfers; 316 u64_stats_t errors; 317 u64_stats_t writes; 318 u64_stats_t reads; 319 /* Must be last, add new statistics above */ 320 struct u64_stats_sync syncp; 321 }; 322 323 /** 324 * struct phy_package_shared - Shared information in PHY packages 325 * @addr: Common PHY address used to combine PHYs in one package 326 * @refcnt: Number of PHYs connected to this shared data 327 * @flags: Initialization of PHY package 328 * @priv_size: Size of the shared private data @priv 329 * @priv: Driver private data shared across a PHY package 330 * 331 * Represents a shared structure between different phydev's in the same 332 * package, for example a quad PHY. See phy_package_join() and 333 * phy_package_leave(). 334 */ 335 struct phy_package_shared { 336 int addr; 337 refcount_t refcnt; 338 unsigned long flags; 339 size_t priv_size; 340 341 /* private data pointer */ 342 /* note that this pointer is shared between different phydevs and 343 * the user has to take care of appropriate locking. It is allocated 344 * and freed automatically by phy_package_join() and 345 * phy_package_leave(). 346 */ 347 void *priv; 348 }; 349 350 /* used as bit number in atomic bitops */ 351 #define PHY_SHARED_F_INIT_DONE 0 352 #define PHY_SHARED_F_PROBE_DONE 1 353 354 /** 355 * struct mii_bus - Represents an MDIO bus 356 * 357 * @owner: Who owns this device 358 * @name: User friendly name for this MDIO device, or driver name 359 * @id: Unique identifier for this bus, typical from bus hierarchy 360 * @priv: Driver private data 361 * 362 * The Bus class for PHYs. Devices which provide access to 363 * PHYs should register using this structure 364 */ 365 struct mii_bus { 366 struct module *owner; 367 const char *name; 368 char id[MII_BUS_ID_SIZE]; 369 void *priv; 370 /** @read: Perform a read transfer on the bus */ 371 int (*read)(struct mii_bus *bus, int addr, int regnum); 372 /** @write: Perform a write transfer on the bus */ 373 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 374 /** @read_c45: Perform a C45 read transfer on the bus */ 375 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 376 /** @write_c45: Perform a C45 write transfer on the bus */ 377 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 378 int regnum, u16 val); 379 /** @reset: Perform a reset of the bus */ 380 int (*reset)(struct mii_bus *bus); 381 382 /** @stats: Statistic counters per device on the bus */ 383 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 384 385 /** 386 * @mdio_lock: A lock to ensure that only one thing can read/write 387 * the MDIO bus at a time 388 */ 389 struct mutex mdio_lock; 390 391 /** @parent: Parent device of this bus */ 392 struct device *parent; 393 /** @state: State of bus structure */ 394 enum { 395 MDIOBUS_ALLOCATED = 1, 396 MDIOBUS_REGISTERED, 397 MDIOBUS_UNREGISTERED, 398 MDIOBUS_RELEASED, 399 } state; 400 401 /** @dev: Kernel device representation */ 402 struct device dev; 403 404 /** @mdio_map: list of all MDIO devices on bus */ 405 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 406 407 /** @phy_mask: PHY addresses to be ignored when probing */ 408 u32 phy_mask; 409 410 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 411 u32 phy_ignore_ta_mask; 412 413 /** 414 * @irq: An array of interrupts, each PHY's interrupt at the index 415 * matching its address 416 */ 417 int irq[PHY_MAX_ADDR]; 418 419 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 420 int reset_delay_us; 421 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 422 int reset_post_delay_us; 423 /** @reset_gpiod: Reset GPIO descriptor pointer */ 424 struct gpio_desc *reset_gpiod; 425 426 /** @shared_lock: protect access to the shared element */ 427 struct mutex shared_lock; 428 429 /** @shared: shared state across different PHYs */ 430 struct phy_package_shared *shared[PHY_MAX_ADDR]; 431 }; 432 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 433 434 struct mii_bus *mdiobus_alloc_size(size_t size); 435 436 /** 437 * mdiobus_alloc - Allocate an MDIO bus structure 438 * 439 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 440 * for the driver to register the bus. 441 */ 442 static inline struct mii_bus *mdiobus_alloc(void) 443 { 444 return mdiobus_alloc_size(0); 445 } 446 447 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 448 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 449 struct module *owner); 450 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 451 #define devm_mdiobus_register(dev, bus) \ 452 __devm_mdiobus_register(dev, bus, THIS_MODULE) 453 454 void mdiobus_unregister(struct mii_bus *bus); 455 void mdiobus_free(struct mii_bus *bus); 456 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 457 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 458 { 459 return devm_mdiobus_alloc_size(dev, 0); 460 } 461 462 struct mii_bus *mdio_find_bus(const char *mdio_name); 463 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); 464 465 #define PHY_INTERRUPT_DISABLED false 466 #define PHY_INTERRUPT_ENABLED true 467 468 /** 469 * enum phy_state - PHY state machine states: 470 * 471 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 472 * should be called if and only if the PHY is in this state, 473 * given that the PHY device exists. 474 * - PHY driver probe function will set the state to @PHY_READY 475 * 476 * @PHY_READY: PHY is ready to send and receive packets, but the 477 * controller is not. By default, PHYs which do not implement 478 * probe will be set to this state by phy_probe(). 479 * - start will set the state to UP 480 * 481 * @PHY_UP: The PHY and attached device are ready to do work. 482 * Interrupts should be started here. 483 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 484 * 485 * @PHY_NOLINK: PHY is up, but not currently plugged in. 486 * - irq or timer will set @PHY_RUNNING if link comes back 487 * - phy_stop moves to @PHY_HALTED 488 * 489 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 490 * and/or receiving packets 491 * - irq or timer will set @PHY_NOLINK if link goes down 492 * - phy_stop moves to @PHY_HALTED 493 * 494 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 495 * is not expected to work, carrier will be indicated as down. PHY will be 496 * poll once per second, or on interrupt for it current state. 497 * Once complete, move to UP to restart the PHY. 498 * - phy_stop aborts the running test and moves to @PHY_HALTED 499 * 500 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or 501 * PHY is in an error state. 502 * - phy_start moves to @PHY_UP 503 */ 504 enum phy_state { 505 PHY_DOWN = 0, 506 PHY_READY, 507 PHY_HALTED, 508 PHY_UP, 509 PHY_RUNNING, 510 PHY_NOLINK, 511 PHY_CABLETEST, 512 }; 513 514 #define MDIO_MMD_NUM 32 515 516 /** 517 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 518 * @devices_in_package: IEEE 802.3 devices in package register value. 519 * @mmds_present: bit vector of MMDs present. 520 * @device_ids: The device identifer for each present device. 521 */ 522 struct phy_c45_device_ids { 523 u32 devices_in_package; 524 u32 mmds_present; 525 u32 device_ids[MDIO_MMD_NUM]; 526 }; 527 528 struct macsec_context; 529 struct macsec_ops; 530 531 /** 532 * struct phy_device - An instance of a PHY 533 * 534 * @mdio: MDIO bus this PHY is on 535 * @drv: Pointer to the driver for this PHY instance 536 * @devlink: Create a link between phy dev and mac dev, if the external phy 537 * used by current mac interface is managed by another mac interface. 538 * @phy_id: UID for this device found during discovery 539 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 540 * @is_c45: Set to true if this PHY uses clause 45 addressing. 541 * @is_internal: Set to true if this PHY is internal to a MAC. 542 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 543 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 544 * @has_fixups: Set to true if this PHY has fixups/quirks. 545 * @suspended: Set to true if this PHY has been suspended successfully. 546 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 547 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 548 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 549 * @downshifted_rate: Set true if link speed has been downshifted. 550 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 551 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 552 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN 553 * enabled. 554 * @state: State of the PHY for management purposes 555 * @dev_flags: Device-specific flags used by the PHY driver. 556 * 557 * - Bits [15:0] are free to use by the PHY driver to communicate 558 * driver specific behavior. 559 * - Bits [23:16] are currently reserved for future use. 560 * - Bits [31:24] are reserved for defining generic 561 * PHY driver behavior. 562 * @irq: IRQ number of the PHY's interrupt (-1 if none) 563 * @phy_timer: The timer for handling the state machine 564 * @phylink: Pointer to phylink instance for this PHY 565 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 566 * @sfp_bus: SFP bus attached to this PHY's fiber port 567 * @attached_dev: The attached enet driver's device instance ptr 568 * @adjust_link: Callback for the enet controller to respond to changes: in the 569 * link state. 570 * @phy_link_change: Callback for phylink for notification of link change 571 * @macsec_ops: MACsec offloading ops. 572 * 573 * @speed: Current link speed 574 * @duplex: Current duplex 575 * @port: Current port 576 * @pause: Current pause 577 * @asym_pause: Current asymmetric pause 578 * @supported: Combined MAC/PHY supported linkmodes 579 * @advertising: Currently advertised linkmodes 580 * @adv_old: Saved advertised while power saving for WoL 581 * @supported_eee: supported PHY EEE linkmodes 582 * @advertising_eee: Currently advertised EEE linkmodes 583 * @eee_enabled: Flag indicating whether the EEE feature is enabled 584 * @lp_advertising: Current link partner advertised linkmodes 585 * @host_interfaces: PHY interface modes supported by host 586 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 587 * @autoneg: Flag autoneg being used 588 * @rate_matching: Current rate matching mode 589 * @link: Current link state 590 * @autoneg_complete: Flag auto negotiation of the link has completed 591 * @mdix: Current crossover 592 * @mdix_ctrl: User setting of crossover 593 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 594 * @interrupts: Flag interrupts have been enabled 595 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 596 * handling shall be postponed until PHY has resumed 597 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 598 * requiring a rerun of the interrupt handler after resume 599 * @interface: enum phy_interface_t value 600 * @skb: Netlink message for cable diagnostics 601 * @nest: Netlink nest used for cable diagnostics 602 * @ehdr: nNtlink header for cable diagnostics 603 * @phy_led_triggers: Array of LED triggers 604 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 605 * @led_link_trigger: LED trigger for link up/down 606 * @last_triggered: last LED trigger for link speed 607 * @leds: list of PHY LED structures 608 * @master_slave_set: User requested master/slave configuration 609 * @master_slave_get: Current master/slave advertisement 610 * @master_slave_state: Current master/slave configuration 611 * @mii_ts: Pointer to time stamper callbacks 612 * @psec: Pointer to Power Sourcing Equipment control struct 613 * @lock: Mutex for serialization access to PHY 614 * @state_queue: Work queue for state machine 615 * @link_down_events: Number of times link was lost 616 * @shared: Pointer to private data shared by phys in one package 617 * @priv: Pointer to driver private data 618 * 619 * interrupts currently only supports enabled or disabled, 620 * but could be changed in the future to support enabling 621 * and disabling specific interrupts 622 * 623 * Contains some infrastructure for polling and interrupt 624 * handling, as well as handling shifts in PHY hardware state 625 */ 626 struct phy_device { 627 struct mdio_device mdio; 628 629 /* Information about the PHY type */ 630 /* And management functions */ 631 struct phy_driver *drv; 632 633 struct device_link *devlink; 634 635 u32 phy_id; 636 637 struct phy_c45_device_ids c45_ids; 638 unsigned is_c45:1; 639 unsigned is_internal:1; 640 unsigned is_pseudo_fixed_link:1; 641 unsigned is_gigabit_capable:1; 642 unsigned has_fixups:1; 643 unsigned suspended:1; 644 unsigned suspended_by_mdio_bus:1; 645 unsigned sysfs_links:1; 646 unsigned loopback_enabled:1; 647 unsigned downshifted_rate:1; 648 unsigned is_on_sfp_module:1; 649 unsigned mac_managed_pm:1; 650 unsigned wol_enabled:1; 651 652 unsigned autoneg:1; 653 /* The most recently read link state */ 654 unsigned link:1; 655 unsigned autoneg_complete:1; 656 657 /* Interrupts are enabled */ 658 unsigned interrupts:1; 659 unsigned irq_suspended:1; 660 unsigned irq_rerun:1; 661 662 int rate_matching; 663 664 enum phy_state state; 665 666 u32 dev_flags; 667 668 phy_interface_t interface; 669 670 /* 671 * forced speed & duplex (no autoneg) 672 * partner speed & duplex & pause (autoneg) 673 */ 674 int speed; 675 int duplex; 676 int port; 677 int pause; 678 int asym_pause; 679 u8 master_slave_get; 680 u8 master_slave_set; 681 u8 master_slave_state; 682 683 /* Union of PHY and Attached devices' supported link modes */ 684 /* See ethtool.h for more info */ 685 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 686 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 687 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 688 /* used with phy_speed_down */ 689 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 690 /* used for eee validation */ 691 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee); 692 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee); 693 bool eee_enabled; 694 695 /* Host supported PHY interface types. Should be ignored if empty. */ 696 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 697 698 /* Energy efficient ethernet modes which should be prohibited */ 699 u32 eee_broken_modes; 700 701 #ifdef CONFIG_LED_TRIGGER_PHY 702 struct phy_led_trigger *phy_led_triggers; 703 unsigned int phy_num_led_triggers; 704 struct phy_led_trigger *last_triggered; 705 706 struct phy_led_trigger *led_link_trigger; 707 #endif 708 struct list_head leds; 709 710 /* 711 * Interrupt number for this PHY 712 * -1 means no interrupt 713 */ 714 int irq; 715 716 /* private data pointer */ 717 /* For use by PHYs to maintain extra state */ 718 void *priv; 719 720 /* shared data pointer */ 721 /* For use by PHYs inside the same package that need a shared state. */ 722 struct phy_package_shared *shared; 723 724 /* Reporting cable test results */ 725 struct sk_buff *skb; 726 void *ehdr; 727 struct nlattr *nest; 728 729 /* Interrupt and Polling infrastructure */ 730 struct delayed_work state_queue; 731 732 struct mutex lock; 733 734 /* This may be modified under the rtnl lock */ 735 bool sfp_bus_attached; 736 struct sfp_bus *sfp_bus; 737 struct phylink *phylink; 738 struct net_device *attached_dev; 739 struct mii_timestamper *mii_ts; 740 struct pse_control *psec; 741 742 u8 mdix; 743 u8 mdix_ctrl; 744 745 int pma_extable; 746 747 unsigned int link_down_events; 748 749 void (*phy_link_change)(struct phy_device *phydev, bool up); 750 void (*adjust_link)(struct net_device *dev); 751 752 #if IS_ENABLED(CONFIG_MACSEC) 753 /* MACsec management functions */ 754 const struct macsec_ops *macsec_ops; 755 #endif 756 }; 757 758 /* Generic phy_device::dev_flags */ 759 #define PHY_F_NO_IRQ 0x80000000 760 761 static inline struct phy_device *to_phy_device(const struct device *dev) 762 { 763 return container_of(to_mdio_device(dev), struct phy_device, mdio); 764 } 765 766 /** 767 * struct phy_tdr_config - Configuration of a TDR raw test 768 * 769 * @first: Distance for first data collection point 770 * @last: Distance for last data collection point 771 * @step: Step between data collection points 772 * @pair: Bitmap of cable pairs to collect data for 773 * 774 * A structure containing possible configuration parameters 775 * for a TDR cable test. The driver does not need to implement 776 * all the parameters, but should report what is actually used. 777 * All distances are in centimeters. 778 */ 779 struct phy_tdr_config { 780 u32 first; 781 u32 last; 782 u32 step; 783 s8 pair; 784 }; 785 #define PHY_PAIR_ALL -1 786 787 /** 788 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 789 * Avoidance) Reconciliation Sublayer. 790 * 791 * @version: read-only PLCA register map version. -1 = not available. Ignored 792 * when setting the configuration. Format is the same as reported by the PLCA 793 * IDVER register (31.CA00). -1 = not available. 794 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 795 * set. 0 = disabled, anything else = enabled. 796 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 797 * Allowed values [0 .. 254]. 255 = node disabled. 798 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 799 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 800 * set. Allowed values [1 .. 255]. 801 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 802 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 803 * more details. The to_timer shall be set equal over all nodes. 804 * -1 = not available / don't set. Allowed values [0 .. 255]. 805 * @burst_cnt: controls how many additional frames a node is allowed to send in 806 * single transmit opportunity (TO). The default value of 0 means that the 807 * node is allowed exactly one frame per TO. A value of 1 allows two frames 808 * per TO, and so on. -1 = not available / don't set. 809 * Allowed values [0 .. 255]. 810 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 811 * frame before interrupting the burst. This value should be set to a value 812 * greater than the MAC inter-packet gap (which is typically 96 bits). 813 * -1 = not available / don't set. Allowed values [0 .. 255]. 814 * 815 * A structure containing configuration parameters for setting/getting the PLCA 816 * RS configuration. The driver does not need to implement all the parameters, 817 * but should report what is actually used. 818 */ 819 struct phy_plca_cfg { 820 int version; 821 int enabled; 822 int node_id; 823 int node_cnt; 824 int to_tmr; 825 int burst_cnt; 826 int burst_tmr; 827 }; 828 829 /** 830 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 831 * Avoidance) Reconciliation Sublayer. 832 * 833 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 834 * register(31.CA03), indicating BEACON activity. 835 * 836 * A structure containing status information of the PLCA RS configuration. 837 * The driver does not need to implement all the parameters, but should report 838 * what is actually used. 839 */ 840 struct phy_plca_status { 841 bool pst; 842 }; 843 844 /** 845 * struct phy_led: An LED driven by the PHY 846 * 847 * @list: List of LEDs 848 * @phydev: PHY this LED is attached to 849 * @led_cdev: Standard LED class structure 850 * @index: Number of the LED 851 */ 852 struct phy_led { 853 struct list_head list; 854 struct phy_device *phydev; 855 struct led_classdev led_cdev; 856 u8 index; 857 }; 858 859 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev) 860 861 /** 862 * struct phy_driver - Driver structure for a particular PHY type 863 * 864 * @mdiodrv: Data common to all MDIO devices 865 * @phy_id: The result of reading the UID registers of this PHY 866 * type, and ANDing them with the phy_id_mask. This driver 867 * only works for PHYs with IDs which match this field 868 * @name: The friendly name of this PHY type 869 * @phy_id_mask: Defines the important bits of the phy_id 870 * @features: A mandatory list of features (speed, duplex, etc) 871 * supported by this PHY 872 * @flags: A bitfield defining certain other features this PHY 873 * supports (like interrupts) 874 * @driver_data: Static driver data 875 * 876 * All functions are optional. If config_aneg or read_status 877 * are not implemented, the phy core uses the genphy versions. 878 * Note that none of these functions should be called from 879 * interrupt time. The goal is for the bus read/write functions 880 * to be able to block when the bus transaction is happening, 881 * and be freed up by an interrupt (The MPC85xx has this ability, 882 * though it is not currently supported in the driver). 883 */ 884 struct phy_driver { 885 struct mdio_driver_common mdiodrv; 886 u32 phy_id; 887 char *name; 888 u32 phy_id_mask; 889 const unsigned long * const features; 890 u32 flags; 891 const void *driver_data; 892 893 /** 894 * @soft_reset: Called to issue a PHY software reset 895 */ 896 int (*soft_reset)(struct phy_device *phydev); 897 898 /** 899 * @config_init: Called to initialize the PHY, 900 * including after a reset 901 */ 902 int (*config_init)(struct phy_device *phydev); 903 904 /** 905 * @probe: Called during discovery. Used to set 906 * up device-specific structures, if any 907 */ 908 int (*probe)(struct phy_device *phydev); 909 910 /** 911 * @get_features: Probe the hardware to determine what 912 * abilities it has. Should only set phydev->supported. 913 */ 914 int (*get_features)(struct phy_device *phydev); 915 916 /** 917 * @get_rate_matching: Get the supported type of rate matching for a 918 * particular phy interface. This is used by phy consumers to determine 919 * whether to advertise lower-speed modes for that interface. It is 920 * assumed that if a rate matching mode is supported on an interface, 921 * then that interface's rate can be adapted to all slower link speeds 922 * supported by the phy. If the interface is not supported, this should 923 * return %RATE_MATCH_NONE. 924 */ 925 int (*get_rate_matching)(struct phy_device *phydev, 926 phy_interface_t iface); 927 928 /* PHY Power Management */ 929 /** @suspend: Suspend the hardware, saving state if needed */ 930 int (*suspend)(struct phy_device *phydev); 931 /** @resume: Resume the hardware, restoring state if needed */ 932 int (*resume)(struct phy_device *phydev); 933 934 /** 935 * @config_aneg: Configures the advertisement and resets 936 * autonegotiation if phydev->autoneg is on, 937 * forces the speed to the current settings in phydev 938 * if phydev->autoneg is off 939 */ 940 int (*config_aneg)(struct phy_device *phydev); 941 942 /** @aneg_done: Determines the auto negotiation result */ 943 int (*aneg_done)(struct phy_device *phydev); 944 945 /** @read_status: Determines the negotiated speed and duplex */ 946 int (*read_status)(struct phy_device *phydev); 947 948 /** 949 * @config_intr: Enables or disables interrupts. 950 * It should also clear any pending interrupts prior to enabling the 951 * IRQs and after disabling them. 952 */ 953 int (*config_intr)(struct phy_device *phydev); 954 955 /** @handle_interrupt: Override default interrupt handling */ 956 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 957 958 /** @remove: Clears up any memory if needed */ 959 void (*remove)(struct phy_device *phydev); 960 961 /** 962 * @match_phy_device: Returns true if this is a suitable 963 * driver for the given phydev. If NULL, matching is based on 964 * phy_id and phy_id_mask. 965 */ 966 int (*match_phy_device)(struct phy_device *phydev); 967 968 /** 969 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 970 * register changes to enable Wake on LAN, so set_wol is 971 * provided to be called in the ethernet driver's set_wol 972 * function. 973 */ 974 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 975 976 /** 977 * @get_wol: See set_wol, but for checking whether Wake on LAN 978 * is enabled. 979 */ 980 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 981 982 /** 983 * @link_change_notify: Called to inform a PHY device driver 984 * when the core is about to change the link state. This 985 * callback is supposed to be used as fixup hook for drivers 986 * that need to take action when the link state 987 * changes. Drivers are by no means allowed to mess with the 988 * PHY device structure in their implementations. 989 */ 990 void (*link_change_notify)(struct phy_device *dev); 991 992 /** 993 * @read_mmd: PHY specific driver override for reading a MMD 994 * register. This function is optional for PHY specific 995 * drivers. When not provided, the default MMD read function 996 * will be used by phy_read_mmd(), which will use either a 997 * direct read for Clause 45 PHYs or an indirect read for 998 * Clause 22 PHYs. devnum is the MMD device number within the 999 * PHY device, regnum is the register within the selected MMD 1000 * device. 1001 */ 1002 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 1003 1004 /** 1005 * @write_mmd: PHY specific driver override for writing a MMD 1006 * register. This function is optional for PHY specific 1007 * drivers. When not provided, the default MMD write function 1008 * will be used by phy_write_mmd(), which will use either a 1009 * direct write for Clause 45 PHYs, or an indirect write for 1010 * Clause 22 PHYs. devnum is the MMD device number within the 1011 * PHY device, regnum is the register within the selected MMD 1012 * device. val is the value to be written. 1013 */ 1014 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 1015 u16 val); 1016 1017 /** @read_page: Return the current PHY register page number */ 1018 int (*read_page)(struct phy_device *dev); 1019 /** @write_page: Set the current PHY register page number */ 1020 int (*write_page)(struct phy_device *dev, int page); 1021 1022 /** 1023 * @module_info: Get the size and type of the eeprom contained 1024 * within a plug-in module 1025 */ 1026 int (*module_info)(struct phy_device *dev, 1027 struct ethtool_modinfo *modinfo); 1028 1029 /** 1030 * @module_eeprom: Get the eeprom information from the plug-in 1031 * module 1032 */ 1033 int (*module_eeprom)(struct phy_device *dev, 1034 struct ethtool_eeprom *ee, u8 *data); 1035 1036 /** @cable_test_start: Start a cable test */ 1037 int (*cable_test_start)(struct phy_device *dev); 1038 1039 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1040 int (*cable_test_tdr_start)(struct phy_device *dev, 1041 const struct phy_tdr_config *config); 1042 1043 /** 1044 * @cable_test_get_status: Once per second, or on interrupt, 1045 * request the status of the test. 1046 */ 1047 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1048 1049 /* Get statistics from the PHY using ethtool */ 1050 /** @get_sset_count: Number of statistic counters */ 1051 int (*get_sset_count)(struct phy_device *dev); 1052 /** @get_strings: Names of the statistic counters */ 1053 void (*get_strings)(struct phy_device *dev, u8 *data); 1054 /** @get_stats: Return the statistic counter values */ 1055 void (*get_stats)(struct phy_device *dev, 1056 struct ethtool_stats *stats, u64 *data); 1057 1058 /* Get and Set PHY tunables */ 1059 /** @get_tunable: Return the value of a tunable */ 1060 int (*get_tunable)(struct phy_device *dev, 1061 struct ethtool_tunable *tuna, void *data); 1062 /** @set_tunable: Set the value of a tunable */ 1063 int (*set_tunable)(struct phy_device *dev, 1064 struct ethtool_tunable *tuna, 1065 const void *data); 1066 /** @set_loopback: Set the loopback mood of the PHY */ 1067 int (*set_loopback)(struct phy_device *dev, bool enable); 1068 /** @get_sqi: Get the signal quality indication */ 1069 int (*get_sqi)(struct phy_device *dev); 1070 /** @get_sqi_max: Get the maximum signal quality indication */ 1071 int (*get_sqi_max)(struct phy_device *dev); 1072 1073 /* PLCA RS interface */ 1074 /** @get_plca_cfg: Return the current PLCA configuration */ 1075 int (*get_plca_cfg)(struct phy_device *dev, 1076 struct phy_plca_cfg *plca_cfg); 1077 /** @set_plca_cfg: Set the PLCA configuration */ 1078 int (*set_plca_cfg)(struct phy_device *dev, 1079 const struct phy_plca_cfg *plca_cfg); 1080 /** @get_plca_status: Return the current PLCA status info */ 1081 int (*get_plca_status)(struct phy_device *dev, 1082 struct phy_plca_status *plca_st); 1083 1084 /** 1085 * @led_brightness_set: Set a PHY LED brightness. Index 1086 * indicates which of the PHYs led should be set. Value 1087 * follows the standard LED class meaning, e.g. LED_OFF, 1088 * LED_HALF, LED_FULL. 1089 */ 1090 int (*led_brightness_set)(struct phy_device *dev, 1091 u8 index, enum led_brightness value); 1092 1093 /** 1094 * @led_blink_set: Set a PHY LED brightness. Index indicates 1095 * which of the PHYs led should be configured to blink. Delays 1096 * are in milliseconds and if both are zero then a sensible 1097 * default should be chosen. The call should adjust the 1098 * timings in that case and if it can't match the values 1099 * specified exactly. 1100 */ 1101 int (*led_blink_set)(struct phy_device *dev, u8 index, 1102 unsigned long *delay_on, 1103 unsigned long *delay_off); 1104 }; 1105 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 1106 struct phy_driver, mdiodrv) 1107 1108 #define PHY_ANY_ID "MATCH ANY PHY" 1109 #define PHY_ANY_UID 0xffffffff 1110 1111 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 1112 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 1113 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 1114 1115 /* A Structure for boards to register fixups with the PHY Lib */ 1116 struct phy_fixup { 1117 struct list_head list; 1118 char bus_id[MII_BUS_ID_SIZE + 3]; 1119 u32 phy_uid; 1120 u32 phy_uid_mask; 1121 int (*run)(struct phy_device *phydev); 1122 }; 1123 1124 const char *phy_speed_to_str(int speed); 1125 const char *phy_duplex_to_str(unsigned int duplex); 1126 const char *phy_rate_matching_to_str(int rate_matching); 1127 1128 int phy_interface_num_ports(phy_interface_t interface); 1129 1130 /* A structure for mapping a particular speed and duplex 1131 * combination to a particular SUPPORTED and ADVERTISED value 1132 */ 1133 struct phy_setting { 1134 u32 speed; 1135 u8 duplex; 1136 u8 bit; 1137 }; 1138 1139 const struct phy_setting * 1140 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 1141 bool exact); 1142 size_t phy_speeds(unsigned int *speeds, size_t size, 1143 unsigned long *mask); 1144 void of_set_phy_supported(struct phy_device *phydev); 1145 void of_set_phy_eee_broken(struct phy_device *phydev); 1146 int phy_speed_down_core(struct phy_device *phydev); 1147 1148 /** 1149 * phy_is_started - Convenience function to check whether PHY is started 1150 * @phydev: The phy_device struct 1151 */ 1152 static inline bool phy_is_started(struct phy_device *phydev) 1153 { 1154 return phydev->state >= PHY_UP; 1155 } 1156 1157 void phy_resolve_aneg_pause(struct phy_device *phydev); 1158 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1159 void phy_check_downshift(struct phy_device *phydev); 1160 1161 /** 1162 * phy_read - Convenience function for reading a given PHY register 1163 * @phydev: the phy_device struct 1164 * @regnum: register number to read 1165 * 1166 * NOTE: MUST NOT be called from interrupt context, 1167 * because the bus read/write functions may wait for an interrupt 1168 * to conclude the operation. 1169 */ 1170 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1171 { 1172 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1173 } 1174 1175 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1176 timeout_us, sleep_before_read) \ 1177 ({ \ 1178 int __ret = read_poll_timeout(phy_read, val, val < 0 || (cond), \ 1179 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1180 if (val < 0) \ 1181 __ret = val; \ 1182 if (__ret) \ 1183 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1184 __ret; \ 1185 }) 1186 1187 /** 1188 * __phy_read - convenience function for reading a given PHY register 1189 * @phydev: the phy_device struct 1190 * @regnum: register number to read 1191 * 1192 * The caller must have taken the MDIO bus lock. 1193 */ 1194 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1195 { 1196 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1197 } 1198 1199 /** 1200 * phy_write - Convenience function for writing a given PHY register 1201 * @phydev: the phy_device struct 1202 * @regnum: register number to write 1203 * @val: value to write to @regnum 1204 * 1205 * NOTE: MUST NOT be called from interrupt context, 1206 * because the bus read/write functions may wait for an interrupt 1207 * to conclude the operation. 1208 */ 1209 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1210 { 1211 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1212 } 1213 1214 /** 1215 * __phy_write - Convenience function for writing a given PHY register 1216 * @phydev: the phy_device struct 1217 * @regnum: register number to write 1218 * @val: value to write to @regnum 1219 * 1220 * The caller must have taken the MDIO bus lock. 1221 */ 1222 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1223 { 1224 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1225 val); 1226 } 1227 1228 /** 1229 * __phy_modify_changed() - Convenience function for modifying a PHY register 1230 * @phydev: a pointer to a &struct phy_device 1231 * @regnum: register number 1232 * @mask: bit mask of bits to clear 1233 * @set: bit mask of bits to set 1234 * 1235 * Unlocked helper function which allows a PHY register to be modified as 1236 * new register value = (old register value & ~mask) | set 1237 * 1238 * Returns negative errno, 0 if there was no change, and 1 in case of change 1239 */ 1240 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1241 u16 mask, u16 set) 1242 { 1243 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1244 regnum, mask, set); 1245 } 1246 1247 /* 1248 * phy_read_mmd - Convenience function for reading a register 1249 * from an MMD on a given PHY. 1250 */ 1251 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1252 1253 /** 1254 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1255 * condition is met or a timeout occurs 1256 * 1257 * @phydev: The phy_device struct 1258 * @devaddr: The MMD to read from 1259 * @regnum: The register on the MMD to read 1260 * @val: Variable to read the register into 1261 * @cond: Break condition (usually involving @val) 1262 * @sleep_us: Maximum time to sleep between reads in us (0 1263 * tight-loops). Should be less than ~20ms since usleep_range 1264 * is used (see Documentation/timers/timers-howto.rst). 1265 * @timeout_us: Timeout in us, 0 means never timeout 1266 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1267 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either 1268 * case, the last read value at @args is stored in @val. Must not 1269 * be called from atomic context if sleep_us or timeout_us are used. 1270 */ 1271 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1272 sleep_us, timeout_us, sleep_before_read) \ 1273 ({ \ 1274 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \ 1275 sleep_us, timeout_us, sleep_before_read, \ 1276 phydev, devaddr, regnum); \ 1277 if (val < 0) \ 1278 __ret = val; \ 1279 if (__ret) \ 1280 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1281 __ret; \ 1282 }) 1283 1284 /* 1285 * __phy_read_mmd - Convenience function for reading a register 1286 * from an MMD on a given PHY. 1287 */ 1288 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1289 1290 /* 1291 * phy_write_mmd - Convenience function for writing a register 1292 * on an MMD on a given PHY. 1293 */ 1294 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1295 1296 /* 1297 * __phy_write_mmd - Convenience function for writing a register 1298 * on an MMD on a given PHY. 1299 */ 1300 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1301 1302 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1303 u16 set); 1304 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1305 u16 set); 1306 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1307 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1308 1309 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1310 u16 mask, u16 set); 1311 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1312 u16 mask, u16 set); 1313 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1314 u16 mask, u16 set); 1315 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1316 u16 mask, u16 set); 1317 1318 /** 1319 * __phy_set_bits - Convenience function for setting bits in a PHY register 1320 * @phydev: the phy_device struct 1321 * @regnum: register number to write 1322 * @val: bits to set 1323 * 1324 * The caller must have taken the MDIO bus lock. 1325 */ 1326 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1327 { 1328 return __phy_modify(phydev, regnum, 0, val); 1329 } 1330 1331 /** 1332 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1333 * @phydev: the phy_device struct 1334 * @regnum: register number to write 1335 * @val: bits to clear 1336 * 1337 * The caller must have taken the MDIO bus lock. 1338 */ 1339 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1340 u16 val) 1341 { 1342 return __phy_modify(phydev, regnum, val, 0); 1343 } 1344 1345 /** 1346 * phy_set_bits - Convenience function for setting bits in a PHY register 1347 * @phydev: the phy_device struct 1348 * @regnum: register number to write 1349 * @val: bits to set 1350 */ 1351 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1352 { 1353 return phy_modify(phydev, regnum, 0, val); 1354 } 1355 1356 /** 1357 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1358 * @phydev: the phy_device struct 1359 * @regnum: register number to write 1360 * @val: bits to clear 1361 */ 1362 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1363 { 1364 return phy_modify(phydev, regnum, val, 0); 1365 } 1366 1367 /** 1368 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1369 * on MMD 1370 * @phydev: the phy_device struct 1371 * @devad: the MMD containing register to modify 1372 * @regnum: register number to modify 1373 * @val: bits to set 1374 * 1375 * The caller must have taken the MDIO bus lock. 1376 */ 1377 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1378 u32 regnum, u16 val) 1379 { 1380 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1381 } 1382 1383 /** 1384 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1385 * on MMD 1386 * @phydev: the phy_device struct 1387 * @devad: the MMD containing register to modify 1388 * @regnum: register number to modify 1389 * @val: bits to clear 1390 * 1391 * The caller must have taken the MDIO bus lock. 1392 */ 1393 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1394 u32 regnum, u16 val) 1395 { 1396 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1397 } 1398 1399 /** 1400 * phy_set_bits_mmd - Convenience function for setting bits in a register 1401 * on MMD 1402 * @phydev: the phy_device struct 1403 * @devad: the MMD containing register to modify 1404 * @regnum: register number to modify 1405 * @val: bits to set 1406 */ 1407 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1408 u32 regnum, u16 val) 1409 { 1410 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1411 } 1412 1413 /** 1414 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1415 * on MMD 1416 * @phydev: the phy_device struct 1417 * @devad: the MMD containing register to modify 1418 * @regnum: register number to modify 1419 * @val: bits to clear 1420 */ 1421 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1422 u32 regnum, u16 val) 1423 { 1424 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1425 } 1426 1427 /** 1428 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1429 * @phydev: the phy_device struct 1430 * 1431 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1432 * PHY_MAC_INTERRUPT 1433 */ 1434 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1435 { 1436 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1437 } 1438 1439 /** 1440 * phy_polling_mode - Convenience function for testing whether polling is 1441 * used to detect PHY status changes 1442 * @phydev: the phy_device struct 1443 */ 1444 static inline bool phy_polling_mode(struct phy_device *phydev) 1445 { 1446 if (phydev->state == PHY_CABLETEST) 1447 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1448 return true; 1449 1450 return phydev->irq == PHY_POLL; 1451 } 1452 1453 /** 1454 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1455 * @phydev: the phy_device struct 1456 */ 1457 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1458 { 1459 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1460 } 1461 1462 /** 1463 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1464 * @phydev: the phy_device struct 1465 */ 1466 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1467 { 1468 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1469 } 1470 1471 /** 1472 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1473 * PTP hardware clock capabilities. 1474 * @phydev: the phy_device struct 1475 */ 1476 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1477 { 1478 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1479 } 1480 1481 /** 1482 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1483 * @phydev: the phy_device struct 1484 */ 1485 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1486 { 1487 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1488 } 1489 1490 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) 1491 { 1492 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); 1493 } 1494 1495 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1496 int type) 1497 { 1498 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1499 } 1500 1501 static inline int phy_ts_info(struct phy_device *phydev, 1502 struct ethtool_ts_info *tsinfo) 1503 { 1504 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1505 } 1506 1507 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1508 int type) 1509 { 1510 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1511 } 1512 1513 /** 1514 * phy_is_internal - Convenience function for testing if a PHY is internal 1515 * @phydev: the phy_device struct 1516 */ 1517 static inline bool phy_is_internal(struct phy_device *phydev) 1518 { 1519 return phydev->is_internal; 1520 } 1521 1522 /** 1523 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1524 * @phydev: the phy_device struct 1525 */ 1526 static inline bool phy_on_sfp(struct phy_device *phydev) 1527 { 1528 return phydev->is_on_sfp_module; 1529 } 1530 1531 /** 1532 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1533 * PHY interface mode is RGMII (all variants) 1534 * @mode: the &phy_interface_t enum 1535 */ 1536 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1537 { 1538 return mode >= PHY_INTERFACE_MODE_RGMII && 1539 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1540 }; 1541 1542 /** 1543 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1544 * negotiation 1545 * @mode: one of &enum phy_interface_t 1546 * 1547 * Returns true if the PHY interface mode uses the 16-bit negotiation 1548 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1549 */ 1550 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1551 { 1552 return mode == PHY_INTERFACE_MODE_1000BASEX || 1553 mode == PHY_INTERFACE_MODE_2500BASEX; 1554 } 1555 1556 /** 1557 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1558 * is RGMII (all variants) 1559 * @phydev: the phy_device struct 1560 */ 1561 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1562 { 1563 return phy_interface_mode_is_rgmii(phydev->interface); 1564 }; 1565 1566 /** 1567 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1568 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1569 * @phydev: the phy_device struct 1570 */ 1571 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1572 { 1573 return phydev->is_pseudo_fixed_link; 1574 } 1575 1576 int phy_save_page(struct phy_device *phydev); 1577 int phy_select_page(struct phy_device *phydev, int page); 1578 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1579 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1580 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1581 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1582 u16 mask, u16 set); 1583 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1584 u16 mask, u16 set); 1585 1586 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1587 bool is_c45, 1588 struct phy_c45_device_ids *c45_ids); 1589 #if IS_ENABLED(CONFIG_PHYLIB) 1590 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1591 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1592 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1593 struct phy_device *device_phy_find_device(struct device *dev); 1594 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode); 1595 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1596 int phy_device_register(struct phy_device *phy); 1597 void phy_device_free(struct phy_device *phydev); 1598 #else 1599 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1600 { 1601 return 0; 1602 } 1603 static inline 1604 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1605 { 1606 return 0; 1607 } 1608 1609 static inline 1610 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1611 { 1612 return NULL; 1613 } 1614 1615 static inline struct phy_device *device_phy_find_device(struct device *dev) 1616 { 1617 return NULL; 1618 } 1619 1620 static inline 1621 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1622 { 1623 return NULL; 1624 } 1625 1626 static inline 1627 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1628 { 1629 return NULL; 1630 } 1631 1632 static inline int phy_device_register(struct phy_device *phy) 1633 { 1634 return 0; 1635 } 1636 1637 static inline void phy_device_free(struct phy_device *phydev) { } 1638 #endif /* CONFIG_PHYLIB */ 1639 void phy_device_remove(struct phy_device *phydev); 1640 int phy_get_c45_ids(struct phy_device *phydev); 1641 int phy_init_hw(struct phy_device *phydev); 1642 int phy_suspend(struct phy_device *phydev); 1643 int phy_resume(struct phy_device *phydev); 1644 int __phy_resume(struct phy_device *phydev); 1645 int phy_loopback(struct phy_device *phydev, bool enable); 1646 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1647 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1648 int phy_sfp_probe(struct phy_device *phydev, 1649 const struct sfp_upstream_ops *ops); 1650 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1651 phy_interface_t interface); 1652 struct phy_device *phy_find_first(struct mii_bus *bus); 1653 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1654 u32 flags, phy_interface_t interface); 1655 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1656 void (*handler)(struct net_device *), 1657 phy_interface_t interface); 1658 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1659 void (*handler)(struct net_device *), 1660 phy_interface_t interface); 1661 void phy_disconnect(struct phy_device *phydev); 1662 void phy_detach(struct phy_device *phydev); 1663 void phy_start(struct phy_device *phydev); 1664 void phy_stop(struct phy_device *phydev); 1665 int phy_config_aneg(struct phy_device *phydev); 1666 int phy_start_aneg(struct phy_device *phydev); 1667 int phy_aneg_done(struct phy_device *phydev); 1668 int phy_speed_down(struct phy_device *phydev, bool sync); 1669 int phy_speed_up(struct phy_device *phydev); 1670 bool phy_check_valid(int speed, int duplex, unsigned long *features); 1671 1672 int phy_restart_aneg(struct phy_device *phydev); 1673 int phy_reset_after_clk_enable(struct phy_device *phydev); 1674 1675 #if IS_ENABLED(CONFIG_PHYLIB) 1676 int phy_start_cable_test(struct phy_device *phydev, 1677 struct netlink_ext_ack *extack); 1678 int phy_start_cable_test_tdr(struct phy_device *phydev, 1679 struct netlink_ext_ack *extack, 1680 const struct phy_tdr_config *config); 1681 #else 1682 static inline 1683 int phy_start_cable_test(struct phy_device *phydev, 1684 struct netlink_ext_ack *extack) 1685 { 1686 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1687 return -EOPNOTSUPP; 1688 } 1689 static inline 1690 int phy_start_cable_test_tdr(struct phy_device *phydev, 1691 struct netlink_ext_ack *extack, 1692 const struct phy_tdr_config *config) 1693 { 1694 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1695 return -EOPNOTSUPP; 1696 } 1697 #endif 1698 1699 int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result); 1700 int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair, 1701 u16 cm); 1702 1703 static inline void phy_device_reset(struct phy_device *phydev, int value) 1704 { 1705 mdio_device_reset(&phydev->mdio, value); 1706 } 1707 1708 #define phydev_err(_phydev, format, args...) \ 1709 dev_err(&_phydev->mdio.dev, format, ##args) 1710 1711 #define phydev_err_probe(_phydev, err, format, args...) \ 1712 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1713 1714 #define phydev_info(_phydev, format, args...) \ 1715 dev_info(&_phydev->mdio.dev, format, ##args) 1716 1717 #define phydev_warn(_phydev, format, args...) \ 1718 dev_warn(&_phydev->mdio.dev, format, ##args) 1719 1720 #define phydev_dbg(_phydev, format, args...) \ 1721 dev_dbg(&_phydev->mdio.dev, format, ##args) 1722 1723 static inline const char *phydev_name(const struct phy_device *phydev) 1724 { 1725 return dev_name(&phydev->mdio.dev); 1726 } 1727 1728 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1729 { 1730 mutex_lock(&phydev->mdio.bus->mdio_lock); 1731 } 1732 1733 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1734 { 1735 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1736 } 1737 1738 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1739 __printf(2, 3); 1740 char *phy_attached_info_irq(struct phy_device *phydev) 1741 __malloc; 1742 void phy_attached_info(struct phy_device *phydev); 1743 1744 /* Clause 22 PHY */ 1745 int genphy_read_abilities(struct phy_device *phydev); 1746 int genphy_setup_forced(struct phy_device *phydev); 1747 int genphy_restart_aneg(struct phy_device *phydev); 1748 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1749 int genphy_config_eee_advert(struct phy_device *phydev); 1750 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1751 int genphy_aneg_done(struct phy_device *phydev); 1752 int genphy_update_link(struct phy_device *phydev); 1753 int genphy_read_lpa(struct phy_device *phydev); 1754 int genphy_read_status_fixed(struct phy_device *phydev); 1755 int genphy_read_status(struct phy_device *phydev); 1756 int genphy_read_master_slave(struct phy_device *phydev); 1757 int genphy_suspend(struct phy_device *phydev); 1758 int genphy_resume(struct phy_device *phydev); 1759 int genphy_loopback(struct phy_device *phydev, bool enable); 1760 int genphy_soft_reset(struct phy_device *phydev); 1761 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1762 1763 static inline int genphy_config_aneg(struct phy_device *phydev) 1764 { 1765 return __genphy_config_aneg(phydev, false); 1766 } 1767 1768 static inline int genphy_no_config_intr(struct phy_device *phydev) 1769 { 1770 return 0; 1771 } 1772 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1773 u16 regnum); 1774 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1775 u16 regnum, u16 val); 1776 1777 /* Clause 37 */ 1778 int genphy_c37_config_aneg(struct phy_device *phydev); 1779 int genphy_c37_read_status(struct phy_device *phydev); 1780 1781 /* Clause 45 PHY */ 1782 int genphy_c45_restart_aneg(struct phy_device *phydev); 1783 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1784 int genphy_c45_aneg_done(struct phy_device *phydev); 1785 int genphy_c45_read_link(struct phy_device *phydev); 1786 int genphy_c45_read_lpa(struct phy_device *phydev); 1787 int genphy_c45_read_pma(struct phy_device *phydev); 1788 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1789 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 1790 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1791 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1792 int genphy_c45_read_mdix(struct phy_device *phydev); 1793 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1794 int genphy_c45_read_eee_abilities(struct phy_device *phydev); 1795 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 1796 int genphy_c45_read_status(struct phy_device *phydev); 1797 int genphy_c45_baset1_read_status(struct phy_device *phydev); 1798 int genphy_c45_config_aneg(struct phy_device *phydev); 1799 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1800 int genphy_c45_pma_resume(struct phy_device *phydev); 1801 int genphy_c45_pma_suspend(struct phy_device *phydev); 1802 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 1803 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 1804 struct phy_plca_cfg *plca_cfg); 1805 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 1806 const struct phy_plca_cfg *plca_cfg); 1807 int genphy_c45_plca_get_status(struct phy_device *phydev, 1808 struct phy_plca_status *plca_st); 1809 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv, 1810 unsigned long *lp, bool *is_enabled); 1811 int genphy_c45_ethtool_get_eee(struct phy_device *phydev, 1812 struct ethtool_eee *data); 1813 int genphy_c45_ethtool_set_eee(struct phy_device *phydev, 1814 struct ethtool_eee *data); 1815 int genphy_c45_write_eee_adv(struct phy_device *phydev, unsigned long *adv); 1816 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev); 1817 int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv); 1818 1819 /* Generic C45 PHY driver */ 1820 extern struct phy_driver genphy_c45_driver; 1821 1822 /* The gen10g_* functions are the old Clause 45 stub */ 1823 int gen10g_config_aneg(struct phy_device *phydev); 1824 1825 static inline int phy_read_status(struct phy_device *phydev) 1826 { 1827 if (!phydev->drv) 1828 return -EIO; 1829 1830 if (phydev->drv->read_status) 1831 return phydev->drv->read_status(phydev); 1832 else 1833 return genphy_read_status(phydev); 1834 } 1835 1836 void phy_driver_unregister(struct phy_driver *drv); 1837 void phy_drivers_unregister(struct phy_driver *drv, int n); 1838 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1839 int phy_drivers_register(struct phy_driver *new_driver, int n, 1840 struct module *owner); 1841 void phy_error(struct phy_device *phydev); 1842 void phy_state_machine(struct work_struct *work); 1843 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1844 void phy_trigger_machine(struct phy_device *phydev); 1845 void phy_mac_interrupt(struct phy_device *phydev); 1846 void phy_start_machine(struct phy_device *phydev); 1847 void phy_stop_machine(struct phy_device *phydev); 1848 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1849 struct ethtool_link_ksettings *cmd); 1850 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1851 const struct ethtool_link_ksettings *cmd); 1852 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1853 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1854 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1855 int phy_disable_interrupts(struct phy_device *phydev); 1856 void phy_request_interrupt(struct phy_device *phydev); 1857 void phy_free_interrupt(struct phy_device *phydev); 1858 void phy_print_status(struct phy_device *phydev); 1859 int phy_get_rate_matching(struct phy_device *phydev, 1860 phy_interface_t iface); 1861 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1862 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1863 void phy_advertise_supported(struct phy_device *phydev); 1864 void phy_support_sym_pause(struct phy_device *phydev); 1865 void phy_support_asym_pause(struct phy_device *phydev); 1866 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1867 bool autoneg); 1868 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1869 bool phy_validate_pause(struct phy_device *phydev, 1870 struct ethtool_pauseparam *pp); 1871 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1872 1873 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 1874 const int *delay_values, int size, bool is_rx); 1875 1876 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1877 bool *tx_pause, bool *rx_pause); 1878 1879 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1880 int (*run)(struct phy_device *)); 1881 int phy_register_fixup_for_id(const char *bus_id, 1882 int (*run)(struct phy_device *)); 1883 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1884 int (*run)(struct phy_device *)); 1885 1886 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1887 int phy_unregister_fixup_for_id(const char *bus_id); 1888 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1889 1890 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1891 int phy_get_eee_err(struct phy_device *phydev); 1892 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1893 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1894 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1895 void phy_ethtool_get_wol(struct phy_device *phydev, 1896 struct ethtool_wolinfo *wol); 1897 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1898 struct ethtool_link_ksettings *cmd); 1899 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1900 const struct ethtool_link_ksettings *cmd); 1901 int phy_ethtool_nway_reset(struct net_device *ndev); 1902 int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size); 1903 void phy_package_leave(struct phy_device *phydev); 1904 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 1905 int addr, size_t priv_size); 1906 1907 #if IS_ENABLED(CONFIG_PHYLIB) 1908 int __init mdio_bus_init(void); 1909 void mdio_bus_exit(void); 1910 #endif 1911 1912 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 1913 int phy_ethtool_get_sset_count(struct phy_device *phydev); 1914 int phy_ethtool_get_stats(struct phy_device *phydev, 1915 struct ethtool_stats *stats, u64 *data); 1916 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 1917 struct phy_plca_cfg *plca_cfg); 1918 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 1919 const struct phy_plca_cfg *plca_cfg, 1920 struct netlink_ext_ack *extack); 1921 int phy_ethtool_get_plca_status(struct phy_device *phydev, 1922 struct phy_plca_status *plca_st); 1923 1924 static inline int phy_package_read(struct phy_device *phydev, u32 regnum) 1925 { 1926 struct phy_package_shared *shared = phydev->shared; 1927 1928 if (!shared) 1929 return -EIO; 1930 1931 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1932 } 1933 1934 static inline int __phy_package_read(struct phy_device *phydev, u32 regnum) 1935 { 1936 struct phy_package_shared *shared = phydev->shared; 1937 1938 if (!shared) 1939 return -EIO; 1940 1941 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1942 } 1943 1944 static inline int phy_package_write(struct phy_device *phydev, 1945 u32 regnum, u16 val) 1946 { 1947 struct phy_package_shared *shared = phydev->shared; 1948 1949 if (!shared) 1950 return -EIO; 1951 1952 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1953 } 1954 1955 static inline int __phy_package_write(struct phy_device *phydev, 1956 u32 regnum, u16 val) 1957 { 1958 struct phy_package_shared *shared = phydev->shared; 1959 1960 if (!shared) 1961 return -EIO; 1962 1963 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1964 } 1965 1966 static inline bool __phy_package_set_once(struct phy_device *phydev, 1967 unsigned int b) 1968 { 1969 struct phy_package_shared *shared = phydev->shared; 1970 1971 if (!shared) 1972 return false; 1973 1974 return !test_and_set_bit(b, &shared->flags); 1975 } 1976 1977 static inline bool phy_package_init_once(struct phy_device *phydev) 1978 { 1979 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 1980 } 1981 1982 static inline bool phy_package_probe_once(struct phy_device *phydev) 1983 { 1984 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 1985 } 1986 1987 extern struct bus_type mdio_bus_type; 1988 1989 struct mdio_board_info { 1990 const char *bus_id; 1991 char modalias[MDIO_NAME_SIZE]; 1992 int mdio_addr; 1993 const void *platform_data; 1994 }; 1995 1996 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1997 int mdiobus_register_board_info(const struct mdio_board_info *info, 1998 unsigned int n); 1999 #else 2000 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 2001 unsigned int n) 2002 { 2003 return 0; 2004 } 2005 #endif 2006 2007 2008 /** 2009 * phy_module_driver() - Helper macro for registering PHY drivers 2010 * @__phy_drivers: array of PHY drivers to register 2011 * @__count: Numbers of members in array 2012 * 2013 * Helper macro for PHY drivers which do not do anything special in module 2014 * init/exit. Each module may only use this macro once, and calling it 2015 * replaces module_init() and module_exit(). 2016 */ 2017 #define phy_module_driver(__phy_drivers, __count) \ 2018 static int __init phy_module_init(void) \ 2019 { \ 2020 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 2021 } \ 2022 module_init(phy_module_init); \ 2023 static void __exit phy_module_exit(void) \ 2024 { \ 2025 phy_drivers_unregister(__phy_drivers, __count); \ 2026 } \ 2027 module_exit(phy_module_exit) 2028 2029 #define module_phy_driver(__phy_drivers) \ 2030 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 2031 2032 bool phy_driver_is_genphy(struct phy_device *phydev); 2033 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 2034 2035 #endif /* __PHY_H */ 2036