1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/linkmode.h> 18 #include <linux/netlink.h> 19 #include <linux/mdio.h> 20 #include <linux/mii.h> 21 #include <linux/mii_timestamper.h> 22 #include <linux/module.h> 23 #include <linux/timer.h> 24 #include <linux/workqueue.h> 25 #include <linux/mod_devicetable.h> 26 #include <linux/u64_stats_sync.h> 27 #include <linux/irqreturn.h> 28 #include <linux/iopoll.h> 29 #include <linux/refcount.h> 30 31 #include <linux/atomic.h> 32 33 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 34 SUPPORTED_TP | \ 35 SUPPORTED_MII) 36 37 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 38 SUPPORTED_10baseT_Full) 39 40 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 41 SUPPORTED_100baseT_Full) 42 43 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 44 SUPPORTED_1000baseT_Full) 45 46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 54 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 55 56 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 57 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 58 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 59 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 60 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 61 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 62 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 63 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 64 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 65 66 extern const int phy_basic_ports_array[3]; 67 extern const int phy_fibre_port_array[1]; 68 extern const int phy_all_ports_features_array[7]; 69 extern const int phy_10_100_features_array[4]; 70 extern const int phy_basic_t1_features_array[3]; 71 extern const int phy_basic_t1s_p2mp_features_array[2]; 72 extern const int phy_gbit_features_array[2]; 73 extern const int phy_10gbit_features_array[1]; 74 75 /* 76 * Set phydev->irq to PHY_POLL if interrupts are not supported, 77 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 78 * the attached MAC driver handles the interrupt 79 */ 80 #define PHY_POLL -1 81 #define PHY_MAC_INTERRUPT -2 82 83 #define PHY_IS_INTERNAL 0x00000001 84 #define PHY_RST_AFTER_CLK_EN 0x00000002 85 #define PHY_POLL_CABLE_TEST 0x00000004 86 #define MDIO_DEVICE_IS_PHY 0x80000000 87 88 /** 89 * enum phy_interface_t - Interface Mode definitions 90 * 91 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 92 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 93 * @PHY_INTERFACE_MODE_MII: Media-independent interface 94 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 95 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 96 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 97 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 98 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 99 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 100 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 101 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 102 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 103 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 104 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 105 * @PHY_INTERFACE_MODE_SMII: Serial MII 106 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 107 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 108 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 109 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 110 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 111 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 112 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 113 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 114 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 115 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 116 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 117 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 118 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 119 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 120 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 121 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 122 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 123 * @PHY_INTERFACE_MODE_MAX: Book keeping 124 * 125 * Describes the interface between the MAC and PHY. 126 */ 127 typedef enum { 128 PHY_INTERFACE_MODE_NA, 129 PHY_INTERFACE_MODE_INTERNAL, 130 PHY_INTERFACE_MODE_MII, 131 PHY_INTERFACE_MODE_GMII, 132 PHY_INTERFACE_MODE_SGMII, 133 PHY_INTERFACE_MODE_TBI, 134 PHY_INTERFACE_MODE_REVMII, 135 PHY_INTERFACE_MODE_RMII, 136 PHY_INTERFACE_MODE_REVRMII, 137 PHY_INTERFACE_MODE_RGMII, 138 PHY_INTERFACE_MODE_RGMII_ID, 139 PHY_INTERFACE_MODE_RGMII_RXID, 140 PHY_INTERFACE_MODE_RGMII_TXID, 141 PHY_INTERFACE_MODE_RTBI, 142 PHY_INTERFACE_MODE_SMII, 143 PHY_INTERFACE_MODE_XGMII, 144 PHY_INTERFACE_MODE_XLGMII, 145 PHY_INTERFACE_MODE_MOCA, 146 PHY_INTERFACE_MODE_QSGMII, 147 PHY_INTERFACE_MODE_TRGMII, 148 PHY_INTERFACE_MODE_100BASEX, 149 PHY_INTERFACE_MODE_1000BASEX, 150 PHY_INTERFACE_MODE_2500BASEX, 151 PHY_INTERFACE_MODE_5GBASER, 152 PHY_INTERFACE_MODE_RXAUI, 153 PHY_INTERFACE_MODE_XAUI, 154 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 155 PHY_INTERFACE_MODE_10GBASER, 156 PHY_INTERFACE_MODE_25GBASER, 157 PHY_INTERFACE_MODE_USXGMII, 158 /* 10GBASE-KR - with Clause 73 AN */ 159 PHY_INTERFACE_MODE_10GKR, 160 PHY_INTERFACE_MODE_QUSGMII, 161 PHY_INTERFACE_MODE_1000BASEKX, 162 PHY_INTERFACE_MODE_MAX, 163 } phy_interface_t; 164 165 /* PHY interface mode bitmap handling */ 166 #define DECLARE_PHY_INTERFACE_MASK(name) \ 167 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 168 169 static inline void phy_interface_zero(unsigned long *intf) 170 { 171 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 172 } 173 174 static inline bool phy_interface_empty(const unsigned long *intf) 175 { 176 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 177 } 178 179 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 180 const unsigned long *b) 181 { 182 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 183 } 184 185 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 186 const unsigned long *b) 187 { 188 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 189 } 190 191 static inline void phy_interface_set_rgmii(unsigned long *intf) 192 { 193 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 194 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 195 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 196 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 197 } 198 199 /* 200 * phy_supported_speeds - return all speeds currently supported by a PHY device 201 */ 202 unsigned int phy_supported_speeds(struct phy_device *phy, 203 unsigned int *speeds, 204 unsigned int size); 205 206 /** 207 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 208 * @interface: enum phy_interface_t value 209 * 210 * Description: maps enum &phy_interface_t defined in this file 211 * into the device tree binding of 'phy-mode', so that Ethernet 212 * device driver can get PHY interface from device tree. 213 */ 214 static inline const char *phy_modes(phy_interface_t interface) 215 { 216 switch (interface) { 217 case PHY_INTERFACE_MODE_NA: 218 return ""; 219 case PHY_INTERFACE_MODE_INTERNAL: 220 return "internal"; 221 case PHY_INTERFACE_MODE_MII: 222 return "mii"; 223 case PHY_INTERFACE_MODE_GMII: 224 return "gmii"; 225 case PHY_INTERFACE_MODE_SGMII: 226 return "sgmii"; 227 case PHY_INTERFACE_MODE_TBI: 228 return "tbi"; 229 case PHY_INTERFACE_MODE_REVMII: 230 return "rev-mii"; 231 case PHY_INTERFACE_MODE_RMII: 232 return "rmii"; 233 case PHY_INTERFACE_MODE_REVRMII: 234 return "rev-rmii"; 235 case PHY_INTERFACE_MODE_RGMII: 236 return "rgmii"; 237 case PHY_INTERFACE_MODE_RGMII_ID: 238 return "rgmii-id"; 239 case PHY_INTERFACE_MODE_RGMII_RXID: 240 return "rgmii-rxid"; 241 case PHY_INTERFACE_MODE_RGMII_TXID: 242 return "rgmii-txid"; 243 case PHY_INTERFACE_MODE_RTBI: 244 return "rtbi"; 245 case PHY_INTERFACE_MODE_SMII: 246 return "smii"; 247 case PHY_INTERFACE_MODE_XGMII: 248 return "xgmii"; 249 case PHY_INTERFACE_MODE_XLGMII: 250 return "xlgmii"; 251 case PHY_INTERFACE_MODE_MOCA: 252 return "moca"; 253 case PHY_INTERFACE_MODE_QSGMII: 254 return "qsgmii"; 255 case PHY_INTERFACE_MODE_TRGMII: 256 return "trgmii"; 257 case PHY_INTERFACE_MODE_1000BASEX: 258 return "1000base-x"; 259 case PHY_INTERFACE_MODE_1000BASEKX: 260 return "1000base-kx"; 261 case PHY_INTERFACE_MODE_2500BASEX: 262 return "2500base-x"; 263 case PHY_INTERFACE_MODE_5GBASER: 264 return "5gbase-r"; 265 case PHY_INTERFACE_MODE_RXAUI: 266 return "rxaui"; 267 case PHY_INTERFACE_MODE_XAUI: 268 return "xaui"; 269 case PHY_INTERFACE_MODE_10GBASER: 270 return "10gbase-r"; 271 case PHY_INTERFACE_MODE_25GBASER: 272 return "25gbase-r"; 273 case PHY_INTERFACE_MODE_USXGMII: 274 return "usxgmii"; 275 case PHY_INTERFACE_MODE_10GKR: 276 return "10gbase-kr"; 277 case PHY_INTERFACE_MODE_100BASEX: 278 return "100base-x"; 279 case PHY_INTERFACE_MODE_QUSGMII: 280 return "qusgmii"; 281 default: 282 return "unknown"; 283 } 284 } 285 286 #define PHY_INIT_TIMEOUT 100000 287 #define PHY_FORCE_TIMEOUT 10 288 289 #define PHY_MAX_ADDR 32 290 291 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 292 #define PHY_ID_FMT "%s:%02x" 293 294 #define MII_BUS_ID_SIZE 61 295 296 struct device; 297 struct phylink; 298 struct sfp_bus; 299 struct sfp_upstream_ops; 300 struct sk_buff; 301 302 /** 303 * struct mdio_bus_stats - Statistics counters for MDIO busses 304 * @transfers: Total number of transfers, i.e. @writes + @reads 305 * @errors: Number of MDIO transfers that returned an error 306 * @writes: Number of write transfers 307 * @reads: Number of read transfers 308 * @syncp: Synchronisation for incrementing statistics 309 */ 310 struct mdio_bus_stats { 311 u64_stats_t transfers; 312 u64_stats_t errors; 313 u64_stats_t writes; 314 u64_stats_t reads; 315 /* Must be last, add new statistics above */ 316 struct u64_stats_sync syncp; 317 }; 318 319 /** 320 * struct phy_package_shared - Shared information in PHY packages 321 * @addr: Common PHY address used to combine PHYs in one package 322 * @refcnt: Number of PHYs connected to this shared data 323 * @flags: Initialization of PHY package 324 * @priv_size: Size of the shared private data @priv 325 * @priv: Driver private data shared across a PHY package 326 * 327 * Represents a shared structure between different phydev's in the same 328 * package, for example a quad PHY. See phy_package_join() and 329 * phy_package_leave(). 330 */ 331 struct phy_package_shared { 332 int addr; 333 refcount_t refcnt; 334 unsigned long flags; 335 size_t priv_size; 336 337 /* private data pointer */ 338 /* note that this pointer is shared between different phydevs and 339 * the user has to take care of appropriate locking. It is allocated 340 * and freed automatically by phy_package_join() and 341 * phy_package_leave(). 342 */ 343 void *priv; 344 }; 345 346 /* used as bit number in atomic bitops */ 347 #define PHY_SHARED_F_INIT_DONE 0 348 #define PHY_SHARED_F_PROBE_DONE 1 349 350 /** 351 * struct mii_bus - Represents an MDIO bus 352 * 353 * @owner: Who owns this device 354 * @name: User friendly name for this MDIO device, or driver name 355 * @id: Unique identifier for this bus, typical from bus hierarchy 356 * @priv: Driver private data 357 * 358 * The Bus class for PHYs. Devices which provide access to 359 * PHYs should register using this structure 360 */ 361 struct mii_bus { 362 struct module *owner; 363 const char *name; 364 char id[MII_BUS_ID_SIZE]; 365 void *priv; 366 /** @read: Perform a read transfer on the bus */ 367 int (*read)(struct mii_bus *bus, int addr, int regnum); 368 /** @write: Perform a write transfer on the bus */ 369 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 370 /** @read_c45: Perform a C45 read transfer on the bus */ 371 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 372 /** @write_c45: Perform a C45 write transfer on the bus */ 373 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 374 int regnum, u16 val); 375 /** @reset: Perform a reset of the bus */ 376 int (*reset)(struct mii_bus *bus); 377 378 /** @stats: Statistic counters per device on the bus */ 379 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 380 381 /** 382 * @mdio_lock: A lock to ensure that only one thing can read/write 383 * the MDIO bus at a time 384 */ 385 struct mutex mdio_lock; 386 387 /** @parent: Parent device of this bus */ 388 struct device *parent; 389 /** @state: State of bus structure */ 390 enum { 391 MDIOBUS_ALLOCATED = 1, 392 MDIOBUS_REGISTERED, 393 MDIOBUS_UNREGISTERED, 394 MDIOBUS_RELEASED, 395 } state; 396 397 /** @dev: Kernel device representation */ 398 struct device dev; 399 400 /** @mdio_map: list of all MDIO devices on bus */ 401 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 402 403 /** @phy_mask: PHY addresses to be ignored when probing */ 404 u32 phy_mask; 405 406 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 407 u32 phy_ignore_ta_mask; 408 409 /** 410 * @irq: An array of interrupts, each PHY's interrupt at the index 411 * matching its address 412 */ 413 int irq[PHY_MAX_ADDR]; 414 415 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 416 int reset_delay_us; 417 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 418 int reset_post_delay_us; 419 /** @reset_gpiod: Reset GPIO descriptor pointer */ 420 struct gpio_desc *reset_gpiod; 421 422 /** @shared_lock: protect access to the shared element */ 423 struct mutex shared_lock; 424 425 /** @shared: shared state across different PHYs */ 426 struct phy_package_shared *shared[PHY_MAX_ADDR]; 427 }; 428 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 429 430 struct mii_bus *mdiobus_alloc_size(size_t size); 431 432 /** 433 * mdiobus_alloc - Allocate an MDIO bus structure 434 * 435 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 436 * for the driver to register the bus. 437 */ 438 static inline struct mii_bus *mdiobus_alloc(void) 439 { 440 return mdiobus_alloc_size(0); 441 } 442 443 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 444 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 445 struct module *owner); 446 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 447 #define devm_mdiobus_register(dev, bus) \ 448 __devm_mdiobus_register(dev, bus, THIS_MODULE) 449 450 void mdiobus_unregister(struct mii_bus *bus); 451 void mdiobus_free(struct mii_bus *bus); 452 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 453 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 454 { 455 return devm_mdiobus_alloc_size(dev, 0); 456 } 457 458 struct mii_bus *mdio_find_bus(const char *mdio_name); 459 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); 460 461 #define PHY_INTERRUPT_DISABLED false 462 #define PHY_INTERRUPT_ENABLED true 463 464 /** 465 * enum phy_state - PHY state machine states: 466 * 467 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 468 * should be called if and only if the PHY is in this state, 469 * given that the PHY device exists. 470 * - PHY driver probe function will set the state to @PHY_READY 471 * 472 * @PHY_READY: PHY is ready to send and receive packets, but the 473 * controller is not. By default, PHYs which do not implement 474 * probe will be set to this state by phy_probe(). 475 * - start will set the state to UP 476 * 477 * @PHY_UP: The PHY and attached device are ready to do work. 478 * Interrupts should be started here. 479 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 480 * 481 * @PHY_NOLINK: PHY is up, but not currently plugged in. 482 * - irq or timer will set @PHY_RUNNING if link comes back 483 * - phy_stop moves to @PHY_HALTED 484 * 485 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 486 * and/or receiving packets 487 * - irq or timer will set @PHY_NOLINK if link goes down 488 * - phy_stop moves to @PHY_HALTED 489 * 490 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 491 * is not expected to work, carrier will be indicated as down. PHY will be 492 * poll once per second, or on interrupt for it current state. 493 * Once complete, move to UP to restart the PHY. 494 * - phy_stop aborts the running test and moves to @PHY_HALTED 495 * 496 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or 497 * PHY is in an error state. 498 * - phy_start moves to @PHY_UP 499 */ 500 enum phy_state { 501 PHY_DOWN = 0, 502 PHY_READY, 503 PHY_HALTED, 504 PHY_UP, 505 PHY_RUNNING, 506 PHY_NOLINK, 507 PHY_CABLETEST, 508 }; 509 510 #define MDIO_MMD_NUM 32 511 512 /** 513 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 514 * @devices_in_package: IEEE 802.3 devices in package register value. 515 * @mmds_present: bit vector of MMDs present. 516 * @device_ids: The device identifer for each present device. 517 */ 518 struct phy_c45_device_ids { 519 u32 devices_in_package; 520 u32 mmds_present; 521 u32 device_ids[MDIO_MMD_NUM]; 522 }; 523 524 struct macsec_context; 525 struct macsec_ops; 526 527 /** 528 * struct phy_device - An instance of a PHY 529 * 530 * @mdio: MDIO bus this PHY is on 531 * @drv: Pointer to the driver for this PHY instance 532 * @devlink: Create a link between phy dev and mac dev, if the external phy 533 * used by current mac interface is managed by another mac interface. 534 * @phy_id: UID for this device found during discovery 535 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 536 * @is_c45: Set to true if this PHY uses clause 45 addressing. 537 * @is_internal: Set to true if this PHY is internal to a MAC. 538 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 539 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 540 * @has_fixups: Set to true if this PHY has fixups/quirks. 541 * @suspended: Set to true if this PHY has been suspended successfully. 542 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 543 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 544 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 545 * @downshifted_rate: Set true if link speed has been downshifted. 546 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 547 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 548 * @state: State of the PHY for management purposes 549 * @dev_flags: Device-specific flags used by the PHY driver. 550 * 551 * - Bits [15:0] are free to use by the PHY driver to communicate 552 * driver specific behavior. 553 * - Bits [23:16] are currently reserved for future use. 554 * - Bits [31:24] are reserved for defining generic 555 * PHY driver behavior. 556 * @irq: IRQ number of the PHY's interrupt (-1 if none) 557 * @phy_timer: The timer for handling the state machine 558 * @phylink: Pointer to phylink instance for this PHY 559 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 560 * @sfp_bus: SFP bus attached to this PHY's fiber port 561 * @attached_dev: The attached enet driver's device instance ptr 562 * @adjust_link: Callback for the enet controller to respond to changes: in the 563 * link state. 564 * @phy_link_change: Callback for phylink for notification of link change 565 * @macsec_ops: MACsec offloading ops. 566 * 567 * @speed: Current link speed 568 * @duplex: Current duplex 569 * @port: Current port 570 * @pause: Current pause 571 * @asym_pause: Current asymmetric pause 572 * @supported: Combined MAC/PHY supported linkmodes 573 * @advertising: Currently advertised linkmodes 574 * @adv_old: Saved advertised while power saving for WoL 575 * @lp_advertising: Current link partner advertised linkmodes 576 * @host_interfaces: PHY interface modes supported by host 577 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 578 * @autoneg: Flag autoneg being used 579 * @rate_matching: Current rate matching mode 580 * @link: Current link state 581 * @autoneg_complete: Flag auto negotiation of the link has completed 582 * @mdix: Current crossover 583 * @mdix_ctrl: User setting of crossover 584 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 585 * @interrupts: Flag interrupts have been enabled 586 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 587 * handling shall be postponed until PHY has resumed 588 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 589 * requiring a rerun of the interrupt handler after resume 590 * @interface: enum phy_interface_t value 591 * @skb: Netlink message for cable diagnostics 592 * @nest: Netlink nest used for cable diagnostics 593 * @ehdr: nNtlink header for cable diagnostics 594 * @phy_led_triggers: Array of LED triggers 595 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 596 * @led_link_trigger: LED trigger for link up/down 597 * @last_triggered: last LED trigger for link speed 598 * @master_slave_set: User requested master/slave configuration 599 * @master_slave_get: Current master/slave advertisement 600 * @master_slave_state: Current master/slave configuration 601 * @mii_ts: Pointer to time stamper callbacks 602 * @psec: Pointer to Power Sourcing Equipment control struct 603 * @lock: Mutex for serialization access to PHY 604 * @state_queue: Work queue for state machine 605 * @link_down_events: Number of times link was lost 606 * @shared: Pointer to private data shared by phys in one package 607 * @priv: Pointer to driver private data 608 * 609 * interrupts currently only supports enabled or disabled, 610 * but could be changed in the future to support enabling 611 * and disabling specific interrupts 612 * 613 * Contains some infrastructure for polling and interrupt 614 * handling, as well as handling shifts in PHY hardware state 615 */ 616 struct phy_device { 617 struct mdio_device mdio; 618 619 /* Information about the PHY type */ 620 /* And management functions */ 621 struct phy_driver *drv; 622 623 struct device_link *devlink; 624 625 u32 phy_id; 626 627 struct phy_c45_device_ids c45_ids; 628 unsigned is_c45:1; 629 unsigned is_internal:1; 630 unsigned is_pseudo_fixed_link:1; 631 unsigned is_gigabit_capable:1; 632 unsigned has_fixups:1; 633 unsigned suspended:1; 634 unsigned suspended_by_mdio_bus:1; 635 unsigned sysfs_links:1; 636 unsigned loopback_enabled:1; 637 unsigned downshifted_rate:1; 638 unsigned is_on_sfp_module:1; 639 unsigned mac_managed_pm:1; 640 641 unsigned autoneg:1; 642 /* The most recently read link state */ 643 unsigned link:1; 644 unsigned autoneg_complete:1; 645 646 /* Interrupts are enabled */ 647 unsigned interrupts:1; 648 unsigned irq_suspended:1; 649 unsigned irq_rerun:1; 650 651 int rate_matching; 652 653 enum phy_state state; 654 655 u32 dev_flags; 656 657 phy_interface_t interface; 658 659 /* 660 * forced speed & duplex (no autoneg) 661 * partner speed & duplex & pause (autoneg) 662 */ 663 int speed; 664 int duplex; 665 int port; 666 int pause; 667 int asym_pause; 668 u8 master_slave_get; 669 u8 master_slave_set; 670 u8 master_slave_state; 671 672 /* Union of PHY and Attached devices' supported link modes */ 673 /* See ethtool.h for more info */ 674 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 675 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 676 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 677 /* used with phy_speed_down */ 678 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 679 680 /* Host supported PHY interface types. Should be ignored if empty. */ 681 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 682 683 /* Energy efficient ethernet modes which should be prohibited */ 684 u32 eee_broken_modes; 685 686 #ifdef CONFIG_LED_TRIGGER_PHY 687 struct phy_led_trigger *phy_led_triggers; 688 unsigned int phy_num_led_triggers; 689 struct phy_led_trigger *last_triggered; 690 691 struct phy_led_trigger *led_link_trigger; 692 #endif 693 694 /* 695 * Interrupt number for this PHY 696 * -1 means no interrupt 697 */ 698 int irq; 699 700 /* private data pointer */ 701 /* For use by PHYs to maintain extra state */ 702 void *priv; 703 704 /* shared data pointer */ 705 /* For use by PHYs inside the same package that need a shared state. */ 706 struct phy_package_shared *shared; 707 708 /* Reporting cable test results */ 709 struct sk_buff *skb; 710 void *ehdr; 711 struct nlattr *nest; 712 713 /* Interrupt and Polling infrastructure */ 714 struct delayed_work state_queue; 715 716 struct mutex lock; 717 718 /* This may be modified under the rtnl lock */ 719 bool sfp_bus_attached; 720 struct sfp_bus *sfp_bus; 721 struct phylink *phylink; 722 struct net_device *attached_dev; 723 struct mii_timestamper *mii_ts; 724 struct pse_control *psec; 725 726 u8 mdix; 727 u8 mdix_ctrl; 728 729 int pma_extable; 730 731 unsigned int link_down_events; 732 733 void (*phy_link_change)(struct phy_device *phydev, bool up); 734 void (*adjust_link)(struct net_device *dev); 735 736 #if IS_ENABLED(CONFIG_MACSEC) 737 /* MACsec management functions */ 738 const struct macsec_ops *macsec_ops; 739 #endif 740 }; 741 742 /* Generic phy_device::dev_flags */ 743 #define PHY_F_NO_IRQ 0x80000000 744 745 static inline struct phy_device *to_phy_device(const struct device *dev) 746 { 747 return container_of(to_mdio_device(dev), struct phy_device, mdio); 748 } 749 750 /** 751 * struct phy_tdr_config - Configuration of a TDR raw test 752 * 753 * @first: Distance for first data collection point 754 * @last: Distance for last data collection point 755 * @step: Step between data collection points 756 * @pair: Bitmap of cable pairs to collect data for 757 * 758 * A structure containing possible configuration parameters 759 * for a TDR cable test. The driver does not need to implement 760 * all the parameters, but should report what is actually used. 761 * All distances are in centimeters. 762 */ 763 struct phy_tdr_config { 764 u32 first; 765 u32 last; 766 u32 step; 767 s8 pair; 768 }; 769 #define PHY_PAIR_ALL -1 770 771 /** 772 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 773 * Avoidance) Reconciliation Sublayer. 774 * 775 * @version: read-only PLCA register map version. -1 = not available. Ignored 776 * when setting the configuration. Format is the same as reported by the PLCA 777 * IDVER register (31.CA00). -1 = not available. 778 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 779 * set. 0 = disabled, anything else = enabled. 780 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 781 * Allowed values [0 .. 254]. 255 = node disabled. 782 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 783 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 784 * set. Allowed values [1 .. 255]. 785 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 786 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 787 * more details. The to_timer shall be set equal over all nodes. 788 * -1 = not available / don't set. Allowed values [0 .. 255]. 789 * @burst_cnt: controls how many additional frames a node is allowed to send in 790 * single transmit opportunity (TO). The default value of 0 means that the 791 * node is allowed exactly one frame per TO. A value of 1 allows two frames 792 * per TO, and so on. -1 = not available / don't set. 793 * Allowed values [0 .. 255]. 794 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 795 * frame before interrupting the burst. This value should be set to a value 796 * greater than the MAC inter-packet gap (which is typically 96 bits). 797 * -1 = not available / don't set. Allowed values [0 .. 255]. 798 * 799 * A structure containing configuration parameters for setting/getting the PLCA 800 * RS configuration. The driver does not need to implement all the parameters, 801 * but should report what is actually used. 802 */ 803 struct phy_plca_cfg { 804 int version; 805 int enabled; 806 int node_id; 807 int node_cnt; 808 int to_tmr; 809 int burst_cnt; 810 int burst_tmr; 811 }; 812 813 /** 814 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 815 * Avoidance) Reconciliation Sublayer. 816 * 817 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 818 * register(31.CA03), indicating BEACON activity. 819 * 820 * A structure containing status information of the PLCA RS configuration. 821 * The driver does not need to implement all the parameters, but should report 822 * what is actually used. 823 */ 824 struct phy_plca_status { 825 bool pst; 826 }; 827 828 /** 829 * struct phy_driver - Driver structure for a particular PHY type 830 * 831 * @mdiodrv: Data common to all MDIO devices 832 * @phy_id: The result of reading the UID registers of this PHY 833 * type, and ANDing them with the phy_id_mask. This driver 834 * only works for PHYs with IDs which match this field 835 * @name: The friendly name of this PHY type 836 * @phy_id_mask: Defines the important bits of the phy_id 837 * @features: A mandatory list of features (speed, duplex, etc) 838 * supported by this PHY 839 * @flags: A bitfield defining certain other features this PHY 840 * supports (like interrupts) 841 * @driver_data: Static driver data 842 * 843 * All functions are optional. If config_aneg or read_status 844 * are not implemented, the phy core uses the genphy versions. 845 * Note that none of these functions should be called from 846 * interrupt time. The goal is for the bus read/write functions 847 * to be able to block when the bus transaction is happening, 848 * and be freed up by an interrupt (The MPC85xx has this ability, 849 * though it is not currently supported in the driver). 850 */ 851 struct phy_driver { 852 struct mdio_driver_common mdiodrv; 853 u32 phy_id; 854 char *name; 855 u32 phy_id_mask; 856 const unsigned long * const features; 857 u32 flags; 858 const void *driver_data; 859 860 /** 861 * @soft_reset: Called to issue a PHY software reset 862 */ 863 int (*soft_reset)(struct phy_device *phydev); 864 865 /** 866 * @config_init: Called to initialize the PHY, 867 * including after a reset 868 */ 869 int (*config_init)(struct phy_device *phydev); 870 871 /** 872 * @probe: Called during discovery. Used to set 873 * up device-specific structures, if any 874 */ 875 int (*probe)(struct phy_device *phydev); 876 877 /** 878 * @get_features: Probe the hardware to determine what 879 * abilities it has. Should only set phydev->supported. 880 */ 881 int (*get_features)(struct phy_device *phydev); 882 883 /** 884 * @get_rate_matching: Get the supported type of rate matching for a 885 * particular phy interface. This is used by phy consumers to determine 886 * whether to advertise lower-speed modes for that interface. It is 887 * assumed that if a rate matching mode is supported on an interface, 888 * then that interface's rate can be adapted to all slower link speeds 889 * supported by the phy. If the interface is not supported, this should 890 * return %RATE_MATCH_NONE. 891 */ 892 int (*get_rate_matching)(struct phy_device *phydev, 893 phy_interface_t iface); 894 895 /* PHY Power Management */ 896 /** @suspend: Suspend the hardware, saving state if needed */ 897 int (*suspend)(struct phy_device *phydev); 898 /** @resume: Resume the hardware, restoring state if needed */ 899 int (*resume)(struct phy_device *phydev); 900 901 /** 902 * @config_aneg: Configures the advertisement and resets 903 * autonegotiation if phydev->autoneg is on, 904 * forces the speed to the current settings in phydev 905 * if phydev->autoneg is off 906 */ 907 int (*config_aneg)(struct phy_device *phydev); 908 909 /** @aneg_done: Determines the auto negotiation result */ 910 int (*aneg_done)(struct phy_device *phydev); 911 912 /** @read_status: Determines the negotiated speed and duplex */ 913 int (*read_status)(struct phy_device *phydev); 914 915 /** 916 * @config_intr: Enables or disables interrupts. 917 * It should also clear any pending interrupts prior to enabling the 918 * IRQs and after disabling them. 919 */ 920 int (*config_intr)(struct phy_device *phydev); 921 922 /** @handle_interrupt: Override default interrupt handling */ 923 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 924 925 /** @remove: Clears up any memory if needed */ 926 void (*remove)(struct phy_device *phydev); 927 928 /** 929 * @match_phy_device: Returns true if this is a suitable 930 * driver for the given phydev. If NULL, matching is based on 931 * phy_id and phy_id_mask. 932 */ 933 int (*match_phy_device)(struct phy_device *phydev); 934 935 /** 936 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 937 * register changes to enable Wake on LAN, so set_wol is 938 * provided to be called in the ethernet driver's set_wol 939 * function. 940 */ 941 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 942 943 /** 944 * @get_wol: See set_wol, but for checking whether Wake on LAN 945 * is enabled. 946 */ 947 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 948 949 /** 950 * @link_change_notify: Called to inform a PHY device driver 951 * when the core is about to change the link state. This 952 * callback is supposed to be used as fixup hook for drivers 953 * that need to take action when the link state 954 * changes. Drivers are by no means allowed to mess with the 955 * PHY device structure in their implementations. 956 */ 957 void (*link_change_notify)(struct phy_device *dev); 958 959 /** 960 * @read_mmd: PHY specific driver override for reading a MMD 961 * register. This function is optional for PHY specific 962 * drivers. When not provided, the default MMD read function 963 * will be used by phy_read_mmd(), which will use either a 964 * direct read for Clause 45 PHYs or an indirect read for 965 * Clause 22 PHYs. devnum is the MMD device number within the 966 * PHY device, regnum is the register within the selected MMD 967 * device. 968 */ 969 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 970 971 /** 972 * @write_mmd: PHY specific driver override for writing a MMD 973 * register. This function is optional for PHY specific 974 * drivers. When not provided, the default MMD write function 975 * will be used by phy_write_mmd(), which will use either a 976 * direct write for Clause 45 PHYs, or an indirect write for 977 * Clause 22 PHYs. devnum is the MMD device number within the 978 * PHY device, regnum is the register within the selected MMD 979 * device. val is the value to be written. 980 */ 981 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 982 u16 val); 983 984 /** @read_page: Return the current PHY register page number */ 985 int (*read_page)(struct phy_device *dev); 986 /** @write_page: Set the current PHY register page number */ 987 int (*write_page)(struct phy_device *dev, int page); 988 989 /** 990 * @module_info: Get the size and type of the eeprom contained 991 * within a plug-in module 992 */ 993 int (*module_info)(struct phy_device *dev, 994 struct ethtool_modinfo *modinfo); 995 996 /** 997 * @module_eeprom: Get the eeprom information from the plug-in 998 * module 999 */ 1000 int (*module_eeprom)(struct phy_device *dev, 1001 struct ethtool_eeprom *ee, u8 *data); 1002 1003 /** @cable_test_start: Start a cable test */ 1004 int (*cable_test_start)(struct phy_device *dev); 1005 1006 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1007 int (*cable_test_tdr_start)(struct phy_device *dev, 1008 const struct phy_tdr_config *config); 1009 1010 /** 1011 * @cable_test_get_status: Once per second, or on interrupt, 1012 * request the status of the test. 1013 */ 1014 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1015 1016 /* Get statistics from the PHY using ethtool */ 1017 /** @get_sset_count: Number of statistic counters */ 1018 int (*get_sset_count)(struct phy_device *dev); 1019 /** @get_strings: Names of the statistic counters */ 1020 void (*get_strings)(struct phy_device *dev, u8 *data); 1021 /** @get_stats: Return the statistic counter values */ 1022 void (*get_stats)(struct phy_device *dev, 1023 struct ethtool_stats *stats, u64 *data); 1024 1025 /* Get and Set PHY tunables */ 1026 /** @get_tunable: Return the value of a tunable */ 1027 int (*get_tunable)(struct phy_device *dev, 1028 struct ethtool_tunable *tuna, void *data); 1029 /** @set_tunable: Set the value of a tunable */ 1030 int (*set_tunable)(struct phy_device *dev, 1031 struct ethtool_tunable *tuna, 1032 const void *data); 1033 /** @set_loopback: Set the loopback mood of the PHY */ 1034 int (*set_loopback)(struct phy_device *dev, bool enable); 1035 /** @get_sqi: Get the signal quality indication */ 1036 int (*get_sqi)(struct phy_device *dev); 1037 /** @get_sqi_max: Get the maximum signal quality indication */ 1038 int (*get_sqi_max)(struct phy_device *dev); 1039 1040 /* PLCA RS interface */ 1041 /** @get_plca_cfg: Return the current PLCA configuration */ 1042 int (*get_plca_cfg)(struct phy_device *dev, 1043 struct phy_plca_cfg *plca_cfg); 1044 /** @set_plca_cfg: Set the PLCA configuration */ 1045 int (*set_plca_cfg)(struct phy_device *dev, 1046 const struct phy_plca_cfg *plca_cfg); 1047 /** @get_plca_status: Return the current PLCA status info */ 1048 int (*get_plca_status)(struct phy_device *dev, 1049 struct phy_plca_status *plca_st); 1050 }; 1051 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 1052 struct phy_driver, mdiodrv) 1053 1054 #define PHY_ANY_ID "MATCH ANY PHY" 1055 #define PHY_ANY_UID 0xffffffff 1056 1057 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 1058 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 1059 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 1060 1061 /* A Structure for boards to register fixups with the PHY Lib */ 1062 struct phy_fixup { 1063 struct list_head list; 1064 char bus_id[MII_BUS_ID_SIZE + 3]; 1065 u32 phy_uid; 1066 u32 phy_uid_mask; 1067 int (*run)(struct phy_device *phydev); 1068 }; 1069 1070 const char *phy_speed_to_str(int speed); 1071 const char *phy_duplex_to_str(unsigned int duplex); 1072 const char *phy_rate_matching_to_str(int rate_matching); 1073 1074 int phy_interface_num_ports(phy_interface_t interface); 1075 1076 /* A structure for mapping a particular speed and duplex 1077 * combination to a particular SUPPORTED and ADVERTISED value 1078 */ 1079 struct phy_setting { 1080 u32 speed; 1081 u8 duplex; 1082 u8 bit; 1083 }; 1084 1085 const struct phy_setting * 1086 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 1087 bool exact); 1088 size_t phy_speeds(unsigned int *speeds, size_t size, 1089 unsigned long *mask); 1090 void of_set_phy_supported(struct phy_device *phydev); 1091 void of_set_phy_eee_broken(struct phy_device *phydev); 1092 int phy_speed_down_core(struct phy_device *phydev); 1093 1094 /** 1095 * phy_is_started - Convenience function to check whether PHY is started 1096 * @phydev: The phy_device struct 1097 */ 1098 static inline bool phy_is_started(struct phy_device *phydev) 1099 { 1100 return phydev->state >= PHY_UP; 1101 } 1102 1103 void phy_resolve_aneg_pause(struct phy_device *phydev); 1104 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1105 void phy_check_downshift(struct phy_device *phydev); 1106 1107 /** 1108 * phy_read - Convenience function for reading a given PHY register 1109 * @phydev: the phy_device struct 1110 * @regnum: register number to read 1111 * 1112 * NOTE: MUST NOT be called from interrupt context, 1113 * because the bus read/write functions may wait for an interrupt 1114 * to conclude the operation. 1115 */ 1116 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1117 { 1118 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1119 } 1120 1121 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1122 timeout_us, sleep_before_read) \ 1123 ({ \ 1124 int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \ 1125 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1126 if (val < 0) \ 1127 __ret = val; \ 1128 if (__ret) \ 1129 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1130 __ret; \ 1131 }) 1132 1133 1134 /** 1135 * __phy_read - convenience function for reading a given PHY register 1136 * @phydev: the phy_device struct 1137 * @regnum: register number to read 1138 * 1139 * The caller must have taken the MDIO bus lock. 1140 */ 1141 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1142 { 1143 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1144 } 1145 1146 /** 1147 * phy_write - Convenience function for writing a given PHY register 1148 * @phydev: the phy_device struct 1149 * @regnum: register number to write 1150 * @val: value to write to @regnum 1151 * 1152 * NOTE: MUST NOT be called from interrupt context, 1153 * because the bus read/write functions may wait for an interrupt 1154 * to conclude the operation. 1155 */ 1156 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1157 { 1158 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1159 } 1160 1161 /** 1162 * __phy_write - Convenience function for writing a given PHY register 1163 * @phydev: the phy_device struct 1164 * @regnum: register number to write 1165 * @val: value to write to @regnum 1166 * 1167 * The caller must have taken the MDIO bus lock. 1168 */ 1169 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1170 { 1171 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1172 val); 1173 } 1174 1175 /** 1176 * __phy_modify_changed() - Convenience function for modifying a PHY register 1177 * @phydev: a pointer to a &struct phy_device 1178 * @regnum: register number 1179 * @mask: bit mask of bits to clear 1180 * @set: bit mask of bits to set 1181 * 1182 * Unlocked helper function which allows a PHY register to be modified as 1183 * new register value = (old register value & ~mask) | set 1184 * 1185 * Returns negative errno, 0 if there was no change, and 1 in case of change 1186 */ 1187 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1188 u16 mask, u16 set) 1189 { 1190 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1191 regnum, mask, set); 1192 } 1193 1194 /* 1195 * phy_read_mmd - Convenience function for reading a register 1196 * from an MMD on a given PHY. 1197 */ 1198 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1199 1200 /** 1201 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1202 * condition is met or a timeout occurs 1203 * 1204 * @phydev: The phy_device struct 1205 * @devaddr: The MMD to read from 1206 * @regnum: The register on the MMD to read 1207 * @val: Variable to read the register into 1208 * @cond: Break condition (usually involving @val) 1209 * @sleep_us: Maximum time to sleep between reads in us (0 1210 * tight-loops). Should be less than ~20ms since usleep_range 1211 * is used (see Documentation/timers/timers-howto.rst). 1212 * @timeout_us: Timeout in us, 0 means never timeout 1213 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1214 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either 1215 * case, the last read value at @args is stored in @val. Must not 1216 * be called from atomic context if sleep_us or timeout_us are used. 1217 */ 1218 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1219 sleep_us, timeout_us, sleep_before_read) \ 1220 ({ \ 1221 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \ 1222 sleep_us, timeout_us, sleep_before_read, \ 1223 phydev, devaddr, regnum); \ 1224 if (val < 0) \ 1225 __ret = val; \ 1226 if (__ret) \ 1227 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1228 __ret; \ 1229 }) 1230 1231 /* 1232 * __phy_read_mmd - Convenience function for reading a register 1233 * from an MMD on a given PHY. 1234 */ 1235 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1236 1237 /* 1238 * phy_write_mmd - Convenience function for writing a register 1239 * on an MMD on a given PHY. 1240 */ 1241 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1242 1243 /* 1244 * __phy_write_mmd - Convenience function for writing a register 1245 * on an MMD on a given PHY. 1246 */ 1247 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1248 1249 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1250 u16 set); 1251 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1252 u16 set); 1253 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1254 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1255 1256 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1257 u16 mask, u16 set); 1258 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1259 u16 mask, u16 set); 1260 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1261 u16 mask, u16 set); 1262 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1263 u16 mask, u16 set); 1264 1265 /** 1266 * __phy_set_bits - Convenience function for setting bits in a PHY register 1267 * @phydev: the phy_device struct 1268 * @regnum: register number to write 1269 * @val: bits to set 1270 * 1271 * The caller must have taken the MDIO bus lock. 1272 */ 1273 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1274 { 1275 return __phy_modify(phydev, regnum, 0, val); 1276 } 1277 1278 /** 1279 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1280 * @phydev: the phy_device struct 1281 * @regnum: register number to write 1282 * @val: bits to clear 1283 * 1284 * The caller must have taken the MDIO bus lock. 1285 */ 1286 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1287 u16 val) 1288 { 1289 return __phy_modify(phydev, regnum, val, 0); 1290 } 1291 1292 /** 1293 * phy_set_bits - Convenience function for setting bits in a PHY register 1294 * @phydev: the phy_device struct 1295 * @regnum: register number to write 1296 * @val: bits to set 1297 */ 1298 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1299 { 1300 return phy_modify(phydev, regnum, 0, val); 1301 } 1302 1303 /** 1304 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1305 * @phydev: the phy_device struct 1306 * @regnum: register number to write 1307 * @val: bits to clear 1308 */ 1309 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1310 { 1311 return phy_modify(phydev, regnum, val, 0); 1312 } 1313 1314 /** 1315 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1316 * on MMD 1317 * @phydev: the phy_device struct 1318 * @devad: the MMD containing register to modify 1319 * @regnum: register number to modify 1320 * @val: bits to set 1321 * 1322 * The caller must have taken the MDIO bus lock. 1323 */ 1324 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1325 u32 regnum, u16 val) 1326 { 1327 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1328 } 1329 1330 /** 1331 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1332 * on MMD 1333 * @phydev: the phy_device struct 1334 * @devad: the MMD containing register to modify 1335 * @regnum: register number to modify 1336 * @val: bits to clear 1337 * 1338 * The caller must have taken the MDIO bus lock. 1339 */ 1340 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1341 u32 regnum, u16 val) 1342 { 1343 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1344 } 1345 1346 /** 1347 * phy_set_bits_mmd - Convenience function for setting bits in a register 1348 * on MMD 1349 * @phydev: the phy_device struct 1350 * @devad: the MMD containing register to modify 1351 * @regnum: register number to modify 1352 * @val: bits to set 1353 */ 1354 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1355 u32 regnum, u16 val) 1356 { 1357 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1358 } 1359 1360 /** 1361 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1362 * on MMD 1363 * @phydev: the phy_device struct 1364 * @devad: the MMD containing register to modify 1365 * @regnum: register number to modify 1366 * @val: bits to clear 1367 */ 1368 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1369 u32 regnum, u16 val) 1370 { 1371 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1372 } 1373 1374 /** 1375 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1376 * @phydev: the phy_device struct 1377 * 1378 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1379 * PHY_MAC_INTERRUPT 1380 */ 1381 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1382 { 1383 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1384 } 1385 1386 /** 1387 * phy_polling_mode - Convenience function for testing whether polling is 1388 * used to detect PHY status changes 1389 * @phydev: the phy_device struct 1390 */ 1391 static inline bool phy_polling_mode(struct phy_device *phydev) 1392 { 1393 if (phydev->state == PHY_CABLETEST) 1394 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1395 return true; 1396 1397 return phydev->irq == PHY_POLL; 1398 } 1399 1400 /** 1401 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1402 * @phydev: the phy_device struct 1403 */ 1404 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1405 { 1406 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1407 } 1408 1409 /** 1410 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1411 * @phydev: the phy_device struct 1412 */ 1413 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1414 { 1415 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1416 } 1417 1418 /** 1419 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1420 * PTP hardware clock capabilities. 1421 * @phydev: the phy_device struct 1422 */ 1423 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1424 { 1425 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1426 } 1427 1428 /** 1429 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1430 * @phydev: the phy_device struct 1431 */ 1432 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1433 { 1434 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1435 } 1436 1437 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) 1438 { 1439 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); 1440 } 1441 1442 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1443 int type) 1444 { 1445 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1446 } 1447 1448 static inline int phy_ts_info(struct phy_device *phydev, 1449 struct ethtool_ts_info *tsinfo) 1450 { 1451 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1452 } 1453 1454 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1455 int type) 1456 { 1457 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1458 } 1459 1460 /** 1461 * phy_is_internal - Convenience function for testing if a PHY is internal 1462 * @phydev: the phy_device struct 1463 */ 1464 static inline bool phy_is_internal(struct phy_device *phydev) 1465 { 1466 return phydev->is_internal; 1467 } 1468 1469 /** 1470 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1471 * @phydev: the phy_device struct 1472 */ 1473 static inline bool phy_on_sfp(struct phy_device *phydev) 1474 { 1475 return phydev->is_on_sfp_module; 1476 } 1477 1478 /** 1479 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1480 * PHY interface mode is RGMII (all variants) 1481 * @mode: the &phy_interface_t enum 1482 */ 1483 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1484 { 1485 return mode >= PHY_INTERFACE_MODE_RGMII && 1486 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1487 }; 1488 1489 /** 1490 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1491 * negotiation 1492 * @mode: one of &enum phy_interface_t 1493 * 1494 * Returns true if the PHY interface mode uses the 16-bit negotiation 1495 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1496 */ 1497 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1498 { 1499 return mode == PHY_INTERFACE_MODE_1000BASEX || 1500 mode == PHY_INTERFACE_MODE_2500BASEX; 1501 } 1502 1503 /** 1504 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1505 * is RGMII (all variants) 1506 * @phydev: the phy_device struct 1507 */ 1508 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1509 { 1510 return phy_interface_mode_is_rgmii(phydev->interface); 1511 }; 1512 1513 /** 1514 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1515 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1516 * @phydev: the phy_device struct 1517 */ 1518 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1519 { 1520 return phydev->is_pseudo_fixed_link; 1521 } 1522 1523 int phy_save_page(struct phy_device *phydev); 1524 int phy_select_page(struct phy_device *phydev, int page); 1525 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1526 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1527 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1528 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1529 u16 mask, u16 set); 1530 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1531 u16 mask, u16 set); 1532 1533 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1534 bool is_c45, 1535 struct phy_c45_device_ids *c45_ids); 1536 #if IS_ENABLED(CONFIG_PHYLIB) 1537 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1538 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1539 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1540 struct phy_device *device_phy_find_device(struct device *dev); 1541 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode); 1542 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1543 int phy_device_register(struct phy_device *phy); 1544 void phy_device_free(struct phy_device *phydev); 1545 #else 1546 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1547 { 1548 return 0; 1549 } 1550 static inline 1551 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1552 { 1553 return 0; 1554 } 1555 1556 static inline 1557 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1558 { 1559 return NULL; 1560 } 1561 1562 static inline struct phy_device *device_phy_find_device(struct device *dev) 1563 { 1564 return NULL; 1565 } 1566 1567 static inline 1568 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1569 { 1570 return NULL; 1571 } 1572 1573 static inline 1574 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1575 { 1576 return NULL; 1577 } 1578 1579 static inline int phy_device_register(struct phy_device *phy) 1580 { 1581 return 0; 1582 } 1583 1584 static inline void phy_device_free(struct phy_device *phydev) { } 1585 #endif /* CONFIG_PHYLIB */ 1586 void phy_device_remove(struct phy_device *phydev); 1587 int phy_get_c45_ids(struct phy_device *phydev); 1588 int phy_init_hw(struct phy_device *phydev); 1589 int phy_suspend(struct phy_device *phydev); 1590 int phy_resume(struct phy_device *phydev); 1591 int __phy_resume(struct phy_device *phydev); 1592 int phy_loopback(struct phy_device *phydev, bool enable); 1593 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1594 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1595 int phy_sfp_probe(struct phy_device *phydev, 1596 const struct sfp_upstream_ops *ops); 1597 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1598 phy_interface_t interface); 1599 struct phy_device *phy_find_first(struct mii_bus *bus); 1600 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1601 u32 flags, phy_interface_t interface); 1602 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1603 void (*handler)(struct net_device *), 1604 phy_interface_t interface); 1605 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1606 void (*handler)(struct net_device *), 1607 phy_interface_t interface); 1608 void phy_disconnect(struct phy_device *phydev); 1609 void phy_detach(struct phy_device *phydev); 1610 void phy_start(struct phy_device *phydev); 1611 void phy_stop(struct phy_device *phydev); 1612 int phy_config_aneg(struct phy_device *phydev); 1613 int phy_start_aneg(struct phy_device *phydev); 1614 int phy_aneg_done(struct phy_device *phydev); 1615 int phy_speed_down(struct phy_device *phydev, bool sync); 1616 int phy_speed_up(struct phy_device *phydev); 1617 1618 int phy_restart_aneg(struct phy_device *phydev); 1619 int phy_reset_after_clk_enable(struct phy_device *phydev); 1620 1621 #if IS_ENABLED(CONFIG_PHYLIB) 1622 int phy_start_cable_test(struct phy_device *phydev, 1623 struct netlink_ext_ack *extack); 1624 int phy_start_cable_test_tdr(struct phy_device *phydev, 1625 struct netlink_ext_ack *extack, 1626 const struct phy_tdr_config *config); 1627 #else 1628 static inline 1629 int phy_start_cable_test(struct phy_device *phydev, 1630 struct netlink_ext_ack *extack) 1631 { 1632 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1633 return -EOPNOTSUPP; 1634 } 1635 static inline 1636 int phy_start_cable_test_tdr(struct phy_device *phydev, 1637 struct netlink_ext_ack *extack, 1638 const struct phy_tdr_config *config) 1639 { 1640 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1641 return -EOPNOTSUPP; 1642 } 1643 #endif 1644 1645 int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result); 1646 int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair, 1647 u16 cm); 1648 1649 static inline void phy_device_reset(struct phy_device *phydev, int value) 1650 { 1651 mdio_device_reset(&phydev->mdio, value); 1652 } 1653 1654 #define phydev_err(_phydev, format, args...) \ 1655 dev_err(&_phydev->mdio.dev, format, ##args) 1656 1657 #define phydev_err_probe(_phydev, err, format, args...) \ 1658 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1659 1660 #define phydev_info(_phydev, format, args...) \ 1661 dev_info(&_phydev->mdio.dev, format, ##args) 1662 1663 #define phydev_warn(_phydev, format, args...) \ 1664 dev_warn(&_phydev->mdio.dev, format, ##args) 1665 1666 #define phydev_dbg(_phydev, format, args...) \ 1667 dev_dbg(&_phydev->mdio.dev, format, ##args) 1668 1669 static inline const char *phydev_name(const struct phy_device *phydev) 1670 { 1671 return dev_name(&phydev->mdio.dev); 1672 } 1673 1674 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1675 { 1676 mutex_lock(&phydev->mdio.bus->mdio_lock); 1677 } 1678 1679 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1680 { 1681 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1682 } 1683 1684 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1685 __printf(2, 3); 1686 char *phy_attached_info_irq(struct phy_device *phydev) 1687 __malloc; 1688 void phy_attached_info(struct phy_device *phydev); 1689 1690 /* Clause 22 PHY */ 1691 int genphy_read_abilities(struct phy_device *phydev); 1692 int genphy_setup_forced(struct phy_device *phydev); 1693 int genphy_restart_aneg(struct phy_device *phydev); 1694 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1695 int genphy_config_eee_advert(struct phy_device *phydev); 1696 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1697 int genphy_aneg_done(struct phy_device *phydev); 1698 int genphy_update_link(struct phy_device *phydev); 1699 int genphy_read_lpa(struct phy_device *phydev); 1700 int genphy_read_status_fixed(struct phy_device *phydev); 1701 int genphy_read_status(struct phy_device *phydev); 1702 int genphy_read_master_slave(struct phy_device *phydev); 1703 int genphy_suspend(struct phy_device *phydev); 1704 int genphy_resume(struct phy_device *phydev); 1705 int genphy_loopback(struct phy_device *phydev, bool enable); 1706 int genphy_soft_reset(struct phy_device *phydev); 1707 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1708 1709 static inline int genphy_config_aneg(struct phy_device *phydev) 1710 { 1711 return __genphy_config_aneg(phydev, false); 1712 } 1713 1714 static inline int genphy_no_config_intr(struct phy_device *phydev) 1715 { 1716 return 0; 1717 } 1718 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1719 u16 regnum); 1720 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1721 u16 regnum, u16 val); 1722 1723 /* Clause 37 */ 1724 int genphy_c37_config_aneg(struct phy_device *phydev); 1725 int genphy_c37_read_status(struct phy_device *phydev); 1726 1727 /* Clause 45 PHY */ 1728 int genphy_c45_restart_aneg(struct phy_device *phydev); 1729 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1730 int genphy_c45_aneg_done(struct phy_device *phydev); 1731 int genphy_c45_read_link(struct phy_device *phydev); 1732 int genphy_c45_read_lpa(struct phy_device *phydev); 1733 int genphy_c45_read_pma(struct phy_device *phydev); 1734 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1735 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 1736 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1737 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1738 int genphy_c45_read_mdix(struct phy_device *phydev); 1739 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1740 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 1741 int genphy_c45_read_status(struct phy_device *phydev); 1742 int genphy_c45_baset1_read_status(struct phy_device *phydev); 1743 int genphy_c45_config_aneg(struct phy_device *phydev); 1744 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1745 int genphy_c45_pma_resume(struct phy_device *phydev); 1746 int genphy_c45_pma_suspend(struct phy_device *phydev); 1747 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 1748 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 1749 struct phy_plca_cfg *plca_cfg); 1750 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 1751 const struct phy_plca_cfg *plca_cfg); 1752 int genphy_c45_plca_get_status(struct phy_device *phydev, 1753 struct phy_plca_status *plca_st); 1754 1755 /* Generic C45 PHY driver */ 1756 extern struct phy_driver genphy_c45_driver; 1757 1758 /* The gen10g_* functions are the old Clause 45 stub */ 1759 int gen10g_config_aneg(struct phy_device *phydev); 1760 1761 static inline int phy_read_status(struct phy_device *phydev) 1762 { 1763 if (!phydev->drv) 1764 return -EIO; 1765 1766 if (phydev->drv->read_status) 1767 return phydev->drv->read_status(phydev); 1768 else 1769 return genphy_read_status(phydev); 1770 } 1771 1772 void phy_driver_unregister(struct phy_driver *drv); 1773 void phy_drivers_unregister(struct phy_driver *drv, int n); 1774 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1775 int phy_drivers_register(struct phy_driver *new_driver, int n, 1776 struct module *owner); 1777 void phy_error(struct phy_device *phydev); 1778 void phy_state_machine(struct work_struct *work); 1779 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1780 void phy_trigger_machine(struct phy_device *phydev); 1781 void phy_mac_interrupt(struct phy_device *phydev); 1782 void phy_start_machine(struct phy_device *phydev); 1783 void phy_stop_machine(struct phy_device *phydev); 1784 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1785 struct ethtool_link_ksettings *cmd); 1786 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1787 const struct ethtool_link_ksettings *cmd); 1788 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1789 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1790 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1791 int phy_disable_interrupts(struct phy_device *phydev); 1792 void phy_request_interrupt(struct phy_device *phydev); 1793 void phy_free_interrupt(struct phy_device *phydev); 1794 void phy_print_status(struct phy_device *phydev); 1795 int phy_get_rate_matching(struct phy_device *phydev, 1796 phy_interface_t iface); 1797 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1798 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1799 void phy_advertise_supported(struct phy_device *phydev); 1800 void phy_support_sym_pause(struct phy_device *phydev); 1801 void phy_support_asym_pause(struct phy_device *phydev); 1802 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1803 bool autoneg); 1804 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1805 bool phy_validate_pause(struct phy_device *phydev, 1806 struct ethtool_pauseparam *pp); 1807 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1808 1809 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 1810 const int *delay_values, int size, bool is_rx); 1811 1812 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1813 bool *tx_pause, bool *rx_pause); 1814 1815 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1816 int (*run)(struct phy_device *)); 1817 int phy_register_fixup_for_id(const char *bus_id, 1818 int (*run)(struct phy_device *)); 1819 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1820 int (*run)(struct phy_device *)); 1821 1822 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1823 int phy_unregister_fixup_for_id(const char *bus_id); 1824 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1825 1826 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1827 int phy_get_eee_err(struct phy_device *phydev); 1828 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1829 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1830 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1831 void phy_ethtool_get_wol(struct phy_device *phydev, 1832 struct ethtool_wolinfo *wol); 1833 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1834 struct ethtool_link_ksettings *cmd); 1835 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1836 const struct ethtool_link_ksettings *cmd); 1837 int phy_ethtool_nway_reset(struct net_device *ndev); 1838 int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size); 1839 void phy_package_leave(struct phy_device *phydev); 1840 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 1841 int addr, size_t priv_size); 1842 1843 #if IS_ENABLED(CONFIG_PHYLIB) 1844 int __init mdio_bus_init(void); 1845 void mdio_bus_exit(void); 1846 #endif 1847 1848 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 1849 int phy_ethtool_get_sset_count(struct phy_device *phydev); 1850 int phy_ethtool_get_stats(struct phy_device *phydev, 1851 struct ethtool_stats *stats, u64 *data); 1852 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 1853 struct phy_plca_cfg *plca_cfg); 1854 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 1855 const struct phy_plca_cfg *plca_cfg, 1856 struct netlink_ext_ack *extack); 1857 int phy_ethtool_get_plca_status(struct phy_device *phydev, 1858 struct phy_plca_status *plca_st); 1859 1860 static inline int phy_package_read(struct phy_device *phydev, u32 regnum) 1861 { 1862 struct phy_package_shared *shared = phydev->shared; 1863 1864 if (!shared) 1865 return -EIO; 1866 1867 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1868 } 1869 1870 static inline int __phy_package_read(struct phy_device *phydev, u32 regnum) 1871 { 1872 struct phy_package_shared *shared = phydev->shared; 1873 1874 if (!shared) 1875 return -EIO; 1876 1877 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1878 } 1879 1880 static inline int phy_package_write(struct phy_device *phydev, 1881 u32 regnum, u16 val) 1882 { 1883 struct phy_package_shared *shared = phydev->shared; 1884 1885 if (!shared) 1886 return -EIO; 1887 1888 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1889 } 1890 1891 static inline int __phy_package_write(struct phy_device *phydev, 1892 u32 regnum, u16 val) 1893 { 1894 struct phy_package_shared *shared = phydev->shared; 1895 1896 if (!shared) 1897 return -EIO; 1898 1899 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1900 } 1901 1902 static inline bool __phy_package_set_once(struct phy_device *phydev, 1903 unsigned int b) 1904 { 1905 struct phy_package_shared *shared = phydev->shared; 1906 1907 if (!shared) 1908 return false; 1909 1910 return !test_and_set_bit(b, &shared->flags); 1911 } 1912 1913 static inline bool phy_package_init_once(struct phy_device *phydev) 1914 { 1915 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 1916 } 1917 1918 static inline bool phy_package_probe_once(struct phy_device *phydev) 1919 { 1920 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 1921 } 1922 1923 extern struct bus_type mdio_bus_type; 1924 1925 struct mdio_board_info { 1926 const char *bus_id; 1927 char modalias[MDIO_NAME_SIZE]; 1928 int mdio_addr; 1929 const void *platform_data; 1930 }; 1931 1932 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1933 int mdiobus_register_board_info(const struct mdio_board_info *info, 1934 unsigned int n); 1935 #else 1936 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1937 unsigned int n) 1938 { 1939 return 0; 1940 } 1941 #endif 1942 1943 1944 /** 1945 * phy_module_driver() - Helper macro for registering PHY drivers 1946 * @__phy_drivers: array of PHY drivers to register 1947 * @__count: Numbers of members in array 1948 * 1949 * Helper macro for PHY drivers which do not do anything special in module 1950 * init/exit. Each module may only use this macro once, and calling it 1951 * replaces module_init() and module_exit(). 1952 */ 1953 #define phy_module_driver(__phy_drivers, __count) \ 1954 static int __init phy_module_init(void) \ 1955 { \ 1956 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 1957 } \ 1958 module_init(phy_module_init); \ 1959 static void __exit phy_module_exit(void) \ 1960 { \ 1961 phy_drivers_unregister(__phy_drivers, __count); \ 1962 } \ 1963 module_exit(phy_module_exit) 1964 1965 #define module_phy_driver(__phy_drivers) \ 1966 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 1967 1968 bool phy_driver_is_genphy(struct phy_device *phydev); 1969 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 1970 1971 #endif /* __PHY_H */ 1972