1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/linkmode.h> 18 #include <linux/mdio.h> 19 #include <linux/mii.h> 20 #include <linux/mii_timestamper.h> 21 #include <linux/module.h> 22 #include <linux/timer.h> 23 #include <linux/workqueue.h> 24 #include <linux/mod_devicetable.h> 25 26 #include <linux/atomic.h> 27 28 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 29 SUPPORTED_TP | \ 30 SUPPORTED_MII) 31 32 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 33 SUPPORTED_10baseT_Full) 34 35 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 36 SUPPORTED_100baseT_Full) 37 38 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 39 SUPPORTED_1000baseT_Full) 40 41 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 42 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 43 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 44 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 45 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 49 50 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 51 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 52 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 53 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 54 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 55 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 56 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 57 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 58 59 extern const int phy_basic_ports_array[3]; 60 extern const int phy_fibre_port_array[1]; 61 extern const int phy_all_ports_features_array[7]; 62 extern const int phy_10_100_features_array[4]; 63 extern const int phy_basic_t1_features_array[2]; 64 extern const int phy_gbit_features_array[2]; 65 extern const int phy_10gbit_features_array[1]; 66 67 /* 68 * Set phydev->irq to PHY_POLL if interrupts are not supported, 69 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if 70 * the attached driver handles the interrupt 71 */ 72 #define PHY_POLL -1 73 #define PHY_IGNORE_INTERRUPT -2 74 75 #define PHY_IS_INTERNAL 0x00000001 76 #define PHY_RST_AFTER_CLK_EN 0x00000002 77 #define MDIO_DEVICE_IS_PHY 0x80000000 78 79 /* Interface Mode definitions */ 80 typedef enum { 81 PHY_INTERFACE_MODE_NA, 82 PHY_INTERFACE_MODE_INTERNAL, 83 PHY_INTERFACE_MODE_MII, 84 PHY_INTERFACE_MODE_GMII, 85 PHY_INTERFACE_MODE_SGMII, 86 PHY_INTERFACE_MODE_TBI, 87 PHY_INTERFACE_MODE_REVMII, 88 PHY_INTERFACE_MODE_RMII, 89 PHY_INTERFACE_MODE_RGMII, 90 PHY_INTERFACE_MODE_RGMII_ID, 91 PHY_INTERFACE_MODE_RGMII_RXID, 92 PHY_INTERFACE_MODE_RGMII_TXID, 93 PHY_INTERFACE_MODE_RTBI, 94 PHY_INTERFACE_MODE_SMII, 95 PHY_INTERFACE_MODE_XGMII, 96 PHY_INTERFACE_MODE_MOCA, 97 PHY_INTERFACE_MODE_QSGMII, 98 PHY_INTERFACE_MODE_TRGMII, 99 PHY_INTERFACE_MODE_1000BASEX, 100 PHY_INTERFACE_MODE_2500BASEX, 101 PHY_INTERFACE_MODE_RXAUI, 102 PHY_INTERFACE_MODE_XAUI, 103 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 104 PHY_INTERFACE_MODE_10GBASER, 105 PHY_INTERFACE_MODE_USXGMII, 106 /* 10GBASE-KR - with Clause 73 AN */ 107 PHY_INTERFACE_MODE_10GKR, 108 PHY_INTERFACE_MODE_MAX, 109 } phy_interface_t; 110 111 /** 112 * phy_supported_speeds - return all speeds currently supported by a phy device 113 * @phy: The phy device to return supported speeds of. 114 * @speeds: buffer to store supported speeds in. 115 * @size: size of speeds buffer. 116 * 117 * Description: Returns the number of supported speeds, and fills 118 * the speeds buffer with the supported speeds. If speeds buffer is 119 * too small to contain all currently supported speeds, will return as 120 * many speeds as can fit. 121 */ 122 unsigned int phy_supported_speeds(struct phy_device *phy, 123 unsigned int *speeds, 124 unsigned int size); 125 126 /** 127 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 128 * @interface: enum phy_interface_t value 129 * 130 * Description: maps 'enum phy_interface_t' defined in this file 131 * into the device tree binding of 'phy-mode', so that Ethernet 132 * device driver can get phy interface from device tree. 133 */ 134 static inline const char *phy_modes(phy_interface_t interface) 135 { 136 switch (interface) { 137 case PHY_INTERFACE_MODE_NA: 138 return ""; 139 case PHY_INTERFACE_MODE_INTERNAL: 140 return "internal"; 141 case PHY_INTERFACE_MODE_MII: 142 return "mii"; 143 case PHY_INTERFACE_MODE_GMII: 144 return "gmii"; 145 case PHY_INTERFACE_MODE_SGMII: 146 return "sgmii"; 147 case PHY_INTERFACE_MODE_TBI: 148 return "tbi"; 149 case PHY_INTERFACE_MODE_REVMII: 150 return "rev-mii"; 151 case PHY_INTERFACE_MODE_RMII: 152 return "rmii"; 153 case PHY_INTERFACE_MODE_RGMII: 154 return "rgmii"; 155 case PHY_INTERFACE_MODE_RGMII_ID: 156 return "rgmii-id"; 157 case PHY_INTERFACE_MODE_RGMII_RXID: 158 return "rgmii-rxid"; 159 case PHY_INTERFACE_MODE_RGMII_TXID: 160 return "rgmii-txid"; 161 case PHY_INTERFACE_MODE_RTBI: 162 return "rtbi"; 163 case PHY_INTERFACE_MODE_SMII: 164 return "smii"; 165 case PHY_INTERFACE_MODE_XGMII: 166 return "xgmii"; 167 case PHY_INTERFACE_MODE_MOCA: 168 return "moca"; 169 case PHY_INTERFACE_MODE_QSGMII: 170 return "qsgmii"; 171 case PHY_INTERFACE_MODE_TRGMII: 172 return "trgmii"; 173 case PHY_INTERFACE_MODE_1000BASEX: 174 return "1000base-x"; 175 case PHY_INTERFACE_MODE_2500BASEX: 176 return "2500base-x"; 177 case PHY_INTERFACE_MODE_RXAUI: 178 return "rxaui"; 179 case PHY_INTERFACE_MODE_XAUI: 180 return "xaui"; 181 case PHY_INTERFACE_MODE_10GBASER: 182 return "10gbase-r"; 183 case PHY_INTERFACE_MODE_USXGMII: 184 return "usxgmii"; 185 case PHY_INTERFACE_MODE_10GKR: 186 return "10gbase-kr"; 187 default: 188 return "unknown"; 189 } 190 } 191 192 193 #define PHY_INIT_TIMEOUT 100000 194 #define PHY_FORCE_TIMEOUT 10 195 196 #define PHY_MAX_ADDR 32 197 198 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 199 #define PHY_ID_FMT "%s:%02x" 200 201 #define MII_BUS_ID_SIZE 61 202 203 /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit 204 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */ 205 #define MII_ADDR_C45 (1<<30) 206 #define MII_DEVADDR_C45_SHIFT 16 207 #define MII_REGADDR_C45_MASK GENMASK(15, 0) 208 209 struct device; 210 struct phylink; 211 struct sfp_bus; 212 struct sfp_upstream_ops; 213 struct sk_buff; 214 215 /* 216 * The Bus class for PHYs. Devices which provide access to 217 * PHYs should register using this structure 218 */ 219 struct mii_bus { 220 struct module *owner; 221 const char *name; 222 char id[MII_BUS_ID_SIZE]; 223 void *priv; 224 int (*read)(struct mii_bus *bus, int addr, int regnum); 225 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 226 int (*reset)(struct mii_bus *bus); 227 228 /* 229 * A lock to ensure that only one thing can read/write 230 * the MDIO bus at a time 231 */ 232 struct mutex mdio_lock; 233 234 struct device *parent; 235 enum { 236 MDIOBUS_ALLOCATED = 1, 237 MDIOBUS_REGISTERED, 238 MDIOBUS_UNREGISTERED, 239 MDIOBUS_RELEASED, 240 } state; 241 struct device dev; 242 243 /* list of all PHYs on bus */ 244 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 245 246 /* PHY addresses to be ignored when probing */ 247 u32 phy_mask; 248 249 /* PHY addresses to ignore the TA/read failure */ 250 u32 phy_ignore_ta_mask; 251 252 /* 253 * An array of interrupts, each PHY's interrupt at the index 254 * matching its address 255 */ 256 int irq[PHY_MAX_ADDR]; 257 258 /* GPIO reset pulse width in microseconds */ 259 int reset_delay_us; 260 /* RESET GPIO descriptor pointer */ 261 struct gpio_desc *reset_gpiod; 262 }; 263 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 264 265 struct mii_bus *mdiobus_alloc_size(size_t); 266 static inline struct mii_bus *mdiobus_alloc(void) 267 { 268 return mdiobus_alloc_size(0); 269 } 270 271 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 272 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 273 void mdiobus_unregister(struct mii_bus *bus); 274 void mdiobus_free(struct mii_bus *bus); 275 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 276 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 277 { 278 return devm_mdiobus_alloc_size(dev, 0); 279 } 280 281 void devm_mdiobus_free(struct device *dev, struct mii_bus *bus); 282 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); 283 284 #define PHY_INTERRUPT_DISABLED false 285 #define PHY_INTERRUPT_ENABLED true 286 287 /* PHY state machine states: 288 * 289 * DOWN: PHY device and driver are not ready for anything. probe 290 * should be called if and only if the PHY is in this state, 291 * given that the PHY device exists. 292 * - PHY driver probe function will set the state to READY 293 * 294 * READY: PHY is ready to send and receive packets, but the 295 * controller is not. By default, PHYs which do not implement 296 * probe will be set to this state by phy_probe(). 297 * - start will set the state to UP 298 * 299 * UP: The PHY and attached device are ready to do work. 300 * Interrupts should be started here. 301 * - timer moves to NOLINK or RUNNING 302 * 303 * NOLINK: PHY is up, but not currently plugged in. 304 * - irq or timer will set RUNNING if link comes back 305 * - phy_stop moves to HALTED 306 * 307 * RUNNING: PHY is currently up, running, and possibly sending 308 * and/or receiving packets 309 * - irq or timer will set NOLINK if link goes down 310 * - phy_stop moves to HALTED 311 * 312 * HALTED: PHY is up, but no polling or interrupts are done. Or 313 * PHY is in an error state. 314 * - phy_start moves to UP 315 */ 316 enum phy_state { 317 PHY_DOWN = 0, 318 PHY_READY, 319 PHY_HALTED, 320 PHY_UP, 321 PHY_RUNNING, 322 PHY_NOLINK, 323 }; 324 325 /** 326 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 327 * @devices_in_package: Bit vector of devices present. 328 * @device_ids: The device identifer for each present device. 329 */ 330 struct phy_c45_device_ids { 331 u32 devices_in_package; 332 u32 device_ids[8]; 333 }; 334 335 /* phy_device: An instance of a PHY 336 * 337 * drv: Pointer to the driver for this PHY instance 338 * phy_id: UID for this device found during discovery 339 * c45_ids: 802.3-c45 Device Identifers if is_c45. 340 * is_c45: Set to true if this phy uses clause 45 addressing. 341 * is_internal: Set to true if this phy is internal to a MAC. 342 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc. 343 * is_gigabit_capable: Set to true if PHY supports 1000Mbps 344 * has_fixups: Set to true if this phy has fixups/quirks. 345 * suspended: Set to true if this phy has been suspended successfully. 346 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 347 * loopback_enabled: Set true if this phy has been loopbacked successfully. 348 * state: state of the PHY for management purposes 349 * dev_flags: Device-specific flags used by the PHY driver. 350 * irq: IRQ number of the PHY's interrupt (-1 if none) 351 * phy_timer: The timer for handling the state machine 352 * sfp_bus_attached: flag indicating whether the SFP bus has been attached 353 * sfp_bus: SFP bus attached to this PHY's fiber port 354 * attached_dev: The attached enet driver's device instance ptr 355 * adjust_link: Callback for the enet controller to respond to 356 * changes in the link state. 357 * 358 * speed, duplex, pause, supported, advertising, lp_advertising, 359 * and autoneg are used like in mii_if_info 360 * 361 * interrupts currently only supports enabled or disabled, 362 * but could be changed in the future to support enabling 363 * and disabling specific interrupts 364 * 365 * Contains some infrastructure for polling and interrupt 366 * handling, as well as handling shifts in PHY hardware state 367 */ 368 struct phy_device { 369 struct mdio_device mdio; 370 371 /* Information about the PHY type */ 372 /* And management functions */ 373 struct phy_driver *drv; 374 375 u32 phy_id; 376 377 struct phy_c45_device_ids c45_ids; 378 unsigned is_c45:1; 379 unsigned is_internal:1; 380 unsigned is_pseudo_fixed_link:1; 381 unsigned is_gigabit_capable:1; 382 unsigned has_fixups:1; 383 unsigned suspended:1; 384 unsigned sysfs_links:1; 385 unsigned loopback_enabled:1; 386 387 unsigned autoneg:1; 388 /* The most recently read link state */ 389 unsigned link:1; 390 unsigned autoneg_complete:1; 391 392 /* Interrupts are enabled */ 393 unsigned interrupts:1; 394 395 enum phy_state state; 396 397 u32 dev_flags; 398 399 phy_interface_t interface; 400 401 /* 402 * forced speed & duplex (no autoneg) 403 * partner speed & duplex & pause (autoneg) 404 */ 405 int speed; 406 int duplex; 407 int pause; 408 int asym_pause; 409 410 /* Union of PHY and Attached devices' supported link modes */ 411 /* See ethtool.h for more info */ 412 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 413 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 414 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 415 /* used with phy_speed_down */ 416 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 417 418 /* Energy efficient ethernet modes which should be prohibited */ 419 u32 eee_broken_modes; 420 421 #ifdef CONFIG_LED_TRIGGER_PHY 422 struct phy_led_trigger *phy_led_triggers; 423 unsigned int phy_num_led_triggers; 424 struct phy_led_trigger *last_triggered; 425 426 struct phy_led_trigger *led_link_trigger; 427 #endif 428 429 /* 430 * Interrupt number for this PHY 431 * -1 means no interrupt 432 */ 433 int irq; 434 435 /* private data pointer */ 436 /* For use by PHYs to maintain extra state */ 437 void *priv; 438 439 /* Interrupt and Polling infrastructure */ 440 struct delayed_work state_queue; 441 442 struct mutex lock; 443 444 /* This may be modified under the rtnl lock */ 445 bool sfp_bus_attached; 446 struct sfp_bus *sfp_bus; 447 struct phylink *phylink; 448 struct net_device *attached_dev; 449 struct mii_timestamper *mii_ts; 450 451 u8 mdix; 452 u8 mdix_ctrl; 453 454 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier); 455 void (*adjust_link)(struct net_device *dev); 456 }; 457 #define to_phy_device(d) container_of(to_mdio_device(d), \ 458 struct phy_device, mdio) 459 460 /* struct phy_driver: Driver structure for a particular PHY type 461 * 462 * driver_data: static driver data 463 * phy_id: The result of reading the UID registers of this PHY 464 * type, and ANDing them with the phy_id_mask. This driver 465 * only works for PHYs with IDs which match this field 466 * name: The friendly name of this PHY type 467 * phy_id_mask: Defines the important bits of the phy_id 468 * features: A mandatory list of features (speed, duplex, etc) 469 * supported by this PHY 470 * flags: A bitfield defining certain other features this PHY 471 * supports (like interrupts) 472 * 473 * All functions are optional. If config_aneg or read_status 474 * are not implemented, the phy core uses the genphy versions. 475 * Note that none of these functions should be called from 476 * interrupt time. The goal is for the bus read/write functions 477 * to be able to block when the bus transaction is happening, 478 * and be freed up by an interrupt (The MPC85xx has this ability, 479 * though it is not currently supported in the driver). 480 */ 481 struct phy_driver { 482 struct mdio_driver_common mdiodrv; 483 u32 phy_id; 484 char *name; 485 u32 phy_id_mask; 486 const unsigned long * const features; 487 u32 flags; 488 const void *driver_data; 489 490 /* 491 * Called to issue a PHY software reset 492 */ 493 int (*soft_reset)(struct phy_device *phydev); 494 495 /* 496 * Called to initialize the PHY, 497 * including after a reset 498 */ 499 int (*config_init)(struct phy_device *phydev); 500 501 /* 502 * Called during discovery. Used to set 503 * up device-specific structures, if any 504 */ 505 int (*probe)(struct phy_device *phydev); 506 507 /* 508 * Probe the hardware to determine what abilities it has. 509 * Should only set phydev->supported. 510 */ 511 int (*get_features)(struct phy_device *phydev); 512 513 /* PHY Power Management */ 514 int (*suspend)(struct phy_device *phydev); 515 int (*resume)(struct phy_device *phydev); 516 517 /* 518 * Configures the advertisement and resets 519 * autonegotiation if phydev->autoneg is on, 520 * forces the speed to the current settings in phydev 521 * if phydev->autoneg is off 522 */ 523 int (*config_aneg)(struct phy_device *phydev); 524 525 /* Determines the auto negotiation result */ 526 int (*aneg_done)(struct phy_device *phydev); 527 528 /* Determines the negotiated speed and duplex */ 529 int (*read_status)(struct phy_device *phydev); 530 531 /* Clears any pending interrupts */ 532 int (*ack_interrupt)(struct phy_device *phydev); 533 534 /* Enables or disables interrupts */ 535 int (*config_intr)(struct phy_device *phydev); 536 537 /* 538 * Checks if the PHY generated an interrupt. 539 * For multi-PHY devices with shared PHY interrupt pin 540 */ 541 int (*did_interrupt)(struct phy_device *phydev); 542 543 /* Override default interrupt handling */ 544 int (*handle_interrupt)(struct phy_device *phydev); 545 546 /* Clears up any memory if needed */ 547 void (*remove)(struct phy_device *phydev); 548 549 /* Returns true if this is a suitable driver for the given 550 * phydev. If NULL, matching is based on phy_id and 551 * phy_id_mask. 552 */ 553 int (*match_phy_device)(struct phy_device *phydev); 554 555 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to 556 * enable Wake on LAN, so set_wol is provided to be called in the 557 * ethernet driver's set_wol function. */ 558 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 559 560 /* See set_wol, but for checking whether Wake on LAN is enabled. */ 561 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 562 563 /* 564 * Called to inform a PHY device driver when the core is about to 565 * change the link state. This callback is supposed to be used as 566 * fixup hook for drivers that need to take action when the link 567 * state changes. Drivers are by no means allowed to mess with the 568 * PHY device structure in their implementations. 569 */ 570 void (*link_change_notify)(struct phy_device *dev); 571 572 /* 573 * Phy specific driver override for reading a MMD register. 574 * This function is optional for PHY specific drivers. When 575 * not provided, the default MMD read function will be used 576 * by phy_read_mmd(), which will use either a direct read for 577 * Clause 45 PHYs or an indirect read for Clause 22 PHYs. 578 * devnum is the MMD device number within the PHY device, 579 * regnum is the register within the selected MMD device. 580 */ 581 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 582 583 /* 584 * Phy specific driver override for writing a MMD register. 585 * This function is optional for PHY specific drivers. When 586 * not provided, the default MMD write function will be used 587 * by phy_write_mmd(), which will use either a direct write for 588 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs. 589 * devnum is the MMD device number within the PHY device, 590 * regnum is the register within the selected MMD device. 591 * val is the value to be written. 592 */ 593 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 594 u16 val); 595 596 int (*read_page)(struct phy_device *dev); 597 int (*write_page)(struct phy_device *dev, int page); 598 599 /* Get the size and type of the eeprom contained within a plug-in 600 * module */ 601 int (*module_info)(struct phy_device *dev, 602 struct ethtool_modinfo *modinfo); 603 604 /* Get the eeprom information from the plug-in module */ 605 int (*module_eeprom)(struct phy_device *dev, 606 struct ethtool_eeprom *ee, u8 *data); 607 608 /* Get statistics from the phy using ethtool */ 609 int (*get_sset_count)(struct phy_device *dev); 610 void (*get_strings)(struct phy_device *dev, u8 *data); 611 void (*get_stats)(struct phy_device *dev, 612 struct ethtool_stats *stats, u64 *data); 613 614 /* Get and Set PHY tunables */ 615 int (*get_tunable)(struct phy_device *dev, 616 struct ethtool_tunable *tuna, void *data); 617 int (*set_tunable)(struct phy_device *dev, 618 struct ethtool_tunable *tuna, 619 const void *data); 620 int (*set_loopback)(struct phy_device *dev, bool enable); 621 }; 622 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 623 struct phy_driver, mdiodrv) 624 625 #define PHY_ANY_ID "MATCH ANY PHY" 626 #define PHY_ANY_UID 0xffffffff 627 628 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 629 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 630 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 631 632 /* A Structure for boards to register fixups with the PHY Lib */ 633 struct phy_fixup { 634 struct list_head list; 635 char bus_id[MII_BUS_ID_SIZE + 3]; 636 u32 phy_uid; 637 u32 phy_uid_mask; 638 int (*run)(struct phy_device *phydev); 639 }; 640 641 const char *phy_speed_to_str(int speed); 642 const char *phy_duplex_to_str(unsigned int duplex); 643 644 /* A structure for mapping a particular speed and duplex 645 * combination to a particular SUPPORTED and ADVERTISED value 646 */ 647 struct phy_setting { 648 u32 speed; 649 u8 duplex; 650 u8 bit; 651 }; 652 653 const struct phy_setting * 654 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 655 bool exact); 656 size_t phy_speeds(unsigned int *speeds, size_t size, 657 unsigned long *mask); 658 void of_set_phy_supported(struct phy_device *phydev); 659 void of_set_phy_eee_broken(struct phy_device *phydev); 660 int phy_speed_down_core(struct phy_device *phydev); 661 662 /** 663 * phy_is_started - Convenience function to check whether PHY is started 664 * @phydev: The phy_device struct 665 */ 666 static inline bool phy_is_started(struct phy_device *phydev) 667 { 668 return phydev->state >= PHY_UP; 669 } 670 671 void phy_resolve_aneg_pause(struct phy_device *phydev); 672 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 673 674 /** 675 * phy_read - Convenience function for reading a given PHY register 676 * @phydev: the phy_device struct 677 * @regnum: register number to read 678 * 679 * NOTE: MUST NOT be called from interrupt context, 680 * because the bus read/write functions may wait for an interrupt 681 * to conclude the operation. 682 */ 683 static inline int phy_read(struct phy_device *phydev, u32 regnum) 684 { 685 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 686 } 687 688 /** 689 * __phy_read - convenience function for reading a given PHY register 690 * @phydev: the phy_device struct 691 * @regnum: register number to read 692 * 693 * The caller must have taken the MDIO bus lock. 694 */ 695 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 696 { 697 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 698 } 699 700 /** 701 * phy_write - Convenience function for writing a given PHY register 702 * @phydev: the phy_device struct 703 * @regnum: register number to write 704 * @val: value to write to @regnum 705 * 706 * NOTE: MUST NOT be called from interrupt context, 707 * because the bus read/write functions may wait for an interrupt 708 * to conclude the operation. 709 */ 710 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 711 { 712 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 713 } 714 715 /** 716 * __phy_write - Convenience function for writing a given PHY register 717 * @phydev: the phy_device struct 718 * @regnum: register number to write 719 * @val: value to write to @regnum 720 * 721 * The caller must have taken the MDIO bus lock. 722 */ 723 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 724 { 725 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 726 val); 727 } 728 729 /** 730 * phy_read_mmd - Convenience function for reading a register 731 * from an MMD on a given PHY. 732 * @phydev: The phy_device struct 733 * @devad: The MMD to read from 734 * @regnum: The register on the MMD to read 735 * 736 * Same rules as for phy_read(); 737 */ 738 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 739 740 /** 741 * __phy_read_mmd - Convenience function for reading a register 742 * from an MMD on a given PHY. 743 * @phydev: The phy_device struct 744 * @devad: The MMD to read from 745 * @regnum: The register on the MMD to read 746 * 747 * Same rules as for __phy_read(); 748 */ 749 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 750 751 /** 752 * phy_write_mmd - Convenience function for writing a register 753 * on an MMD on a given PHY. 754 * @phydev: The phy_device struct 755 * @devad: The MMD to write to 756 * @regnum: The register on the MMD to read 757 * @val: value to write to @regnum 758 * 759 * Same rules as for phy_write(); 760 */ 761 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 762 763 /** 764 * __phy_write_mmd - Convenience function for writing a register 765 * on an MMD on a given PHY. 766 * @phydev: The phy_device struct 767 * @devad: The MMD to write to 768 * @regnum: The register on the MMD to read 769 * @val: value to write to @regnum 770 * 771 * Same rules as for __phy_write(); 772 */ 773 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 774 775 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 776 u16 set); 777 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 778 u16 set); 779 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 780 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 781 782 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 783 u16 mask, u16 set); 784 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 785 u16 mask, u16 set); 786 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 787 u16 mask, u16 set); 788 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 789 u16 mask, u16 set); 790 791 /** 792 * __phy_set_bits - Convenience function for setting bits in a PHY register 793 * @phydev: the phy_device struct 794 * @regnum: register number to write 795 * @val: bits to set 796 * 797 * The caller must have taken the MDIO bus lock. 798 */ 799 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 800 { 801 return __phy_modify(phydev, regnum, 0, val); 802 } 803 804 /** 805 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 806 * @phydev: the phy_device struct 807 * @regnum: register number to write 808 * @val: bits to clear 809 * 810 * The caller must have taken the MDIO bus lock. 811 */ 812 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 813 u16 val) 814 { 815 return __phy_modify(phydev, regnum, val, 0); 816 } 817 818 /** 819 * phy_set_bits - Convenience function for setting bits in a PHY register 820 * @phydev: the phy_device struct 821 * @regnum: register number to write 822 * @val: bits to set 823 */ 824 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 825 { 826 return phy_modify(phydev, regnum, 0, val); 827 } 828 829 /** 830 * phy_clear_bits - Convenience function for clearing bits in a PHY register 831 * @phydev: the phy_device struct 832 * @regnum: register number to write 833 * @val: bits to clear 834 */ 835 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 836 { 837 return phy_modify(phydev, regnum, val, 0); 838 } 839 840 /** 841 * __phy_set_bits_mmd - Convenience function for setting bits in a register 842 * on MMD 843 * @phydev: the phy_device struct 844 * @devad: the MMD containing register to modify 845 * @regnum: register number to modify 846 * @val: bits to set 847 * 848 * The caller must have taken the MDIO bus lock. 849 */ 850 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 851 u32 regnum, u16 val) 852 { 853 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 854 } 855 856 /** 857 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 858 * on MMD 859 * @phydev: the phy_device struct 860 * @devad: the MMD containing register to modify 861 * @regnum: register number to modify 862 * @val: bits to clear 863 * 864 * The caller must have taken the MDIO bus lock. 865 */ 866 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 867 u32 regnum, u16 val) 868 { 869 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 870 } 871 872 /** 873 * phy_set_bits_mmd - Convenience function for setting bits in a register 874 * on MMD 875 * @phydev: the phy_device struct 876 * @devad: the MMD containing register to modify 877 * @regnum: register number to modify 878 * @val: bits to set 879 */ 880 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 881 u32 regnum, u16 val) 882 { 883 return phy_modify_mmd(phydev, devad, regnum, 0, val); 884 } 885 886 /** 887 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 888 * on MMD 889 * @phydev: the phy_device struct 890 * @devad: the MMD containing register to modify 891 * @regnum: register number to modify 892 * @val: bits to clear 893 */ 894 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 895 u32 regnum, u16 val) 896 { 897 return phy_modify_mmd(phydev, devad, regnum, val, 0); 898 } 899 900 /** 901 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 902 * @phydev: the phy_device struct 903 * 904 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 905 * PHY_IGNORE_INTERRUPT 906 */ 907 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 908 { 909 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT; 910 } 911 912 /** 913 * phy_polling_mode - Convenience function for testing whether polling is 914 * used to detect PHY status changes 915 * @phydev: the phy_device struct 916 */ 917 static inline bool phy_polling_mode(struct phy_device *phydev) 918 { 919 return phydev->irq == PHY_POLL; 920 } 921 922 /** 923 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 924 * @phydev: the phy_device struct 925 */ 926 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 927 { 928 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 929 } 930 931 /** 932 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 933 * @phydev: the phy_device struct 934 */ 935 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 936 { 937 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 938 } 939 940 /** 941 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 942 * PTP hardware clock capabilities. 943 * @phydev: the phy_device struct 944 */ 945 static inline bool phy_has_tsinfo(struct phy_device *phydev) 946 { 947 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 948 } 949 950 /** 951 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 952 * @phydev: the phy_device struct 953 */ 954 static inline bool phy_has_txtstamp(struct phy_device *phydev) 955 { 956 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 957 } 958 959 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) 960 { 961 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); 962 } 963 964 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 965 int type) 966 { 967 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 968 } 969 970 static inline int phy_ts_info(struct phy_device *phydev, 971 struct ethtool_ts_info *tsinfo) 972 { 973 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 974 } 975 976 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 977 int type) 978 { 979 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 980 } 981 982 /** 983 * phy_is_internal - Convenience function for testing if a PHY is internal 984 * @phydev: the phy_device struct 985 */ 986 static inline bool phy_is_internal(struct phy_device *phydev) 987 { 988 return phydev->is_internal; 989 } 990 991 /** 992 * phy_interface_mode_is_rgmii - Convenience function for testing if a 993 * PHY interface mode is RGMII (all variants) 994 * @mode: the phy_interface_t enum 995 */ 996 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 997 { 998 return mode >= PHY_INTERFACE_MODE_RGMII && 999 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1000 }; 1001 1002 /** 1003 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z 1004 * negotiation 1005 * @mode: one of &enum phy_interface_t 1006 * 1007 * Returns true if the phy interface mode uses the 16-bit negotiation 1008 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1009 */ 1010 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1011 { 1012 return mode == PHY_INTERFACE_MODE_1000BASEX || 1013 mode == PHY_INTERFACE_MODE_2500BASEX; 1014 } 1015 1016 /** 1017 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1018 * is RGMII (all variants) 1019 * @phydev: the phy_device struct 1020 */ 1021 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1022 { 1023 return phy_interface_mode_is_rgmii(phydev->interface); 1024 }; 1025 1026 /* 1027 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1028 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1029 * @phydev: the phy_device struct 1030 */ 1031 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1032 { 1033 return phydev->is_pseudo_fixed_link; 1034 } 1035 1036 int phy_save_page(struct phy_device *phydev); 1037 int phy_select_page(struct phy_device *phydev, int page); 1038 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1039 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1040 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1041 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1042 u16 mask, u16 set); 1043 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1044 u16 mask, u16 set); 1045 1046 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1047 bool is_c45, 1048 struct phy_c45_device_ids *c45_ids); 1049 #if IS_ENABLED(CONFIG_PHYLIB) 1050 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1051 int phy_device_register(struct phy_device *phy); 1052 void phy_device_free(struct phy_device *phydev); 1053 #else 1054 static inline 1055 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1056 { 1057 return NULL; 1058 } 1059 1060 static inline int phy_device_register(struct phy_device *phy) 1061 { 1062 return 0; 1063 } 1064 1065 static inline void phy_device_free(struct phy_device *phydev) { } 1066 #endif /* CONFIG_PHYLIB */ 1067 void phy_device_remove(struct phy_device *phydev); 1068 int phy_init_hw(struct phy_device *phydev); 1069 int phy_suspend(struct phy_device *phydev); 1070 int phy_resume(struct phy_device *phydev); 1071 int __phy_resume(struct phy_device *phydev); 1072 int phy_loopback(struct phy_device *phydev, bool enable); 1073 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1074 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1075 int phy_sfp_probe(struct phy_device *phydev, 1076 const struct sfp_upstream_ops *ops); 1077 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1078 phy_interface_t interface); 1079 struct phy_device *phy_find_first(struct mii_bus *bus); 1080 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1081 u32 flags, phy_interface_t interface); 1082 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1083 void (*handler)(struct net_device *), 1084 phy_interface_t interface); 1085 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1086 void (*handler)(struct net_device *), 1087 phy_interface_t interface); 1088 void phy_disconnect(struct phy_device *phydev); 1089 void phy_detach(struct phy_device *phydev); 1090 void phy_start(struct phy_device *phydev); 1091 void phy_stop(struct phy_device *phydev); 1092 int phy_start_aneg(struct phy_device *phydev); 1093 int phy_aneg_done(struct phy_device *phydev); 1094 int phy_speed_down(struct phy_device *phydev, bool sync); 1095 int phy_speed_up(struct phy_device *phydev); 1096 1097 int phy_restart_aneg(struct phy_device *phydev); 1098 int phy_reset_after_clk_enable(struct phy_device *phydev); 1099 1100 static inline void phy_device_reset(struct phy_device *phydev, int value) 1101 { 1102 mdio_device_reset(&phydev->mdio, value); 1103 } 1104 1105 #define phydev_err(_phydev, format, args...) \ 1106 dev_err(&_phydev->mdio.dev, format, ##args) 1107 1108 #define phydev_info(_phydev, format, args...) \ 1109 dev_info(&_phydev->mdio.dev, format, ##args) 1110 1111 #define phydev_warn(_phydev, format, args...) \ 1112 dev_warn(&_phydev->mdio.dev, format, ##args) 1113 1114 #define phydev_dbg(_phydev, format, args...) \ 1115 dev_dbg(&_phydev->mdio.dev, format, ##args) 1116 1117 static inline const char *phydev_name(const struct phy_device *phydev) 1118 { 1119 return dev_name(&phydev->mdio.dev); 1120 } 1121 1122 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1123 { 1124 mutex_lock(&phydev->mdio.bus->mdio_lock); 1125 } 1126 1127 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1128 { 1129 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1130 } 1131 1132 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1133 __printf(2, 3); 1134 void phy_attached_info(struct phy_device *phydev); 1135 1136 /* Clause 22 PHY */ 1137 int genphy_read_abilities(struct phy_device *phydev); 1138 int genphy_setup_forced(struct phy_device *phydev); 1139 int genphy_restart_aneg(struct phy_device *phydev); 1140 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1141 int genphy_config_eee_advert(struct phy_device *phydev); 1142 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1143 int genphy_aneg_done(struct phy_device *phydev); 1144 int genphy_update_link(struct phy_device *phydev); 1145 int genphy_read_lpa(struct phy_device *phydev); 1146 int genphy_read_status_fixed(struct phy_device *phydev); 1147 int genphy_read_status(struct phy_device *phydev); 1148 int genphy_suspend(struct phy_device *phydev); 1149 int genphy_resume(struct phy_device *phydev); 1150 int genphy_loopback(struct phy_device *phydev, bool enable); 1151 int genphy_soft_reset(struct phy_device *phydev); 1152 1153 static inline int genphy_config_aneg(struct phy_device *phydev) 1154 { 1155 return __genphy_config_aneg(phydev, false); 1156 } 1157 1158 static inline int genphy_no_soft_reset(struct phy_device *phydev) 1159 { 1160 return 0; 1161 } 1162 static inline int genphy_no_ack_interrupt(struct phy_device *phydev) 1163 { 1164 return 0; 1165 } 1166 static inline int genphy_no_config_intr(struct phy_device *phydev) 1167 { 1168 return 0; 1169 } 1170 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1171 u16 regnum); 1172 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1173 u16 regnum, u16 val); 1174 1175 /* Clause 37 */ 1176 int genphy_c37_config_aneg(struct phy_device *phydev); 1177 int genphy_c37_read_status(struct phy_device *phydev); 1178 1179 /* Clause 45 PHY */ 1180 int genphy_c45_restart_aneg(struct phy_device *phydev); 1181 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1182 int genphy_c45_aneg_done(struct phy_device *phydev); 1183 int genphy_c45_read_link(struct phy_device *phydev); 1184 int genphy_c45_read_lpa(struct phy_device *phydev); 1185 int genphy_c45_read_pma(struct phy_device *phydev); 1186 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1187 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1188 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1189 int genphy_c45_read_mdix(struct phy_device *phydev); 1190 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1191 int genphy_c45_read_status(struct phy_device *phydev); 1192 int genphy_c45_config_aneg(struct phy_device *phydev); 1193 1194 /* The gen10g_* functions are the old Clause 45 stub */ 1195 int gen10g_config_aneg(struct phy_device *phydev); 1196 1197 static inline int phy_read_status(struct phy_device *phydev) 1198 { 1199 if (!phydev->drv) 1200 return -EIO; 1201 1202 if (phydev->drv->read_status) 1203 return phydev->drv->read_status(phydev); 1204 else 1205 return genphy_read_status(phydev); 1206 } 1207 1208 void phy_driver_unregister(struct phy_driver *drv); 1209 void phy_drivers_unregister(struct phy_driver *drv, int n); 1210 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1211 int phy_drivers_register(struct phy_driver *new_driver, int n, 1212 struct module *owner); 1213 void phy_state_machine(struct work_struct *work); 1214 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1215 void phy_mac_interrupt(struct phy_device *phydev); 1216 void phy_start_machine(struct phy_device *phydev); 1217 void phy_stop_machine(struct phy_device *phydev); 1218 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1219 struct ethtool_link_ksettings *cmd); 1220 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1221 const struct ethtool_link_ksettings *cmd); 1222 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1223 void phy_request_interrupt(struct phy_device *phydev); 1224 void phy_free_interrupt(struct phy_device *phydev); 1225 void phy_print_status(struct phy_device *phydev); 1226 int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1227 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1228 void phy_advertise_supported(struct phy_device *phydev); 1229 void phy_support_sym_pause(struct phy_device *phydev); 1230 void phy_support_asym_pause(struct phy_device *phydev); 1231 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1232 bool autoneg); 1233 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1234 bool phy_validate_pause(struct phy_device *phydev, 1235 struct ethtool_pauseparam *pp); 1236 1237 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1238 int (*run)(struct phy_device *)); 1239 int phy_register_fixup_for_id(const char *bus_id, 1240 int (*run)(struct phy_device *)); 1241 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1242 int (*run)(struct phy_device *)); 1243 1244 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1245 int phy_unregister_fixup_for_id(const char *bus_id); 1246 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1247 1248 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1249 int phy_get_eee_err(struct phy_device *phydev); 1250 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1251 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1252 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1253 void phy_ethtool_get_wol(struct phy_device *phydev, 1254 struct ethtool_wolinfo *wol); 1255 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1256 struct ethtool_link_ksettings *cmd); 1257 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1258 const struct ethtool_link_ksettings *cmd); 1259 int phy_ethtool_nway_reset(struct net_device *ndev); 1260 1261 #if IS_ENABLED(CONFIG_PHYLIB) 1262 int __init mdio_bus_init(void); 1263 void mdio_bus_exit(void); 1264 #endif 1265 1266 /* Inline function for use within net/core/ethtool.c (built-in) */ 1267 static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data) 1268 { 1269 if (!phydev->drv) 1270 return -EIO; 1271 1272 mutex_lock(&phydev->lock); 1273 phydev->drv->get_strings(phydev, data); 1274 mutex_unlock(&phydev->lock); 1275 1276 return 0; 1277 } 1278 1279 static inline int phy_ethtool_get_sset_count(struct phy_device *phydev) 1280 { 1281 int ret; 1282 1283 if (!phydev->drv) 1284 return -EIO; 1285 1286 if (phydev->drv->get_sset_count && 1287 phydev->drv->get_strings && 1288 phydev->drv->get_stats) { 1289 mutex_lock(&phydev->lock); 1290 ret = phydev->drv->get_sset_count(phydev); 1291 mutex_unlock(&phydev->lock); 1292 1293 return ret; 1294 } 1295 1296 return -EOPNOTSUPP; 1297 } 1298 1299 static inline int phy_ethtool_get_stats(struct phy_device *phydev, 1300 struct ethtool_stats *stats, u64 *data) 1301 { 1302 if (!phydev->drv) 1303 return -EIO; 1304 1305 mutex_lock(&phydev->lock); 1306 phydev->drv->get_stats(phydev, stats, data); 1307 mutex_unlock(&phydev->lock); 1308 1309 return 0; 1310 } 1311 1312 extern struct bus_type mdio_bus_type; 1313 1314 struct mdio_board_info { 1315 const char *bus_id; 1316 char modalias[MDIO_NAME_SIZE]; 1317 int mdio_addr; 1318 const void *platform_data; 1319 }; 1320 1321 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1322 int mdiobus_register_board_info(const struct mdio_board_info *info, 1323 unsigned int n); 1324 #else 1325 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1326 unsigned int n) 1327 { 1328 return 0; 1329 } 1330 #endif 1331 1332 1333 /** 1334 * module_phy_driver() - Helper macro for registering PHY drivers 1335 * @__phy_drivers: array of PHY drivers to register 1336 * 1337 * Helper macro for PHY drivers which do not do anything special in module 1338 * init/exit. Each module may only use this macro once, and calling it 1339 * replaces module_init() and module_exit(). 1340 */ 1341 #define phy_module_driver(__phy_drivers, __count) \ 1342 static int __init phy_module_init(void) \ 1343 { \ 1344 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 1345 } \ 1346 module_init(phy_module_init); \ 1347 static void __exit phy_module_exit(void) \ 1348 { \ 1349 phy_drivers_unregister(__phy_drivers, __count); \ 1350 } \ 1351 module_exit(phy_module_exit) 1352 1353 #define module_phy_driver(__phy_drivers) \ 1354 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 1355 1356 bool phy_driver_is_genphy(struct phy_device *phydev); 1357 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 1358 1359 #endif /* __PHY_H */ 1360