1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/linkmode.h> 18 #include <linux/mdio.h> 19 #include <linux/mii.h> 20 #include <linux/mii_timestamper.h> 21 #include <linux/module.h> 22 #include <linux/timer.h> 23 #include <linux/workqueue.h> 24 #include <linux/mod_devicetable.h> 25 #include <linux/u64_stats_sync.h> 26 27 #include <linux/atomic.h> 28 29 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 30 SUPPORTED_TP | \ 31 SUPPORTED_MII) 32 33 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 34 SUPPORTED_10baseT_Full) 35 36 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 37 SUPPORTED_100baseT_Full) 38 39 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 40 SUPPORTED_1000baseT_Full) 41 42 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 43 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 44 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 45 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 50 51 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 52 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 53 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 54 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 55 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 56 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 57 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 58 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 59 60 extern const int phy_basic_ports_array[3]; 61 extern const int phy_fibre_port_array[1]; 62 extern const int phy_all_ports_features_array[7]; 63 extern const int phy_10_100_features_array[4]; 64 extern const int phy_basic_t1_features_array[2]; 65 extern const int phy_gbit_features_array[2]; 66 extern const int phy_10gbit_features_array[1]; 67 68 /* 69 * Set phydev->irq to PHY_POLL if interrupts are not supported, 70 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if 71 * the attached driver handles the interrupt 72 */ 73 #define PHY_POLL -1 74 #define PHY_IGNORE_INTERRUPT -2 75 76 #define PHY_IS_INTERNAL 0x00000001 77 #define PHY_RST_AFTER_CLK_EN 0x00000002 78 #define MDIO_DEVICE_IS_PHY 0x80000000 79 80 /* Interface Mode definitions */ 81 typedef enum { 82 PHY_INTERFACE_MODE_NA, 83 PHY_INTERFACE_MODE_INTERNAL, 84 PHY_INTERFACE_MODE_MII, 85 PHY_INTERFACE_MODE_GMII, 86 PHY_INTERFACE_MODE_SGMII, 87 PHY_INTERFACE_MODE_TBI, 88 PHY_INTERFACE_MODE_REVMII, 89 PHY_INTERFACE_MODE_RMII, 90 PHY_INTERFACE_MODE_RGMII, 91 PHY_INTERFACE_MODE_RGMII_ID, 92 PHY_INTERFACE_MODE_RGMII_RXID, 93 PHY_INTERFACE_MODE_RGMII_TXID, 94 PHY_INTERFACE_MODE_RTBI, 95 PHY_INTERFACE_MODE_SMII, 96 PHY_INTERFACE_MODE_XGMII, 97 PHY_INTERFACE_MODE_XLGMII, 98 PHY_INTERFACE_MODE_MOCA, 99 PHY_INTERFACE_MODE_QSGMII, 100 PHY_INTERFACE_MODE_TRGMII, 101 PHY_INTERFACE_MODE_1000BASEX, 102 PHY_INTERFACE_MODE_2500BASEX, 103 PHY_INTERFACE_MODE_RXAUI, 104 PHY_INTERFACE_MODE_XAUI, 105 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 106 PHY_INTERFACE_MODE_10GBASER, 107 PHY_INTERFACE_MODE_USXGMII, 108 /* 10GBASE-KR - with Clause 73 AN */ 109 PHY_INTERFACE_MODE_10GKR, 110 PHY_INTERFACE_MODE_MAX, 111 } phy_interface_t; 112 113 /** 114 * phy_supported_speeds - return all speeds currently supported by a phy device 115 * @phy: The phy device to return supported speeds of. 116 * @speeds: buffer to store supported speeds in. 117 * @size: size of speeds buffer. 118 * 119 * Description: Returns the number of supported speeds, and fills 120 * the speeds buffer with the supported speeds. If speeds buffer is 121 * too small to contain all currently supported speeds, will return as 122 * many speeds as can fit. 123 */ 124 unsigned int phy_supported_speeds(struct phy_device *phy, 125 unsigned int *speeds, 126 unsigned int size); 127 128 /** 129 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 130 * @interface: enum phy_interface_t value 131 * 132 * Description: maps 'enum phy_interface_t' defined in this file 133 * into the device tree binding of 'phy-mode', so that Ethernet 134 * device driver can get phy interface from device tree. 135 */ 136 static inline const char *phy_modes(phy_interface_t interface) 137 { 138 switch (interface) { 139 case PHY_INTERFACE_MODE_NA: 140 return ""; 141 case PHY_INTERFACE_MODE_INTERNAL: 142 return "internal"; 143 case PHY_INTERFACE_MODE_MII: 144 return "mii"; 145 case PHY_INTERFACE_MODE_GMII: 146 return "gmii"; 147 case PHY_INTERFACE_MODE_SGMII: 148 return "sgmii"; 149 case PHY_INTERFACE_MODE_TBI: 150 return "tbi"; 151 case PHY_INTERFACE_MODE_REVMII: 152 return "rev-mii"; 153 case PHY_INTERFACE_MODE_RMII: 154 return "rmii"; 155 case PHY_INTERFACE_MODE_RGMII: 156 return "rgmii"; 157 case PHY_INTERFACE_MODE_RGMII_ID: 158 return "rgmii-id"; 159 case PHY_INTERFACE_MODE_RGMII_RXID: 160 return "rgmii-rxid"; 161 case PHY_INTERFACE_MODE_RGMII_TXID: 162 return "rgmii-txid"; 163 case PHY_INTERFACE_MODE_RTBI: 164 return "rtbi"; 165 case PHY_INTERFACE_MODE_SMII: 166 return "smii"; 167 case PHY_INTERFACE_MODE_XGMII: 168 return "xgmii"; 169 case PHY_INTERFACE_MODE_XLGMII: 170 return "xlgmii"; 171 case PHY_INTERFACE_MODE_MOCA: 172 return "moca"; 173 case PHY_INTERFACE_MODE_QSGMII: 174 return "qsgmii"; 175 case PHY_INTERFACE_MODE_TRGMII: 176 return "trgmii"; 177 case PHY_INTERFACE_MODE_1000BASEX: 178 return "1000base-x"; 179 case PHY_INTERFACE_MODE_2500BASEX: 180 return "2500base-x"; 181 case PHY_INTERFACE_MODE_RXAUI: 182 return "rxaui"; 183 case PHY_INTERFACE_MODE_XAUI: 184 return "xaui"; 185 case PHY_INTERFACE_MODE_10GBASER: 186 return "10gbase-r"; 187 case PHY_INTERFACE_MODE_USXGMII: 188 return "usxgmii"; 189 case PHY_INTERFACE_MODE_10GKR: 190 return "10gbase-kr"; 191 default: 192 return "unknown"; 193 } 194 } 195 196 197 #define PHY_INIT_TIMEOUT 100000 198 #define PHY_FORCE_TIMEOUT 10 199 200 #define PHY_MAX_ADDR 32 201 202 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 203 #define PHY_ID_FMT "%s:%02x" 204 205 #define MII_BUS_ID_SIZE 61 206 207 /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit 208 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */ 209 #define MII_ADDR_C45 (1<<30) 210 #define MII_DEVADDR_C45_SHIFT 16 211 #define MII_REGADDR_C45_MASK GENMASK(15, 0) 212 213 struct device; 214 struct phylink; 215 struct sfp_bus; 216 struct sfp_upstream_ops; 217 struct sk_buff; 218 219 struct mdio_bus_stats { 220 u64_stats_t transfers; 221 u64_stats_t errors; 222 u64_stats_t writes; 223 u64_stats_t reads; 224 /* Must be last, add new statistics above */ 225 struct u64_stats_sync syncp; 226 }; 227 228 /* 229 * The Bus class for PHYs. Devices which provide access to 230 * PHYs should register using this structure 231 */ 232 struct mii_bus { 233 struct module *owner; 234 const char *name; 235 char id[MII_BUS_ID_SIZE]; 236 void *priv; 237 int (*read)(struct mii_bus *bus, int addr, int regnum); 238 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 239 int (*reset)(struct mii_bus *bus); 240 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 241 242 /* 243 * A lock to ensure that only one thing can read/write 244 * the MDIO bus at a time 245 */ 246 struct mutex mdio_lock; 247 248 struct device *parent; 249 enum { 250 MDIOBUS_ALLOCATED = 1, 251 MDIOBUS_REGISTERED, 252 MDIOBUS_UNREGISTERED, 253 MDIOBUS_RELEASED, 254 } state; 255 struct device dev; 256 257 /* list of all PHYs on bus */ 258 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 259 260 /* PHY addresses to be ignored when probing */ 261 u32 phy_mask; 262 263 /* PHY addresses to ignore the TA/read failure */ 264 u32 phy_ignore_ta_mask; 265 266 /* 267 * An array of interrupts, each PHY's interrupt at the index 268 * matching its address 269 */ 270 int irq[PHY_MAX_ADDR]; 271 272 /* GPIO reset pulse width in microseconds */ 273 int reset_delay_us; 274 /* RESET GPIO descriptor pointer */ 275 struct gpio_desc *reset_gpiod; 276 }; 277 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 278 279 struct mii_bus *mdiobus_alloc_size(size_t); 280 static inline struct mii_bus *mdiobus_alloc(void) 281 { 282 return mdiobus_alloc_size(0); 283 } 284 285 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 286 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 287 void mdiobus_unregister(struct mii_bus *bus); 288 void mdiobus_free(struct mii_bus *bus); 289 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 290 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 291 { 292 return devm_mdiobus_alloc_size(dev, 0); 293 } 294 295 struct mii_bus *mdio_find_bus(const char *mdio_name); 296 void devm_mdiobus_free(struct device *dev, struct mii_bus *bus); 297 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); 298 299 #define PHY_INTERRUPT_DISABLED false 300 #define PHY_INTERRUPT_ENABLED true 301 302 /* PHY state machine states: 303 * 304 * DOWN: PHY device and driver are not ready for anything. probe 305 * should be called if and only if the PHY is in this state, 306 * given that the PHY device exists. 307 * - PHY driver probe function will set the state to READY 308 * 309 * READY: PHY is ready to send and receive packets, but the 310 * controller is not. By default, PHYs which do not implement 311 * probe will be set to this state by phy_probe(). 312 * - start will set the state to UP 313 * 314 * UP: The PHY and attached device are ready to do work. 315 * Interrupts should be started here. 316 * - timer moves to NOLINK or RUNNING 317 * 318 * NOLINK: PHY is up, but not currently plugged in. 319 * - irq or timer will set RUNNING if link comes back 320 * - phy_stop moves to HALTED 321 * 322 * RUNNING: PHY is currently up, running, and possibly sending 323 * and/or receiving packets 324 * - irq or timer will set NOLINK if link goes down 325 * - phy_stop moves to HALTED 326 * 327 * HALTED: PHY is up, but no polling or interrupts are done. Or 328 * PHY is in an error state. 329 * - phy_start moves to UP 330 */ 331 enum phy_state { 332 PHY_DOWN = 0, 333 PHY_READY, 334 PHY_HALTED, 335 PHY_UP, 336 PHY_RUNNING, 337 PHY_NOLINK, 338 }; 339 340 /** 341 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 342 * @devices_in_package: Bit vector of devices present. 343 * @device_ids: The device identifer for each present device. 344 */ 345 struct phy_c45_device_ids { 346 u32 devices_in_package; 347 u32 device_ids[8]; 348 }; 349 350 struct macsec_context; 351 struct macsec_ops; 352 353 /* phy_device: An instance of a PHY 354 * 355 * drv: Pointer to the driver for this PHY instance 356 * phy_id: UID for this device found during discovery 357 * c45_ids: 802.3-c45 Device Identifers if is_c45. 358 * is_c45: Set to true if this phy uses clause 45 addressing. 359 * is_internal: Set to true if this phy is internal to a MAC. 360 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc. 361 * is_gigabit_capable: Set to true if PHY supports 1000Mbps 362 * has_fixups: Set to true if this phy has fixups/quirks. 363 * suspended: Set to true if this phy has been suspended successfully. 364 * suspended_by_mdio_bus: Set to true if this phy was suspended by MDIO bus. 365 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 366 * loopback_enabled: Set true if this phy has been loopbacked successfully. 367 * state: state of the PHY for management purposes 368 * dev_flags: Device-specific flags used by the PHY driver. 369 * irq: IRQ number of the PHY's interrupt (-1 if none) 370 * phy_timer: The timer for handling the state machine 371 * sfp_bus_attached: flag indicating whether the SFP bus has been attached 372 * sfp_bus: SFP bus attached to this PHY's fiber port 373 * attached_dev: The attached enet driver's device instance ptr 374 * adjust_link: Callback for the enet controller to respond to 375 * changes in the link state. 376 * macsec_ops: MACsec offloading ops. 377 * 378 * speed, duplex, pause, supported, advertising, lp_advertising, 379 * and autoneg are used like in mii_if_info 380 * 381 * interrupts currently only supports enabled or disabled, 382 * but could be changed in the future to support enabling 383 * and disabling specific interrupts 384 * 385 * Contains some infrastructure for polling and interrupt 386 * handling, as well as handling shifts in PHY hardware state 387 */ 388 struct phy_device { 389 struct mdio_device mdio; 390 391 /* Information about the PHY type */ 392 /* And management functions */ 393 struct phy_driver *drv; 394 395 u32 phy_id; 396 397 struct phy_c45_device_ids c45_ids; 398 unsigned is_c45:1; 399 unsigned is_internal:1; 400 unsigned is_pseudo_fixed_link:1; 401 unsigned is_gigabit_capable:1; 402 unsigned has_fixups:1; 403 unsigned suspended:1; 404 unsigned suspended_by_mdio_bus:1; 405 unsigned sysfs_links:1; 406 unsigned loopback_enabled:1; 407 408 unsigned autoneg:1; 409 /* The most recently read link state */ 410 unsigned link:1; 411 unsigned autoneg_complete:1; 412 413 /* Interrupts are enabled */ 414 unsigned interrupts:1; 415 416 enum phy_state state; 417 418 u32 dev_flags; 419 420 phy_interface_t interface; 421 422 /* 423 * forced speed & duplex (no autoneg) 424 * partner speed & duplex & pause (autoneg) 425 */ 426 int speed; 427 int duplex; 428 int pause; 429 int asym_pause; 430 431 /* Union of PHY and Attached devices' supported link modes */ 432 /* See ethtool.h for more info */ 433 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 434 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 435 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 436 /* used with phy_speed_down */ 437 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 438 439 /* Energy efficient ethernet modes which should be prohibited */ 440 u32 eee_broken_modes; 441 442 #ifdef CONFIG_LED_TRIGGER_PHY 443 struct phy_led_trigger *phy_led_triggers; 444 unsigned int phy_num_led_triggers; 445 struct phy_led_trigger *last_triggered; 446 447 struct phy_led_trigger *led_link_trigger; 448 #endif 449 450 /* 451 * Interrupt number for this PHY 452 * -1 means no interrupt 453 */ 454 int irq; 455 456 /* private data pointer */ 457 /* For use by PHYs to maintain extra state */ 458 void *priv; 459 460 /* Interrupt and Polling infrastructure */ 461 struct delayed_work state_queue; 462 463 struct mutex lock; 464 465 /* This may be modified under the rtnl lock */ 466 bool sfp_bus_attached; 467 struct sfp_bus *sfp_bus; 468 struct phylink *phylink; 469 struct net_device *attached_dev; 470 struct mii_timestamper *mii_ts; 471 472 u8 mdix; 473 u8 mdix_ctrl; 474 475 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier); 476 void (*adjust_link)(struct net_device *dev); 477 478 #if IS_ENABLED(CONFIG_MACSEC) 479 /* MACsec management functions */ 480 const struct macsec_ops *macsec_ops; 481 #endif 482 }; 483 #define to_phy_device(d) container_of(to_mdio_device(d), \ 484 struct phy_device, mdio) 485 486 /* struct phy_driver: Driver structure for a particular PHY type 487 * 488 * driver_data: static driver data 489 * phy_id: The result of reading the UID registers of this PHY 490 * type, and ANDing them with the phy_id_mask. This driver 491 * only works for PHYs with IDs which match this field 492 * name: The friendly name of this PHY type 493 * phy_id_mask: Defines the important bits of the phy_id 494 * features: A mandatory list of features (speed, duplex, etc) 495 * supported by this PHY 496 * flags: A bitfield defining certain other features this PHY 497 * supports (like interrupts) 498 * 499 * All functions are optional. If config_aneg or read_status 500 * are not implemented, the phy core uses the genphy versions. 501 * Note that none of these functions should be called from 502 * interrupt time. The goal is for the bus read/write functions 503 * to be able to block when the bus transaction is happening, 504 * and be freed up by an interrupt (The MPC85xx has this ability, 505 * though it is not currently supported in the driver). 506 */ 507 struct phy_driver { 508 struct mdio_driver_common mdiodrv; 509 u32 phy_id; 510 char *name; 511 u32 phy_id_mask; 512 const unsigned long * const features; 513 u32 flags; 514 const void *driver_data; 515 516 /* 517 * Called to issue a PHY software reset 518 */ 519 int (*soft_reset)(struct phy_device *phydev); 520 521 /* 522 * Called to initialize the PHY, 523 * including after a reset 524 */ 525 int (*config_init)(struct phy_device *phydev); 526 527 /* 528 * Called during discovery. Used to set 529 * up device-specific structures, if any 530 */ 531 int (*probe)(struct phy_device *phydev); 532 533 /* 534 * Probe the hardware to determine what abilities it has. 535 * Should only set phydev->supported. 536 */ 537 int (*get_features)(struct phy_device *phydev); 538 539 /* PHY Power Management */ 540 int (*suspend)(struct phy_device *phydev); 541 int (*resume)(struct phy_device *phydev); 542 543 /* 544 * Configures the advertisement and resets 545 * autonegotiation if phydev->autoneg is on, 546 * forces the speed to the current settings in phydev 547 * if phydev->autoneg is off 548 */ 549 int (*config_aneg)(struct phy_device *phydev); 550 551 /* Determines the auto negotiation result */ 552 int (*aneg_done)(struct phy_device *phydev); 553 554 /* Determines the negotiated speed and duplex */ 555 int (*read_status)(struct phy_device *phydev); 556 557 /* Clears any pending interrupts */ 558 int (*ack_interrupt)(struct phy_device *phydev); 559 560 /* Enables or disables interrupts */ 561 int (*config_intr)(struct phy_device *phydev); 562 563 /* 564 * Checks if the PHY generated an interrupt. 565 * For multi-PHY devices with shared PHY interrupt pin 566 * Set interrupt bits have to be cleared. 567 */ 568 int (*did_interrupt)(struct phy_device *phydev); 569 570 /* Override default interrupt handling */ 571 int (*handle_interrupt)(struct phy_device *phydev); 572 573 /* Clears up any memory if needed */ 574 void (*remove)(struct phy_device *phydev); 575 576 /* Returns true if this is a suitable driver for the given 577 * phydev. If NULL, matching is based on phy_id and 578 * phy_id_mask. 579 */ 580 int (*match_phy_device)(struct phy_device *phydev); 581 582 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to 583 * enable Wake on LAN, so set_wol is provided to be called in the 584 * ethernet driver's set_wol function. */ 585 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 586 587 /* See set_wol, but for checking whether Wake on LAN is enabled. */ 588 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 589 590 /* 591 * Called to inform a PHY device driver when the core is about to 592 * change the link state. This callback is supposed to be used as 593 * fixup hook for drivers that need to take action when the link 594 * state changes. Drivers are by no means allowed to mess with the 595 * PHY device structure in their implementations. 596 */ 597 void (*link_change_notify)(struct phy_device *dev); 598 599 /* 600 * Phy specific driver override for reading a MMD register. 601 * This function is optional for PHY specific drivers. When 602 * not provided, the default MMD read function will be used 603 * by phy_read_mmd(), which will use either a direct read for 604 * Clause 45 PHYs or an indirect read for Clause 22 PHYs. 605 * devnum is the MMD device number within the PHY device, 606 * regnum is the register within the selected MMD device. 607 */ 608 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 609 610 /* 611 * Phy specific driver override for writing a MMD register. 612 * This function is optional for PHY specific drivers. When 613 * not provided, the default MMD write function will be used 614 * by phy_write_mmd(), which will use either a direct write for 615 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs. 616 * devnum is the MMD device number within the PHY device, 617 * regnum is the register within the selected MMD device. 618 * val is the value to be written. 619 */ 620 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 621 u16 val); 622 623 int (*read_page)(struct phy_device *dev); 624 int (*write_page)(struct phy_device *dev, int page); 625 626 /* Get the size and type of the eeprom contained within a plug-in 627 * module */ 628 int (*module_info)(struct phy_device *dev, 629 struct ethtool_modinfo *modinfo); 630 631 /* Get the eeprom information from the plug-in module */ 632 int (*module_eeprom)(struct phy_device *dev, 633 struct ethtool_eeprom *ee, u8 *data); 634 635 /* Get statistics from the phy using ethtool */ 636 int (*get_sset_count)(struct phy_device *dev); 637 void (*get_strings)(struct phy_device *dev, u8 *data); 638 void (*get_stats)(struct phy_device *dev, 639 struct ethtool_stats *stats, u64 *data); 640 641 /* Get and Set PHY tunables */ 642 int (*get_tunable)(struct phy_device *dev, 643 struct ethtool_tunable *tuna, void *data); 644 int (*set_tunable)(struct phy_device *dev, 645 struct ethtool_tunable *tuna, 646 const void *data); 647 int (*set_loopback)(struct phy_device *dev, bool enable); 648 }; 649 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 650 struct phy_driver, mdiodrv) 651 652 #define PHY_ANY_ID "MATCH ANY PHY" 653 #define PHY_ANY_UID 0xffffffff 654 655 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 656 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 657 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 658 659 /* A Structure for boards to register fixups with the PHY Lib */ 660 struct phy_fixup { 661 struct list_head list; 662 char bus_id[MII_BUS_ID_SIZE + 3]; 663 u32 phy_uid; 664 u32 phy_uid_mask; 665 int (*run)(struct phy_device *phydev); 666 }; 667 668 const char *phy_speed_to_str(int speed); 669 const char *phy_duplex_to_str(unsigned int duplex); 670 671 /* A structure for mapping a particular speed and duplex 672 * combination to a particular SUPPORTED and ADVERTISED value 673 */ 674 struct phy_setting { 675 u32 speed; 676 u8 duplex; 677 u8 bit; 678 }; 679 680 const struct phy_setting * 681 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 682 bool exact); 683 size_t phy_speeds(unsigned int *speeds, size_t size, 684 unsigned long *mask); 685 void of_set_phy_supported(struct phy_device *phydev); 686 void of_set_phy_eee_broken(struct phy_device *phydev); 687 int phy_speed_down_core(struct phy_device *phydev); 688 689 /** 690 * phy_is_started - Convenience function to check whether PHY is started 691 * @phydev: The phy_device struct 692 */ 693 static inline bool phy_is_started(struct phy_device *phydev) 694 { 695 return phydev->state >= PHY_UP; 696 } 697 698 void phy_resolve_aneg_pause(struct phy_device *phydev); 699 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 700 701 /** 702 * phy_read - Convenience function for reading a given PHY register 703 * @phydev: the phy_device struct 704 * @regnum: register number to read 705 * 706 * NOTE: MUST NOT be called from interrupt context, 707 * because the bus read/write functions may wait for an interrupt 708 * to conclude the operation. 709 */ 710 static inline int phy_read(struct phy_device *phydev, u32 regnum) 711 { 712 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 713 } 714 715 /** 716 * __phy_read - convenience function for reading a given PHY register 717 * @phydev: the phy_device struct 718 * @regnum: register number to read 719 * 720 * The caller must have taken the MDIO bus lock. 721 */ 722 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 723 { 724 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 725 } 726 727 /** 728 * phy_write - Convenience function for writing a given PHY register 729 * @phydev: the phy_device struct 730 * @regnum: register number to write 731 * @val: value to write to @regnum 732 * 733 * NOTE: MUST NOT be called from interrupt context, 734 * because the bus read/write functions may wait for an interrupt 735 * to conclude the operation. 736 */ 737 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 738 { 739 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 740 } 741 742 /** 743 * __phy_write - Convenience function for writing a given PHY register 744 * @phydev: the phy_device struct 745 * @regnum: register number to write 746 * @val: value to write to @regnum 747 * 748 * The caller must have taken the MDIO bus lock. 749 */ 750 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 751 { 752 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 753 val); 754 } 755 756 /** 757 * phy_read_mmd - Convenience function for reading a register 758 * from an MMD on a given PHY. 759 * @phydev: The phy_device struct 760 * @devad: The MMD to read from 761 * @regnum: The register on the MMD to read 762 * 763 * Same rules as for phy_read(); 764 */ 765 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 766 767 /** 768 * __phy_read_mmd - Convenience function for reading a register 769 * from an MMD on a given PHY. 770 * @phydev: The phy_device struct 771 * @devad: The MMD to read from 772 * @regnum: The register on the MMD to read 773 * 774 * Same rules as for __phy_read(); 775 */ 776 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 777 778 /** 779 * phy_write_mmd - Convenience function for writing a register 780 * on an MMD on a given PHY. 781 * @phydev: The phy_device struct 782 * @devad: The MMD to write to 783 * @regnum: The register on the MMD to read 784 * @val: value to write to @regnum 785 * 786 * Same rules as for phy_write(); 787 */ 788 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 789 790 /** 791 * __phy_write_mmd - Convenience function for writing a register 792 * on an MMD on a given PHY. 793 * @phydev: The phy_device struct 794 * @devad: The MMD to write to 795 * @regnum: The register on the MMD to read 796 * @val: value to write to @regnum 797 * 798 * Same rules as for __phy_write(); 799 */ 800 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 801 802 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 803 u16 set); 804 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 805 u16 set); 806 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 807 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 808 809 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 810 u16 mask, u16 set); 811 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 812 u16 mask, u16 set); 813 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 814 u16 mask, u16 set); 815 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 816 u16 mask, u16 set); 817 818 /** 819 * __phy_set_bits - Convenience function for setting bits in a PHY register 820 * @phydev: the phy_device struct 821 * @regnum: register number to write 822 * @val: bits to set 823 * 824 * The caller must have taken the MDIO bus lock. 825 */ 826 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 827 { 828 return __phy_modify(phydev, regnum, 0, val); 829 } 830 831 /** 832 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 833 * @phydev: the phy_device struct 834 * @regnum: register number to write 835 * @val: bits to clear 836 * 837 * The caller must have taken the MDIO bus lock. 838 */ 839 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 840 u16 val) 841 { 842 return __phy_modify(phydev, regnum, val, 0); 843 } 844 845 /** 846 * phy_set_bits - Convenience function for setting bits in a PHY register 847 * @phydev: the phy_device struct 848 * @regnum: register number to write 849 * @val: bits to set 850 */ 851 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 852 { 853 return phy_modify(phydev, regnum, 0, val); 854 } 855 856 /** 857 * phy_clear_bits - Convenience function for clearing bits in a PHY register 858 * @phydev: the phy_device struct 859 * @regnum: register number to write 860 * @val: bits to clear 861 */ 862 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 863 { 864 return phy_modify(phydev, regnum, val, 0); 865 } 866 867 /** 868 * __phy_set_bits_mmd - Convenience function for setting bits in a register 869 * on MMD 870 * @phydev: the phy_device struct 871 * @devad: the MMD containing register to modify 872 * @regnum: register number to modify 873 * @val: bits to set 874 * 875 * The caller must have taken the MDIO bus lock. 876 */ 877 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 878 u32 regnum, u16 val) 879 { 880 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 881 } 882 883 /** 884 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 885 * on MMD 886 * @phydev: the phy_device struct 887 * @devad: the MMD containing register to modify 888 * @regnum: register number to modify 889 * @val: bits to clear 890 * 891 * The caller must have taken the MDIO bus lock. 892 */ 893 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 894 u32 regnum, u16 val) 895 { 896 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 897 } 898 899 /** 900 * phy_set_bits_mmd - Convenience function for setting bits in a register 901 * on MMD 902 * @phydev: the phy_device struct 903 * @devad: the MMD containing register to modify 904 * @regnum: register number to modify 905 * @val: bits to set 906 */ 907 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 908 u32 regnum, u16 val) 909 { 910 return phy_modify_mmd(phydev, devad, regnum, 0, val); 911 } 912 913 /** 914 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 915 * on MMD 916 * @phydev: the phy_device struct 917 * @devad: the MMD containing register to modify 918 * @regnum: register number to modify 919 * @val: bits to clear 920 */ 921 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 922 u32 regnum, u16 val) 923 { 924 return phy_modify_mmd(phydev, devad, regnum, val, 0); 925 } 926 927 /** 928 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 929 * @phydev: the phy_device struct 930 * 931 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 932 * PHY_IGNORE_INTERRUPT 933 */ 934 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 935 { 936 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT; 937 } 938 939 /** 940 * phy_polling_mode - Convenience function for testing whether polling is 941 * used to detect PHY status changes 942 * @phydev: the phy_device struct 943 */ 944 static inline bool phy_polling_mode(struct phy_device *phydev) 945 { 946 return phydev->irq == PHY_POLL; 947 } 948 949 /** 950 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 951 * @phydev: the phy_device struct 952 */ 953 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 954 { 955 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 956 } 957 958 /** 959 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 960 * @phydev: the phy_device struct 961 */ 962 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 963 { 964 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 965 } 966 967 /** 968 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 969 * PTP hardware clock capabilities. 970 * @phydev: the phy_device struct 971 */ 972 static inline bool phy_has_tsinfo(struct phy_device *phydev) 973 { 974 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 975 } 976 977 /** 978 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 979 * @phydev: the phy_device struct 980 */ 981 static inline bool phy_has_txtstamp(struct phy_device *phydev) 982 { 983 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 984 } 985 986 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) 987 { 988 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); 989 } 990 991 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 992 int type) 993 { 994 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 995 } 996 997 static inline int phy_ts_info(struct phy_device *phydev, 998 struct ethtool_ts_info *tsinfo) 999 { 1000 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1001 } 1002 1003 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1004 int type) 1005 { 1006 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1007 } 1008 1009 /** 1010 * phy_is_internal - Convenience function for testing if a PHY is internal 1011 * @phydev: the phy_device struct 1012 */ 1013 static inline bool phy_is_internal(struct phy_device *phydev) 1014 { 1015 return phydev->is_internal; 1016 } 1017 1018 /** 1019 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1020 * PHY interface mode is RGMII (all variants) 1021 * @mode: the phy_interface_t enum 1022 */ 1023 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1024 { 1025 return mode >= PHY_INTERFACE_MODE_RGMII && 1026 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1027 }; 1028 1029 /** 1030 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z 1031 * negotiation 1032 * @mode: one of &enum phy_interface_t 1033 * 1034 * Returns true if the phy interface mode uses the 16-bit negotiation 1035 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1036 */ 1037 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1038 { 1039 return mode == PHY_INTERFACE_MODE_1000BASEX || 1040 mode == PHY_INTERFACE_MODE_2500BASEX; 1041 } 1042 1043 /** 1044 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1045 * is RGMII (all variants) 1046 * @phydev: the phy_device struct 1047 */ 1048 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1049 { 1050 return phy_interface_mode_is_rgmii(phydev->interface); 1051 }; 1052 1053 /* 1054 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1055 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1056 * @phydev: the phy_device struct 1057 */ 1058 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1059 { 1060 return phydev->is_pseudo_fixed_link; 1061 } 1062 1063 int phy_save_page(struct phy_device *phydev); 1064 int phy_select_page(struct phy_device *phydev, int page); 1065 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1066 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1067 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1068 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1069 u16 mask, u16 set); 1070 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1071 u16 mask, u16 set); 1072 1073 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1074 bool is_c45, 1075 struct phy_c45_device_ids *c45_ids); 1076 #if IS_ENABLED(CONFIG_PHYLIB) 1077 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1078 int phy_device_register(struct phy_device *phy); 1079 void phy_device_free(struct phy_device *phydev); 1080 #else 1081 static inline 1082 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1083 { 1084 return NULL; 1085 } 1086 1087 static inline int phy_device_register(struct phy_device *phy) 1088 { 1089 return 0; 1090 } 1091 1092 static inline void phy_device_free(struct phy_device *phydev) { } 1093 #endif /* CONFIG_PHYLIB */ 1094 void phy_device_remove(struct phy_device *phydev); 1095 int phy_init_hw(struct phy_device *phydev); 1096 int phy_suspend(struct phy_device *phydev); 1097 int phy_resume(struct phy_device *phydev); 1098 int __phy_resume(struct phy_device *phydev); 1099 int phy_loopback(struct phy_device *phydev, bool enable); 1100 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1101 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1102 int phy_sfp_probe(struct phy_device *phydev, 1103 const struct sfp_upstream_ops *ops); 1104 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1105 phy_interface_t interface); 1106 struct phy_device *phy_find_first(struct mii_bus *bus); 1107 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1108 u32 flags, phy_interface_t interface); 1109 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1110 void (*handler)(struct net_device *), 1111 phy_interface_t interface); 1112 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1113 void (*handler)(struct net_device *), 1114 phy_interface_t interface); 1115 void phy_disconnect(struct phy_device *phydev); 1116 void phy_detach(struct phy_device *phydev); 1117 void phy_start(struct phy_device *phydev); 1118 void phy_stop(struct phy_device *phydev); 1119 int phy_start_aneg(struct phy_device *phydev); 1120 int phy_aneg_done(struct phy_device *phydev); 1121 int phy_speed_down(struct phy_device *phydev, bool sync); 1122 int phy_speed_up(struct phy_device *phydev); 1123 1124 int phy_restart_aneg(struct phy_device *phydev); 1125 int phy_reset_after_clk_enable(struct phy_device *phydev); 1126 1127 static inline void phy_device_reset(struct phy_device *phydev, int value) 1128 { 1129 mdio_device_reset(&phydev->mdio, value); 1130 } 1131 1132 #define phydev_err(_phydev, format, args...) \ 1133 dev_err(&_phydev->mdio.dev, format, ##args) 1134 1135 #define phydev_info(_phydev, format, args...) \ 1136 dev_info(&_phydev->mdio.dev, format, ##args) 1137 1138 #define phydev_warn(_phydev, format, args...) \ 1139 dev_warn(&_phydev->mdio.dev, format, ##args) 1140 1141 #define phydev_dbg(_phydev, format, args...) \ 1142 dev_dbg(&_phydev->mdio.dev, format, ##args) 1143 1144 static inline const char *phydev_name(const struct phy_device *phydev) 1145 { 1146 return dev_name(&phydev->mdio.dev); 1147 } 1148 1149 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1150 { 1151 mutex_lock(&phydev->mdio.bus->mdio_lock); 1152 } 1153 1154 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1155 { 1156 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1157 } 1158 1159 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1160 __printf(2, 3); 1161 char *phy_attached_info_irq(struct phy_device *phydev) 1162 __malloc; 1163 void phy_attached_info(struct phy_device *phydev); 1164 1165 /* Clause 22 PHY */ 1166 int genphy_read_abilities(struct phy_device *phydev); 1167 int genphy_setup_forced(struct phy_device *phydev); 1168 int genphy_restart_aneg(struct phy_device *phydev); 1169 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1170 int genphy_config_eee_advert(struct phy_device *phydev); 1171 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1172 int genphy_aneg_done(struct phy_device *phydev); 1173 int genphy_update_link(struct phy_device *phydev); 1174 int genphy_read_lpa(struct phy_device *phydev); 1175 int genphy_read_status_fixed(struct phy_device *phydev); 1176 int genphy_read_status(struct phy_device *phydev); 1177 int genphy_suspend(struct phy_device *phydev); 1178 int genphy_resume(struct phy_device *phydev); 1179 int genphy_loopback(struct phy_device *phydev, bool enable); 1180 int genphy_soft_reset(struct phy_device *phydev); 1181 1182 static inline int genphy_config_aneg(struct phy_device *phydev) 1183 { 1184 return __genphy_config_aneg(phydev, false); 1185 } 1186 1187 static inline int genphy_no_soft_reset(struct phy_device *phydev) 1188 { 1189 return 0; 1190 } 1191 static inline int genphy_no_ack_interrupt(struct phy_device *phydev) 1192 { 1193 return 0; 1194 } 1195 static inline int genphy_no_config_intr(struct phy_device *phydev) 1196 { 1197 return 0; 1198 } 1199 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1200 u16 regnum); 1201 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1202 u16 regnum, u16 val); 1203 1204 /* Clause 37 */ 1205 int genphy_c37_config_aneg(struct phy_device *phydev); 1206 int genphy_c37_read_status(struct phy_device *phydev); 1207 1208 /* Clause 45 PHY */ 1209 int genphy_c45_restart_aneg(struct phy_device *phydev); 1210 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1211 int genphy_c45_aneg_done(struct phy_device *phydev); 1212 int genphy_c45_read_link(struct phy_device *phydev); 1213 int genphy_c45_read_lpa(struct phy_device *phydev); 1214 int genphy_c45_read_pma(struct phy_device *phydev); 1215 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1216 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1217 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1218 int genphy_c45_read_mdix(struct phy_device *phydev); 1219 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1220 int genphy_c45_read_status(struct phy_device *phydev); 1221 int genphy_c45_config_aneg(struct phy_device *phydev); 1222 1223 /* The gen10g_* functions are the old Clause 45 stub */ 1224 int gen10g_config_aneg(struct phy_device *phydev); 1225 1226 static inline int phy_read_status(struct phy_device *phydev) 1227 { 1228 if (!phydev->drv) 1229 return -EIO; 1230 1231 if (phydev->drv->read_status) 1232 return phydev->drv->read_status(phydev); 1233 else 1234 return genphy_read_status(phydev); 1235 } 1236 1237 void phy_driver_unregister(struct phy_driver *drv); 1238 void phy_drivers_unregister(struct phy_driver *drv, int n); 1239 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1240 int phy_drivers_register(struct phy_driver *new_driver, int n, 1241 struct module *owner); 1242 void phy_state_machine(struct work_struct *work); 1243 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1244 void phy_mac_interrupt(struct phy_device *phydev); 1245 void phy_start_machine(struct phy_device *phydev); 1246 void phy_stop_machine(struct phy_device *phydev); 1247 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1248 struct ethtool_link_ksettings *cmd); 1249 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1250 const struct ethtool_link_ksettings *cmd); 1251 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1252 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1253 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1254 void phy_request_interrupt(struct phy_device *phydev); 1255 void phy_free_interrupt(struct phy_device *phydev); 1256 void phy_print_status(struct phy_device *phydev); 1257 int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1258 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1259 void phy_advertise_supported(struct phy_device *phydev); 1260 void phy_support_sym_pause(struct phy_device *phydev); 1261 void phy_support_asym_pause(struct phy_device *phydev); 1262 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1263 bool autoneg); 1264 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1265 bool phy_validate_pause(struct phy_device *phydev, 1266 struct ethtool_pauseparam *pp); 1267 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1268 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1269 bool *tx_pause, bool *rx_pause); 1270 1271 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1272 int (*run)(struct phy_device *)); 1273 int phy_register_fixup_for_id(const char *bus_id, 1274 int (*run)(struct phy_device *)); 1275 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1276 int (*run)(struct phy_device *)); 1277 1278 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1279 int phy_unregister_fixup_for_id(const char *bus_id); 1280 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1281 1282 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1283 int phy_get_eee_err(struct phy_device *phydev); 1284 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1285 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1286 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1287 void phy_ethtool_get_wol(struct phy_device *phydev, 1288 struct ethtool_wolinfo *wol); 1289 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1290 struct ethtool_link_ksettings *cmd); 1291 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1292 const struct ethtool_link_ksettings *cmd); 1293 int phy_ethtool_nway_reset(struct net_device *ndev); 1294 1295 #if IS_ENABLED(CONFIG_PHYLIB) 1296 int __init mdio_bus_init(void); 1297 void mdio_bus_exit(void); 1298 #endif 1299 1300 /* Inline function for use within net/core/ethtool.c (built-in) */ 1301 static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data) 1302 { 1303 if (!phydev->drv) 1304 return -EIO; 1305 1306 mutex_lock(&phydev->lock); 1307 phydev->drv->get_strings(phydev, data); 1308 mutex_unlock(&phydev->lock); 1309 1310 return 0; 1311 } 1312 1313 static inline int phy_ethtool_get_sset_count(struct phy_device *phydev) 1314 { 1315 int ret; 1316 1317 if (!phydev->drv) 1318 return -EIO; 1319 1320 if (phydev->drv->get_sset_count && 1321 phydev->drv->get_strings && 1322 phydev->drv->get_stats) { 1323 mutex_lock(&phydev->lock); 1324 ret = phydev->drv->get_sset_count(phydev); 1325 mutex_unlock(&phydev->lock); 1326 1327 return ret; 1328 } 1329 1330 return -EOPNOTSUPP; 1331 } 1332 1333 static inline int phy_ethtool_get_stats(struct phy_device *phydev, 1334 struct ethtool_stats *stats, u64 *data) 1335 { 1336 if (!phydev->drv) 1337 return -EIO; 1338 1339 mutex_lock(&phydev->lock); 1340 phydev->drv->get_stats(phydev, stats, data); 1341 mutex_unlock(&phydev->lock); 1342 1343 return 0; 1344 } 1345 1346 extern struct bus_type mdio_bus_type; 1347 1348 struct mdio_board_info { 1349 const char *bus_id; 1350 char modalias[MDIO_NAME_SIZE]; 1351 int mdio_addr; 1352 const void *platform_data; 1353 }; 1354 1355 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1356 int mdiobus_register_board_info(const struct mdio_board_info *info, 1357 unsigned int n); 1358 #else 1359 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1360 unsigned int n) 1361 { 1362 return 0; 1363 } 1364 #endif 1365 1366 1367 /** 1368 * module_phy_driver() - Helper macro for registering PHY drivers 1369 * @__phy_drivers: array of PHY drivers to register 1370 * 1371 * Helper macro for PHY drivers which do not do anything special in module 1372 * init/exit. Each module may only use this macro once, and calling it 1373 * replaces module_init() and module_exit(). 1374 */ 1375 #define phy_module_driver(__phy_drivers, __count) \ 1376 static int __init phy_module_init(void) \ 1377 { \ 1378 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 1379 } \ 1380 module_init(phy_module_init); \ 1381 static void __exit phy_module_exit(void) \ 1382 { \ 1383 phy_drivers_unregister(__phy_drivers, __count); \ 1384 } \ 1385 module_exit(phy_module_exit) 1386 1387 #define module_phy_driver(__phy_drivers) \ 1388 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 1389 1390 bool phy_driver_is_genphy(struct phy_device *phydev); 1391 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 1392 1393 #endif /* __PHY_H */ 1394