1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/leds.h> 18 #include <linux/linkmode.h> 19 #include <linux/netlink.h> 20 #include <linux/mdio.h> 21 #include <linux/mii.h> 22 #include <linux/mii_timestamper.h> 23 #include <linux/module.h> 24 #include <linux/timer.h> 25 #include <linux/workqueue.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/u64_stats_sync.h> 28 #include <linux/irqreturn.h> 29 #include <linux/iopoll.h> 30 #include <linux/refcount.h> 31 32 #include <linux/atomic.h> 33 34 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 35 SUPPORTED_TP | \ 36 SUPPORTED_MII) 37 38 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 39 SUPPORTED_10baseT_Full) 40 41 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 42 SUPPORTED_100baseT_Full) 43 44 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 45 SUPPORTED_1000baseT_Full) 46 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 54 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 55 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 56 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init; 57 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap2_features) __ro_after_init; 58 59 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 60 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 61 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 62 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 63 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 64 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 65 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 66 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 67 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 68 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features) 69 #define PHY_EEE_CAP2_FEATURES ((unsigned long *)&phy_eee_cap2_features) 70 71 extern const int phy_basic_ports_array[3]; 72 extern const int phy_fibre_port_array[1]; 73 extern const int phy_all_ports_features_array[7]; 74 extern const int phy_10_100_features_array[4]; 75 extern const int phy_basic_t1_features_array[3]; 76 extern const int phy_basic_t1s_p2mp_features_array[2]; 77 extern const int phy_gbit_features_array[2]; 78 extern const int phy_10gbit_features_array[1]; 79 80 /* 81 * Set phydev->irq to PHY_POLL if interrupts are not supported, 82 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 83 * the attached MAC driver handles the interrupt 84 */ 85 #define PHY_POLL -1 86 #define PHY_MAC_INTERRUPT -2 87 88 #define PHY_IS_INTERNAL 0x00000001 89 #define PHY_RST_AFTER_CLK_EN 0x00000002 90 #define PHY_POLL_CABLE_TEST 0x00000004 91 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008 92 #define MDIO_DEVICE_IS_PHY 0x80000000 93 94 /** 95 * enum phy_interface_t - Interface Mode definitions 96 * 97 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 98 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 99 * @PHY_INTERFACE_MODE_MII: Media-independent interface 100 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 101 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 102 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 103 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 104 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 105 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 106 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 107 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 108 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 109 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 110 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 111 * @PHY_INTERFACE_MODE_SMII: Serial MII 112 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 113 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 114 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 115 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII 116 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 117 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 118 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 119 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 120 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 121 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 122 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 123 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 124 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 125 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 126 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 127 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 128 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 129 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 130 * @PHY_INTERFACE_MODE_MAX: Book keeping 131 * 132 * Describes the interface between the MAC and PHY. 133 */ 134 typedef enum { 135 PHY_INTERFACE_MODE_NA, 136 PHY_INTERFACE_MODE_INTERNAL, 137 PHY_INTERFACE_MODE_MII, 138 PHY_INTERFACE_MODE_GMII, 139 PHY_INTERFACE_MODE_SGMII, 140 PHY_INTERFACE_MODE_TBI, 141 PHY_INTERFACE_MODE_REVMII, 142 PHY_INTERFACE_MODE_RMII, 143 PHY_INTERFACE_MODE_REVRMII, 144 PHY_INTERFACE_MODE_RGMII, 145 PHY_INTERFACE_MODE_RGMII_ID, 146 PHY_INTERFACE_MODE_RGMII_RXID, 147 PHY_INTERFACE_MODE_RGMII_TXID, 148 PHY_INTERFACE_MODE_RTBI, 149 PHY_INTERFACE_MODE_SMII, 150 PHY_INTERFACE_MODE_XGMII, 151 PHY_INTERFACE_MODE_XLGMII, 152 PHY_INTERFACE_MODE_MOCA, 153 PHY_INTERFACE_MODE_PSGMII, 154 PHY_INTERFACE_MODE_QSGMII, 155 PHY_INTERFACE_MODE_TRGMII, 156 PHY_INTERFACE_MODE_100BASEX, 157 PHY_INTERFACE_MODE_1000BASEX, 158 PHY_INTERFACE_MODE_2500BASEX, 159 PHY_INTERFACE_MODE_5GBASER, 160 PHY_INTERFACE_MODE_RXAUI, 161 PHY_INTERFACE_MODE_XAUI, 162 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 163 PHY_INTERFACE_MODE_10GBASER, 164 PHY_INTERFACE_MODE_25GBASER, 165 PHY_INTERFACE_MODE_USXGMII, 166 /* 10GBASE-KR - with Clause 73 AN */ 167 PHY_INTERFACE_MODE_10GKR, 168 PHY_INTERFACE_MODE_QUSGMII, 169 PHY_INTERFACE_MODE_1000BASEKX, 170 PHY_INTERFACE_MODE_MAX, 171 } phy_interface_t; 172 173 /* PHY interface mode bitmap handling */ 174 #define DECLARE_PHY_INTERFACE_MASK(name) \ 175 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 176 177 static inline void phy_interface_zero(unsigned long *intf) 178 { 179 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 180 } 181 182 static inline bool phy_interface_empty(const unsigned long *intf) 183 { 184 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 185 } 186 187 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 188 const unsigned long *b) 189 { 190 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 191 } 192 193 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 194 const unsigned long *b) 195 { 196 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 197 } 198 199 static inline void phy_interface_set_rgmii(unsigned long *intf) 200 { 201 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 202 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 203 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 204 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 205 } 206 207 /* 208 * phy_supported_speeds - return all speeds currently supported by a PHY device 209 */ 210 unsigned int phy_supported_speeds(struct phy_device *phy, 211 unsigned int *speeds, 212 unsigned int size); 213 214 /** 215 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 216 * @interface: enum phy_interface_t value 217 * 218 * Description: maps enum &phy_interface_t defined in this file 219 * into the device tree binding of 'phy-mode', so that Ethernet 220 * device driver can get PHY interface from device tree. 221 */ 222 static inline const char *phy_modes(phy_interface_t interface) 223 { 224 switch (interface) { 225 case PHY_INTERFACE_MODE_NA: 226 return ""; 227 case PHY_INTERFACE_MODE_INTERNAL: 228 return "internal"; 229 case PHY_INTERFACE_MODE_MII: 230 return "mii"; 231 case PHY_INTERFACE_MODE_GMII: 232 return "gmii"; 233 case PHY_INTERFACE_MODE_SGMII: 234 return "sgmii"; 235 case PHY_INTERFACE_MODE_TBI: 236 return "tbi"; 237 case PHY_INTERFACE_MODE_REVMII: 238 return "rev-mii"; 239 case PHY_INTERFACE_MODE_RMII: 240 return "rmii"; 241 case PHY_INTERFACE_MODE_REVRMII: 242 return "rev-rmii"; 243 case PHY_INTERFACE_MODE_RGMII: 244 return "rgmii"; 245 case PHY_INTERFACE_MODE_RGMII_ID: 246 return "rgmii-id"; 247 case PHY_INTERFACE_MODE_RGMII_RXID: 248 return "rgmii-rxid"; 249 case PHY_INTERFACE_MODE_RGMII_TXID: 250 return "rgmii-txid"; 251 case PHY_INTERFACE_MODE_RTBI: 252 return "rtbi"; 253 case PHY_INTERFACE_MODE_SMII: 254 return "smii"; 255 case PHY_INTERFACE_MODE_XGMII: 256 return "xgmii"; 257 case PHY_INTERFACE_MODE_XLGMII: 258 return "xlgmii"; 259 case PHY_INTERFACE_MODE_MOCA: 260 return "moca"; 261 case PHY_INTERFACE_MODE_PSGMII: 262 return "psgmii"; 263 case PHY_INTERFACE_MODE_QSGMII: 264 return "qsgmii"; 265 case PHY_INTERFACE_MODE_TRGMII: 266 return "trgmii"; 267 case PHY_INTERFACE_MODE_1000BASEX: 268 return "1000base-x"; 269 case PHY_INTERFACE_MODE_1000BASEKX: 270 return "1000base-kx"; 271 case PHY_INTERFACE_MODE_2500BASEX: 272 return "2500base-x"; 273 case PHY_INTERFACE_MODE_5GBASER: 274 return "5gbase-r"; 275 case PHY_INTERFACE_MODE_RXAUI: 276 return "rxaui"; 277 case PHY_INTERFACE_MODE_XAUI: 278 return "xaui"; 279 case PHY_INTERFACE_MODE_10GBASER: 280 return "10gbase-r"; 281 case PHY_INTERFACE_MODE_25GBASER: 282 return "25gbase-r"; 283 case PHY_INTERFACE_MODE_USXGMII: 284 return "usxgmii"; 285 case PHY_INTERFACE_MODE_10GKR: 286 return "10gbase-kr"; 287 case PHY_INTERFACE_MODE_100BASEX: 288 return "100base-x"; 289 case PHY_INTERFACE_MODE_QUSGMII: 290 return "qusgmii"; 291 default: 292 return "unknown"; 293 } 294 } 295 296 #define PHY_INIT_TIMEOUT 100000 297 #define PHY_FORCE_TIMEOUT 10 298 299 #define PHY_MAX_ADDR 32 300 301 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 302 #define PHY_ID_FMT "%s:%02x" 303 304 #define MII_BUS_ID_SIZE 61 305 306 struct device; 307 struct kernel_hwtstamp_config; 308 struct phylink; 309 struct sfp_bus; 310 struct sfp_upstream_ops; 311 struct sk_buff; 312 313 /** 314 * struct mdio_bus_stats - Statistics counters for MDIO busses 315 * @transfers: Total number of transfers, i.e. @writes + @reads 316 * @errors: Number of MDIO transfers that returned an error 317 * @writes: Number of write transfers 318 * @reads: Number of read transfers 319 * @syncp: Synchronisation for incrementing statistics 320 */ 321 struct mdio_bus_stats { 322 u64_stats_t transfers; 323 u64_stats_t errors; 324 u64_stats_t writes; 325 u64_stats_t reads; 326 /* Must be last, add new statistics above */ 327 struct u64_stats_sync syncp; 328 }; 329 330 /** 331 * struct phy_package_shared - Shared information in PHY packages 332 * @base_addr: Base PHY address of PHY package used to combine PHYs 333 * in one package and for offset calculation of phy_package_read/write 334 * @np: Pointer to the Device Node if PHY package defined in DT 335 * @refcnt: Number of PHYs connected to this shared data 336 * @flags: Initialization of PHY package 337 * @priv_size: Size of the shared private data @priv 338 * @priv: Driver private data shared across a PHY package 339 * 340 * Represents a shared structure between different phydev's in the same 341 * package, for example a quad PHY. See phy_package_join() and 342 * phy_package_leave(). 343 */ 344 struct phy_package_shared { 345 u8 base_addr; 346 /* With PHY package defined in DT this points to the PHY package node */ 347 struct device_node *np; 348 refcount_t refcnt; 349 unsigned long flags; 350 size_t priv_size; 351 352 /* private data pointer */ 353 /* note that this pointer is shared between different phydevs and 354 * the user has to take care of appropriate locking. It is allocated 355 * and freed automatically by phy_package_join() and 356 * phy_package_leave(). 357 */ 358 void *priv; 359 }; 360 361 /* used as bit number in atomic bitops */ 362 #define PHY_SHARED_F_INIT_DONE 0 363 #define PHY_SHARED_F_PROBE_DONE 1 364 365 /** 366 * struct mii_bus - Represents an MDIO bus 367 * 368 * @owner: Who owns this device 369 * @name: User friendly name for this MDIO device, or driver name 370 * @id: Unique identifier for this bus, typical from bus hierarchy 371 * @priv: Driver private data 372 * 373 * The Bus class for PHYs. Devices which provide access to 374 * PHYs should register using this structure 375 */ 376 struct mii_bus { 377 struct module *owner; 378 const char *name; 379 char id[MII_BUS_ID_SIZE]; 380 void *priv; 381 /** @read: Perform a read transfer on the bus */ 382 int (*read)(struct mii_bus *bus, int addr, int regnum); 383 /** @write: Perform a write transfer on the bus */ 384 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 385 /** @read_c45: Perform a C45 read transfer on the bus */ 386 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 387 /** @write_c45: Perform a C45 write transfer on the bus */ 388 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 389 int regnum, u16 val); 390 /** @reset: Perform a reset of the bus */ 391 int (*reset)(struct mii_bus *bus); 392 393 /** @stats: Statistic counters per device on the bus */ 394 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 395 396 /** 397 * @mdio_lock: A lock to ensure that only one thing can read/write 398 * the MDIO bus at a time 399 */ 400 struct mutex mdio_lock; 401 402 /** @parent: Parent device of this bus */ 403 struct device *parent; 404 /** @state: State of bus structure */ 405 enum { 406 MDIOBUS_ALLOCATED = 1, 407 MDIOBUS_REGISTERED, 408 MDIOBUS_UNREGISTERED, 409 MDIOBUS_RELEASED, 410 } state; 411 412 /** @dev: Kernel device representation */ 413 struct device dev; 414 415 /** @mdio_map: list of all MDIO devices on bus */ 416 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 417 418 /** @phy_mask: PHY addresses to be ignored when probing */ 419 u32 phy_mask; 420 421 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 422 u32 phy_ignore_ta_mask; 423 424 /** 425 * @irq: An array of interrupts, each PHY's interrupt at the index 426 * matching its address 427 */ 428 int irq[PHY_MAX_ADDR]; 429 430 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 431 int reset_delay_us; 432 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 433 int reset_post_delay_us; 434 /** @reset_gpiod: Reset GPIO descriptor pointer */ 435 struct gpio_desc *reset_gpiod; 436 437 /** @shared_lock: protect access to the shared element */ 438 struct mutex shared_lock; 439 440 /** @shared: shared state across different PHYs */ 441 struct phy_package_shared *shared[PHY_MAX_ADDR]; 442 }; 443 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 444 445 struct mii_bus *mdiobus_alloc_size(size_t size); 446 447 /** 448 * mdiobus_alloc - Allocate an MDIO bus structure 449 * 450 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 451 * for the driver to register the bus. 452 */ 453 static inline struct mii_bus *mdiobus_alloc(void) 454 { 455 return mdiobus_alloc_size(0); 456 } 457 458 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 459 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 460 struct module *owner); 461 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 462 #define devm_mdiobus_register(dev, bus) \ 463 __devm_mdiobus_register(dev, bus, THIS_MODULE) 464 465 void mdiobus_unregister(struct mii_bus *bus); 466 void mdiobus_free(struct mii_bus *bus); 467 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 468 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 469 { 470 return devm_mdiobus_alloc_size(dev, 0); 471 } 472 473 struct mii_bus *mdio_find_bus(const char *mdio_name); 474 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); 475 476 #define PHY_INTERRUPT_DISABLED false 477 #define PHY_INTERRUPT_ENABLED true 478 479 /** 480 * enum phy_state - PHY state machine states: 481 * 482 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 483 * should be called if and only if the PHY is in this state, 484 * given that the PHY device exists. 485 * - PHY driver probe function will set the state to @PHY_READY 486 * 487 * @PHY_READY: PHY is ready to send and receive packets, but the 488 * controller is not. By default, PHYs which do not implement 489 * probe will be set to this state by phy_probe(). 490 * - start will set the state to UP 491 * 492 * @PHY_UP: The PHY and attached device are ready to do work. 493 * Interrupts should be started here. 494 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 495 * 496 * @PHY_NOLINK: PHY is up, but not currently plugged in. 497 * - irq or timer will set @PHY_RUNNING if link comes back 498 * - phy_stop moves to @PHY_HALTED 499 * 500 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 501 * and/or receiving packets 502 * - irq or timer will set @PHY_NOLINK if link goes down 503 * - phy_stop moves to @PHY_HALTED 504 * 505 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 506 * is not expected to work, carrier will be indicated as down. PHY will be 507 * poll once per second, or on interrupt for it current state. 508 * Once complete, move to UP to restart the PHY. 509 * - phy_stop aborts the running test and moves to @PHY_HALTED 510 * 511 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. 512 * - phy_start moves to @PHY_UP 513 * 514 * @PHY_ERROR: PHY is up, but is in an error state. 515 * - phy_stop moves to @PHY_HALTED 516 */ 517 enum phy_state { 518 PHY_DOWN = 0, 519 PHY_READY, 520 PHY_HALTED, 521 PHY_ERROR, 522 PHY_UP, 523 PHY_RUNNING, 524 PHY_NOLINK, 525 PHY_CABLETEST, 526 }; 527 528 #define MDIO_MMD_NUM 32 529 530 /** 531 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 532 * @devices_in_package: IEEE 802.3 devices in package register value. 533 * @mmds_present: bit vector of MMDs present. 534 * @device_ids: The device identifer for each present device. 535 */ 536 struct phy_c45_device_ids { 537 u32 devices_in_package; 538 u32 mmds_present; 539 u32 device_ids[MDIO_MMD_NUM]; 540 }; 541 542 struct macsec_context; 543 struct macsec_ops; 544 545 /** 546 * struct phy_device - An instance of a PHY 547 * 548 * @mdio: MDIO bus this PHY is on 549 * @drv: Pointer to the driver for this PHY instance 550 * @devlink: Create a link between phy dev and mac dev, if the external phy 551 * used by current mac interface is managed by another mac interface. 552 * @phy_id: UID for this device found during discovery 553 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 554 * @is_c45: Set to true if this PHY uses clause 45 addressing. 555 * @is_internal: Set to true if this PHY is internal to a MAC. 556 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 557 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 558 * @has_fixups: Set to true if this PHY has fixups/quirks. 559 * @suspended: Set to true if this PHY has been suspended successfully. 560 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 561 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 562 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 563 * @downshifted_rate: Set true if link speed has been downshifted. 564 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 565 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 566 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN 567 * enabled. 568 * @state: State of the PHY for management purposes 569 * @dev_flags: Device-specific flags used by the PHY driver. 570 * 571 * - Bits [15:0] are free to use by the PHY driver to communicate 572 * driver specific behavior. 573 * - Bits [23:16] are currently reserved for future use. 574 * - Bits [31:24] are reserved for defining generic 575 * PHY driver behavior. 576 * @irq: IRQ number of the PHY's interrupt (-1 if none) 577 * @phylink: Pointer to phylink instance for this PHY 578 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 579 * @sfp_bus: SFP bus attached to this PHY's fiber port 580 * @attached_dev: The attached enet driver's device instance ptr 581 * @adjust_link: Callback for the enet controller to respond to changes: in the 582 * link state. 583 * @phy_link_change: Callback for phylink for notification of link change 584 * @macsec_ops: MACsec offloading ops. 585 * 586 * @speed: Current link speed 587 * @duplex: Current duplex 588 * @port: Current port 589 * @pause: Current pause 590 * @asym_pause: Current asymmetric pause 591 * @supported: Combined MAC/PHY supported linkmodes 592 * @advertising: Currently advertised linkmodes 593 * @adv_old: Saved advertised while power saving for WoL 594 * @supported_eee: supported PHY EEE linkmodes 595 * @advertising_eee: Currently advertised EEE linkmodes 596 * @eee_enabled: Flag indicating whether the EEE feature is enabled 597 * @lp_advertising: Current link partner advertised linkmodes 598 * @host_interfaces: PHY interface modes supported by host 599 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 600 * @autoneg: Flag autoneg being used 601 * @rate_matching: Current rate matching mode 602 * @link: Current link state 603 * @autoneg_complete: Flag auto negotiation of the link has completed 604 * @mdix: Current crossover 605 * @mdix_ctrl: User setting of crossover 606 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 607 * @interrupts: Flag interrupts have been enabled 608 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 609 * handling shall be postponed until PHY has resumed 610 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 611 * requiring a rerun of the interrupt handler after resume 612 * @interface: enum phy_interface_t value 613 * @possible_interfaces: bitmap if interface modes that the attached PHY 614 * will switch between depending on media speed. 615 * @skb: Netlink message for cable diagnostics 616 * @nest: Netlink nest used for cable diagnostics 617 * @ehdr: nNtlink header for cable diagnostics 618 * @phy_led_triggers: Array of LED triggers 619 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 620 * @led_link_trigger: LED trigger for link up/down 621 * @last_triggered: last LED trigger for link speed 622 * @leds: list of PHY LED structures 623 * @master_slave_set: User requested master/slave configuration 624 * @master_slave_get: Current master/slave advertisement 625 * @master_slave_state: Current master/slave configuration 626 * @mii_ts: Pointer to time stamper callbacks 627 * @psec: Pointer to Power Sourcing Equipment control struct 628 * @lock: Mutex for serialization access to PHY 629 * @state_queue: Work queue for state machine 630 * @link_down_events: Number of times link was lost 631 * @shared: Pointer to private data shared by phys in one package 632 * @priv: Pointer to driver private data 633 * 634 * interrupts currently only supports enabled or disabled, 635 * but could be changed in the future to support enabling 636 * and disabling specific interrupts 637 * 638 * Contains some infrastructure for polling and interrupt 639 * handling, as well as handling shifts in PHY hardware state 640 */ 641 struct phy_device { 642 struct mdio_device mdio; 643 644 /* Information about the PHY type */ 645 /* And management functions */ 646 const struct phy_driver *drv; 647 648 struct device_link *devlink; 649 650 u32 phy_id; 651 652 struct phy_c45_device_ids c45_ids; 653 unsigned is_c45:1; 654 unsigned is_internal:1; 655 unsigned is_pseudo_fixed_link:1; 656 unsigned is_gigabit_capable:1; 657 unsigned has_fixups:1; 658 unsigned suspended:1; 659 unsigned suspended_by_mdio_bus:1; 660 unsigned sysfs_links:1; 661 unsigned loopback_enabled:1; 662 unsigned downshifted_rate:1; 663 unsigned is_on_sfp_module:1; 664 unsigned mac_managed_pm:1; 665 unsigned wol_enabled:1; 666 667 unsigned autoneg:1; 668 /* The most recently read link state */ 669 unsigned link:1; 670 unsigned autoneg_complete:1; 671 672 /* Interrupts are enabled */ 673 unsigned interrupts:1; 674 unsigned irq_suspended:1; 675 unsigned irq_rerun:1; 676 677 int rate_matching; 678 679 enum phy_state state; 680 681 u32 dev_flags; 682 683 phy_interface_t interface; 684 DECLARE_PHY_INTERFACE_MASK(possible_interfaces); 685 686 /* 687 * forced speed & duplex (no autoneg) 688 * partner speed & duplex & pause (autoneg) 689 */ 690 int speed; 691 int duplex; 692 int port; 693 int pause; 694 int asym_pause; 695 u8 master_slave_get; 696 u8 master_slave_set; 697 u8 master_slave_state; 698 699 /* Union of PHY and Attached devices' supported link modes */ 700 /* See ethtool.h for more info */ 701 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 702 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 703 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 704 /* used with phy_speed_down */ 705 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 706 /* used for eee validation */ 707 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee); 708 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee); 709 bool eee_enabled; 710 711 /* Host supported PHY interface types. Should be ignored if empty. */ 712 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 713 714 /* Energy efficient ethernet modes which should be prohibited */ 715 u32 eee_broken_modes; 716 717 #ifdef CONFIG_LED_TRIGGER_PHY 718 struct phy_led_trigger *phy_led_triggers; 719 unsigned int phy_num_led_triggers; 720 struct phy_led_trigger *last_triggered; 721 722 struct phy_led_trigger *led_link_trigger; 723 #endif 724 struct list_head leds; 725 726 /* 727 * Interrupt number for this PHY 728 * -1 means no interrupt 729 */ 730 int irq; 731 732 /* private data pointer */ 733 /* For use by PHYs to maintain extra state */ 734 void *priv; 735 736 /* shared data pointer */ 737 /* For use by PHYs inside the same package that need a shared state. */ 738 struct phy_package_shared *shared; 739 740 /* Reporting cable test results */ 741 struct sk_buff *skb; 742 void *ehdr; 743 struct nlattr *nest; 744 745 /* Interrupt and Polling infrastructure */ 746 struct delayed_work state_queue; 747 748 struct mutex lock; 749 750 /* This may be modified under the rtnl lock */ 751 bool sfp_bus_attached; 752 struct sfp_bus *sfp_bus; 753 struct phylink *phylink; 754 struct net_device *attached_dev; 755 struct mii_timestamper *mii_ts; 756 struct pse_control *psec; 757 758 u8 mdix; 759 u8 mdix_ctrl; 760 761 int pma_extable; 762 763 unsigned int link_down_events; 764 765 void (*phy_link_change)(struct phy_device *phydev, bool up); 766 void (*adjust_link)(struct net_device *dev); 767 768 #if IS_ENABLED(CONFIG_MACSEC) 769 /* MACsec management functions */ 770 const struct macsec_ops *macsec_ops; 771 #endif 772 }; 773 774 /* Generic phy_device::dev_flags */ 775 #define PHY_F_NO_IRQ 0x80000000 776 777 static inline struct phy_device *to_phy_device(const struct device *dev) 778 { 779 return container_of(to_mdio_device(dev), struct phy_device, mdio); 780 } 781 782 /** 783 * struct phy_tdr_config - Configuration of a TDR raw test 784 * 785 * @first: Distance for first data collection point 786 * @last: Distance for last data collection point 787 * @step: Step between data collection points 788 * @pair: Bitmap of cable pairs to collect data for 789 * 790 * A structure containing possible configuration parameters 791 * for a TDR cable test. The driver does not need to implement 792 * all the parameters, but should report what is actually used. 793 * All distances are in centimeters. 794 */ 795 struct phy_tdr_config { 796 u32 first; 797 u32 last; 798 u32 step; 799 s8 pair; 800 }; 801 #define PHY_PAIR_ALL -1 802 803 /** 804 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 805 * Avoidance) Reconciliation Sublayer. 806 * 807 * @version: read-only PLCA register map version. -1 = not available. Ignored 808 * when setting the configuration. Format is the same as reported by the PLCA 809 * IDVER register (31.CA00). -1 = not available. 810 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 811 * set. 0 = disabled, anything else = enabled. 812 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 813 * Allowed values [0 .. 254]. 255 = node disabled. 814 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 815 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 816 * set. Allowed values [1 .. 255]. 817 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 818 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 819 * more details. The to_timer shall be set equal over all nodes. 820 * -1 = not available / don't set. Allowed values [0 .. 255]. 821 * @burst_cnt: controls how many additional frames a node is allowed to send in 822 * single transmit opportunity (TO). The default value of 0 means that the 823 * node is allowed exactly one frame per TO. A value of 1 allows two frames 824 * per TO, and so on. -1 = not available / don't set. 825 * Allowed values [0 .. 255]. 826 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 827 * frame before interrupting the burst. This value should be set to a value 828 * greater than the MAC inter-packet gap (which is typically 96 bits). 829 * -1 = not available / don't set. Allowed values [0 .. 255]. 830 * 831 * A structure containing configuration parameters for setting/getting the PLCA 832 * RS configuration. The driver does not need to implement all the parameters, 833 * but should report what is actually used. 834 */ 835 struct phy_plca_cfg { 836 int version; 837 int enabled; 838 int node_id; 839 int node_cnt; 840 int to_tmr; 841 int burst_cnt; 842 int burst_tmr; 843 }; 844 845 /** 846 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 847 * Avoidance) Reconciliation Sublayer. 848 * 849 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 850 * register(31.CA03), indicating BEACON activity. 851 * 852 * A structure containing status information of the PLCA RS configuration. 853 * The driver does not need to implement all the parameters, but should report 854 * what is actually used. 855 */ 856 struct phy_plca_status { 857 bool pst; 858 }; 859 860 /* Modes for PHY LED configuration */ 861 enum phy_led_modes { 862 PHY_LED_ACTIVE_LOW = 0, 863 PHY_LED_INACTIVE_HIGH_IMPEDANCE = 1, 864 865 /* keep it last */ 866 __PHY_LED_MODES_NUM, 867 }; 868 869 /** 870 * struct phy_led: An LED driven by the PHY 871 * 872 * @list: List of LEDs 873 * @phydev: PHY this LED is attached to 874 * @led_cdev: Standard LED class structure 875 * @index: Number of the LED 876 */ 877 struct phy_led { 878 struct list_head list; 879 struct phy_device *phydev; 880 struct led_classdev led_cdev; 881 u8 index; 882 }; 883 884 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev) 885 886 /** 887 * struct phy_driver - Driver structure for a particular PHY type 888 * 889 * @mdiodrv: Data common to all MDIO devices 890 * @phy_id: The result of reading the UID registers of this PHY 891 * type, and ANDing them with the phy_id_mask. This driver 892 * only works for PHYs with IDs which match this field 893 * @name: The friendly name of this PHY type 894 * @phy_id_mask: Defines the important bits of the phy_id 895 * @features: A mandatory list of features (speed, duplex, etc) 896 * supported by this PHY 897 * @flags: A bitfield defining certain other features this PHY 898 * supports (like interrupts) 899 * @driver_data: Static driver data 900 * 901 * All functions are optional. If config_aneg or read_status 902 * are not implemented, the phy core uses the genphy versions. 903 * Note that none of these functions should be called from 904 * interrupt time. The goal is for the bus read/write functions 905 * to be able to block when the bus transaction is happening, 906 * and be freed up by an interrupt (The MPC85xx has this ability, 907 * though it is not currently supported in the driver). 908 */ 909 struct phy_driver { 910 struct mdio_driver_common mdiodrv; 911 u32 phy_id; 912 char *name; 913 u32 phy_id_mask; 914 const unsigned long * const features; 915 u32 flags; 916 const void *driver_data; 917 918 /** 919 * @soft_reset: Called to issue a PHY software reset 920 */ 921 int (*soft_reset)(struct phy_device *phydev); 922 923 /** 924 * @config_init: Called to initialize the PHY, 925 * including after a reset 926 */ 927 int (*config_init)(struct phy_device *phydev); 928 929 /** 930 * @probe: Called during discovery. Used to set 931 * up device-specific structures, if any 932 */ 933 int (*probe)(struct phy_device *phydev); 934 935 /** 936 * @get_features: Probe the hardware to determine what 937 * abilities it has. Should only set phydev->supported. 938 */ 939 int (*get_features)(struct phy_device *phydev); 940 941 /** 942 * @get_rate_matching: Get the supported type of rate matching for a 943 * particular phy interface. This is used by phy consumers to determine 944 * whether to advertise lower-speed modes for that interface. It is 945 * assumed that if a rate matching mode is supported on an interface, 946 * then that interface's rate can be adapted to all slower link speeds 947 * supported by the phy. If the interface is not supported, this should 948 * return %RATE_MATCH_NONE. 949 */ 950 int (*get_rate_matching)(struct phy_device *phydev, 951 phy_interface_t iface); 952 953 /* PHY Power Management */ 954 /** @suspend: Suspend the hardware, saving state if needed */ 955 int (*suspend)(struct phy_device *phydev); 956 /** @resume: Resume the hardware, restoring state if needed */ 957 int (*resume)(struct phy_device *phydev); 958 959 /** 960 * @config_aneg: Configures the advertisement and resets 961 * autonegotiation if phydev->autoneg is on, 962 * forces the speed to the current settings in phydev 963 * if phydev->autoneg is off 964 */ 965 int (*config_aneg)(struct phy_device *phydev); 966 967 /** @aneg_done: Determines the auto negotiation result */ 968 int (*aneg_done)(struct phy_device *phydev); 969 970 /** @read_status: Determines the negotiated speed and duplex */ 971 int (*read_status)(struct phy_device *phydev); 972 973 /** 974 * @config_intr: Enables or disables interrupts. 975 * It should also clear any pending interrupts prior to enabling the 976 * IRQs and after disabling them. 977 */ 978 int (*config_intr)(struct phy_device *phydev); 979 980 /** @handle_interrupt: Override default interrupt handling */ 981 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 982 983 /** @remove: Clears up any memory if needed */ 984 void (*remove)(struct phy_device *phydev); 985 986 /** 987 * @match_phy_device: Returns true if this is a suitable 988 * driver for the given phydev. If NULL, matching is based on 989 * phy_id and phy_id_mask. 990 */ 991 int (*match_phy_device)(struct phy_device *phydev); 992 993 /** 994 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 995 * register changes to enable Wake on LAN, so set_wol is 996 * provided to be called in the ethernet driver's set_wol 997 * function. 998 */ 999 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1000 1001 /** 1002 * @get_wol: See set_wol, but for checking whether Wake on LAN 1003 * is enabled. 1004 */ 1005 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1006 1007 /** 1008 * @link_change_notify: Called to inform a PHY device driver 1009 * when the core is about to change the link state. This 1010 * callback is supposed to be used as fixup hook for drivers 1011 * that need to take action when the link state 1012 * changes. Drivers are by no means allowed to mess with the 1013 * PHY device structure in their implementations. 1014 */ 1015 void (*link_change_notify)(struct phy_device *dev); 1016 1017 /** 1018 * @read_mmd: PHY specific driver override for reading a MMD 1019 * register. This function is optional for PHY specific 1020 * drivers. When not provided, the default MMD read function 1021 * will be used by phy_read_mmd(), which will use either a 1022 * direct read for Clause 45 PHYs or an indirect read for 1023 * Clause 22 PHYs. devnum is the MMD device number within the 1024 * PHY device, regnum is the register within the selected MMD 1025 * device. 1026 */ 1027 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 1028 1029 /** 1030 * @write_mmd: PHY specific driver override for writing a MMD 1031 * register. This function is optional for PHY specific 1032 * drivers. When not provided, the default MMD write function 1033 * will be used by phy_write_mmd(), which will use either a 1034 * direct write for Clause 45 PHYs, or an indirect write for 1035 * Clause 22 PHYs. devnum is the MMD device number within the 1036 * PHY device, regnum is the register within the selected MMD 1037 * device. val is the value to be written. 1038 */ 1039 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 1040 u16 val); 1041 1042 /** @read_page: Return the current PHY register page number */ 1043 int (*read_page)(struct phy_device *dev); 1044 /** @write_page: Set the current PHY register page number */ 1045 int (*write_page)(struct phy_device *dev, int page); 1046 1047 /** 1048 * @module_info: Get the size and type of the eeprom contained 1049 * within a plug-in module 1050 */ 1051 int (*module_info)(struct phy_device *dev, 1052 struct ethtool_modinfo *modinfo); 1053 1054 /** 1055 * @module_eeprom: Get the eeprom information from the plug-in 1056 * module 1057 */ 1058 int (*module_eeprom)(struct phy_device *dev, 1059 struct ethtool_eeprom *ee, u8 *data); 1060 1061 /** @cable_test_start: Start a cable test */ 1062 int (*cable_test_start)(struct phy_device *dev); 1063 1064 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1065 int (*cable_test_tdr_start)(struct phy_device *dev, 1066 const struct phy_tdr_config *config); 1067 1068 /** 1069 * @cable_test_get_status: Once per second, or on interrupt, 1070 * request the status of the test. 1071 */ 1072 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1073 1074 /* Get statistics from the PHY using ethtool */ 1075 /** @get_sset_count: Number of statistic counters */ 1076 int (*get_sset_count)(struct phy_device *dev); 1077 /** @get_strings: Names of the statistic counters */ 1078 void (*get_strings)(struct phy_device *dev, u8 *data); 1079 /** @get_stats: Return the statistic counter values */ 1080 void (*get_stats)(struct phy_device *dev, 1081 struct ethtool_stats *stats, u64 *data); 1082 1083 /* Get and Set PHY tunables */ 1084 /** @get_tunable: Return the value of a tunable */ 1085 int (*get_tunable)(struct phy_device *dev, 1086 struct ethtool_tunable *tuna, void *data); 1087 /** @set_tunable: Set the value of a tunable */ 1088 int (*set_tunable)(struct phy_device *dev, 1089 struct ethtool_tunable *tuna, 1090 const void *data); 1091 /** @set_loopback: Set the loopback mood of the PHY */ 1092 int (*set_loopback)(struct phy_device *dev, bool enable); 1093 /** @get_sqi: Get the signal quality indication */ 1094 int (*get_sqi)(struct phy_device *dev); 1095 /** @get_sqi_max: Get the maximum signal quality indication */ 1096 int (*get_sqi_max)(struct phy_device *dev); 1097 1098 /* PLCA RS interface */ 1099 /** @get_plca_cfg: Return the current PLCA configuration */ 1100 int (*get_plca_cfg)(struct phy_device *dev, 1101 struct phy_plca_cfg *plca_cfg); 1102 /** @set_plca_cfg: Set the PLCA configuration */ 1103 int (*set_plca_cfg)(struct phy_device *dev, 1104 const struct phy_plca_cfg *plca_cfg); 1105 /** @get_plca_status: Return the current PLCA status info */ 1106 int (*get_plca_status)(struct phy_device *dev, 1107 struct phy_plca_status *plca_st); 1108 1109 /** 1110 * @led_brightness_set: Set a PHY LED brightness. Index 1111 * indicates which of the PHYs led should be set. Value 1112 * follows the standard LED class meaning, e.g. LED_OFF, 1113 * LED_HALF, LED_FULL. 1114 */ 1115 int (*led_brightness_set)(struct phy_device *dev, 1116 u8 index, enum led_brightness value); 1117 1118 /** 1119 * @led_blink_set: Set a PHY LED brightness. Index indicates 1120 * which of the PHYs led should be configured to blink. Delays 1121 * are in milliseconds and if both are zero then a sensible 1122 * default should be chosen. The call should adjust the 1123 * timings in that case and if it can't match the values 1124 * specified exactly. 1125 */ 1126 int (*led_blink_set)(struct phy_device *dev, u8 index, 1127 unsigned long *delay_on, 1128 unsigned long *delay_off); 1129 /** 1130 * @led_hw_is_supported: Can the HW support the given rules. 1131 * @dev: PHY device which has the LED 1132 * @index: Which LED of the PHY device 1133 * @rules The core is interested in these rules 1134 * 1135 * Return 0 if yes, -EOPNOTSUPP if not, or an error code. 1136 */ 1137 int (*led_hw_is_supported)(struct phy_device *dev, u8 index, 1138 unsigned long rules); 1139 /** 1140 * @led_hw_control_set: Set the HW to control the LED 1141 * @dev: PHY device which has the LED 1142 * @index: Which LED of the PHY device 1143 * @rules The rules used to control the LED 1144 * 1145 * Returns 0, or a an error code. 1146 */ 1147 int (*led_hw_control_set)(struct phy_device *dev, u8 index, 1148 unsigned long rules); 1149 /** 1150 * @led_hw_control_get: Get how the HW is controlling the LED 1151 * @dev: PHY device which has the LED 1152 * @index: Which LED of the PHY device 1153 * @rules Pointer to the rules used to control the LED 1154 * 1155 * Set *@rules to how the HW is currently blinking. Returns 0 1156 * on success, or a error code if the current blinking cannot 1157 * be represented in rules, or some other error happens. 1158 */ 1159 int (*led_hw_control_get)(struct phy_device *dev, u8 index, 1160 unsigned long *rules); 1161 1162 /** 1163 * @led_polarity_set: Set the LED polarity modes 1164 * @dev: PHY device which has the LED 1165 * @index: Which LED of the PHY device 1166 * @modes: bitmap of LED polarity modes 1167 * 1168 * Configure LED with all the required polarity modes in @modes 1169 * to make it correctly turn ON or OFF. 1170 * 1171 * Returns 0, or an error code. 1172 */ 1173 int (*led_polarity_set)(struct phy_device *dev, int index, 1174 unsigned long modes); 1175 }; 1176 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 1177 struct phy_driver, mdiodrv) 1178 1179 #define PHY_ANY_ID "MATCH ANY PHY" 1180 #define PHY_ANY_UID 0xffffffff 1181 1182 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 1183 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 1184 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 1185 1186 /** 1187 * phy_id_compare - compare @id1 with @id2 taking account of @mask 1188 * @id1: first PHY ID 1189 * @id2: second PHY ID 1190 * @mask: the PHY ID mask, set bits are significant in matching 1191 * 1192 * Return true if the bits from @id1 and @id2 specified by @mask match. 1193 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask). 1194 */ 1195 static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask) 1196 { 1197 return !((id1 ^ id2) & mask); 1198 } 1199 1200 /** 1201 * phydev_id_compare - compare @id with the PHY's Clause 22 ID 1202 * @phydev: the PHY device 1203 * @id: the PHY ID to be matched 1204 * 1205 * Compare the @phydev clause 22 ID with the provided @id and return true or 1206 * false depending whether it matches, using the bound driver mask. The 1207 * @phydev must be bound to a driver. 1208 */ 1209 static inline bool phydev_id_compare(struct phy_device *phydev, u32 id) 1210 { 1211 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask); 1212 } 1213 1214 /* A Structure for boards to register fixups with the PHY Lib */ 1215 struct phy_fixup { 1216 struct list_head list; 1217 char bus_id[MII_BUS_ID_SIZE + 3]; 1218 u32 phy_uid; 1219 u32 phy_uid_mask; 1220 int (*run)(struct phy_device *phydev); 1221 }; 1222 1223 const char *phy_speed_to_str(int speed); 1224 const char *phy_duplex_to_str(unsigned int duplex); 1225 const char *phy_rate_matching_to_str(int rate_matching); 1226 1227 int phy_interface_num_ports(phy_interface_t interface); 1228 1229 /* A structure for mapping a particular speed and duplex 1230 * combination to a particular SUPPORTED and ADVERTISED value 1231 */ 1232 struct phy_setting { 1233 u32 speed; 1234 u8 duplex; 1235 u8 bit; 1236 }; 1237 1238 const struct phy_setting * 1239 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 1240 bool exact); 1241 size_t phy_speeds(unsigned int *speeds, size_t size, 1242 unsigned long *mask); 1243 void of_set_phy_supported(struct phy_device *phydev); 1244 void of_set_phy_eee_broken(struct phy_device *phydev); 1245 int phy_speed_down_core(struct phy_device *phydev); 1246 1247 /** 1248 * phy_is_started - Convenience function to check whether PHY is started 1249 * @phydev: The phy_device struct 1250 */ 1251 static inline bool phy_is_started(struct phy_device *phydev) 1252 { 1253 return phydev->state >= PHY_UP; 1254 } 1255 1256 void phy_resolve_aneg_pause(struct phy_device *phydev); 1257 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1258 void phy_check_downshift(struct phy_device *phydev); 1259 1260 /** 1261 * phy_read - Convenience function for reading a given PHY register 1262 * @phydev: the phy_device struct 1263 * @regnum: register number to read 1264 * 1265 * NOTE: MUST NOT be called from interrupt context, 1266 * because the bus read/write functions may wait for an interrupt 1267 * to conclude the operation. 1268 */ 1269 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1270 { 1271 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1272 } 1273 1274 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1275 timeout_us, sleep_before_read) \ 1276 ({ \ 1277 int __ret, __val; \ 1278 __ret = read_poll_timeout(__val = phy_read, val, \ 1279 __val < 0 || (cond), \ 1280 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1281 if (__val < 0) \ 1282 __ret = __val; \ 1283 if (__ret) \ 1284 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1285 __ret; \ 1286 }) 1287 1288 /** 1289 * __phy_read - convenience function for reading a given PHY register 1290 * @phydev: the phy_device struct 1291 * @regnum: register number to read 1292 * 1293 * The caller must have taken the MDIO bus lock. 1294 */ 1295 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1296 { 1297 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1298 } 1299 1300 /** 1301 * phy_write - Convenience function for writing a given PHY register 1302 * @phydev: the phy_device struct 1303 * @regnum: register number to write 1304 * @val: value to write to @regnum 1305 * 1306 * NOTE: MUST NOT be called from interrupt context, 1307 * because the bus read/write functions may wait for an interrupt 1308 * to conclude the operation. 1309 */ 1310 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1311 { 1312 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1313 } 1314 1315 /** 1316 * __phy_write - Convenience function for writing a given PHY register 1317 * @phydev: the phy_device struct 1318 * @regnum: register number to write 1319 * @val: value to write to @regnum 1320 * 1321 * The caller must have taken the MDIO bus lock. 1322 */ 1323 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1324 { 1325 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1326 val); 1327 } 1328 1329 /** 1330 * __phy_modify_changed() - Convenience function for modifying a PHY register 1331 * @phydev: a pointer to a &struct phy_device 1332 * @regnum: register number 1333 * @mask: bit mask of bits to clear 1334 * @set: bit mask of bits to set 1335 * 1336 * Unlocked helper function which allows a PHY register to be modified as 1337 * new register value = (old register value & ~mask) | set 1338 * 1339 * Returns negative errno, 0 if there was no change, and 1 in case of change 1340 */ 1341 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1342 u16 mask, u16 set) 1343 { 1344 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1345 regnum, mask, set); 1346 } 1347 1348 /* 1349 * phy_read_mmd - Convenience function for reading a register 1350 * from an MMD on a given PHY. 1351 */ 1352 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1353 1354 /** 1355 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1356 * condition is met or a timeout occurs 1357 * 1358 * @phydev: The phy_device struct 1359 * @devaddr: The MMD to read from 1360 * @regnum: The register on the MMD to read 1361 * @val: Variable to read the register into 1362 * @cond: Break condition (usually involving @val) 1363 * @sleep_us: Maximum time to sleep between reads in us (0 1364 * tight-loops). Should be less than ~20ms since usleep_range 1365 * is used (see Documentation/timers/timers-howto.rst). 1366 * @timeout_us: Timeout in us, 0 means never timeout 1367 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1368 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either 1369 * case, the last read value at @args is stored in @val. Must not 1370 * be called from atomic context if sleep_us or timeout_us are used. 1371 */ 1372 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1373 sleep_us, timeout_us, sleep_before_read) \ 1374 ({ \ 1375 int __ret, __val; \ 1376 __ret = read_poll_timeout(__val = phy_read_mmd, val, \ 1377 __val < 0 || (cond), \ 1378 sleep_us, timeout_us, sleep_before_read, \ 1379 phydev, devaddr, regnum); \ 1380 if (__val < 0) \ 1381 __ret = __val; \ 1382 if (__ret) \ 1383 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1384 __ret; \ 1385 }) 1386 1387 /* 1388 * __phy_read_mmd - Convenience function for reading a register 1389 * from an MMD on a given PHY. 1390 */ 1391 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1392 1393 /* 1394 * phy_write_mmd - Convenience function for writing a register 1395 * on an MMD on a given PHY. 1396 */ 1397 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1398 1399 /* 1400 * __phy_write_mmd - Convenience function for writing a register 1401 * on an MMD on a given PHY. 1402 */ 1403 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1404 1405 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1406 u16 set); 1407 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1408 u16 set); 1409 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1410 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1411 1412 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1413 u16 mask, u16 set); 1414 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1415 u16 mask, u16 set); 1416 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1417 u16 mask, u16 set); 1418 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1419 u16 mask, u16 set); 1420 1421 /** 1422 * __phy_set_bits - Convenience function for setting bits in a PHY register 1423 * @phydev: the phy_device struct 1424 * @regnum: register number to write 1425 * @val: bits to set 1426 * 1427 * The caller must have taken the MDIO bus lock. 1428 */ 1429 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1430 { 1431 return __phy_modify(phydev, regnum, 0, val); 1432 } 1433 1434 /** 1435 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1436 * @phydev: the phy_device struct 1437 * @regnum: register number to write 1438 * @val: bits to clear 1439 * 1440 * The caller must have taken the MDIO bus lock. 1441 */ 1442 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1443 u16 val) 1444 { 1445 return __phy_modify(phydev, regnum, val, 0); 1446 } 1447 1448 /** 1449 * phy_set_bits - Convenience function for setting bits in a PHY register 1450 * @phydev: the phy_device struct 1451 * @regnum: register number to write 1452 * @val: bits to set 1453 */ 1454 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1455 { 1456 return phy_modify(phydev, regnum, 0, val); 1457 } 1458 1459 /** 1460 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1461 * @phydev: the phy_device struct 1462 * @regnum: register number to write 1463 * @val: bits to clear 1464 */ 1465 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1466 { 1467 return phy_modify(phydev, regnum, val, 0); 1468 } 1469 1470 /** 1471 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1472 * on MMD 1473 * @phydev: the phy_device struct 1474 * @devad: the MMD containing register to modify 1475 * @regnum: register number to modify 1476 * @val: bits to set 1477 * 1478 * The caller must have taken the MDIO bus lock. 1479 */ 1480 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1481 u32 regnum, u16 val) 1482 { 1483 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1484 } 1485 1486 /** 1487 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1488 * on MMD 1489 * @phydev: the phy_device struct 1490 * @devad: the MMD containing register to modify 1491 * @regnum: register number to modify 1492 * @val: bits to clear 1493 * 1494 * The caller must have taken the MDIO bus lock. 1495 */ 1496 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1497 u32 regnum, u16 val) 1498 { 1499 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1500 } 1501 1502 /** 1503 * phy_set_bits_mmd - Convenience function for setting bits in a register 1504 * on MMD 1505 * @phydev: the phy_device struct 1506 * @devad: the MMD containing register to modify 1507 * @regnum: register number to modify 1508 * @val: bits to set 1509 */ 1510 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1511 u32 regnum, u16 val) 1512 { 1513 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1514 } 1515 1516 /** 1517 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1518 * on MMD 1519 * @phydev: the phy_device struct 1520 * @devad: the MMD containing register to modify 1521 * @regnum: register number to modify 1522 * @val: bits to clear 1523 */ 1524 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1525 u32 regnum, u16 val) 1526 { 1527 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1528 } 1529 1530 /** 1531 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1532 * @phydev: the phy_device struct 1533 * 1534 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1535 * PHY_MAC_INTERRUPT 1536 */ 1537 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1538 { 1539 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1540 } 1541 1542 /** 1543 * phy_polling_mode - Convenience function for testing whether polling is 1544 * used to detect PHY status changes 1545 * @phydev: the phy_device struct 1546 */ 1547 static inline bool phy_polling_mode(struct phy_device *phydev) 1548 { 1549 if (phydev->state == PHY_CABLETEST) 1550 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1551 return true; 1552 1553 return phydev->irq == PHY_POLL; 1554 } 1555 1556 /** 1557 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1558 * @phydev: the phy_device struct 1559 */ 1560 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1561 { 1562 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1563 } 1564 1565 /** 1566 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1567 * @phydev: the phy_device struct 1568 */ 1569 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1570 { 1571 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1572 } 1573 1574 /** 1575 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1576 * PTP hardware clock capabilities. 1577 * @phydev: the phy_device struct 1578 */ 1579 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1580 { 1581 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1582 } 1583 1584 /** 1585 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1586 * @phydev: the phy_device struct 1587 */ 1588 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1589 { 1590 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1591 } 1592 1593 static inline int phy_hwtstamp(struct phy_device *phydev, 1594 struct kernel_hwtstamp_config *cfg, 1595 struct netlink_ext_ack *extack) 1596 { 1597 return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack); 1598 } 1599 1600 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1601 int type) 1602 { 1603 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1604 } 1605 1606 static inline int phy_ts_info(struct phy_device *phydev, 1607 struct ethtool_ts_info *tsinfo) 1608 { 1609 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1610 } 1611 1612 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1613 int type) 1614 { 1615 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1616 } 1617 1618 /** 1619 * phy_is_internal - Convenience function for testing if a PHY is internal 1620 * @phydev: the phy_device struct 1621 */ 1622 static inline bool phy_is_internal(struct phy_device *phydev) 1623 { 1624 return phydev->is_internal; 1625 } 1626 1627 /** 1628 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1629 * @phydev: the phy_device struct 1630 */ 1631 static inline bool phy_on_sfp(struct phy_device *phydev) 1632 { 1633 return phydev->is_on_sfp_module; 1634 } 1635 1636 /** 1637 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1638 * PHY interface mode is RGMII (all variants) 1639 * @mode: the &phy_interface_t enum 1640 */ 1641 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1642 { 1643 return mode >= PHY_INTERFACE_MODE_RGMII && 1644 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1645 }; 1646 1647 /** 1648 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1649 * negotiation 1650 * @mode: one of &enum phy_interface_t 1651 * 1652 * Returns true if the PHY interface mode uses the 16-bit negotiation 1653 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1654 */ 1655 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1656 { 1657 return mode == PHY_INTERFACE_MODE_1000BASEX || 1658 mode == PHY_INTERFACE_MODE_2500BASEX; 1659 } 1660 1661 /** 1662 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1663 * is RGMII (all variants) 1664 * @phydev: the phy_device struct 1665 */ 1666 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1667 { 1668 return phy_interface_mode_is_rgmii(phydev->interface); 1669 }; 1670 1671 /** 1672 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1673 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1674 * @phydev: the phy_device struct 1675 */ 1676 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1677 { 1678 return phydev->is_pseudo_fixed_link; 1679 } 1680 1681 int phy_save_page(struct phy_device *phydev); 1682 int phy_select_page(struct phy_device *phydev, int page); 1683 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1684 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1685 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1686 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1687 u16 mask, u16 set); 1688 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1689 u16 mask, u16 set); 1690 1691 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1692 bool is_c45, 1693 struct phy_c45_device_ids *c45_ids); 1694 #if IS_ENABLED(CONFIG_PHYLIB) 1695 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1696 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1697 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1698 struct phy_device *device_phy_find_device(struct device *dev); 1699 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode); 1700 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1701 int phy_device_register(struct phy_device *phy); 1702 void phy_device_free(struct phy_device *phydev); 1703 #else 1704 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1705 { 1706 return 0; 1707 } 1708 static inline 1709 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1710 { 1711 return 0; 1712 } 1713 1714 static inline 1715 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1716 { 1717 return NULL; 1718 } 1719 1720 static inline struct phy_device *device_phy_find_device(struct device *dev) 1721 { 1722 return NULL; 1723 } 1724 1725 static inline 1726 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1727 { 1728 return NULL; 1729 } 1730 1731 static inline 1732 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1733 { 1734 return NULL; 1735 } 1736 1737 static inline int phy_device_register(struct phy_device *phy) 1738 { 1739 return 0; 1740 } 1741 1742 static inline void phy_device_free(struct phy_device *phydev) { } 1743 #endif /* CONFIG_PHYLIB */ 1744 void phy_device_remove(struct phy_device *phydev); 1745 int phy_get_c45_ids(struct phy_device *phydev); 1746 int phy_init_hw(struct phy_device *phydev); 1747 int phy_suspend(struct phy_device *phydev); 1748 int phy_resume(struct phy_device *phydev); 1749 int __phy_resume(struct phy_device *phydev); 1750 int phy_loopback(struct phy_device *phydev, bool enable); 1751 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1752 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1753 int phy_sfp_probe(struct phy_device *phydev, 1754 const struct sfp_upstream_ops *ops); 1755 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1756 phy_interface_t interface); 1757 struct phy_device *phy_find_first(struct mii_bus *bus); 1758 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1759 u32 flags, phy_interface_t interface); 1760 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1761 void (*handler)(struct net_device *), 1762 phy_interface_t interface); 1763 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1764 void (*handler)(struct net_device *), 1765 phy_interface_t interface); 1766 void phy_disconnect(struct phy_device *phydev); 1767 void phy_detach(struct phy_device *phydev); 1768 void phy_start(struct phy_device *phydev); 1769 void phy_stop(struct phy_device *phydev); 1770 int phy_config_aneg(struct phy_device *phydev); 1771 int _phy_start_aneg(struct phy_device *phydev); 1772 int phy_start_aneg(struct phy_device *phydev); 1773 int phy_aneg_done(struct phy_device *phydev); 1774 int phy_speed_down(struct phy_device *phydev, bool sync); 1775 int phy_speed_up(struct phy_device *phydev); 1776 bool phy_check_valid(int speed, int duplex, unsigned long *features); 1777 1778 int phy_restart_aneg(struct phy_device *phydev); 1779 int phy_reset_after_clk_enable(struct phy_device *phydev); 1780 1781 #if IS_ENABLED(CONFIG_PHYLIB) 1782 int phy_start_cable_test(struct phy_device *phydev, 1783 struct netlink_ext_ack *extack); 1784 int phy_start_cable_test_tdr(struct phy_device *phydev, 1785 struct netlink_ext_ack *extack, 1786 const struct phy_tdr_config *config); 1787 #else 1788 static inline 1789 int phy_start_cable_test(struct phy_device *phydev, 1790 struct netlink_ext_ack *extack) 1791 { 1792 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1793 return -EOPNOTSUPP; 1794 } 1795 static inline 1796 int phy_start_cable_test_tdr(struct phy_device *phydev, 1797 struct netlink_ext_ack *extack, 1798 const struct phy_tdr_config *config) 1799 { 1800 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1801 return -EOPNOTSUPP; 1802 } 1803 #endif 1804 1805 static inline void phy_device_reset(struct phy_device *phydev, int value) 1806 { 1807 mdio_device_reset(&phydev->mdio, value); 1808 } 1809 1810 #define phydev_err(_phydev, format, args...) \ 1811 dev_err(&_phydev->mdio.dev, format, ##args) 1812 1813 #define phydev_err_probe(_phydev, err, format, args...) \ 1814 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1815 1816 #define phydev_info(_phydev, format, args...) \ 1817 dev_info(&_phydev->mdio.dev, format, ##args) 1818 1819 #define phydev_warn(_phydev, format, args...) \ 1820 dev_warn(&_phydev->mdio.dev, format, ##args) 1821 1822 #define phydev_dbg(_phydev, format, args...) \ 1823 dev_dbg(&_phydev->mdio.dev, format, ##args) 1824 1825 static inline const char *phydev_name(const struct phy_device *phydev) 1826 { 1827 return dev_name(&phydev->mdio.dev); 1828 } 1829 1830 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1831 { 1832 mutex_lock(&phydev->mdio.bus->mdio_lock); 1833 } 1834 1835 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1836 { 1837 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1838 } 1839 1840 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1841 __printf(2, 3); 1842 char *phy_attached_info_irq(struct phy_device *phydev) 1843 __malloc; 1844 void phy_attached_info(struct phy_device *phydev); 1845 1846 /* Clause 22 PHY */ 1847 int genphy_read_abilities(struct phy_device *phydev); 1848 int genphy_setup_forced(struct phy_device *phydev); 1849 int genphy_restart_aneg(struct phy_device *phydev); 1850 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1851 int genphy_config_eee_advert(struct phy_device *phydev); 1852 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1853 int genphy_aneg_done(struct phy_device *phydev); 1854 int genphy_update_link(struct phy_device *phydev); 1855 int genphy_read_lpa(struct phy_device *phydev); 1856 int genphy_read_status_fixed(struct phy_device *phydev); 1857 int genphy_read_status(struct phy_device *phydev); 1858 int genphy_read_master_slave(struct phy_device *phydev); 1859 int genphy_suspend(struct phy_device *phydev); 1860 int genphy_resume(struct phy_device *phydev); 1861 int genphy_loopback(struct phy_device *phydev, bool enable); 1862 int genphy_soft_reset(struct phy_device *phydev); 1863 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1864 1865 static inline int genphy_config_aneg(struct phy_device *phydev) 1866 { 1867 return __genphy_config_aneg(phydev, false); 1868 } 1869 1870 static inline int genphy_no_config_intr(struct phy_device *phydev) 1871 { 1872 return 0; 1873 } 1874 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1875 u16 regnum); 1876 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1877 u16 regnum, u16 val); 1878 1879 /* Clause 37 */ 1880 int genphy_c37_config_aneg(struct phy_device *phydev); 1881 int genphy_c37_read_status(struct phy_device *phydev, bool *changed); 1882 1883 /* Clause 45 PHY */ 1884 int genphy_c45_restart_aneg(struct phy_device *phydev); 1885 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1886 int genphy_c45_aneg_done(struct phy_device *phydev); 1887 int genphy_c45_read_link(struct phy_device *phydev); 1888 int genphy_c45_read_lpa(struct phy_device *phydev); 1889 int genphy_c45_read_pma(struct phy_device *phydev); 1890 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1891 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 1892 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1893 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1894 int genphy_c45_read_mdix(struct phy_device *phydev); 1895 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1896 int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev); 1897 int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev); 1898 int genphy_c45_read_eee_abilities(struct phy_device *phydev); 1899 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 1900 int genphy_c45_read_status(struct phy_device *phydev); 1901 int genphy_c45_baset1_read_status(struct phy_device *phydev); 1902 int genphy_c45_config_aneg(struct phy_device *phydev); 1903 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1904 int genphy_c45_pma_resume(struct phy_device *phydev); 1905 int genphy_c45_pma_suspend(struct phy_device *phydev); 1906 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 1907 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 1908 struct phy_plca_cfg *plca_cfg); 1909 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 1910 const struct phy_plca_cfg *plca_cfg); 1911 int genphy_c45_plca_get_status(struct phy_device *phydev, 1912 struct phy_plca_status *plca_st); 1913 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv, 1914 unsigned long *lp, bool *is_enabled); 1915 int genphy_c45_ethtool_get_eee(struct phy_device *phydev, 1916 struct ethtool_keee *data); 1917 int genphy_c45_ethtool_set_eee(struct phy_device *phydev, 1918 struct ethtool_keee *data); 1919 int genphy_c45_write_eee_adv(struct phy_device *phydev, unsigned long *adv); 1920 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev); 1921 int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv); 1922 1923 /* Generic C45 PHY driver */ 1924 extern struct phy_driver genphy_c45_driver; 1925 1926 /* The gen10g_* functions are the old Clause 45 stub */ 1927 int gen10g_config_aneg(struct phy_device *phydev); 1928 1929 static inline int phy_read_status(struct phy_device *phydev) 1930 { 1931 if (!phydev->drv) 1932 return -EIO; 1933 1934 if (phydev->drv->read_status) 1935 return phydev->drv->read_status(phydev); 1936 else 1937 return genphy_read_status(phydev); 1938 } 1939 1940 void phy_driver_unregister(struct phy_driver *drv); 1941 void phy_drivers_unregister(struct phy_driver *drv, int n); 1942 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1943 int phy_drivers_register(struct phy_driver *new_driver, int n, 1944 struct module *owner); 1945 void phy_error(struct phy_device *phydev); 1946 void phy_state_machine(struct work_struct *work); 1947 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1948 void phy_trigger_machine(struct phy_device *phydev); 1949 void phy_mac_interrupt(struct phy_device *phydev); 1950 void phy_start_machine(struct phy_device *phydev); 1951 void phy_stop_machine(struct phy_device *phydev); 1952 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1953 struct ethtool_link_ksettings *cmd); 1954 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1955 const struct ethtool_link_ksettings *cmd); 1956 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1957 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1958 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1959 int phy_disable_interrupts(struct phy_device *phydev); 1960 void phy_request_interrupt(struct phy_device *phydev); 1961 void phy_free_interrupt(struct phy_device *phydev); 1962 void phy_print_status(struct phy_device *phydev); 1963 int phy_get_rate_matching(struct phy_device *phydev, 1964 phy_interface_t iface); 1965 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1966 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1967 void phy_advertise_supported(struct phy_device *phydev); 1968 void phy_advertise_eee_all(struct phy_device *phydev); 1969 void phy_support_sym_pause(struct phy_device *phydev); 1970 void phy_support_asym_pause(struct phy_device *phydev); 1971 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1972 bool autoneg); 1973 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1974 bool phy_validate_pause(struct phy_device *phydev, 1975 struct ethtool_pauseparam *pp); 1976 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1977 1978 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 1979 const int *delay_values, int size, bool is_rx); 1980 1981 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1982 bool *tx_pause, bool *rx_pause); 1983 1984 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1985 int (*run)(struct phy_device *)); 1986 int phy_register_fixup_for_id(const char *bus_id, 1987 int (*run)(struct phy_device *)); 1988 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1989 int (*run)(struct phy_device *)); 1990 1991 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1992 int phy_unregister_fixup_for_id(const char *bus_id); 1993 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1994 1995 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1996 int phy_get_eee_err(struct phy_device *phydev); 1997 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data); 1998 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_keee *data); 1999 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 2000 void phy_ethtool_get_wol(struct phy_device *phydev, 2001 struct ethtool_wolinfo *wol); 2002 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 2003 struct ethtool_link_ksettings *cmd); 2004 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 2005 const struct ethtool_link_ksettings *cmd); 2006 int phy_ethtool_nway_reset(struct net_device *ndev); 2007 int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size); 2008 int of_phy_package_join(struct phy_device *phydev, size_t priv_size); 2009 void phy_package_leave(struct phy_device *phydev); 2010 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 2011 int base_addr, size_t priv_size); 2012 int devm_of_phy_package_join(struct device *dev, struct phy_device *phydev, 2013 size_t priv_size); 2014 2015 int __init mdio_bus_init(void); 2016 void mdio_bus_exit(void); 2017 2018 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 2019 int phy_ethtool_get_sset_count(struct phy_device *phydev); 2020 int phy_ethtool_get_stats(struct phy_device *phydev, 2021 struct ethtool_stats *stats, u64 *data); 2022 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 2023 struct phy_plca_cfg *plca_cfg); 2024 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 2025 const struct phy_plca_cfg *plca_cfg, 2026 struct netlink_ext_ack *extack); 2027 int phy_ethtool_get_plca_status(struct phy_device *phydev, 2028 struct phy_plca_status *plca_st); 2029 2030 int __phy_hwtstamp_get(struct phy_device *phydev, 2031 struct kernel_hwtstamp_config *config); 2032 int __phy_hwtstamp_set(struct phy_device *phydev, 2033 struct kernel_hwtstamp_config *config, 2034 struct netlink_ext_ack *extack); 2035 2036 static inline int phy_package_address(struct phy_device *phydev, 2037 unsigned int addr_offset) 2038 { 2039 struct phy_package_shared *shared = phydev->shared; 2040 u8 base_addr = shared->base_addr; 2041 2042 if (addr_offset >= PHY_MAX_ADDR - base_addr) 2043 return -EIO; 2044 2045 /* we know that addr will be in the range 0..31 and thus the 2046 * implicit cast to a signed int is not a problem. 2047 */ 2048 return base_addr + addr_offset; 2049 } 2050 2051 static inline int phy_package_read(struct phy_device *phydev, 2052 unsigned int addr_offset, u32 regnum) 2053 { 2054 int addr = phy_package_address(phydev, addr_offset); 2055 2056 if (addr < 0) 2057 return addr; 2058 2059 return mdiobus_read(phydev->mdio.bus, addr, regnum); 2060 } 2061 2062 static inline int __phy_package_read(struct phy_device *phydev, 2063 unsigned int addr_offset, u32 regnum) 2064 { 2065 int addr = phy_package_address(phydev, addr_offset); 2066 2067 if (addr < 0) 2068 return addr; 2069 2070 return __mdiobus_read(phydev->mdio.bus, addr, regnum); 2071 } 2072 2073 static inline int phy_package_write(struct phy_device *phydev, 2074 unsigned int addr_offset, u32 regnum, 2075 u16 val) 2076 { 2077 int addr = phy_package_address(phydev, addr_offset); 2078 2079 if (addr < 0) 2080 return addr; 2081 2082 return mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2083 } 2084 2085 static inline int __phy_package_write(struct phy_device *phydev, 2086 unsigned int addr_offset, u32 regnum, 2087 u16 val) 2088 { 2089 int addr = phy_package_address(phydev, addr_offset); 2090 2091 if (addr < 0) 2092 return addr; 2093 2094 return __mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2095 } 2096 2097 int __phy_package_read_mmd(struct phy_device *phydev, 2098 unsigned int addr_offset, int devad, 2099 u32 regnum); 2100 2101 int phy_package_read_mmd(struct phy_device *phydev, 2102 unsigned int addr_offset, int devad, 2103 u32 regnum); 2104 2105 int __phy_package_write_mmd(struct phy_device *phydev, 2106 unsigned int addr_offset, int devad, 2107 u32 regnum, u16 val); 2108 2109 int phy_package_write_mmd(struct phy_device *phydev, 2110 unsigned int addr_offset, int devad, 2111 u32 regnum, u16 val); 2112 2113 static inline bool __phy_package_set_once(struct phy_device *phydev, 2114 unsigned int b) 2115 { 2116 struct phy_package_shared *shared = phydev->shared; 2117 2118 if (!shared) 2119 return false; 2120 2121 return !test_and_set_bit(b, &shared->flags); 2122 } 2123 2124 static inline bool phy_package_init_once(struct phy_device *phydev) 2125 { 2126 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 2127 } 2128 2129 static inline bool phy_package_probe_once(struct phy_device *phydev) 2130 { 2131 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 2132 } 2133 2134 extern const struct bus_type mdio_bus_type; 2135 2136 struct mdio_board_info { 2137 const char *bus_id; 2138 char modalias[MDIO_NAME_SIZE]; 2139 int mdio_addr; 2140 const void *platform_data; 2141 }; 2142 2143 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 2144 int mdiobus_register_board_info(const struct mdio_board_info *info, 2145 unsigned int n); 2146 #else 2147 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 2148 unsigned int n) 2149 { 2150 return 0; 2151 } 2152 #endif 2153 2154 2155 /** 2156 * phy_module_driver() - Helper macro for registering PHY drivers 2157 * @__phy_drivers: array of PHY drivers to register 2158 * @__count: Numbers of members in array 2159 * 2160 * Helper macro for PHY drivers which do not do anything special in module 2161 * init/exit. Each module may only use this macro once, and calling it 2162 * replaces module_init() and module_exit(). 2163 */ 2164 #define phy_module_driver(__phy_drivers, __count) \ 2165 static int __init phy_module_init(void) \ 2166 { \ 2167 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 2168 } \ 2169 module_init(phy_module_init); \ 2170 static void __exit phy_module_exit(void) \ 2171 { \ 2172 phy_drivers_unregister(__phy_drivers, __count); \ 2173 } \ 2174 module_exit(phy_module_exit) 2175 2176 #define module_phy_driver(__phy_drivers) \ 2177 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 2178 2179 bool phy_driver_is_genphy(struct phy_device *phydev); 2180 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 2181 2182 #endif /* __PHY_H */ 2183