1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/leds.h> 18 #include <linux/linkmode.h> 19 #include <linux/netlink.h> 20 #include <linux/mdio.h> 21 #include <linux/mii.h> 22 #include <linux/mii_timestamper.h> 23 #include <linux/module.h> 24 #include <linux/timer.h> 25 #include <linux/workqueue.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/u64_stats_sync.h> 28 #include <linux/irqreturn.h> 29 #include <linux/iopoll.h> 30 #include <linux/refcount.h> 31 32 #include <linux/atomic.h> 33 34 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 35 SUPPORTED_TP | \ 36 SUPPORTED_MII) 37 38 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 39 SUPPORTED_10baseT_Full) 40 41 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 42 SUPPORTED_100baseT_Full) 43 44 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 45 SUPPORTED_1000baseT_Full) 46 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 54 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 55 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 56 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init; 57 58 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 59 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 60 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 61 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 62 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 63 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 64 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 65 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 66 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 67 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features) 68 69 extern const int phy_basic_ports_array[3]; 70 extern const int phy_fibre_port_array[1]; 71 extern const int phy_all_ports_features_array[7]; 72 extern const int phy_10_100_features_array[4]; 73 extern const int phy_basic_t1_features_array[3]; 74 extern const int phy_basic_t1s_p2mp_features_array[2]; 75 extern const int phy_gbit_features_array[2]; 76 extern const int phy_10gbit_features_array[1]; 77 78 /* 79 * Set phydev->irq to PHY_POLL if interrupts are not supported, 80 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 81 * the attached MAC driver handles the interrupt 82 */ 83 #define PHY_POLL -1 84 #define PHY_MAC_INTERRUPT -2 85 86 #define PHY_IS_INTERNAL 0x00000001 87 #define PHY_RST_AFTER_CLK_EN 0x00000002 88 #define PHY_POLL_CABLE_TEST 0x00000004 89 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008 90 #define MDIO_DEVICE_IS_PHY 0x80000000 91 92 /** 93 * enum phy_interface_t - Interface Mode definitions 94 * 95 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 96 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 97 * @PHY_INTERFACE_MODE_MII: Media-independent interface 98 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 99 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 100 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 101 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 102 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 103 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 104 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 105 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 106 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 107 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 108 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 109 * @PHY_INTERFACE_MODE_SMII: Serial MII 110 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 111 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 112 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 113 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 114 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 115 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 116 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 117 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 118 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 119 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 120 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 121 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 122 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 123 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 124 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 125 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 126 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 127 * @PHY_INTERFACE_MODE_MAX: Book keeping 128 * 129 * Describes the interface between the MAC and PHY. 130 */ 131 typedef enum { 132 PHY_INTERFACE_MODE_NA, 133 PHY_INTERFACE_MODE_INTERNAL, 134 PHY_INTERFACE_MODE_MII, 135 PHY_INTERFACE_MODE_GMII, 136 PHY_INTERFACE_MODE_SGMII, 137 PHY_INTERFACE_MODE_TBI, 138 PHY_INTERFACE_MODE_REVMII, 139 PHY_INTERFACE_MODE_RMII, 140 PHY_INTERFACE_MODE_REVRMII, 141 PHY_INTERFACE_MODE_RGMII, 142 PHY_INTERFACE_MODE_RGMII_ID, 143 PHY_INTERFACE_MODE_RGMII_RXID, 144 PHY_INTERFACE_MODE_RGMII_TXID, 145 PHY_INTERFACE_MODE_RTBI, 146 PHY_INTERFACE_MODE_SMII, 147 PHY_INTERFACE_MODE_XGMII, 148 PHY_INTERFACE_MODE_XLGMII, 149 PHY_INTERFACE_MODE_MOCA, 150 PHY_INTERFACE_MODE_QSGMII, 151 PHY_INTERFACE_MODE_TRGMII, 152 PHY_INTERFACE_MODE_100BASEX, 153 PHY_INTERFACE_MODE_1000BASEX, 154 PHY_INTERFACE_MODE_2500BASEX, 155 PHY_INTERFACE_MODE_5GBASER, 156 PHY_INTERFACE_MODE_RXAUI, 157 PHY_INTERFACE_MODE_XAUI, 158 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 159 PHY_INTERFACE_MODE_10GBASER, 160 PHY_INTERFACE_MODE_25GBASER, 161 PHY_INTERFACE_MODE_USXGMII, 162 /* 10GBASE-KR - with Clause 73 AN */ 163 PHY_INTERFACE_MODE_10GKR, 164 PHY_INTERFACE_MODE_QUSGMII, 165 PHY_INTERFACE_MODE_1000BASEKX, 166 PHY_INTERFACE_MODE_MAX, 167 } phy_interface_t; 168 169 /* PHY interface mode bitmap handling */ 170 #define DECLARE_PHY_INTERFACE_MASK(name) \ 171 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 172 173 static inline void phy_interface_zero(unsigned long *intf) 174 { 175 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 176 } 177 178 static inline bool phy_interface_empty(const unsigned long *intf) 179 { 180 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 181 } 182 183 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 184 const unsigned long *b) 185 { 186 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 187 } 188 189 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 190 const unsigned long *b) 191 { 192 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 193 } 194 195 static inline void phy_interface_set_rgmii(unsigned long *intf) 196 { 197 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 198 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 199 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 200 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 201 } 202 203 /* 204 * phy_supported_speeds - return all speeds currently supported by a PHY device 205 */ 206 unsigned int phy_supported_speeds(struct phy_device *phy, 207 unsigned int *speeds, 208 unsigned int size); 209 210 /** 211 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 212 * @interface: enum phy_interface_t value 213 * 214 * Description: maps enum &phy_interface_t defined in this file 215 * into the device tree binding of 'phy-mode', so that Ethernet 216 * device driver can get PHY interface from device tree. 217 */ 218 static inline const char *phy_modes(phy_interface_t interface) 219 { 220 switch (interface) { 221 case PHY_INTERFACE_MODE_NA: 222 return ""; 223 case PHY_INTERFACE_MODE_INTERNAL: 224 return "internal"; 225 case PHY_INTERFACE_MODE_MII: 226 return "mii"; 227 case PHY_INTERFACE_MODE_GMII: 228 return "gmii"; 229 case PHY_INTERFACE_MODE_SGMII: 230 return "sgmii"; 231 case PHY_INTERFACE_MODE_TBI: 232 return "tbi"; 233 case PHY_INTERFACE_MODE_REVMII: 234 return "rev-mii"; 235 case PHY_INTERFACE_MODE_RMII: 236 return "rmii"; 237 case PHY_INTERFACE_MODE_REVRMII: 238 return "rev-rmii"; 239 case PHY_INTERFACE_MODE_RGMII: 240 return "rgmii"; 241 case PHY_INTERFACE_MODE_RGMII_ID: 242 return "rgmii-id"; 243 case PHY_INTERFACE_MODE_RGMII_RXID: 244 return "rgmii-rxid"; 245 case PHY_INTERFACE_MODE_RGMII_TXID: 246 return "rgmii-txid"; 247 case PHY_INTERFACE_MODE_RTBI: 248 return "rtbi"; 249 case PHY_INTERFACE_MODE_SMII: 250 return "smii"; 251 case PHY_INTERFACE_MODE_XGMII: 252 return "xgmii"; 253 case PHY_INTERFACE_MODE_XLGMII: 254 return "xlgmii"; 255 case PHY_INTERFACE_MODE_MOCA: 256 return "moca"; 257 case PHY_INTERFACE_MODE_QSGMII: 258 return "qsgmii"; 259 case PHY_INTERFACE_MODE_TRGMII: 260 return "trgmii"; 261 case PHY_INTERFACE_MODE_1000BASEX: 262 return "1000base-x"; 263 case PHY_INTERFACE_MODE_1000BASEKX: 264 return "1000base-kx"; 265 case PHY_INTERFACE_MODE_2500BASEX: 266 return "2500base-x"; 267 case PHY_INTERFACE_MODE_5GBASER: 268 return "5gbase-r"; 269 case PHY_INTERFACE_MODE_RXAUI: 270 return "rxaui"; 271 case PHY_INTERFACE_MODE_XAUI: 272 return "xaui"; 273 case PHY_INTERFACE_MODE_10GBASER: 274 return "10gbase-r"; 275 case PHY_INTERFACE_MODE_25GBASER: 276 return "25gbase-r"; 277 case PHY_INTERFACE_MODE_USXGMII: 278 return "usxgmii"; 279 case PHY_INTERFACE_MODE_10GKR: 280 return "10gbase-kr"; 281 case PHY_INTERFACE_MODE_100BASEX: 282 return "100base-x"; 283 case PHY_INTERFACE_MODE_QUSGMII: 284 return "qusgmii"; 285 default: 286 return "unknown"; 287 } 288 } 289 290 #define PHY_INIT_TIMEOUT 100000 291 #define PHY_FORCE_TIMEOUT 10 292 293 #define PHY_MAX_ADDR 32 294 295 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 296 #define PHY_ID_FMT "%s:%02x" 297 298 #define MII_BUS_ID_SIZE 61 299 300 struct device; 301 struct kernel_hwtstamp_config; 302 struct phylink; 303 struct sfp_bus; 304 struct sfp_upstream_ops; 305 struct sk_buff; 306 307 /** 308 * struct mdio_bus_stats - Statistics counters for MDIO busses 309 * @transfers: Total number of transfers, i.e. @writes + @reads 310 * @errors: Number of MDIO transfers that returned an error 311 * @writes: Number of write transfers 312 * @reads: Number of read transfers 313 * @syncp: Synchronisation for incrementing statistics 314 */ 315 struct mdio_bus_stats { 316 u64_stats_t transfers; 317 u64_stats_t errors; 318 u64_stats_t writes; 319 u64_stats_t reads; 320 /* Must be last, add new statistics above */ 321 struct u64_stats_sync syncp; 322 }; 323 324 /** 325 * struct phy_package_shared - Shared information in PHY packages 326 * @addr: Common PHY address used to combine PHYs in one package 327 * @refcnt: Number of PHYs connected to this shared data 328 * @flags: Initialization of PHY package 329 * @priv_size: Size of the shared private data @priv 330 * @priv: Driver private data shared across a PHY package 331 * 332 * Represents a shared structure between different phydev's in the same 333 * package, for example a quad PHY. See phy_package_join() and 334 * phy_package_leave(). 335 */ 336 struct phy_package_shared { 337 int addr; 338 refcount_t refcnt; 339 unsigned long flags; 340 size_t priv_size; 341 342 /* private data pointer */ 343 /* note that this pointer is shared between different phydevs and 344 * the user has to take care of appropriate locking. It is allocated 345 * and freed automatically by phy_package_join() and 346 * phy_package_leave(). 347 */ 348 void *priv; 349 }; 350 351 /* used as bit number in atomic bitops */ 352 #define PHY_SHARED_F_INIT_DONE 0 353 #define PHY_SHARED_F_PROBE_DONE 1 354 355 /** 356 * struct mii_bus - Represents an MDIO bus 357 * 358 * @owner: Who owns this device 359 * @name: User friendly name for this MDIO device, or driver name 360 * @id: Unique identifier for this bus, typical from bus hierarchy 361 * @priv: Driver private data 362 * 363 * The Bus class for PHYs. Devices which provide access to 364 * PHYs should register using this structure 365 */ 366 struct mii_bus { 367 struct module *owner; 368 const char *name; 369 char id[MII_BUS_ID_SIZE]; 370 void *priv; 371 /** @read: Perform a read transfer on the bus */ 372 int (*read)(struct mii_bus *bus, int addr, int regnum); 373 /** @write: Perform a write transfer on the bus */ 374 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 375 /** @read_c45: Perform a C45 read transfer on the bus */ 376 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 377 /** @write_c45: Perform a C45 write transfer on the bus */ 378 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 379 int regnum, u16 val); 380 /** @reset: Perform a reset of the bus */ 381 int (*reset)(struct mii_bus *bus); 382 383 /** @stats: Statistic counters per device on the bus */ 384 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 385 386 /** 387 * @mdio_lock: A lock to ensure that only one thing can read/write 388 * the MDIO bus at a time 389 */ 390 struct mutex mdio_lock; 391 392 /** @parent: Parent device of this bus */ 393 struct device *parent; 394 /** @state: State of bus structure */ 395 enum { 396 MDIOBUS_ALLOCATED = 1, 397 MDIOBUS_REGISTERED, 398 MDIOBUS_UNREGISTERED, 399 MDIOBUS_RELEASED, 400 } state; 401 402 /** @dev: Kernel device representation */ 403 struct device dev; 404 405 /** @mdio_map: list of all MDIO devices on bus */ 406 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 407 408 /** @phy_mask: PHY addresses to be ignored when probing */ 409 u32 phy_mask; 410 411 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 412 u32 phy_ignore_ta_mask; 413 414 /** 415 * @irq: An array of interrupts, each PHY's interrupt at the index 416 * matching its address 417 */ 418 int irq[PHY_MAX_ADDR]; 419 420 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 421 int reset_delay_us; 422 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 423 int reset_post_delay_us; 424 /** @reset_gpiod: Reset GPIO descriptor pointer */ 425 struct gpio_desc *reset_gpiod; 426 427 /** @shared_lock: protect access to the shared element */ 428 struct mutex shared_lock; 429 430 /** @shared: shared state across different PHYs */ 431 struct phy_package_shared *shared[PHY_MAX_ADDR]; 432 }; 433 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 434 435 struct mii_bus *mdiobus_alloc_size(size_t size); 436 437 /** 438 * mdiobus_alloc - Allocate an MDIO bus structure 439 * 440 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 441 * for the driver to register the bus. 442 */ 443 static inline struct mii_bus *mdiobus_alloc(void) 444 { 445 return mdiobus_alloc_size(0); 446 } 447 448 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 449 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 450 struct module *owner); 451 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 452 #define devm_mdiobus_register(dev, bus) \ 453 __devm_mdiobus_register(dev, bus, THIS_MODULE) 454 455 void mdiobus_unregister(struct mii_bus *bus); 456 void mdiobus_free(struct mii_bus *bus); 457 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 458 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 459 { 460 return devm_mdiobus_alloc_size(dev, 0); 461 } 462 463 struct mii_bus *mdio_find_bus(const char *mdio_name); 464 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); 465 466 #define PHY_INTERRUPT_DISABLED false 467 #define PHY_INTERRUPT_ENABLED true 468 469 /** 470 * enum phy_state - PHY state machine states: 471 * 472 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 473 * should be called if and only if the PHY is in this state, 474 * given that the PHY device exists. 475 * - PHY driver probe function will set the state to @PHY_READY 476 * 477 * @PHY_READY: PHY is ready to send and receive packets, but the 478 * controller is not. By default, PHYs which do not implement 479 * probe will be set to this state by phy_probe(). 480 * - start will set the state to UP 481 * 482 * @PHY_UP: The PHY and attached device are ready to do work. 483 * Interrupts should be started here. 484 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 485 * 486 * @PHY_NOLINK: PHY is up, but not currently plugged in. 487 * - irq or timer will set @PHY_RUNNING if link comes back 488 * - phy_stop moves to @PHY_HALTED 489 * 490 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 491 * and/or receiving packets 492 * - irq or timer will set @PHY_NOLINK if link goes down 493 * - phy_stop moves to @PHY_HALTED 494 * 495 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 496 * is not expected to work, carrier will be indicated as down. PHY will be 497 * poll once per second, or on interrupt for it current state. 498 * Once complete, move to UP to restart the PHY. 499 * - phy_stop aborts the running test and moves to @PHY_HALTED 500 * 501 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. 502 * - phy_start moves to @PHY_UP 503 * 504 * @PHY_ERROR: PHY is up, but is in an error state. 505 * - phy_stop moves to @PHY_HALTED 506 */ 507 enum phy_state { 508 PHY_DOWN = 0, 509 PHY_READY, 510 PHY_HALTED, 511 PHY_ERROR, 512 PHY_UP, 513 PHY_RUNNING, 514 PHY_NOLINK, 515 PHY_CABLETEST, 516 }; 517 518 #define MDIO_MMD_NUM 32 519 520 /** 521 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 522 * @devices_in_package: IEEE 802.3 devices in package register value. 523 * @mmds_present: bit vector of MMDs present. 524 * @device_ids: The device identifer for each present device. 525 */ 526 struct phy_c45_device_ids { 527 u32 devices_in_package; 528 u32 mmds_present; 529 u32 device_ids[MDIO_MMD_NUM]; 530 }; 531 532 struct macsec_context; 533 struct macsec_ops; 534 535 /** 536 * struct phy_device - An instance of a PHY 537 * 538 * @mdio: MDIO bus this PHY is on 539 * @drv: Pointer to the driver for this PHY instance 540 * @devlink: Create a link between phy dev and mac dev, if the external phy 541 * used by current mac interface is managed by another mac interface. 542 * @phy_id: UID for this device found during discovery 543 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 544 * @is_c45: Set to true if this PHY uses clause 45 addressing. 545 * @is_internal: Set to true if this PHY is internal to a MAC. 546 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 547 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 548 * @has_fixups: Set to true if this PHY has fixups/quirks. 549 * @suspended: Set to true if this PHY has been suspended successfully. 550 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 551 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 552 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 553 * @downshifted_rate: Set true if link speed has been downshifted. 554 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 555 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 556 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN 557 * enabled. 558 * @state: State of the PHY for management purposes 559 * @dev_flags: Device-specific flags used by the PHY driver. 560 * 561 * - Bits [15:0] are free to use by the PHY driver to communicate 562 * driver specific behavior. 563 * - Bits [23:16] are currently reserved for future use. 564 * - Bits [31:24] are reserved for defining generic 565 * PHY driver behavior. 566 * @irq: IRQ number of the PHY's interrupt (-1 if none) 567 * @phy_timer: The timer for handling the state machine 568 * @phylink: Pointer to phylink instance for this PHY 569 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 570 * @sfp_bus: SFP bus attached to this PHY's fiber port 571 * @attached_dev: The attached enet driver's device instance ptr 572 * @adjust_link: Callback for the enet controller to respond to changes: in the 573 * link state. 574 * @phy_link_change: Callback for phylink for notification of link change 575 * @macsec_ops: MACsec offloading ops. 576 * 577 * @speed: Current link speed 578 * @duplex: Current duplex 579 * @port: Current port 580 * @pause: Current pause 581 * @asym_pause: Current asymmetric pause 582 * @supported: Combined MAC/PHY supported linkmodes 583 * @advertising: Currently advertised linkmodes 584 * @adv_old: Saved advertised while power saving for WoL 585 * @supported_eee: supported PHY EEE linkmodes 586 * @advertising_eee: Currently advertised EEE linkmodes 587 * @eee_enabled: Flag indicating whether the EEE feature is enabled 588 * @lp_advertising: Current link partner advertised linkmodes 589 * @host_interfaces: PHY interface modes supported by host 590 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 591 * @autoneg: Flag autoneg being used 592 * @rate_matching: Current rate matching mode 593 * @link: Current link state 594 * @autoneg_complete: Flag auto negotiation of the link has completed 595 * @mdix: Current crossover 596 * @mdix_ctrl: User setting of crossover 597 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 598 * @interrupts: Flag interrupts have been enabled 599 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 600 * handling shall be postponed until PHY has resumed 601 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 602 * requiring a rerun of the interrupt handler after resume 603 * @interface: enum phy_interface_t value 604 * @skb: Netlink message for cable diagnostics 605 * @nest: Netlink nest used for cable diagnostics 606 * @ehdr: nNtlink header for cable diagnostics 607 * @phy_led_triggers: Array of LED triggers 608 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 609 * @led_link_trigger: LED trigger for link up/down 610 * @last_triggered: last LED trigger for link speed 611 * @leds: list of PHY LED structures 612 * @master_slave_set: User requested master/slave configuration 613 * @master_slave_get: Current master/slave advertisement 614 * @master_slave_state: Current master/slave configuration 615 * @mii_ts: Pointer to time stamper callbacks 616 * @psec: Pointer to Power Sourcing Equipment control struct 617 * @lock: Mutex for serialization access to PHY 618 * @state_queue: Work queue for state machine 619 * @link_down_events: Number of times link was lost 620 * @shared: Pointer to private data shared by phys in one package 621 * @priv: Pointer to driver private data 622 * 623 * interrupts currently only supports enabled or disabled, 624 * but could be changed in the future to support enabling 625 * and disabling specific interrupts 626 * 627 * Contains some infrastructure for polling and interrupt 628 * handling, as well as handling shifts in PHY hardware state 629 */ 630 struct phy_device { 631 struct mdio_device mdio; 632 633 /* Information about the PHY type */ 634 /* And management functions */ 635 struct phy_driver *drv; 636 637 struct device_link *devlink; 638 639 u32 phy_id; 640 641 struct phy_c45_device_ids c45_ids; 642 unsigned is_c45:1; 643 unsigned is_internal:1; 644 unsigned is_pseudo_fixed_link:1; 645 unsigned is_gigabit_capable:1; 646 unsigned has_fixups:1; 647 unsigned suspended:1; 648 unsigned suspended_by_mdio_bus:1; 649 unsigned sysfs_links:1; 650 unsigned loopback_enabled:1; 651 unsigned downshifted_rate:1; 652 unsigned is_on_sfp_module:1; 653 unsigned mac_managed_pm:1; 654 unsigned wol_enabled:1; 655 656 unsigned autoneg:1; 657 /* The most recently read link state */ 658 unsigned link:1; 659 unsigned autoneg_complete:1; 660 661 /* Interrupts are enabled */ 662 unsigned interrupts:1; 663 unsigned irq_suspended:1; 664 unsigned irq_rerun:1; 665 666 int rate_matching; 667 668 enum phy_state state; 669 670 u32 dev_flags; 671 672 phy_interface_t interface; 673 674 /* 675 * forced speed & duplex (no autoneg) 676 * partner speed & duplex & pause (autoneg) 677 */ 678 int speed; 679 int duplex; 680 int port; 681 int pause; 682 int asym_pause; 683 u8 master_slave_get; 684 u8 master_slave_set; 685 u8 master_slave_state; 686 687 /* Union of PHY and Attached devices' supported link modes */ 688 /* See ethtool.h for more info */ 689 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 690 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 691 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 692 /* used with phy_speed_down */ 693 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 694 /* used for eee validation */ 695 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee); 696 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee); 697 bool eee_enabled; 698 699 /* Host supported PHY interface types. Should be ignored if empty. */ 700 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 701 702 /* Energy efficient ethernet modes which should be prohibited */ 703 u32 eee_broken_modes; 704 705 #ifdef CONFIG_LED_TRIGGER_PHY 706 struct phy_led_trigger *phy_led_triggers; 707 unsigned int phy_num_led_triggers; 708 struct phy_led_trigger *last_triggered; 709 710 struct phy_led_trigger *led_link_trigger; 711 #endif 712 struct list_head leds; 713 714 /* 715 * Interrupt number for this PHY 716 * -1 means no interrupt 717 */ 718 int irq; 719 720 /* private data pointer */ 721 /* For use by PHYs to maintain extra state */ 722 void *priv; 723 724 /* shared data pointer */ 725 /* For use by PHYs inside the same package that need a shared state. */ 726 struct phy_package_shared *shared; 727 728 /* Reporting cable test results */ 729 struct sk_buff *skb; 730 void *ehdr; 731 struct nlattr *nest; 732 733 /* Interrupt and Polling infrastructure */ 734 struct delayed_work state_queue; 735 736 struct mutex lock; 737 738 /* This may be modified under the rtnl lock */ 739 bool sfp_bus_attached; 740 struct sfp_bus *sfp_bus; 741 struct phylink *phylink; 742 struct net_device *attached_dev; 743 struct mii_timestamper *mii_ts; 744 struct pse_control *psec; 745 746 u8 mdix; 747 u8 mdix_ctrl; 748 749 int pma_extable; 750 751 unsigned int link_down_events; 752 753 void (*phy_link_change)(struct phy_device *phydev, bool up); 754 void (*adjust_link)(struct net_device *dev); 755 756 #if IS_ENABLED(CONFIG_MACSEC) 757 /* MACsec management functions */ 758 const struct macsec_ops *macsec_ops; 759 #endif 760 }; 761 762 /* Generic phy_device::dev_flags */ 763 #define PHY_F_NO_IRQ 0x80000000 764 765 static inline struct phy_device *to_phy_device(const struct device *dev) 766 { 767 return container_of(to_mdio_device(dev), struct phy_device, mdio); 768 } 769 770 /** 771 * struct phy_tdr_config - Configuration of a TDR raw test 772 * 773 * @first: Distance for first data collection point 774 * @last: Distance for last data collection point 775 * @step: Step between data collection points 776 * @pair: Bitmap of cable pairs to collect data for 777 * 778 * A structure containing possible configuration parameters 779 * for a TDR cable test. The driver does not need to implement 780 * all the parameters, but should report what is actually used. 781 * All distances are in centimeters. 782 */ 783 struct phy_tdr_config { 784 u32 first; 785 u32 last; 786 u32 step; 787 s8 pair; 788 }; 789 #define PHY_PAIR_ALL -1 790 791 /** 792 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 793 * Avoidance) Reconciliation Sublayer. 794 * 795 * @version: read-only PLCA register map version. -1 = not available. Ignored 796 * when setting the configuration. Format is the same as reported by the PLCA 797 * IDVER register (31.CA00). -1 = not available. 798 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 799 * set. 0 = disabled, anything else = enabled. 800 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 801 * Allowed values [0 .. 254]. 255 = node disabled. 802 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 803 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 804 * set. Allowed values [1 .. 255]. 805 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 806 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 807 * more details. The to_timer shall be set equal over all nodes. 808 * -1 = not available / don't set. Allowed values [0 .. 255]. 809 * @burst_cnt: controls how many additional frames a node is allowed to send in 810 * single transmit opportunity (TO). The default value of 0 means that the 811 * node is allowed exactly one frame per TO. A value of 1 allows two frames 812 * per TO, and so on. -1 = not available / don't set. 813 * Allowed values [0 .. 255]. 814 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 815 * frame before interrupting the burst. This value should be set to a value 816 * greater than the MAC inter-packet gap (which is typically 96 bits). 817 * -1 = not available / don't set. Allowed values [0 .. 255]. 818 * 819 * A structure containing configuration parameters for setting/getting the PLCA 820 * RS configuration. The driver does not need to implement all the parameters, 821 * but should report what is actually used. 822 */ 823 struct phy_plca_cfg { 824 int version; 825 int enabled; 826 int node_id; 827 int node_cnt; 828 int to_tmr; 829 int burst_cnt; 830 int burst_tmr; 831 }; 832 833 /** 834 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 835 * Avoidance) Reconciliation Sublayer. 836 * 837 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 838 * register(31.CA03), indicating BEACON activity. 839 * 840 * A structure containing status information of the PLCA RS configuration. 841 * The driver does not need to implement all the parameters, but should report 842 * what is actually used. 843 */ 844 struct phy_plca_status { 845 bool pst; 846 }; 847 848 /** 849 * struct phy_led: An LED driven by the PHY 850 * 851 * @list: List of LEDs 852 * @phydev: PHY this LED is attached to 853 * @led_cdev: Standard LED class structure 854 * @index: Number of the LED 855 */ 856 struct phy_led { 857 struct list_head list; 858 struct phy_device *phydev; 859 struct led_classdev led_cdev; 860 u8 index; 861 }; 862 863 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev) 864 865 /** 866 * struct phy_driver - Driver structure for a particular PHY type 867 * 868 * @mdiodrv: Data common to all MDIO devices 869 * @phy_id: The result of reading the UID registers of this PHY 870 * type, and ANDing them with the phy_id_mask. This driver 871 * only works for PHYs with IDs which match this field 872 * @name: The friendly name of this PHY type 873 * @phy_id_mask: Defines the important bits of the phy_id 874 * @features: A mandatory list of features (speed, duplex, etc) 875 * supported by this PHY 876 * @flags: A bitfield defining certain other features this PHY 877 * supports (like interrupts) 878 * @driver_data: Static driver data 879 * 880 * All functions are optional. If config_aneg or read_status 881 * are not implemented, the phy core uses the genphy versions. 882 * Note that none of these functions should be called from 883 * interrupt time. The goal is for the bus read/write functions 884 * to be able to block when the bus transaction is happening, 885 * and be freed up by an interrupt (The MPC85xx has this ability, 886 * though it is not currently supported in the driver). 887 */ 888 struct phy_driver { 889 struct mdio_driver_common mdiodrv; 890 u32 phy_id; 891 char *name; 892 u32 phy_id_mask; 893 const unsigned long * const features; 894 u32 flags; 895 const void *driver_data; 896 897 /** 898 * @soft_reset: Called to issue a PHY software reset 899 */ 900 int (*soft_reset)(struct phy_device *phydev); 901 902 /** 903 * @config_init: Called to initialize the PHY, 904 * including after a reset 905 */ 906 int (*config_init)(struct phy_device *phydev); 907 908 /** 909 * @probe: Called during discovery. Used to set 910 * up device-specific structures, if any 911 */ 912 int (*probe)(struct phy_device *phydev); 913 914 /** 915 * @get_features: Probe the hardware to determine what 916 * abilities it has. Should only set phydev->supported. 917 */ 918 int (*get_features)(struct phy_device *phydev); 919 920 /** 921 * @get_rate_matching: Get the supported type of rate matching for a 922 * particular phy interface. This is used by phy consumers to determine 923 * whether to advertise lower-speed modes for that interface. It is 924 * assumed that if a rate matching mode is supported on an interface, 925 * then that interface's rate can be adapted to all slower link speeds 926 * supported by the phy. If the interface is not supported, this should 927 * return %RATE_MATCH_NONE. 928 */ 929 int (*get_rate_matching)(struct phy_device *phydev, 930 phy_interface_t iface); 931 932 /* PHY Power Management */ 933 /** @suspend: Suspend the hardware, saving state if needed */ 934 int (*suspend)(struct phy_device *phydev); 935 /** @resume: Resume the hardware, restoring state if needed */ 936 int (*resume)(struct phy_device *phydev); 937 938 /** 939 * @config_aneg: Configures the advertisement and resets 940 * autonegotiation if phydev->autoneg is on, 941 * forces the speed to the current settings in phydev 942 * if phydev->autoneg is off 943 */ 944 int (*config_aneg)(struct phy_device *phydev); 945 946 /** @aneg_done: Determines the auto negotiation result */ 947 int (*aneg_done)(struct phy_device *phydev); 948 949 /** @read_status: Determines the negotiated speed and duplex */ 950 int (*read_status)(struct phy_device *phydev); 951 952 /** 953 * @config_intr: Enables or disables interrupts. 954 * It should also clear any pending interrupts prior to enabling the 955 * IRQs and after disabling them. 956 */ 957 int (*config_intr)(struct phy_device *phydev); 958 959 /** @handle_interrupt: Override default interrupt handling */ 960 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 961 962 /** @remove: Clears up any memory if needed */ 963 void (*remove)(struct phy_device *phydev); 964 965 /** 966 * @match_phy_device: Returns true if this is a suitable 967 * driver for the given phydev. If NULL, matching is based on 968 * phy_id and phy_id_mask. 969 */ 970 int (*match_phy_device)(struct phy_device *phydev); 971 972 /** 973 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 974 * register changes to enable Wake on LAN, so set_wol is 975 * provided to be called in the ethernet driver's set_wol 976 * function. 977 */ 978 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 979 980 /** 981 * @get_wol: See set_wol, but for checking whether Wake on LAN 982 * is enabled. 983 */ 984 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 985 986 /** 987 * @link_change_notify: Called to inform a PHY device driver 988 * when the core is about to change the link state. This 989 * callback is supposed to be used as fixup hook for drivers 990 * that need to take action when the link state 991 * changes. Drivers are by no means allowed to mess with the 992 * PHY device structure in their implementations. 993 */ 994 void (*link_change_notify)(struct phy_device *dev); 995 996 /** 997 * @read_mmd: PHY specific driver override for reading a MMD 998 * register. This function is optional for PHY specific 999 * drivers. When not provided, the default MMD read function 1000 * will be used by phy_read_mmd(), which will use either a 1001 * direct read for Clause 45 PHYs or an indirect read for 1002 * Clause 22 PHYs. devnum is the MMD device number within the 1003 * PHY device, regnum is the register within the selected MMD 1004 * device. 1005 */ 1006 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 1007 1008 /** 1009 * @write_mmd: PHY specific driver override for writing a MMD 1010 * register. This function is optional for PHY specific 1011 * drivers. When not provided, the default MMD write function 1012 * will be used by phy_write_mmd(), which will use either a 1013 * direct write for Clause 45 PHYs, or an indirect write for 1014 * Clause 22 PHYs. devnum is the MMD device number within the 1015 * PHY device, regnum is the register within the selected MMD 1016 * device. val is the value to be written. 1017 */ 1018 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 1019 u16 val); 1020 1021 /** @read_page: Return the current PHY register page number */ 1022 int (*read_page)(struct phy_device *dev); 1023 /** @write_page: Set the current PHY register page number */ 1024 int (*write_page)(struct phy_device *dev, int page); 1025 1026 /** 1027 * @module_info: Get the size and type of the eeprom contained 1028 * within a plug-in module 1029 */ 1030 int (*module_info)(struct phy_device *dev, 1031 struct ethtool_modinfo *modinfo); 1032 1033 /** 1034 * @module_eeprom: Get the eeprom information from the plug-in 1035 * module 1036 */ 1037 int (*module_eeprom)(struct phy_device *dev, 1038 struct ethtool_eeprom *ee, u8 *data); 1039 1040 /** @cable_test_start: Start a cable test */ 1041 int (*cable_test_start)(struct phy_device *dev); 1042 1043 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1044 int (*cable_test_tdr_start)(struct phy_device *dev, 1045 const struct phy_tdr_config *config); 1046 1047 /** 1048 * @cable_test_get_status: Once per second, or on interrupt, 1049 * request the status of the test. 1050 */ 1051 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1052 1053 /* Get statistics from the PHY using ethtool */ 1054 /** @get_sset_count: Number of statistic counters */ 1055 int (*get_sset_count)(struct phy_device *dev); 1056 /** @get_strings: Names of the statistic counters */ 1057 void (*get_strings)(struct phy_device *dev, u8 *data); 1058 /** @get_stats: Return the statistic counter values */ 1059 void (*get_stats)(struct phy_device *dev, 1060 struct ethtool_stats *stats, u64 *data); 1061 1062 /* Get and Set PHY tunables */ 1063 /** @get_tunable: Return the value of a tunable */ 1064 int (*get_tunable)(struct phy_device *dev, 1065 struct ethtool_tunable *tuna, void *data); 1066 /** @set_tunable: Set the value of a tunable */ 1067 int (*set_tunable)(struct phy_device *dev, 1068 struct ethtool_tunable *tuna, 1069 const void *data); 1070 /** @set_loopback: Set the loopback mood of the PHY */ 1071 int (*set_loopback)(struct phy_device *dev, bool enable); 1072 /** @get_sqi: Get the signal quality indication */ 1073 int (*get_sqi)(struct phy_device *dev); 1074 /** @get_sqi_max: Get the maximum signal quality indication */ 1075 int (*get_sqi_max)(struct phy_device *dev); 1076 1077 /* PLCA RS interface */ 1078 /** @get_plca_cfg: Return the current PLCA configuration */ 1079 int (*get_plca_cfg)(struct phy_device *dev, 1080 struct phy_plca_cfg *plca_cfg); 1081 /** @set_plca_cfg: Set the PLCA configuration */ 1082 int (*set_plca_cfg)(struct phy_device *dev, 1083 const struct phy_plca_cfg *plca_cfg); 1084 /** @get_plca_status: Return the current PLCA status info */ 1085 int (*get_plca_status)(struct phy_device *dev, 1086 struct phy_plca_status *plca_st); 1087 1088 /** 1089 * @led_brightness_set: Set a PHY LED brightness. Index 1090 * indicates which of the PHYs led should be set. Value 1091 * follows the standard LED class meaning, e.g. LED_OFF, 1092 * LED_HALF, LED_FULL. 1093 */ 1094 int (*led_brightness_set)(struct phy_device *dev, 1095 u8 index, enum led_brightness value); 1096 1097 /** 1098 * @led_blink_set: Set a PHY LED brightness. Index indicates 1099 * which of the PHYs led should be configured to blink. Delays 1100 * are in milliseconds and if both are zero then a sensible 1101 * default should be chosen. The call should adjust the 1102 * timings in that case and if it can't match the values 1103 * specified exactly. 1104 */ 1105 int (*led_blink_set)(struct phy_device *dev, u8 index, 1106 unsigned long *delay_on, 1107 unsigned long *delay_off); 1108 /** 1109 * @led_hw_is_supported: Can the HW support the given rules. 1110 * @dev: PHY device which has the LED 1111 * @index: Which LED of the PHY device 1112 * @rules The core is interested in these rules 1113 * 1114 * Return 0 if yes, -EOPNOTSUPP if not, or an error code. 1115 */ 1116 int (*led_hw_is_supported)(struct phy_device *dev, u8 index, 1117 unsigned long rules); 1118 /** 1119 * @led_hw_control_set: Set the HW to control the LED 1120 * @dev: PHY device which has the LED 1121 * @index: Which LED of the PHY device 1122 * @rules The rules used to control the LED 1123 * 1124 * Returns 0, or a an error code. 1125 */ 1126 int (*led_hw_control_set)(struct phy_device *dev, u8 index, 1127 unsigned long rules); 1128 /** 1129 * @led_hw_control_get: Get how the HW is controlling the LED 1130 * @dev: PHY device which has the LED 1131 * @index: Which LED of the PHY device 1132 * @rules Pointer to the rules used to control the LED 1133 * 1134 * Set *@rules to how the HW is currently blinking. Returns 0 1135 * on success, or a error code if the current blinking cannot 1136 * be represented in rules, or some other error happens. 1137 */ 1138 int (*led_hw_control_get)(struct phy_device *dev, u8 index, 1139 unsigned long *rules); 1140 1141 }; 1142 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 1143 struct phy_driver, mdiodrv) 1144 1145 #define PHY_ANY_ID "MATCH ANY PHY" 1146 #define PHY_ANY_UID 0xffffffff 1147 1148 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 1149 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 1150 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 1151 1152 /** 1153 * phy_id_compare - compare @id1 with @id2 taking account of @mask 1154 * @id1: first PHY ID 1155 * @id2: second PHY ID 1156 * @mask: the PHY ID mask, set bits are significant in matching 1157 * 1158 * Return true if the bits from @id1 and @id2 specified by @mask match. 1159 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask). 1160 */ 1161 static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask) 1162 { 1163 return !((id1 ^ id2) & mask); 1164 } 1165 1166 /** 1167 * phydev_id_compare - compare @id with the PHY's Clause 22 ID 1168 * @phydev: the PHY device 1169 * @id: the PHY ID to be matched 1170 * 1171 * Compare the @phydev clause 22 ID with the provided @id and return true or 1172 * false depending whether it matches, using the bound driver mask. The 1173 * @phydev must be bound to a driver. 1174 */ 1175 static inline bool phydev_id_compare(struct phy_device *phydev, u32 id) 1176 { 1177 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask); 1178 } 1179 1180 /* A Structure for boards to register fixups with the PHY Lib */ 1181 struct phy_fixup { 1182 struct list_head list; 1183 char bus_id[MII_BUS_ID_SIZE + 3]; 1184 u32 phy_uid; 1185 u32 phy_uid_mask; 1186 int (*run)(struct phy_device *phydev); 1187 }; 1188 1189 const char *phy_speed_to_str(int speed); 1190 const char *phy_duplex_to_str(unsigned int duplex); 1191 const char *phy_rate_matching_to_str(int rate_matching); 1192 1193 int phy_interface_num_ports(phy_interface_t interface); 1194 1195 /* A structure for mapping a particular speed and duplex 1196 * combination to a particular SUPPORTED and ADVERTISED value 1197 */ 1198 struct phy_setting { 1199 u32 speed; 1200 u8 duplex; 1201 u8 bit; 1202 }; 1203 1204 const struct phy_setting * 1205 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 1206 bool exact); 1207 size_t phy_speeds(unsigned int *speeds, size_t size, 1208 unsigned long *mask); 1209 void of_set_phy_supported(struct phy_device *phydev); 1210 void of_set_phy_eee_broken(struct phy_device *phydev); 1211 int phy_speed_down_core(struct phy_device *phydev); 1212 1213 /** 1214 * phy_is_started - Convenience function to check whether PHY is started 1215 * @phydev: The phy_device struct 1216 */ 1217 static inline bool phy_is_started(struct phy_device *phydev) 1218 { 1219 return phydev->state >= PHY_UP; 1220 } 1221 1222 void phy_resolve_aneg_pause(struct phy_device *phydev); 1223 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1224 void phy_check_downshift(struct phy_device *phydev); 1225 1226 /** 1227 * phy_read - Convenience function for reading a given PHY register 1228 * @phydev: the phy_device struct 1229 * @regnum: register number to read 1230 * 1231 * NOTE: MUST NOT be called from interrupt context, 1232 * because the bus read/write functions may wait for an interrupt 1233 * to conclude the operation. 1234 */ 1235 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1236 { 1237 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1238 } 1239 1240 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1241 timeout_us, sleep_before_read) \ 1242 ({ \ 1243 int __ret, __val; \ 1244 __ret = read_poll_timeout(__val = phy_read, val, \ 1245 __val < 0 || (cond), \ 1246 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1247 if (__val < 0) \ 1248 __ret = __val; \ 1249 if (__ret) \ 1250 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1251 __ret; \ 1252 }) 1253 1254 /** 1255 * __phy_read - convenience function for reading a given PHY register 1256 * @phydev: the phy_device struct 1257 * @regnum: register number to read 1258 * 1259 * The caller must have taken the MDIO bus lock. 1260 */ 1261 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1262 { 1263 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1264 } 1265 1266 /** 1267 * phy_write - Convenience function for writing a given PHY register 1268 * @phydev: the phy_device struct 1269 * @regnum: register number to write 1270 * @val: value to write to @regnum 1271 * 1272 * NOTE: MUST NOT be called from interrupt context, 1273 * because the bus read/write functions may wait for an interrupt 1274 * to conclude the operation. 1275 */ 1276 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1277 { 1278 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1279 } 1280 1281 /** 1282 * __phy_write - Convenience function for writing a given PHY register 1283 * @phydev: the phy_device struct 1284 * @regnum: register number to write 1285 * @val: value to write to @regnum 1286 * 1287 * The caller must have taken the MDIO bus lock. 1288 */ 1289 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1290 { 1291 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1292 val); 1293 } 1294 1295 /** 1296 * __phy_modify_changed() - Convenience function for modifying a PHY register 1297 * @phydev: a pointer to a &struct phy_device 1298 * @regnum: register number 1299 * @mask: bit mask of bits to clear 1300 * @set: bit mask of bits to set 1301 * 1302 * Unlocked helper function which allows a PHY register to be modified as 1303 * new register value = (old register value & ~mask) | set 1304 * 1305 * Returns negative errno, 0 if there was no change, and 1 in case of change 1306 */ 1307 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1308 u16 mask, u16 set) 1309 { 1310 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1311 regnum, mask, set); 1312 } 1313 1314 /* 1315 * phy_read_mmd - Convenience function for reading a register 1316 * from an MMD on a given PHY. 1317 */ 1318 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1319 1320 /** 1321 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1322 * condition is met or a timeout occurs 1323 * 1324 * @phydev: The phy_device struct 1325 * @devaddr: The MMD to read from 1326 * @regnum: The register on the MMD to read 1327 * @val: Variable to read the register into 1328 * @cond: Break condition (usually involving @val) 1329 * @sleep_us: Maximum time to sleep between reads in us (0 1330 * tight-loops). Should be less than ~20ms since usleep_range 1331 * is used (see Documentation/timers/timers-howto.rst). 1332 * @timeout_us: Timeout in us, 0 means never timeout 1333 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1334 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either 1335 * case, the last read value at @args is stored in @val. Must not 1336 * be called from atomic context if sleep_us or timeout_us are used. 1337 */ 1338 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1339 sleep_us, timeout_us, sleep_before_read) \ 1340 ({ \ 1341 int __ret, __val; \ 1342 __ret = read_poll_timeout(__val = phy_read_mmd, val, \ 1343 __val < 0 || (cond), \ 1344 sleep_us, timeout_us, sleep_before_read, \ 1345 phydev, devaddr, regnum); \ 1346 if (__val < 0) \ 1347 __ret = __val; \ 1348 if (__ret) \ 1349 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1350 __ret; \ 1351 }) 1352 1353 /* 1354 * __phy_read_mmd - Convenience function for reading a register 1355 * from an MMD on a given PHY. 1356 */ 1357 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1358 1359 /* 1360 * phy_write_mmd - Convenience function for writing a register 1361 * on an MMD on a given PHY. 1362 */ 1363 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1364 1365 /* 1366 * __phy_write_mmd - Convenience function for writing a register 1367 * on an MMD on a given PHY. 1368 */ 1369 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1370 1371 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1372 u16 set); 1373 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1374 u16 set); 1375 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1376 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1377 1378 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1379 u16 mask, u16 set); 1380 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1381 u16 mask, u16 set); 1382 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1383 u16 mask, u16 set); 1384 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1385 u16 mask, u16 set); 1386 1387 /** 1388 * __phy_set_bits - Convenience function for setting bits in a PHY register 1389 * @phydev: the phy_device struct 1390 * @regnum: register number to write 1391 * @val: bits to set 1392 * 1393 * The caller must have taken the MDIO bus lock. 1394 */ 1395 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1396 { 1397 return __phy_modify(phydev, regnum, 0, val); 1398 } 1399 1400 /** 1401 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1402 * @phydev: the phy_device struct 1403 * @regnum: register number to write 1404 * @val: bits to clear 1405 * 1406 * The caller must have taken the MDIO bus lock. 1407 */ 1408 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1409 u16 val) 1410 { 1411 return __phy_modify(phydev, regnum, val, 0); 1412 } 1413 1414 /** 1415 * phy_set_bits - Convenience function for setting bits in a PHY register 1416 * @phydev: the phy_device struct 1417 * @regnum: register number to write 1418 * @val: bits to set 1419 */ 1420 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1421 { 1422 return phy_modify(phydev, regnum, 0, val); 1423 } 1424 1425 /** 1426 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1427 * @phydev: the phy_device struct 1428 * @regnum: register number to write 1429 * @val: bits to clear 1430 */ 1431 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1432 { 1433 return phy_modify(phydev, regnum, val, 0); 1434 } 1435 1436 /** 1437 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1438 * on MMD 1439 * @phydev: the phy_device struct 1440 * @devad: the MMD containing register to modify 1441 * @regnum: register number to modify 1442 * @val: bits to set 1443 * 1444 * The caller must have taken the MDIO bus lock. 1445 */ 1446 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1447 u32 regnum, u16 val) 1448 { 1449 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1450 } 1451 1452 /** 1453 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1454 * on MMD 1455 * @phydev: the phy_device struct 1456 * @devad: the MMD containing register to modify 1457 * @regnum: register number to modify 1458 * @val: bits to clear 1459 * 1460 * The caller must have taken the MDIO bus lock. 1461 */ 1462 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1463 u32 regnum, u16 val) 1464 { 1465 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1466 } 1467 1468 /** 1469 * phy_set_bits_mmd - Convenience function for setting bits in a register 1470 * on MMD 1471 * @phydev: the phy_device struct 1472 * @devad: the MMD containing register to modify 1473 * @regnum: register number to modify 1474 * @val: bits to set 1475 */ 1476 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1477 u32 regnum, u16 val) 1478 { 1479 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1480 } 1481 1482 /** 1483 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1484 * on MMD 1485 * @phydev: the phy_device struct 1486 * @devad: the MMD containing register to modify 1487 * @regnum: register number to modify 1488 * @val: bits to clear 1489 */ 1490 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1491 u32 regnum, u16 val) 1492 { 1493 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1494 } 1495 1496 /** 1497 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1498 * @phydev: the phy_device struct 1499 * 1500 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1501 * PHY_MAC_INTERRUPT 1502 */ 1503 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1504 { 1505 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1506 } 1507 1508 /** 1509 * phy_polling_mode - Convenience function for testing whether polling is 1510 * used to detect PHY status changes 1511 * @phydev: the phy_device struct 1512 */ 1513 static inline bool phy_polling_mode(struct phy_device *phydev) 1514 { 1515 if (phydev->state == PHY_CABLETEST) 1516 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1517 return true; 1518 1519 return phydev->irq == PHY_POLL; 1520 } 1521 1522 /** 1523 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1524 * @phydev: the phy_device struct 1525 */ 1526 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1527 { 1528 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1529 } 1530 1531 /** 1532 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1533 * @phydev: the phy_device struct 1534 */ 1535 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1536 { 1537 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1538 } 1539 1540 /** 1541 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1542 * PTP hardware clock capabilities. 1543 * @phydev: the phy_device struct 1544 */ 1545 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1546 { 1547 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1548 } 1549 1550 /** 1551 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1552 * @phydev: the phy_device struct 1553 */ 1554 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1555 { 1556 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1557 } 1558 1559 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) 1560 { 1561 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); 1562 } 1563 1564 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1565 int type) 1566 { 1567 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1568 } 1569 1570 static inline int phy_ts_info(struct phy_device *phydev, 1571 struct ethtool_ts_info *tsinfo) 1572 { 1573 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1574 } 1575 1576 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1577 int type) 1578 { 1579 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1580 } 1581 1582 /** 1583 * phy_is_internal - Convenience function for testing if a PHY is internal 1584 * @phydev: the phy_device struct 1585 */ 1586 static inline bool phy_is_internal(struct phy_device *phydev) 1587 { 1588 return phydev->is_internal; 1589 } 1590 1591 /** 1592 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1593 * @phydev: the phy_device struct 1594 */ 1595 static inline bool phy_on_sfp(struct phy_device *phydev) 1596 { 1597 return phydev->is_on_sfp_module; 1598 } 1599 1600 /** 1601 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1602 * PHY interface mode is RGMII (all variants) 1603 * @mode: the &phy_interface_t enum 1604 */ 1605 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1606 { 1607 return mode >= PHY_INTERFACE_MODE_RGMII && 1608 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1609 }; 1610 1611 /** 1612 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1613 * negotiation 1614 * @mode: one of &enum phy_interface_t 1615 * 1616 * Returns true if the PHY interface mode uses the 16-bit negotiation 1617 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1618 */ 1619 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1620 { 1621 return mode == PHY_INTERFACE_MODE_1000BASEX || 1622 mode == PHY_INTERFACE_MODE_2500BASEX; 1623 } 1624 1625 /** 1626 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1627 * is RGMII (all variants) 1628 * @phydev: the phy_device struct 1629 */ 1630 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1631 { 1632 return phy_interface_mode_is_rgmii(phydev->interface); 1633 }; 1634 1635 /** 1636 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1637 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1638 * @phydev: the phy_device struct 1639 */ 1640 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1641 { 1642 return phydev->is_pseudo_fixed_link; 1643 } 1644 1645 int phy_save_page(struct phy_device *phydev); 1646 int phy_select_page(struct phy_device *phydev, int page); 1647 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1648 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1649 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1650 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1651 u16 mask, u16 set); 1652 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1653 u16 mask, u16 set); 1654 1655 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1656 bool is_c45, 1657 struct phy_c45_device_ids *c45_ids); 1658 #if IS_ENABLED(CONFIG_PHYLIB) 1659 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1660 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1661 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1662 struct phy_device *device_phy_find_device(struct device *dev); 1663 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode); 1664 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1665 int phy_device_register(struct phy_device *phy); 1666 void phy_device_free(struct phy_device *phydev); 1667 #else 1668 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1669 { 1670 return 0; 1671 } 1672 static inline 1673 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1674 { 1675 return 0; 1676 } 1677 1678 static inline 1679 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1680 { 1681 return NULL; 1682 } 1683 1684 static inline struct phy_device *device_phy_find_device(struct device *dev) 1685 { 1686 return NULL; 1687 } 1688 1689 static inline 1690 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1691 { 1692 return NULL; 1693 } 1694 1695 static inline 1696 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1697 { 1698 return NULL; 1699 } 1700 1701 static inline int phy_device_register(struct phy_device *phy) 1702 { 1703 return 0; 1704 } 1705 1706 static inline void phy_device_free(struct phy_device *phydev) { } 1707 #endif /* CONFIG_PHYLIB */ 1708 void phy_device_remove(struct phy_device *phydev); 1709 int phy_get_c45_ids(struct phy_device *phydev); 1710 int phy_init_hw(struct phy_device *phydev); 1711 int phy_suspend(struct phy_device *phydev); 1712 int phy_resume(struct phy_device *phydev); 1713 int __phy_resume(struct phy_device *phydev); 1714 int phy_loopback(struct phy_device *phydev, bool enable); 1715 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1716 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1717 int phy_sfp_probe(struct phy_device *phydev, 1718 const struct sfp_upstream_ops *ops); 1719 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1720 phy_interface_t interface); 1721 struct phy_device *phy_find_first(struct mii_bus *bus); 1722 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1723 u32 flags, phy_interface_t interface); 1724 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1725 void (*handler)(struct net_device *), 1726 phy_interface_t interface); 1727 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1728 void (*handler)(struct net_device *), 1729 phy_interface_t interface); 1730 void phy_disconnect(struct phy_device *phydev); 1731 void phy_detach(struct phy_device *phydev); 1732 void phy_start(struct phy_device *phydev); 1733 void phy_stop(struct phy_device *phydev); 1734 int phy_config_aneg(struct phy_device *phydev); 1735 int phy_start_aneg(struct phy_device *phydev); 1736 int phy_aneg_done(struct phy_device *phydev); 1737 int phy_speed_down(struct phy_device *phydev, bool sync); 1738 int phy_speed_up(struct phy_device *phydev); 1739 bool phy_check_valid(int speed, int duplex, unsigned long *features); 1740 1741 int phy_restart_aneg(struct phy_device *phydev); 1742 int phy_reset_after_clk_enable(struct phy_device *phydev); 1743 1744 #if IS_ENABLED(CONFIG_PHYLIB) 1745 int phy_start_cable_test(struct phy_device *phydev, 1746 struct netlink_ext_ack *extack); 1747 int phy_start_cable_test_tdr(struct phy_device *phydev, 1748 struct netlink_ext_ack *extack, 1749 const struct phy_tdr_config *config); 1750 #else 1751 static inline 1752 int phy_start_cable_test(struct phy_device *phydev, 1753 struct netlink_ext_ack *extack) 1754 { 1755 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1756 return -EOPNOTSUPP; 1757 } 1758 static inline 1759 int phy_start_cable_test_tdr(struct phy_device *phydev, 1760 struct netlink_ext_ack *extack, 1761 const struct phy_tdr_config *config) 1762 { 1763 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1764 return -EOPNOTSUPP; 1765 } 1766 #endif 1767 1768 static inline void phy_device_reset(struct phy_device *phydev, int value) 1769 { 1770 mdio_device_reset(&phydev->mdio, value); 1771 } 1772 1773 #define phydev_err(_phydev, format, args...) \ 1774 dev_err(&_phydev->mdio.dev, format, ##args) 1775 1776 #define phydev_err_probe(_phydev, err, format, args...) \ 1777 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1778 1779 #define phydev_info(_phydev, format, args...) \ 1780 dev_info(&_phydev->mdio.dev, format, ##args) 1781 1782 #define phydev_warn(_phydev, format, args...) \ 1783 dev_warn(&_phydev->mdio.dev, format, ##args) 1784 1785 #define phydev_dbg(_phydev, format, args...) \ 1786 dev_dbg(&_phydev->mdio.dev, format, ##args) 1787 1788 static inline const char *phydev_name(const struct phy_device *phydev) 1789 { 1790 return dev_name(&phydev->mdio.dev); 1791 } 1792 1793 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1794 { 1795 mutex_lock(&phydev->mdio.bus->mdio_lock); 1796 } 1797 1798 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1799 { 1800 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1801 } 1802 1803 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1804 __printf(2, 3); 1805 char *phy_attached_info_irq(struct phy_device *phydev) 1806 __malloc; 1807 void phy_attached_info(struct phy_device *phydev); 1808 1809 /* Clause 22 PHY */ 1810 int genphy_read_abilities(struct phy_device *phydev); 1811 int genphy_setup_forced(struct phy_device *phydev); 1812 int genphy_restart_aneg(struct phy_device *phydev); 1813 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1814 int genphy_config_eee_advert(struct phy_device *phydev); 1815 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1816 int genphy_aneg_done(struct phy_device *phydev); 1817 int genphy_update_link(struct phy_device *phydev); 1818 int genphy_read_lpa(struct phy_device *phydev); 1819 int genphy_read_status_fixed(struct phy_device *phydev); 1820 int genphy_read_status(struct phy_device *phydev); 1821 int genphy_read_master_slave(struct phy_device *phydev); 1822 int genphy_suspend(struct phy_device *phydev); 1823 int genphy_resume(struct phy_device *phydev); 1824 int genphy_loopback(struct phy_device *phydev, bool enable); 1825 int genphy_soft_reset(struct phy_device *phydev); 1826 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1827 1828 static inline int genphy_config_aneg(struct phy_device *phydev) 1829 { 1830 return __genphy_config_aneg(phydev, false); 1831 } 1832 1833 static inline int genphy_no_config_intr(struct phy_device *phydev) 1834 { 1835 return 0; 1836 } 1837 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1838 u16 regnum); 1839 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1840 u16 regnum, u16 val); 1841 1842 /* Clause 37 */ 1843 int genphy_c37_config_aneg(struct phy_device *phydev); 1844 int genphy_c37_read_status(struct phy_device *phydev); 1845 1846 /* Clause 45 PHY */ 1847 int genphy_c45_restart_aneg(struct phy_device *phydev); 1848 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1849 int genphy_c45_aneg_done(struct phy_device *phydev); 1850 int genphy_c45_read_link(struct phy_device *phydev); 1851 int genphy_c45_read_lpa(struct phy_device *phydev); 1852 int genphy_c45_read_pma(struct phy_device *phydev); 1853 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1854 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 1855 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1856 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1857 int genphy_c45_read_mdix(struct phy_device *phydev); 1858 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1859 int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev); 1860 int genphy_c45_read_eee_abilities(struct phy_device *phydev); 1861 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 1862 int genphy_c45_read_status(struct phy_device *phydev); 1863 int genphy_c45_baset1_read_status(struct phy_device *phydev); 1864 int genphy_c45_config_aneg(struct phy_device *phydev); 1865 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1866 int genphy_c45_pma_resume(struct phy_device *phydev); 1867 int genphy_c45_pma_suspend(struct phy_device *phydev); 1868 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 1869 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 1870 struct phy_plca_cfg *plca_cfg); 1871 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 1872 const struct phy_plca_cfg *plca_cfg); 1873 int genphy_c45_plca_get_status(struct phy_device *phydev, 1874 struct phy_plca_status *plca_st); 1875 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv, 1876 unsigned long *lp, bool *is_enabled); 1877 int genphy_c45_ethtool_get_eee(struct phy_device *phydev, 1878 struct ethtool_eee *data); 1879 int genphy_c45_ethtool_set_eee(struct phy_device *phydev, 1880 struct ethtool_eee *data); 1881 int genphy_c45_write_eee_adv(struct phy_device *phydev, unsigned long *adv); 1882 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev); 1883 int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv); 1884 1885 /* Generic C45 PHY driver */ 1886 extern struct phy_driver genphy_c45_driver; 1887 1888 /* The gen10g_* functions are the old Clause 45 stub */ 1889 int gen10g_config_aneg(struct phy_device *phydev); 1890 1891 static inline int phy_read_status(struct phy_device *phydev) 1892 { 1893 if (!phydev->drv) 1894 return -EIO; 1895 1896 if (phydev->drv->read_status) 1897 return phydev->drv->read_status(phydev); 1898 else 1899 return genphy_read_status(phydev); 1900 } 1901 1902 void phy_driver_unregister(struct phy_driver *drv); 1903 void phy_drivers_unregister(struct phy_driver *drv, int n); 1904 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1905 int phy_drivers_register(struct phy_driver *new_driver, int n, 1906 struct module *owner); 1907 void phy_error(struct phy_device *phydev); 1908 void phy_state_machine(struct work_struct *work); 1909 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1910 void phy_trigger_machine(struct phy_device *phydev); 1911 void phy_mac_interrupt(struct phy_device *phydev); 1912 void phy_start_machine(struct phy_device *phydev); 1913 void phy_stop_machine(struct phy_device *phydev); 1914 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1915 struct ethtool_link_ksettings *cmd); 1916 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1917 const struct ethtool_link_ksettings *cmd); 1918 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1919 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1920 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1921 int phy_disable_interrupts(struct phy_device *phydev); 1922 void phy_request_interrupt(struct phy_device *phydev); 1923 void phy_free_interrupt(struct phy_device *phydev); 1924 void phy_print_status(struct phy_device *phydev); 1925 int phy_get_rate_matching(struct phy_device *phydev, 1926 phy_interface_t iface); 1927 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1928 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1929 void phy_advertise_supported(struct phy_device *phydev); 1930 void phy_support_sym_pause(struct phy_device *phydev); 1931 void phy_support_asym_pause(struct phy_device *phydev); 1932 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1933 bool autoneg); 1934 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1935 bool phy_validate_pause(struct phy_device *phydev, 1936 struct ethtool_pauseparam *pp); 1937 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1938 1939 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 1940 const int *delay_values, int size, bool is_rx); 1941 1942 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1943 bool *tx_pause, bool *rx_pause); 1944 1945 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1946 int (*run)(struct phy_device *)); 1947 int phy_register_fixup_for_id(const char *bus_id, 1948 int (*run)(struct phy_device *)); 1949 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1950 int (*run)(struct phy_device *)); 1951 1952 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1953 int phy_unregister_fixup_for_id(const char *bus_id); 1954 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1955 1956 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1957 int phy_get_eee_err(struct phy_device *phydev); 1958 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1959 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1960 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1961 void phy_ethtool_get_wol(struct phy_device *phydev, 1962 struct ethtool_wolinfo *wol); 1963 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1964 struct ethtool_link_ksettings *cmd); 1965 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1966 const struct ethtool_link_ksettings *cmd); 1967 int phy_ethtool_nway_reset(struct net_device *ndev); 1968 int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size); 1969 void phy_package_leave(struct phy_device *phydev); 1970 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 1971 int addr, size_t priv_size); 1972 1973 int __init mdio_bus_init(void); 1974 void mdio_bus_exit(void); 1975 1976 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 1977 int phy_ethtool_get_sset_count(struct phy_device *phydev); 1978 int phy_ethtool_get_stats(struct phy_device *phydev, 1979 struct ethtool_stats *stats, u64 *data); 1980 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 1981 struct phy_plca_cfg *plca_cfg); 1982 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 1983 const struct phy_plca_cfg *plca_cfg, 1984 struct netlink_ext_ack *extack); 1985 int phy_ethtool_get_plca_status(struct phy_device *phydev, 1986 struct phy_plca_status *plca_st); 1987 1988 int __phy_hwtstamp_get(struct phy_device *phydev, 1989 struct kernel_hwtstamp_config *config); 1990 int __phy_hwtstamp_set(struct phy_device *phydev, 1991 struct kernel_hwtstamp_config *config, 1992 struct netlink_ext_ack *extack); 1993 1994 static inline int phy_package_read(struct phy_device *phydev, u32 regnum) 1995 { 1996 struct phy_package_shared *shared = phydev->shared; 1997 1998 if (!shared) 1999 return -EIO; 2000 2001 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 2002 } 2003 2004 static inline int __phy_package_read(struct phy_device *phydev, u32 regnum) 2005 { 2006 struct phy_package_shared *shared = phydev->shared; 2007 2008 if (!shared) 2009 return -EIO; 2010 2011 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 2012 } 2013 2014 static inline int phy_package_write(struct phy_device *phydev, 2015 u32 regnum, u16 val) 2016 { 2017 struct phy_package_shared *shared = phydev->shared; 2018 2019 if (!shared) 2020 return -EIO; 2021 2022 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 2023 } 2024 2025 static inline int __phy_package_write(struct phy_device *phydev, 2026 u32 regnum, u16 val) 2027 { 2028 struct phy_package_shared *shared = phydev->shared; 2029 2030 if (!shared) 2031 return -EIO; 2032 2033 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 2034 } 2035 2036 static inline bool __phy_package_set_once(struct phy_device *phydev, 2037 unsigned int b) 2038 { 2039 struct phy_package_shared *shared = phydev->shared; 2040 2041 if (!shared) 2042 return false; 2043 2044 return !test_and_set_bit(b, &shared->flags); 2045 } 2046 2047 static inline bool phy_package_init_once(struct phy_device *phydev) 2048 { 2049 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 2050 } 2051 2052 static inline bool phy_package_probe_once(struct phy_device *phydev) 2053 { 2054 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 2055 } 2056 2057 extern struct bus_type mdio_bus_type; 2058 2059 struct mdio_board_info { 2060 const char *bus_id; 2061 char modalias[MDIO_NAME_SIZE]; 2062 int mdio_addr; 2063 const void *platform_data; 2064 }; 2065 2066 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 2067 int mdiobus_register_board_info(const struct mdio_board_info *info, 2068 unsigned int n); 2069 #else 2070 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 2071 unsigned int n) 2072 { 2073 return 0; 2074 } 2075 #endif 2076 2077 2078 /** 2079 * phy_module_driver() - Helper macro for registering PHY drivers 2080 * @__phy_drivers: array of PHY drivers to register 2081 * @__count: Numbers of members in array 2082 * 2083 * Helper macro for PHY drivers which do not do anything special in module 2084 * init/exit. Each module may only use this macro once, and calling it 2085 * replaces module_init() and module_exit(). 2086 */ 2087 #define phy_module_driver(__phy_drivers, __count) \ 2088 static int __init phy_module_init(void) \ 2089 { \ 2090 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 2091 } \ 2092 module_init(phy_module_init); \ 2093 static void __exit phy_module_exit(void) \ 2094 { \ 2095 phy_drivers_unregister(__phy_drivers, __count); \ 2096 } \ 2097 module_exit(phy_module_exit) 2098 2099 #define module_phy_driver(__phy_drivers) \ 2100 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 2101 2102 bool phy_driver_is_genphy(struct phy_device *phydev); 2103 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 2104 2105 #endif /* __PHY_H */ 2106