1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/leds.h> 18 #include <linux/linkmode.h> 19 #include <linux/netlink.h> 20 #include <linux/mdio.h> 21 #include <linux/mii.h> 22 #include <linux/mii_timestamper.h> 23 #include <linux/module.h> 24 #include <linux/timer.h> 25 #include <linux/workqueue.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/u64_stats_sync.h> 28 #include <linux/irqreturn.h> 29 #include <linux/iopoll.h> 30 #include <linux/refcount.h> 31 32 #include <linux/atomic.h> 33 #include <net/eee.h> 34 35 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 36 SUPPORTED_TP | \ 37 SUPPORTED_MII) 38 39 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 40 SUPPORTED_10baseT_Full) 41 42 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 43 SUPPORTED_100baseT_Full) 44 45 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 46 SUPPORTED_1000baseT_Full) 47 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 54 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 55 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 56 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 57 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init; 58 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap2_features) __ro_after_init; 59 60 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 61 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 62 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 63 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 64 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 65 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 66 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 67 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 68 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 69 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features) 70 #define PHY_EEE_CAP2_FEATURES ((unsigned long *)&phy_eee_cap2_features) 71 72 extern const int phy_basic_ports_array[3]; 73 extern const int phy_fibre_port_array[1]; 74 extern const int phy_all_ports_features_array[7]; 75 extern const int phy_10_100_features_array[4]; 76 extern const int phy_basic_t1_features_array[3]; 77 extern const int phy_basic_t1s_p2mp_features_array[2]; 78 extern const int phy_gbit_features_array[2]; 79 extern const int phy_10gbit_features_array[1]; 80 81 /* 82 * Set phydev->irq to PHY_POLL if interrupts are not supported, 83 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 84 * the attached MAC driver handles the interrupt 85 */ 86 #define PHY_POLL -1 87 #define PHY_MAC_INTERRUPT -2 88 89 #define PHY_IS_INTERNAL 0x00000001 90 #define PHY_RST_AFTER_CLK_EN 0x00000002 91 #define PHY_POLL_CABLE_TEST 0x00000004 92 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008 93 #define MDIO_DEVICE_IS_PHY 0x80000000 94 95 /** 96 * enum phy_interface_t - Interface Mode definitions 97 * 98 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 99 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 100 * @PHY_INTERFACE_MODE_MII: Media-independent interface 101 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 102 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 103 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 104 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 105 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 106 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 107 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 108 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 109 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 110 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 111 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 112 * @PHY_INTERFACE_MODE_SMII: Serial MII 113 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 114 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 115 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 116 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII 117 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 118 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 119 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 120 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 121 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 122 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 123 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 124 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 125 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 126 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 127 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 128 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 129 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 130 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 131 * @PHY_INTERFACE_MODE_10G_QXGMII: 10G-QXGMII - 4 ports over 10G USXGMII 132 * @PHY_INTERFACE_MODE_MAX: Book keeping 133 * 134 * Describes the interface between the MAC and PHY. 135 */ 136 typedef enum { 137 PHY_INTERFACE_MODE_NA, 138 PHY_INTERFACE_MODE_INTERNAL, 139 PHY_INTERFACE_MODE_MII, 140 PHY_INTERFACE_MODE_GMII, 141 PHY_INTERFACE_MODE_SGMII, 142 PHY_INTERFACE_MODE_TBI, 143 PHY_INTERFACE_MODE_REVMII, 144 PHY_INTERFACE_MODE_RMII, 145 PHY_INTERFACE_MODE_REVRMII, 146 PHY_INTERFACE_MODE_RGMII, 147 PHY_INTERFACE_MODE_RGMII_ID, 148 PHY_INTERFACE_MODE_RGMII_RXID, 149 PHY_INTERFACE_MODE_RGMII_TXID, 150 PHY_INTERFACE_MODE_RTBI, 151 PHY_INTERFACE_MODE_SMII, 152 PHY_INTERFACE_MODE_XGMII, 153 PHY_INTERFACE_MODE_XLGMII, 154 PHY_INTERFACE_MODE_MOCA, 155 PHY_INTERFACE_MODE_PSGMII, 156 PHY_INTERFACE_MODE_QSGMII, 157 PHY_INTERFACE_MODE_TRGMII, 158 PHY_INTERFACE_MODE_100BASEX, 159 PHY_INTERFACE_MODE_1000BASEX, 160 PHY_INTERFACE_MODE_2500BASEX, 161 PHY_INTERFACE_MODE_5GBASER, 162 PHY_INTERFACE_MODE_RXAUI, 163 PHY_INTERFACE_MODE_XAUI, 164 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 165 PHY_INTERFACE_MODE_10GBASER, 166 PHY_INTERFACE_MODE_25GBASER, 167 PHY_INTERFACE_MODE_USXGMII, 168 /* 10GBASE-KR - with Clause 73 AN */ 169 PHY_INTERFACE_MODE_10GKR, 170 PHY_INTERFACE_MODE_QUSGMII, 171 PHY_INTERFACE_MODE_1000BASEKX, 172 PHY_INTERFACE_MODE_10G_QXGMII, 173 PHY_INTERFACE_MODE_MAX, 174 } phy_interface_t; 175 176 /* PHY interface mode bitmap handling */ 177 #define DECLARE_PHY_INTERFACE_MASK(name) \ 178 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 179 180 static inline void phy_interface_zero(unsigned long *intf) 181 { 182 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 183 } 184 185 static inline bool phy_interface_empty(const unsigned long *intf) 186 { 187 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 188 } 189 190 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 191 const unsigned long *b) 192 { 193 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 194 } 195 196 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 197 const unsigned long *b) 198 { 199 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 200 } 201 202 static inline void phy_interface_set_rgmii(unsigned long *intf) 203 { 204 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 205 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 206 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 207 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 208 } 209 210 /* 211 * phy_supported_speeds - return all speeds currently supported by a PHY device 212 */ 213 unsigned int phy_supported_speeds(struct phy_device *phy, 214 unsigned int *speeds, 215 unsigned int size); 216 217 /** 218 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 219 * @interface: enum phy_interface_t value 220 * 221 * Description: maps enum &phy_interface_t defined in this file 222 * into the device tree binding of 'phy-mode', so that Ethernet 223 * device driver can get PHY interface from device tree. 224 */ 225 static inline const char *phy_modes(phy_interface_t interface) 226 { 227 switch (interface) { 228 case PHY_INTERFACE_MODE_NA: 229 return ""; 230 case PHY_INTERFACE_MODE_INTERNAL: 231 return "internal"; 232 case PHY_INTERFACE_MODE_MII: 233 return "mii"; 234 case PHY_INTERFACE_MODE_GMII: 235 return "gmii"; 236 case PHY_INTERFACE_MODE_SGMII: 237 return "sgmii"; 238 case PHY_INTERFACE_MODE_TBI: 239 return "tbi"; 240 case PHY_INTERFACE_MODE_REVMII: 241 return "rev-mii"; 242 case PHY_INTERFACE_MODE_RMII: 243 return "rmii"; 244 case PHY_INTERFACE_MODE_REVRMII: 245 return "rev-rmii"; 246 case PHY_INTERFACE_MODE_RGMII: 247 return "rgmii"; 248 case PHY_INTERFACE_MODE_RGMII_ID: 249 return "rgmii-id"; 250 case PHY_INTERFACE_MODE_RGMII_RXID: 251 return "rgmii-rxid"; 252 case PHY_INTERFACE_MODE_RGMII_TXID: 253 return "rgmii-txid"; 254 case PHY_INTERFACE_MODE_RTBI: 255 return "rtbi"; 256 case PHY_INTERFACE_MODE_SMII: 257 return "smii"; 258 case PHY_INTERFACE_MODE_XGMII: 259 return "xgmii"; 260 case PHY_INTERFACE_MODE_XLGMII: 261 return "xlgmii"; 262 case PHY_INTERFACE_MODE_MOCA: 263 return "moca"; 264 case PHY_INTERFACE_MODE_PSGMII: 265 return "psgmii"; 266 case PHY_INTERFACE_MODE_QSGMII: 267 return "qsgmii"; 268 case PHY_INTERFACE_MODE_TRGMII: 269 return "trgmii"; 270 case PHY_INTERFACE_MODE_1000BASEX: 271 return "1000base-x"; 272 case PHY_INTERFACE_MODE_1000BASEKX: 273 return "1000base-kx"; 274 case PHY_INTERFACE_MODE_2500BASEX: 275 return "2500base-x"; 276 case PHY_INTERFACE_MODE_5GBASER: 277 return "5gbase-r"; 278 case PHY_INTERFACE_MODE_RXAUI: 279 return "rxaui"; 280 case PHY_INTERFACE_MODE_XAUI: 281 return "xaui"; 282 case PHY_INTERFACE_MODE_10GBASER: 283 return "10gbase-r"; 284 case PHY_INTERFACE_MODE_25GBASER: 285 return "25gbase-r"; 286 case PHY_INTERFACE_MODE_USXGMII: 287 return "usxgmii"; 288 case PHY_INTERFACE_MODE_10GKR: 289 return "10gbase-kr"; 290 case PHY_INTERFACE_MODE_100BASEX: 291 return "100base-x"; 292 case PHY_INTERFACE_MODE_QUSGMII: 293 return "qusgmii"; 294 case PHY_INTERFACE_MODE_10G_QXGMII: 295 return "10g-qxgmii"; 296 default: 297 return "unknown"; 298 } 299 } 300 301 /** 302 * rgmii_clock - map link speed to the clock rate 303 * @speed: link speed value 304 * 305 * Description: maps RGMII supported link speeds 306 * into the clock rates. 307 * 308 * Returns: clock rate or negative errno 309 */ 310 static inline long rgmii_clock(int speed) 311 { 312 switch (speed) { 313 case SPEED_10: 314 return 2500000; 315 case SPEED_100: 316 return 25000000; 317 case SPEED_1000: 318 return 125000000; 319 default: 320 return -EINVAL; 321 } 322 } 323 324 #define PHY_INIT_TIMEOUT 100000 325 #define PHY_FORCE_TIMEOUT 10 326 327 #define PHY_MAX_ADDR 32 328 329 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 330 #define PHY_ID_FMT "%s:%02x" 331 332 #define MII_BUS_ID_SIZE 61 333 334 struct device; 335 struct kernel_hwtstamp_config; 336 struct phylink; 337 struct sfp_bus; 338 struct sfp_upstream_ops; 339 struct sk_buff; 340 341 /** 342 * struct mdio_bus_stats - Statistics counters for MDIO busses 343 * @transfers: Total number of transfers, i.e. @writes + @reads 344 * @errors: Number of MDIO transfers that returned an error 345 * @writes: Number of write transfers 346 * @reads: Number of read transfers 347 * @syncp: Synchronisation for incrementing statistics 348 */ 349 struct mdio_bus_stats { 350 u64_stats_t transfers; 351 u64_stats_t errors; 352 u64_stats_t writes; 353 u64_stats_t reads; 354 /* Must be last, add new statistics above */ 355 struct u64_stats_sync syncp; 356 }; 357 358 /** 359 * struct phy_package_shared - Shared information in PHY packages 360 * @base_addr: Base PHY address of PHY package used to combine PHYs 361 * in one package and for offset calculation of phy_package_read/write 362 * @np: Pointer to the Device Node if PHY package defined in DT 363 * @refcnt: Number of PHYs connected to this shared data 364 * @flags: Initialization of PHY package 365 * @priv_size: Size of the shared private data @priv 366 * @priv: Driver private data shared across a PHY package 367 * 368 * Represents a shared structure between different phydev's in the same 369 * package, for example a quad PHY. See phy_package_join() and 370 * phy_package_leave(). 371 */ 372 struct phy_package_shared { 373 u8 base_addr; 374 /* With PHY package defined in DT this points to the PHY package node */ 375 struct device_node *np; 376 refcount_t refcnt; 377 unsigned long flags; 378 size_t priv_size; 379 380 /* private data pointer */ 381 /* note that this pointer is shared between different phydevs and 382 * the user has to take care of appropriate locking. It is allocated 383 * and freed automatically by phy_package_join() and 384 * phy_package_leave(). 385 */ 386 void *priv; 387 }; 388 389 /* used as bit number in atomic bitops */ 390 #define PHY_SHARED_F_INIT_DONE 0 391 #define PHY_SHARED_F_PROBE_DONE 1 392 393 /** 394 * struct mii_bus - Represents an MDIO bus 395 * 396 * @owner: Who owns this device 397 * @name: User friendly name for this MDIO device, or driver name 398 * @id: Unique identifier for this bus, typical from bus hierarchy 399 * @priv: Driver private data 400 * 401 * The Bus class for PHYs. Devices which provide access to 402 * PHYs should register using this structure 403 */ 404 struct mii_bus { 405 struct module *owner; 406 const char *name; 407 char id[MII_BUS_ID_SIZE]; 408 void *priv; 409 /** @read: Perform a read transfer on the bus */ 410 int (*read)(struct mii_bus *bus, int addr, int regnum); 411 /** @write: Perform a write transfer on the bus */ 412 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 413 /** @read_c45: Perform a C45 read transfer on the bus */ 414 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 415 /** @write_c45: Perform a C45 write transfer on the bus */ 416 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 417 int regnum, u16 val); 418 /** @reset: Perform a reset of the bus */ 419 int (*reset)(struct mii_bus *bus); 420 421 /** @stats: Statistic counters per device on the bus */ 422 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 423 424 /** 425 * @mdio_lock: A lock to ensure that only one thing can read/write 426 * the MDIO bus at a time 427 */ 428 struct mutex mdio_lock; 429 430 /** @parent: Parent device of this bus */ 431 struct device *parent; 432 /** @state: State of bus structure */ 433 enum { 434 MDIOBUS_ALLOCATED = 1, 435 MDIOBUS_REGISTERED, 436 MDIOBUS_UNREGISTERED, 437 MDIOBUS_RELEASED, 438 } state; 439 440 /** @dev: Kernel device representation */ 441 struct device dev; 442 443 /** @mdio_map: list of all MDIO devices on bus */ 444 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 445 446 /** @phy_mask: PHY addresses to be ignored when probing */ 447 u32 phy_mask; 448 449 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 450 u32 phy_ignore_ta_mask; 451 452 /** 453 * @irq: An array of interrupts, each PHY's interrupt at the index 454 * matching its address 455 */ 456 int irq[PHY_MAX_ADDR]; 457 458 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 459 int reset_delay_us; 460 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 461 int reset_post_delay_us; 462 /** @reset_gpiod: Reset GPIO descriptor pointer */ 463 struct gpio_desc *reset_gpiod; 464 465 /** @shared_lock: protect access to the shared element */ 466 struct mutex shared_lock; 467 468 /** @shared: shared state across different PHYs */ 469 struct phy_package_shared *shared[PHY_MAX_ADDR]; 470 }; 471 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 472 473 struct mii_bus *mdiobus_alloc_size(size_t size); 474 475 /** 476 * mdiobus_alloc - Allocate an MDIO bus structure 477 * 478 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 479 * for the driver to register the bus. 480 */ 481 static inline struct mii_bus *mdiobus_alloc(void) 482 { 483 return mdiobus_alloc_size(0); 484 } 485 486 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 487 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 488 struct module *owner); 489 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 490 #define devm_mdiobus_register(dev, bus) \ 491 __devm_mdiobus_register(dev, bus, THIS_MODULE) 492 493 void mdiobus_unregister(struct mii_bus *bus); 494 void mdiobus_free(struct mii_bus *bus); 495 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 496 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 497 { 498 return devm_mdiobus_alloc_size(dev, 0); 499 } 500 501 struct mii_bus *mdio_find_bus(const char *mdio_name); 502 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); 503 504 #define PHY_INTERRUPT_DISABLED false 505 #define PHY_INTERRUPT_ENABLED true 506 507 /** 508 * enum phy_state - PHY state machine states: 509 * 510 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 511 * should be called if and only if the PHY is in this state, 512 * given that the PHY device exists. 513 * - PHY driver probe function will set the state to @PHY_READY 514 * 515 * @PHY_READY: PHY is ready to send and receive packets, but the 516 * controller is not. By default, PHYs which do not implement 517 * probe will be set to this state by phy_probe(). 518 * - start will set the state to UP 519 * 520 * @PHY_UP: The PHY and attached device are ready to do work. 521 * Interrupts should be started here. 522 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 523 * 524 * @PHY_NOLINK: PHY is up, but not currently plugged in. 525 * - irq or timer will set @PHY_RUNNING if link comes back 526 * - phy_stop moves to @PHY_HALTED 527 * 528 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 529 * and/or receiving packets 530 * - irq or timer will set @PHY_NOLINK if link goes down 531 * - phy_stop moves to @PHY_HALTED 532 * 533 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 534 * is not expected to work, carrier will be indicated as down. PHY will be 535 * poll once per second, or on interrupt for it current state. 536 * Once complete, move to UP to restart the PHY. 537 * - phy_stop aborts the running test and moves to @PHY_HALTED 538 * 539 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. 540 * - phy_start moves to @PHY_UP 541 * 542 * @PHY_ERROR: PHY is up, but is in an error state. 543 * - phy_stop moves to @PHY_HALTED 544 */ 545 enum phy_state { 546 PHY_DOWN = 0, 547 PHY_READY, 548 PHY_HALTED, 549 PHY_ERROR, 550 PHY_UP, 551 PHY_RUNNING, 552 PHY_NOLINK, 553 PHY_CABLETEST, 554 }; 555 556 #define MDIO_MMD_NUM 32 557 558 /** 559 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 560 * @devices_in_package: IEEE 802.3 devices in package register value. 561 * @mmds_present: bit vector of MMDs present. 562 * @device_ids: The device identifer for each present device. 563 */ 564 struct phy_c45_device_ids { 565 u32 devices_in_package; 566 u32 mmds_present; 567 u32 device_ids[MDIO_MMD_NUM]; 568 }; 569 570 struct macsec_context; 571 struct macsec_ops; 572 573 /** 574 * struct phy_device - An instance of a PHY 575 * 576 * @mdio: MDIO bus this PHY is on 577 * @drv: Pointer to the driver for this PHY instance 578 * @devlink: Create a link between phy dev and mac dev, if the external phy 579 * used by current mac interface is managed by another mac interface. 580 * @phyindex: Unique id across the phy's parent tree of phys to address the PHY 581 * from userspace, similar to ifindex. A zero index means the PHY 582 * wasn't assigned an id yet. 583 * @phy_id: UID for this device found during discovery 584 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 585 * @is_c45: Set to true if this PHY uses clause 45 addressing. 586 * @is_internal: Set to true if this PHY is internal to a MAC. 587 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 588 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 589 * @has_fixups: Set to true if this PHY has fixups/quirks. 590 * @suspended: Set to true if this PHY has been suspended successfully. 591 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 592 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 593 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 594 * @downshifted_rate: Set true if link speed has been downshifted. 595 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 596 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 597 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN 598 * enabled. 599 * @state: State of the PHY for management purposes 600 * @dev_flags: Device-specific flags used by the PHY driver. 601 * 602 * - Bits [15:0] are free to use by the PHY driver to communicate 603 * driver specific behavior. 604 * - Bits [23:16] are currently reserved for future use. 605 * - Bits [31:24] are reserved for defining generic 606 * PHY driver behavior. 607 * @irq: IRQ number of the PHY's interrupt (-1 if none) 608 * @phylink: Pointer to phylink instance for this PHY 609 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 610 * @sfp_bus: SFP bus attached to this PHY's fiber port 611 * @attached_dev: The attached enet driver's device instance ptr 612 * @adjust_link: Callback for the enet controller to respond to changes: in the 613 * link state. 614 * @phy_link_change: Callback for phylink for notification of link change 615 * @macsec_ops: MACsec offloading ops. 616 * 617 * @speed: Current link speed 618 * @duplex: Current duplex 619 * @port: Current port 620 * @pause: Current pause 621 * @asym_pause: Current asymmetric pause 622 * @supported: Combined MAC/PHY supported linkmodes 623 * @advertising: Currently advertised linkmodes 624 * @adv_old: Saved advertised while power saving for WoL 625 * @supported_eee: supported PHY EEE linkmodes 626 * @advertising_eee: Currently advertised EEE linkmodes 627 * @enable_tx_lpi: When True, MAC should transmit LPI to PHY 628 * @eee_active: phylib private state, indicating that EEE has been negotiated 629 * @eee_cfg: User configuration of EEE 630 * @lp_advertising: Current link partner advertised linkmodes 631 * @host_interfaces: PHY interface modes supported by host 632 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 633 * @autoneg: Flag autoneg being used 634 * @rate_matching: Current rate matching mode 635 * @link: Current link state 636 * @autoneg_complete: Flag auto negotiation of the link has completed 637 * @mdix: Current crossover 638 * @mdix_ctrl: User setting of crossover 639 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 640 * @interrupts: Flag interrupts have been enabled 641 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 642 * handling shall be postponed until PHY has resumed 643 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 644 * requiring a rerun of the interrupt handler after resume 645 * @default_timestamp: Flag indicating whether we are using the phy 646 * timestamp as the default one 647 * @interface: enum phy_interface_t value 648 * @possible_interfaces: bitmap if interface modes that the attached PHY 649 * will switch between depending on media speed. 650 * @skb: Netlink message for cable diagnostics 651 * @nest: Netlink nest used for cable diagnostics 652 * @ehdr: nNtlink header for cable diagnostics 653 * @phy_led_triggers: Array of LED triggers 654 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 655 * @led_link_trigger: LED trigger for link up/down 656 * @last_triggered: last LED trigger for link speed 657 * @leds: list of PHY LED structures 658 * @master_slave_set: User requested master/slave configuration 659 * @master_slave_get: Current master/slave advertisement 660 * @master_slave_state: Current master/slave configuration 661 * @mii_ts: Pointer to time stamper callbacks 662 * @psec: Pointer to Power Sourcing Equipment control struct 663 * @lock: Mutex for serialization access to PHY 664 * @state_queue: Work queue for state machine 665 * @link_down_events: Number of times link was lost 666 * @shared: Pointer to private data shared by phys in one package 667 * @priv: Pointer to driver private data 668 * 669 * interrupts currently only supports enabled or disabled, 670 * but could be changed in the future to support enabling 671 * and disabling specific interrupts 672 * 673 * Contains some infrastructure for polling and interrupt 674 * handling, as well as handling shifts in PHY hardware state 675 */ 676 struct phy_device { 677 struct mdio_device mdio; 678 679 /* Information about the PHY type */ 680 /* And management functions */ 681 const struct phy_driver *drv; 682 683 struct device_link *devlink; 684 685 u32 phyindex; 686 u32 phy_id; 687 688 struct phy_c45_device_ids c45_ids; 689 unsigned is_c45:1; 690 unsigned is_internal:1; 691 unsigned is_pseudo_fixed_link:1; 692 unsigned is_gigabit_capable:1; 693 unsigned has_fixups:1; 694 unsigned suspended:1; 695 unsigned suspended_by_mdio_bus:1; 696 unsigned sysfs_links:1; 697 unsigned loopback_enabled:1; 698 unsigned downshifted_rate:1; 699 unsigned is_on_sfp_module:1; 700 unsigned mac_managed_pm:1; 701 unsigned wol_enabled:1; 702 703 unsigned autoneg:1; 704 /* The most recently read link state */ 705 unsigned link:1; 706 unsigned autoneg_complete:1; 707 708 /* Interrupts are enabled */ 709 unsigned interrupts:1; 710 unsigned irq_suspended:1; 711 unsigned irq_rerun:1; 712 713 unsigned default_timestamp:1; 714 715 int rate_matching; 716 717 enum phy_state state; 718 719 u32 dev_flags; 720 721 phy_interface_t interface; 722 DECLARE_PHY_INTERFACE_MASK(possible_interfaces); 723 724 /* 725 * forced speed & duplex (no autoneg) 726 * partner speed & duplex & pause (autoneg) 727 */ 728 int speed; 729 int duplex; 730 int port; 731 int pause; 732 int asym_pause; 733 u8 master_slave_get; 734 u8 master_slave_set; 735 u8 master_slave_state; 736 737 /* Union of PHY and Attached devices' supported link modes */ 738 /* See ethtool.h for more info */ 739 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 740 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 741 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 742 /* used with phy_speed_down */ 743 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 744 /* used for eee validation and configuration*/ 745 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee); 746 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee); 747 /* Energy efficient ethernet modes which should be prohibited */ 748 __ETHTOOL_DECLARE_LINK_MODE_MASK(eee_broken_modes); 749 bool enable_tx_lpi; 750 bool eee_active; 751 struct eee_config eee_cfg; 752 753 /* Host supported PHY interface types. Should be ignored if empty. */ 754 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 755 756 #ifdef CONFIG_LED_TRIGGER_PHY 757 struct phy_led_trigger *phy_led_triggers; 758 unsigned int phy_num_led_triggers; 759 struct phy_led_trigger *last_triggered; 760 761 struct phy_led_trigger *led_link_trigger; 762 #endif 763 struct list_head leds; 764 765 /* 766 * Interrupt number for this PHY 767 * -1 means no interrupt 768 */ 769 int irq; 770 771 /* private data pointer */ 772 /* For use by PHYs to maintain extra state */ 773 void *priv; 774 775 /* shared data pointer */ 776 /* For use by PHYs inside the same package that need a shared state. */ 777 struct phy_package_shared *shared; 778 779 /* Reporting cable test results */ 780 struct sk_buff *skb; 781 void *ehdr; 782 struct nlattr *nest; 783 784 /* Interrupt and Polling infrastructure */ 785 struct delayed_work state_queue; 786 787 struct mutex lock; 788 789 /* This may be modified under the rtnl lock */ 790 bool sfp_bus_attached; 791 struct sfp_bus *sfp_bus; 792 struct phylink *phylink; 793 struct net_device *attached_dev; 794 struct mii_timestamper *mii_ts; 795 struct pse_control *psec; 796 797 u8 mdix; 798 u8 mdix_ctrl; 799 800 int pma_extable; 801 802 unsigned int link_down_events; 803 804 void (*phy_link_change)(struct phy_device *phydev, bool up); 805 void (*adjust_link)(struct net_device *dev); 806 807 #if IS_ENABLED(CONFIG_MACSEC) 808 /* MACsec management functions */ 809 const struct macsec_ops *macsec_ops; 810 #endif 811 }; 812 813 /* Generic phy_device::dev_flags */ 814 #define PHY_F_NO_IRQ 0x80000000 815 #define PHY_F_RXC_ALWAYS_ON 0x40000000 816 817 static inline struct phy_device *to_phy_device(const struct device *dev) 818 { 819 return container_of(to_mdio_device(dev), struct phy_device, mdio); 820 } 821 822 /** 823 * struct phy_tdr_config - Configuration of a TDR raw test 824 * 825 * @first: Distance for first data collection point 826 * @last: Distance for last data collection point 827 * @step: Step between data collection points 828 * @pair: Bitmap of cable pairs to collect data for 829 * 830 * A structure containing possible configuration parameters 831 * for a TDR cable test. The driver does not need to implement 832 * all the parameters, but should report what is actually used. 833 * All distances are in centimeters. 834 */ 835 struct phy_tdr_config { 836 u32 first; 837 u32 last; 838 u32 step; 839 s8 pair; 840 }; 841 #define PHY_PAIR_ALL -1 842 843 /** 844 * enum link_inband_signalling - in-band signalling modes that are supported 845 * 846 * @LINK_INBAND_DISABLE: in-band signalling can be disabled 847 * @LINK_INBAND_ENABLE: in-band signalling can be enabled without bypass 848 * @LINK_INBAND_BYPASS: in-band signalling can be enabled with bypass 849 * 850 * The possible and required bits can only be used if the valid bit is set. 851 * If possible is clear, that means inband signalling can not be used. 852 * Required is only valid when possible is set, and means that inband 853 * signalling must be used. 854 */ 855 enum link_inband_signalling { 856 LINK_INBAND_DISABLE = BIT(0), 857 LINK_INBAND_ENABLE = BIT(1), 858 LINK_INBAND_BYPASS = BIT(2), 859 }; 860 861 /** 862 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 863 * Avoidance) Reconciliation Sublayer. 864 * 865 * @version: read-only PLCA register map version. -1 = not available. Ignored 866 * when setting the configuration. Format is the same as reported by the PLCA 867 * IDVER register (31.CA00). -1 = not available. 868 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 869 * set. 0 = disabled, anything else = enabled. 870 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 871 * Allowed values [0 .. 254]. 255 = node disabled. 872 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 873 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 874 * set. Allowed values [1 .. 255]. 875 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 876 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 877 * more details. The to_timer shall be set equal over all nodes. 878 * -1 = not available / don't set. Allowed values [0 .. 255]. 879 * @burst_cnt: controls how many additional frames a node is allowed to send in 880 * single transmit opportunity (TO). The default value of 0 means that the 881 * node is allowed exactly one frame per TO. A value of 1 allows two frames 882 * per TO, and so on. -1 = not available / don't set. 883 * Allowed values [0 .. 255]. 884 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 885 * frame before interrupting the burst. This value should be set to a value 886 * greater than the MAC inter-packet gap (which is typically 96 bits). 887 * -1 = not available / don't set. Allowed values [0 .. 255]. 888 * 889 * A structure containing configuration parameters for setting/getting the PLCA 890 * RS configuration. The driver does not need to implement all the parameters, 891 * but should report what is actually used. 892 */ 893 struct phy_plca_cfg { 894 int version; 895 int enabled; 896 int node_id; 897 int node_cnt; 898 int to_tmr; 899 int burst_cnt; 900 int burst_tmr; 901 }; 902 903 /** 904 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 905 * Avoidance) Reconciliation Sublayer. 906 * 907 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 908 * register(31.CA03), indicating BEACON activity. 909 * 910 * A structure containing status information of the PLCA RS configuration. 911 * The driver does not need to implement all the parameters, but should report 912 * what is actually used. 913 */ 914 struct phy_plca_status { 915 bool pst; 916 }; 917 918 /* Modes for PHY LED configuration */ 919 enum phy_led_modes { 920 PHY_LED_ACTIVE_HIGH = 0, 921 PHY_LED_ACTIVE_LOW = 1, 922 PHY_LED_INACTIVE_HIGH_IMPEDANCE = 2, 923 924 /* keep it last */ 925 __PHY_LED_MODES_NUM, 926 }; 927 928 /** 929 * struct phy_led: An LED driven by the PHY 930 * 931 * @list: List of LEDs 932 * @phydev: PHY this LED is attached to 933 * @led_cdev: Standard LED class structure 934 * @index: Number of the LED 935 */ 936 struct phy_led { 937 struct list_head list; 938 struct phy_device *phydev; 939 struct led_classdev led_cdev; 940 u8 index; 941 }; 942 943 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev) 944 945 /** 946 * struct phy_driver - Driver structure for a particular PHY type 947 * 948 * @mdiodrv: Data common to all MDIO devices 949 * @phy_id: The result of reading the UID registers of this PHY 950 * type, and ANDing them with the phy_id_mask. This driver 951 * only works for PHYs with IDs which match this field 952 * @name: The friendly name of this PHY type 953 * @phy_id_mask: Defines the important bits of the phy_id 954 * @features: A mandatory list of features (speed, duplex, etc) 955 * supported by this PHY 956 * @flags: A bitfield defining certain other features this PHY 957 * supports (like interrupts) 958 * @driver_data: Static driver data 959 * 960 * All functions are optional. If config_aneg or read_status 961 * are not implemented, the phy core uses the genphy versions. 962 * Note that none of these functions should be called from 963 * interrupt time. The goal is for the bus read/write functions 964 * to be able to block when the bus transaction is happening, 965 * and be freed up by an interrupt (The MPC85xx has this ability, 966 * though it is not currently supported in the driver). 967 */ 968 struct phy_driver { 969 struct mdio_driver_common mdiodrv; 970 u32 phy_id; 971 char *name; 972 u32 phy_id_mask; 973 const unsigned long * const features; 974 u32 flags; 975 const void *driver_data; 976 977 /** 978 * @soft_reset: Called to issue a PHY software reset 979 */ 980 int (*soft_reset)(struct phy_device *phydev); 981 982 /** 983 * @config_init: Called to initialize the PHY, 984 * including after a reset 985 */ 986 int (*config_init)(struct phy_device *phydev); 987 988 /** 989 * @probe: Called during discovery. Used to set 990 * up device-specific structures, if any 991 */ 992 int (*probe)(struct phy_device *phydev); 993 994 /** 995 * @get_features: Probe the hardware to determine what 996 * abilities it has. Should only set phydev->supported. 997 */ 998 int (*get_features)(struct phy_device *phydev); 999 1000 /** 1001 * @inband_caps: query whether in-band is supported for the given PHY 1002 * interface mode. Returns a bitmask of bits defined by enum 1003 * link_inband_signalling. 1004 */ 1005 unsigned int (*inband_caps)(struct phy_device *phydev, 1006 phy_interface_t interface); 1007 1008 /** 1009 * @config_inband: configure in-band mode for the PHY 1010 */ 1011 int (*config_inband)(struct phy_device *phydev, unsigned int modes); 1012 1013 /** 1014 * @get_rate_matching: Get the supported type of rate matching for a 1015 * particular phy interface. This is used by phy consumers to determine 1016 * whether to advertise lower-speed modes for that interface. It is 1017 * assumed that if a rate matching mode is supported on an interface, 1018 * then that interface's rate can be adapted to all slower link speeds 1019 * supported by the phy. If the interface is not supported, this should 1020 * return %RATE_MATCH_NONE. 1021 */ 1022 int (*get_rate_matching)(struct phy_device *phydev, 1023 phy_interface_t iface); 1024 1025 /* PHY Power Management */ 1026 /** @suspend: Suspend the hardware, saving state if needed */ 1027 int (*suspend)(struct phy_device *phydev); 1028 /** @resume: Resume the hardware, restoring state if needed */ 1029 int (*resume)(struct phy_device *phydev); 1030 1031 /** 1032 * @config_aneg: Configures the advertisement and resets 1033 * autonegotiation if phydev->autoneg is on, 1034 * forces the speed to the current settings in phydev 1035 * if phydev->autoneg is off 1036 */ 1037 int (*config_aneg)(struct phy_device *phydev); 1038 1039 /** @aneg_done: Determines the auto negotiation result */ 1040 int (*aneg_done)(struct phy_device *phydev); 1041 1042 /** @read_status: Determines the negotiated speed and duplex */ 1043 int (*read_status)(struct phy_device *phydev); 1044 1045 /** 1046 * @config_intr: Enables or disables interrupts. 1047 * It should also clear any pending interrupts prior to enabling the 1048 * IRQs and after disabling them. 1049 */ 1050 int (*config_intr)(struct phy_device *phydev); 1051 1052 /** @handle_interrupt: Override default interrupt handling */ 1053 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 1054 1055 /** @remove: Clears up any memory if needed */ 1056 void (*remove)(struct phy_device *phydev); 1057 1058 /** 1059 * @match_phy_device: Returns true if this is a suitable 1060 * driver for the given phydev. If NULL, matching is based on 1061 * phy_id and phy_id_mask. 1062 */ 1063 int (*match_phy_device)(struct phy_device *phydev); 1064 1065 /** 1066 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 1067 * register changes to enable Wake on LAN, so set_wol is 1068 * provided to be called in the ethernet driver's set_wol 1069 * function. 1070 */ 1071 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1072 1073 /** 1074 * @get_wol: See set_wol, but for checking whether Wake on LAN 1075 * is enabled. 1076 */ 1077 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1078 1079 /** 1080 * @link_change_notify: Called to inform a PHY device driver 1081 * when the core is about to change the link state. This 1082 * callback is supposed to be used as fixup hook for drivers 1083 * that need to take action when the link state 1084 * changes. Drivers are by no means allowed to mess with the 1085 * PHY device structure in their implementations. 1086 */ 1087 void (*link_change_notify)(struct phy_device *dev); 1088 1089 /** 1090 * @read_mmd: PHY specific driver override for reading a MMD 1091 * register. This function is optional for PHY specific 1092 * drivers. When not provided, the default MMD read function 1093 * will be used by phy_read_mmd(), which will use either a 1094 * direct read for Clause 45 PHYs or an indirect read for 1095 * Clause 22 PHYs. devnum is the MMD device number within the 1096 * PHY device, regnum is the register within the selected MMD 1097 * device. 1098 */ 1099 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 1100 1101 /** 1102 * @write_mmd: PHY specific driver override for writing a MMD 1103 * register. This function is optional for PHY specific 1104 * drivers. When not provided, the default MMD write function 1105 * will be used by phy_write_mmd(), which will use either a 1106 * direct write for Clause 45 PHYs, or an indirect write for 1107 * Clause 22 PHYs. devnum is the MMD device number within the 1108 * PHY device, regnum is the register within the selected MMD 1109 * device. val is the value to be written. 1110 */ 1111 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 1112 u16 val); 1113 1114 /** @read_page: Return the current PHY register page number */ 1115 int (*read_page)(struct phy_device *dev); 1116 /** @write_page: Set the current PHY register page number */ 1117 int (*write_page)(struct phy_device *dev, int page); 1118 1119 /** 1120 * @module_info: Get the size and type of the eeprom contained 1121 * within a plug-in module 1122 */ 1123 int (*module_info)(struct phy_device *dev, 1124 struct ethtool_modinfo *modinfo); 1125 1126 /** 1127 * @module_eeprom: Get the eeprom information from the plug-in 1128 * module 1129 */ 1130 int (*module_eeprom)(struct phy_device *dev, 1131 struct ethtool_eeprom *ee, u8 *data); 1132 1133 /** @cable_test_start: Start a cable test */ 1134 int (*cable_test_start)(struct phy_device *dev); 1135 1136 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1137 int (*cable_test_tdr_start)(struct phy_device *dev, 1138 const struct phy_tdr_config *config); 1139 1140 /** 1141 * @cable_test_get_status: Once per second, or on interrupt, 1142 * request the status of the test. 1143 */ 1144 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1145 1146 /* Get statistics from the PHY using ethtool */ 1147 /** @get_sset_count: Number of statistic counters */ 1148 int (*get_sset_count)(struct phy_device *dev); 1149 /** @get_strings: Names of the statistic counters */ 1150 void (*get_strings)(struct phy_device *dev, u8 *data); 1151 /** @get_stats: Return the statistic counter values */ 1152 void (*get_stats)(struct phy_device *dev, 1153 struct ethtool_stats *stats, u64 *data); 1154 1155 /* Get and Set PHY tunables */ 1156 /** @get_tunable: Return the value of a tunable */ 1157 int (*get_tunable)(struct phy_device *dev, 1158 struct ethtool_tunable *tuna, void *data); 1159 /** @set_tunable: Set the value of a tunable */ 1160 int (*set_tunable)(struct phy_device *dev, 1161 struct ethtool_tunable *tuna, 1162 const void *data); 1163 /** @set_loopback: Set the loopback mood of the PHY */ 1164 int (*set_loopback)(struct phy_device *dev, bool enable); 1165 /** @get_sqi: Get the signal quality indication */ 1166 int (*get_sqi)(struct phy_device *dev); 1167 /** @get_sqi_max: Get the maximum signal quality indication */ 1168 int (*get_sqi_max)(struct phy_device *dev); 1169 1170 /* PLCA RS interface */ 1171 /** @get_plca_cfg: Return the current PLCA configuration */ 1172 int (*get_plca_cfg)(struct phy_device *dev, 1173 struct phy_plca_cfg *plca_cfg); 1174 /** @set_plca_cfg: Set the PLCA configuration */ 1175 int (*set_plca_cfg)(struct phy_device *dev, 1176 const struct phy_plca_cfg *plca_cfg); 1177 /** @get_plca_status: Return the current PLCA status info */ 1178 int (*get_plca_status)(struct phy_device *dev, 1179 struct phy_plca_status *plca_st); 1180 1181 /** 1182 * @led_brightness_set: Set a PHY LED brightness. Index 1183 * indicates which of the PHYs led should be set. Value 1184 * follows the standard LED class meaning, e.g. LED_OFF, 1185 * LED_HALF, LED_FULL. 1186 */ 1187 int (*led_brightness_set)(struct phy_device *dev, 1188 u8 index, enum led_brightness value); 1189 1190 /** 1191 * @led_blink_set: Set a PHY LED blinking. Index indicates 1192 * which of the PHYs led should be configured to blink. Delays 1193 * are in milliseconds and if both are zero then a sensible 1194 * default should be chosen. The call should adjust the 1195 * timings in that case and if it can't match the values 1196 * specified exactly. 1197 */ 1198 int (*led_blink_set)(struct phy_device *dev, u8 index, 1199 unsigned long *delay_on, 1200 unsigned long *delay_off); 1201 /** 1202 * @led_hw_is_supported: Can the HW support the given rules. 1203 * @dev: PHY device which has the LED 1204 * @index: Which LED of the PHY device 1205 * @rules The core is interested in these rules 1206 * 1207 * Return 0 if yes, -EOPNOTSUPP if not, or an error code. 1208 */ 1209 int (*led_hw_is_supported)(struct phy_device *dev, u8 index, 1210 unsigned long rules); 1211 /** 1212 * @led_hw_control_set: Set the HW to control the LED 1213 * @dev: PHY device which has the LED 1214 * @index: Which LED of the PHY device 1215 * @rules The rules used to control the LED 1216 * 1217 * Returns 0, or a an error code. 1218 */ 1219 int (*led_hw_control_set)(struct phy_device *dev, u8 index, 1220 unsigned long rules); 1221 /** 1222 * @led_hw_control_get: Get how the HW is controlling the LED 1223 * @dev: PHY device which has the LED 1224 * @index: Which LED of the PHY device 1225 * @rules Pointer to the rules used to control the LED 1226 * 1227 * Set *@rules to how the HW is currently blinking. Returns 0 1228 * on success, or a error code if the current blinking cannot 1229 * be represented in rules, or some other error happens. 1230 */ 1231 int (*led_hw_control_get)(struct phy_device *dev, u8 index, 1232 unsigned long *rules); 1233 1234 /** 1235 * @led_polarity_set: Set the LED polarity modes 1236 * @dev: PHY device which has the LED 1237 * @index: Which LED of the PHY device 1238 * @modes: bitmap of LED polarity modes 1239 * 1240 * Configure LED with all the required polarity modes in @modes 1241 * to make it correctly turn ON or OFF. 1242 * 1243 * Returns 0, or an error code. 1244 */ 1245 int (*led_polarity_set)(struct phy_device *dev, int index, 1246 unsigned long modes); 1247 }; 1248 #define to_phy_driver(d) container_of_const(to_mdio_common_driver(d), \ 1249 struct phy_driver, mdiodrv) 1250 1251 #define PHY_ANY_ID "MATCH ANY PHY" 1252 #define PHY_ANY_UID 0xffffffff 1253 1254 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 1255 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 1256 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 1257 1258 /** 1259 * phy_id_compare - compare @id1 with @id2 taking account of @mask 1260 * @id1: first PHY ID 1261 * @id2: second PHY ID 1262 * @mask: the PHY ID mask, set bits are significant in matching 1263 * 1264 * Return true if the bits from @id1 and @id2 specified by @mask match. 1265 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask). 1266 */ 1267 static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask) 1268 { 1269 return !((id1 ^ id2) & mask); 1270 } 1271 1272 /** 1273 * phydev_id_compare - compare @id with the PHY's Clause 22 ID 1274 * @phydev: the PHY device 1275 * @id: the PHY ID to be matched 1276 * 1277 * Compare the @phydev clause 22 ID with the provided @id and return true or 1278 * false depending whether it matches, using the bound driver mask. The 1279 * @phydev must be bound to a driver. 1280 */ 1281 static inline bool phydev_id_compare(struct phy_device *phydev, u32 id) 1282 { 1283 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask); 1284 } 1285 1286 /* A Structure for boards to register fixups with the PHY Lib */ 1287 struct phy_fixup { 1288 struct list_head list; 1289 char bus_id[MII_BUS_ID_SIZE + 3]; 1290 u32 phy_uid; 1291 u32 phy_uid_mask; 1292 int (*run)(struct phy_device *phydev); 1293 }; 1294 1295 const char *phy_speed_to_str(int speed); 1296 const char *phy_duplex_to_str(unsigned int duplex); 1297 const char *phy_rate_matching_to_str(int rate_matching); 1298 1299 int phy_interface_num_ports(phy_interface_t interface); 1300 1301 /* A structure for mapping a particular speed and duplex 1302 * combination to a particular SUPPORTED and ADVERTISED value 1303 */ 1304 struct phy_setting { 1305 u32 speed; 1306 u8 duplex; 1307 u8 bit; 1308 }; 1309 1310 const struct phy_setting * 1311 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 1312 bool exact); 1313 size_t phy_speeds(unsigned int *speeds, size_t size, 1314 unsigned long *mask); 1315 void of_set_phy_supported(struct phy_device *phydev); 1316 void of_set_phy_eee_broken(struct phy_device *phydev); 1317 void of_set_phy_timing_role(struct phy_device *phydev); 1318 int phy_speed_down_core(struct phy_device *phydev); 1319 1320 /** 1321 * phy_set_eee_broken - Mark an EEE mode as broken so that it isn't advertised. 1322 * @phydev: The phy_device struct 1323 * @link_mode: The broken EEE mode 1324 */ 1325 static inline void phy_set_eee_broken(struct phy_device *phydev, u32 link_mode) 1326 { 1327 linkmode_set_bit(link_mode, phydev->eee_broken_modes); 1328 } 1329 1330 /** 1331 * phy_is_started - Convenience function to check whether PHY is started 1332 * @phydev: The phy_device struct 1333 */ 1334 static inline bool phy_is_started(struct phy_device *phydev) 1335 { 1336 return phydev->state >= PHY_UP; 1337 } 1338 1339 void phy_resolve_aneg_pause(struct phy_device *phydev); 1340 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1341 void phy_check_downshift(struct phy_device *phydev); 1342 1343 /** 1344 * phy_read - Convenience function for reading a given PHY register 1345 * @phydev: the phy_device struct 1346 * @regnum: register number to read 1347 * 1348 * NOTE: MUST NOT be called from interrupt context, 1349 * because the bus read/write functions may wait for an interrupt 1350 * to conclude the operation. 1351 */ 1352 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1353 { 1354 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1355 } 1356 1357 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1358 timeout_us, sleep_before_read) \ 1359 ({ \ 1360 int __ret, __val; \ 1361 __ret = read_poll_timeout(__val = phy_read, val, \ 1362 __val < 0 || (cond), \ 1363 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1364 if (__val < 0) \ 1365 __ret = __val; \ 1366 if (__ret) \ 1367 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1368 __ret; \ 1369 }) 1370 1371 /** 1372 * __phy_read - convenience function for reading a given PHY register 1373 * @phydev: the phy_device struct 1374 * @regnum: register number to read 1375 * 1376 * The caller must have taken the MDIO bus lock. 1377 */ 1378 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1379 { 1380 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1381 } 1382 1383 /** 1384 * phy_write - Convenience function for writing a given PHY register 1385 * @phydev: the phy_device struct 1386 * @regnum: register number to write 1387 * @val: value to write to @regnum 1388 * 1389 * NOTE: MUST NOT be called from interrupt context, 1390 * because the bus read/write functions may wait for an interrupt 1391 * to conclude the operation. 1392 */ 1393 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1394 { 1395 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1396 } 1397 1398 /** 1399 * __phy_write - Convenience function for writing a given PHY register 1400 * @phydev: the phy_device struct 1401 * @regnum: register number to write 1402 * @val: value to write to @regnum 1403 * 1404 * The caller must have taken the MDIO bus lock. 1405 */ 1406 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1407 { 1408 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1409 val); 1410 } 1411 1412 /** 1413 * __phy_modify_changed() - Convenience function for modifying a PHY register 1414 * @phydev: a pointer to a &struct phy_device 1415 * @regnum: register number 1416 * @mask: bit mask of bits to clear 1417 * @set: bit mask of bits to set 1418 * 1419 * Unlocked helper function which allows a PHY register to be modified as 1420 * new register value = (old register value & ~mask) | set 1421 * 1422 * Returns negative errno, 0 if there was no change, and 1 in case of change 1423 */ 1424 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1425 u16 mask, u16 set) 1426 { 1427 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1428 regnum, mask, set); 1429 } 1430 1431 /* 1432 * phy_read_mmd - Convenience function for reading a register 1433 * from an MMD on a given PHY. 1434 */ 1435 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1436 1437 /** 1438 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1439 * condition is met or a timeout occurs 1440 * 1441 * @phydev: The phy_device struct 1442 * @devaddr: The MMD to read from 1443 * @regnum: The register on the MMD to read 1444 * @val: Variable to read the register into 1445 * @cond: Break condition (usually involving @val) 1446 * @sleep_us: Maximum time to sleep between reads in us (0 tight-loops). Please 1447 * read usleep_range() function description for details and 1448 * limitations. 1449 * @timeout_us: Timeout in us, 0 means never timeout 1450 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1451 * 1452 * Returns: 0 on success and -ETIMEDOUT upon a timeout. In either 1453 * case, the last read value at @args is stored in @val. Must not 1454 * be called from atomic context if sleep_us or timeout_us are used. 1455 */ 1456 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1457 sleep_us, timeout_us, sleep_before_read) \ 1458 ({ \ 1459 int __ret, __val; \ 1460 __ret = read_poll_timeout(__val = phy_read_mmd, val, \ 1461 __val < 0 || (cond), \ 1462 sleep_us, timeout_us, sleep_before_read, \ 1463 phydev, devaddr, regnum); \ 1464 if (__val < 0) \ 1465 __ret = __val; \ 1466 if (__ret) \ 1467 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1468 __ret; \ 1469 }) 1470 1471 /* 1472 * __phy_read_mmd - Convenience function for reading a register 1473 * from an MMD on a given PHY. 1474 */ 1475 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1476 1477 /* 1478 * phy_write_mmd - Convenience function for writing a register 1479 * on an MMD on a given PHY. 1480 */ 1481 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1482 1483 /* 1484 * __phy_write_mmd - Convenience function for writing a register 1485 * on an MMD on a given PHY. 1486 */ 1487 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1488 1489 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1490 u16 set); 1491 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1492 u16 set); 1493 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1494 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1495 1496 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1497 u16 mask, u16 set); 1498 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1499 u16 mask, u16 set); 1500 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1501 u16 mask, u16 set); 1502 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1503 u16 mask, u16 set); 1504 1505 /** 1506 * __phy_set_bits - Convenience function for setting bits in a PHY register 1507 * @phydev: the phy_device struct 1508 * @regnum: register number to write 1509 * @val: bits to set 1510 * 1511 * The caller must have taken the MDIO bus lock. 1512 */ 1513 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1514 { 1515 return __phy_modify(phydev, regnum, 0, val); 1516 } 1517 1518 /** 1519 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1520 * @phydev: the phy_device struct 1521 * @regnum: register number to write 1522 * @val: bits to clear 1523 * 1524 * The caller must have taken the MDIO bus lock. 1525 */ 1526 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1527 u16 val) 1528 { 1529 return __phy_modify(phydev, regnum, val, 0); 1530 } 1531 1532 /** 1533 * phy_set_bits - Convenience function for setting bits in a PHY register 1534 * @phydev: the phy_device struct 1535 * @regnum: register number to write 1536 * @val: bits to set 1537 */ 1538 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1539 { 1540 return phy_modify(phydev, regnum, 0, val); 1541 } 1542 1543 /** 1544 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1545 * @phydev: the phy_device struct 1546 * @regnum: register number to write 1547 * @val: bits to clear 1548 */ 1549 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1550 { 1551 return phy_modify(phydev, regnum, val, 0); 1552 } 1553 1554 /** 1555 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1556 * on MMD 1557 * @phydev: the phy_device struct 1558 * @devad: the MMD containing register to modify 1559 * @regnum: register number to modify 1560 * @val: bits to set 1561 * 1562 * The caller must have taken the MDIO bus lock. 1563 */ 1564 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1565 u32 regnum, u16 val) 1566 { 1567 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1568 } 1569 1570 /** 1571 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1572 * on MMD 1573 * @phydev: the phy_device struct 1574 * @devad: the MMD containing register to modify 1575 * @regnum: register number to modify 1576 * @val: bits to clear 1577 * 1578 * The caller must have taken the MDIO bus lock. 1579 */ 1580 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1581 u32 regnum, u16 val) 1582 { 1583 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1584 } 1585 1586 /** 1587 * phy_set_bits_mmd - Convenience function for setting bits in a register 1588 * on MMD 1589 * @phydev: the phy_device struct 1590 * @devad: the MMD containing register to modify 1591 * @regnum: register number to modify 1592 * @val: bits to set 1593 */ 1594 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1595 u32 regnum, u16 val) 1596 { 1597 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1598 } 1599 1600 /** 1601 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1602 * on MMD 1603 * @phydev: the phy_device struct 1604 * @devad: the MMD containing register to modify 1605 * @regnum: register number to modify 1606 * @val: bits to clear 1607 */ 1608 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1609 u32 regnum, u16 val) 1610 { 1611 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1612 } 1613 1614 /** 1615 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1616 * @phydev: the phy_device struct 1617 * 1618 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1619 * PHY_MAC_INTERRUPT 1620 */ 1621 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1622 { 1623 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1624 } 1625 1626 /** 1627 * phy_polling_mode - Convenience function for testing whether polling is 1628 * used to detect PHY status changes 1629 * @phydev: the phy_device struct 1630 */ 1631 static inline bool phy_polling_mode(struct phy_device *phydev) 1632 { 1633 if (phydev->state == PHY_CABLETEST) 1634 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1635 return true; 1636 1637 return phydev->irq == PHY_POLL; 1638 } 1639 1640 /** 1641 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1642 * @phydev: the phy_device struct 1643 */ 1644 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1645 { 1646 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1647 } 1648 1649 /** 1650 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1651 * @phydev: the phy_device struct 1652 */ 1653 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1654 { 1655 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1656 } 1657 1658 /** 1659 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1660 * PTP hardware clock capabilities. 1661 * @phydev: the phy_device struct 1662 */ 1663 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1664 { 1665 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1666 } 1667 1668 /** 1669 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1670 * @phydev: the phy_device struct 1671 */ 1672 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1673 { 1674 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1675 } 1676 1677 static inline int phy_hwtstamp(struct phy_device *phydev, 1678 struct kernel_hwtstamp_config *cfg, 1679 struct netlink_ext_ack *extack) 1680 { 1681 return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack); 1682 } 1683 1684 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1685 int type) 1686 { 1687 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1688 } 1689 1690 static inline int phy_ts_info(struct phy_device *phydev, 1691 struct kernel_ethtool_ts_info *tsinfo) 1692 { 1693 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1694 } 1695 1696 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1697 int type) 1698 { 1699 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1700 } 1701 1702 /** 1703 * phy_is_default_hwtstamp - Is the PHY hwtstamp the default timestamp 1704 * @phydev: Pointer to phy_device 1705 * 1706 * This is used to get default timestamping device taking into account 1707 * the new API choice, which is selecting the timestamping from MAC by 1708 * default if the phydev does not have default_timestamp flag enabled. 1709 * 1710 * Return: True if phy is the default hw timestamp, false otherwise. 1711 */ 1712 static inline bool phy_is_default_hwtstamp(struct phy_device *phydev) 1713 { 1714 return phy_has_hwtstamp(phydev) && phydev->default_timestamp; 1715 } 1716 1717 /** 1718 * phy_is_internal - Convenience function for testing if a PHY is internal 1719 * @phydev: the phy_device struct 1720 */ 1721 static inline bool phy_is_internal(struct phy_device *phydev) 1722 { 1723 return phydev->is_internal; 1724 } 1725 1726 /** 1727 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1728 * @phydev: the phy_device struct 1729 */ 1730 static inline bool phy_on_sfp(struct phy_device *phydev) 1731 { 1732 return phydev->is_on_sfp_module; 1733 } 1734 1735 /** 1736 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1737 * PHY interface mode is RGMII (all variants) 1738 * @mode: the &phy_interface_t enum 1739 */ 1740 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1741 { 1742 return mode >= PHY_INTERFACE_MODE_RGMII && 1743 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1744 }; 1745 1746 /** 1747 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1748 * negotiation 1749 * @mode: one of &enum phy_interface_t 1750 * 1751 * Returns true if the PHY interface mode uses the 16-bit negotiation 1752 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1753 */ 1754 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1755 { 1756 return mode == PHY_INTERFACE_MODE_1000BASEX || 1757 mode == PHY_INTERFACE_MODE_2500BASEX; 1758 } 1759 1760 /** 1761 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1762 * is RGMII (all variants) 1763 * @phydev: the phy_device struct 1764 */ 1765 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1766 { 1767 return phy_interface_mode_is_rgmii(phydev->interface); 1768 }; 1769 1770 /** 1771 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1772 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1773 * @phydev: the phy_device struct 1774 */ 1775 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1776 { 1777 return phydev->is_pseudo_fixed_link; 1778 } 1779 1780 int phy_save_page(struct phy_device *phydev); 1781 int phy_select_page(struct phy_device *phydev, int page); 1782 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1783 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1784 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1785 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1786 u16 mask, u16 set); 1787 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1788 u16 mask, u16 set); 1789 1790 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1791 bool is_c45, 1792 struct phy_c45_device_ids *c45_ids); 1793 #if IS_ENABLED(CONFIG_PHYLIB) 1794 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1795 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1796 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1797 struct phy_device *device_phy_find_device(struct device *dev); 1798 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode); 1799 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1800 int phy_device_register(struct phy_device *phy); 1801 void phy_device_free(struct phy_device *phydev); 1802 #else 1803 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1804 { 1805 return 0; 1806 } 1807 static inline 1808 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1809 { 1810 return 0; 1811 } 1812 1813 static inline 1814 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1815 { 1816 return NULL; 1817 } 1818 1819 static inline struct phy_device *device_phy_find_device(struct device *dev) 1820 { 1821 return NULL; 1822 } 1823 1824 static inline 1825 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1826 { 1827 return NULL; 1828 } 1829 1830 static inline 1831 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1832 { 1833 return NULL; 1834 } 1835 1836 static inline int phy_device_register(struct phy_device *phy) 1837 { 1838 return 0; 1839 } 1840 1841 static inline void phy_device_free(struct phy_device *phydev) { } 1842 #endif /* CONFIG_PHYLIB */ 1843 void phy_device_remove(struct phy_device *phydev); 1844 int phy_get_c45_ids(struct phy_device *phydev); 1845 int phy_init_hw(struct phy_device *phydev); 1846 int phy_suspend(struct phy_device *phydev); 1847 int phy_resume(struct phy_device *phydev); 1848 int __phy_resume(struct phy_device *phydev); 1849 int phy_loopback(struct phy_device *phydev, bool enable); 1850 int phy_sfp_connect_phy(void *upstream, struct phy_device *phy); 1851 void phy_sfp_disconnect_phy(void *upstream, struct phy_device *phy); 1852 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1853 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1854 int phy_sfp_probe(struct phy_device *phydev, 1855 const struct sfp_upstream_ops *ops); 1856 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1857 phy_interface_t interface); 1858 struct phy_device *phy_find_first(struct mii_bus *bus); 1859 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1860 u32 flags, phy_interface_t interface); 1861 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1862 void (*handler)(struct net_device *), 1863 phy_interface_t interface); 1864 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1865 void (*handler)(struct net_device *), 1866 phy_interface_t interface); 1867 void phy_disconnect(struct phy_device *phydev); 1868 void phy_detach(struct phy_device *phydev); 1869 void phy_start(struct phy_device *phydev); 1870 void phy_stop(struct phy_device *phydev); 1871 int phy_config_aneg(struct phy_device *phydev); 1872 int _phy_start_aneg(struct phy_device *phydev); 1873 int phy_start_aneg(struct phy_device *phydev); 1874 int phy_aneg_done(struct phy_device *phydev); 1875 unsigned int phy_inband_caps(struct phy_device *phydev, 1876 phy_interface_t interface); 1877 int phy_config_inband(struct phy_device *phydev, unsigned int modes); 1878 int phy_speed_down(struct phy_device *phydev, bool sync); 1879 int phy_speed_up(struct phy_device *phydev); 1880 bool phy_check_valid(int speed, int duplex, unsigned long *features); 1881 1882 int phy_restart_aneg(struct phy_device *phydev); 1883 int phy_reset_after_clk_enable(struct phy_device *phydev); 1884 1885 #if IS_ENABLED(CONFIG_PHYLIB) 1886 int phy_start_cable_test(struct phy_device *phydev, 1887 struct netlink_ext_ack *extack); 1888 int phy_start_cable_test_tdr(struct phy_device *phydev, 1889 struct netlink_ext_ack *extack, 1890 const struct phy_tdr_config *config); 1891 #else 1892 static inline 1893 int phy_start_cable_test(struct phy_device *phydev, 1894 struct netlink_ext_ack *extack) 1895 { 1896 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1897 return -EOPNOTSUPP; 1898 } 1899 static inline 1900 int phy_start_cable_test_tdr(struct phy_device *phydev, 1901 struct netlink_ext_ack *extack, 1902 const struct phy_tdr_config *config) 1903 { 1904 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1905 return -EOPNOTSUPP; 1906 } 1907 #endif 1908 1909 static inline void phy_device_reset(struct phy_device *phydev, int value) 1910 { 1911 mdio_device_reset(&phydev->mdio, value); 1912 } 1913 1914 #define phydev_err(_phydev, format, args...) \ 1915 dev_err(&_phydev->mdio.dev, format, ##args) 1916 1917 #define phydev_err_probe(_phydev, err, format, args...) \ 1918 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1919 1920 #define phydev_info(_phydev, format, args...) \ 1921 dev_info(&_phydev->mdio.dev, format, ##args) 1922 1923 #define phydev_warn(_phydev, format, args...) \ 1924 dev_warn(&_phydev->mdio.dev, format, ##args) 1925 1926 #define phydev_dbg(_phydev, format, args...) \ 1927 dev_dbg(&_phydev->mdio.dev, format, ##args) 1928 1929 static inline const char *phydev_name(const struct phy_device *phydev) 1930 { 1931 return dev_name(&phydev->mdio.dev); 1932 } 1933 1934 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1935 { 1936 mutex_lock(&phydev->mdio.bus->mdio_lock); 1937 } 1938 1939 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1940 { 1941 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1942 } 1943 1944 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1945 __printf(2, 3); 1946 char *phy_attached_info_irq(struct phy_device *phydev) 1947 __malloc; 1948 void phy_attached_info(struct phy_device *phydev); 1949 1950 /* Clause 22 PHY */ 1951 int genphy_read_abilities(struct phy_device *phydev); 1952 int genphy_setup_forced(struct phy_device *phydev); 1953 int genphy_restart_aneg(struct phy_device *phydev); 1954 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1955 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1956 int genphy_aneg_done(struct phy_device *phydev); 1957 int genphy_update_link(struct phy_device *phydev); 1958 int genphy_read_lpa(struct phy_device *phydev); 1959 int genphy_read_status_fixed(struct phy_device *phydev); 1960 int genphy_read_status(struct phy_device *phydev); 1961 int genphy_read_master_slave(struct phy_device *phydev); 1962 int genphy_suspend(struct phy_device *phydev); 1963 int genphy_resume(struct phy_device *phydev); 1964 int genphy_loopback(struct phy_device *phydev, bool enable); 1965 int genphy_soft_reset(struct phy_device *phydev); 1966 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1967 1968 static inline int genphy_config_aneg(struct phy_device *phydev) 1969 { 1970 return __genphy_config_aneg(phydev, false); 1971 } 1972 1973 static inline int genphy_no_config_intr(struct phy_device *phydev) 1974 { 1975 return 0; 1976 } 1977 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1978 u16 regnum); 1979 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1980 u16 regnum, u16 val); 1981 1982 /* Clause 37 */ 1983 int genphy_c37_config_aneg(struct phy_device *phydev); 1984 int genphy_c37_read_status(struct phy_device *phydev, bool *changed); 1985 1986 /* Clause 45 PHY */ 1987 int genphy_c45_restart_aneg(struct phy_device *phydev); 1988 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1989 int genphy_c45_aneg_done(struct phy_device *phydev); 1990 int genphy_c45_read_link(struct phy_device *phydev); 1991 int genphy_c45_read_lpa(struct phy_device *phydev); 1992 int genphy_c45_read_pma(struct phy_device *phydev); 1993 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1994 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 1995 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1996 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1997 int genphy_c45_read_mdix(struct phy_device *phydev); 1998 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1999 int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev); 2000 int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev); 2001 int genphy_c45_read_eee_abilities(struct phy_device *phydev); 2002 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 2003 int genphy_c45_read_status(struct phy_device *phydev); 2004 int genphy_c45_baset1_read_status(struct phy_device *phydev); 2005 int genphy_c45_config_aneg(struct phy_device *phydev); 2006 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 2007 int genphy_c45_pma_resume(struct phy_device *phydev); 2008 int genphy_c45_pma_suspend(struct phy_device *phydev); 2009 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 2010 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 2011 struct phy_plca_cfg *plca_cfg); 2012 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 2013 const struct phy_plca_cfg *plca_cfg); 2014 int genphy_c45_plca_get_status(struct phy_device *phydev, 2015 struct phy_plca_status *plca_st); 2016 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv, 2017 unsigned long *lp); 2018 int genphy_c45_ethtool_get_eee(struct phy_device *phydev, 2019 struct ethtool_keee *data); 2020 int genphy_c45_ethtool_set_eee(struct phy_device *phydev, 2021 struct ethtool_keee *data); 2022 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev); 2023 int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv); 2024 2025 /* Generic C45 PHY driver */ 2026 extern struct phy_driver genphy_c45_driver; 2027 2028 /* The gen10g_* functions are the old Clause 45 stub */ 2029 int gen10g_config_aneg(struct phy_device *phydev); 2030 2031 static inline int phy_read_status(struct phy_device *phydev) 2032 { 2033 if (!phydev->drv) 2034 return -EIO; 2035 2036 if (phydev->drv->read_status) 2037 return phydev->drv->read_status(phydev); 2038 else 2039 return genphy_read_status(phydev); 2040 } 2041 2042 void phy_driver_unregister(struct phy_driver *drv); 2043 void phy_drivers_unregister(struct phy_driver *drv, int n); 2044 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 2045 int phy_drivers_register(struct phy_driver *new_driver, int n, 2046 struct module *owner); 2047 void phy_error(struct phy_device *phydev); 2048 void phy_state_machine(struct work_struct *work); 2049 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 2050 void phy_trigger_machine(struct phy_device *phydev); 2051 void phy_mac_interrupt(struct phy_device *phydev); 2052 void phy_start_machine(struct phy_device *phydev); 2053 void phy_stop_machine(struct phy_device *phydev); 2054 void phy_ethtool_ksettings_get(struct phy_device *phydev, 2055 struct ethtool_link_ksettings *cmd); 2056 int phy_ethtool_ksettings_set(struct phy_device *phydev, 2057 const struct ethtool_link_ksettings *cmd); 2058 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 2059 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 2060 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 2061 int phy_disable_interrupts(struct phy_device *phydev); 2062 void phy_request_interrupt(struct phy_device *phydev); 2063 void phy_free_interrupt(struct phy_device *phydev); 2064 void phy_print_status(struct phy_device *phydev); 2065 int phy_get_rate_matching(struct phy_device *phydev, 2066 phy_interface_t iface); 2067 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 2068 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 2069 void phy_advertise_supported(struct phy_device *phydev); 2070 void phy_advertise_eee_all(struct phy_device *phydev); 2071 void phy_support_sym_pause(struct phy_device *phydev); 2072 void phy_support_asym_pause(struct phy_device *phydev); 2073 void phy_support_eee(struct phy_device *phydev); 2074 void phy_disable_eee(struct phy_device *phydev); 2075 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 2076 bool autoneg); 2077 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 2078 bool phy_validate_pause(struct phy_device *phydev, 2079 struct ethtool_pauseparam *pp); 2080 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 2081 2082 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 2083 const int *delay_values, int size, bool is_rx); 2084 2085 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 2086 bool *tx_pause, bool *rx_pause); 2087 2088 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 2089 int (*run)(struct phy_device *)); 2090 int phy_register_fixup_for_id(const char *bus_id, 2091 int (*run)(struct phy_device *)); 2092 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 2093 int (*run)(struct phy_device *)); 2094 2095 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 2096 int phy_unregister_fixup_for_id(const char *bus_id); 2097 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 2098 2099 int phy_eee_rx_clock_stop(struct phy_device *phydev, bool clk_stop_enable); 2100 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 2101 int phy_get_eee_err(struct phy_device *phydev); 2102 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data); 2103 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_keee *data); 2104 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 2105 void phy_ethtool_get_wol(struct phy_device *phydev, 2106 struct ethtool_wolinfo *wol); 2107 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 2108 struct ethtool_link_ksettings *cmd); 2109 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 2110 const struct ethtool_link_ksettings *cmd); 2111 int phy_ethtool_nway_reset(struct net_device *ndev); 2112 int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size); 2113 int of_phy_package_join(struct phy_device *phydev, size_t priv_size); 2114 void phy_package_leave(struct phy_device *phydev); 2115 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 2116 int base_addr, size_t priv_size); 2117 int devm_of_phy_package_join(struct device *dev, struct phy_device *phydev, 2118 size_t priv_size); 2119 2120 int __init mdio_bus_init(void); 2121 void mdio_bus_exit(void); 2122 2123 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 2124 int phy_ethtool_get_sset_count(struct phy_device *phydev); 2125 int phy_ethtool_get_stats(struct phy_device *phydev, 2126 struct ethtool_stats *stats, u64 *data); 2127 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 2128 struct phy_plca_cfg *plca_cfg); 2129 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 2130 const struct phy_plca_cfg *plca_cfg, 2131 struct netlink_ext_ack *extack); 2132 int phy_ethtool_get_plca_status(struct phy_device *phydev, 2133 struct phy_plca_status *plca_st); 2134 2135 int __phy_hwtstamp_get(struct phy_device *phydev, 2136 struct kernel_hwtstamp_config *config); 2137 int __phy_hwtstamp_set(struct phy_device *phydev, 2138 struct kernel_hwtstamp_config *config, 2139 struct netlink_ext_ack *extack); 2140 2141 static inline int phy_package_address(struct phy_device *phydev, 2142 unsigned int addr_offset) 2143 { 2144 struct phy_package_shared *shared = phydev->shared; 2145 u8 base_addr = shared->base_addr; 2146 2147 if (addr_offset >= PHY_MAX_ADDR - base_addr) 2148 return -EIO; 2149 2150 /* we know that addr will be in the range 0..31 and thus the 2151 * implicit cast to a signed int is not a problem. 2152 */ 2153 return base_addr + addr_offset; 2154 } 2155 2156 static inline int phy_package_read(struct phy_device *phydev, 2157 unsigned int addr_offset, u32 regnum) 2158 { 2159 int addr = phy_package_address(phydev, addr_offset); 2160 2161 if (addr < 0) 2162 return addr; 2163 2164 return mdiobus_read(phydev->mdio.bus, addr, regnum); 2165 } 2166 2167 static inline int __phy_package_read(struct phy_device *phydev, 2168 unsigned int addr_offset, u32 regnum) 2169 { 2170 int addr = phy_package_address(phydev, addr_offset); 2171 2172 if (addr < 0) 2173 return addr; 2174 2175 return __mdiobus_read(phydev->mdio.bus, addr, regnum); 2176 } 2177 2178 static inline int phy_package_write(struct phy_device *phydev, 2179 unsigned int addr_offset, u32 regnum, 2180 u16 val) 2181 { 2182 int addr = phy_package_address(phydev, addr_offset); 2183 2184 if (addr < 0) 2185 return addr; 2186 2187 return mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2188 } 2189 2190 static inline int __phy_package_write(struct phy_device *phydev, 2191 unsigned int addr_offset, u32 regnum, 2192 u16 val) 2193 { 2194 int addr = phy_package_address(phydev, addr_offset); 2195 2196 if (addr < 0) 2197 return addr; 2198 2199 return __mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2200 } 2201 2202 int __phy_package_read_mmd(struct phy_device *phydev, 2203 unsigned int addr_offset, int devad, 2204 u32 regnum); 2205 2206 int phy_package_read_mmd(struct phy_device *phydev, 2207 unsigned int addr_offset, int devad, 2208 u32 regnum); 2209 2210 int __phy_package_write_mmd(struct phy_device *phydev, 2211 unsigned int addr_offset, int devad, 2212 u32 regnum, u16 val); 2213 2214 int phy_package_write_mmd(struct phy_device *phydev, 2215 unsigned int addr_offset, int devad, 2216 u32 regnum, u16 val); 2217 2218 static inline bool __phy_package_set_once(struct phy_device *phydev, 2219 unsigned int b) 2220 { 2221 struct phy_package_shared *shared = phydev->shared; 2222 2223 if (!shared) 2224 return false; 2225 2226 return !test_and_set_bit(b, &shared->flags); 2227 } 2228 2229 static inline bool phy_package_init_once(struct phy_device *phydev) 2230 { 2231 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 2232 } 2233 2234 static inline bool phy_package_probe_once(struct phy_device *phydev) 2235 { 2236 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 2237 } 2238 2239 extern const struct bus_type mdio_bus_type; 2240 2241 struct mdio_board_info { 2242 const char *bus_id; 2243 char modalias[MDIO_NAME_SIZE]; 2244 int mdio_addr; 2245 const void *platform_data; 2246 }; 2247 2248 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 2249 int mdiobus_register_board_info(const struct mdio_board_info *info, 2250 unsigned int n); 2251 #else 2252 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 2253 unsigned int n) 2254 { 2255 return 0; 2256 } 2257 #endif 2258 2259 2260 /** 2261 * phy_module_driver() - Helper macro for registering PHY drivers 2262 * @__phy_drivers: array of PHY drivers to register 2263 * @__count: Numbers of members in array 2264 * 2265 * Helper macro for PHY drivers which do not do anything special in module 2266 * init/exit. Each module may only use this macro once, and calling it 2267 * replaces module_init() and module_exit(). 2268 */ 2269 #define phy_module_driver(__phy_drivers, __count) \ 2270 static int __init phy_module_init(void) \ 2271 { \ 2272 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 2273 } \ 2274 module_init(phy_module_init); \ 2275 static void __exit phy_module_exit(void) \ 2276 { \ 2277 phy_drivers_unregister(__phy_drivers, __count); \ 2278 } \ 2279 module_exit(phy_module_exit) 2280 2281 #define module_phy_driver(__phy_drivers) \ 2282 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 2283 2284 bool phy_driver_is_genphy(struct phy_device *phydev); 2285 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 2286 2287 #endif /* __PHY_H */ 2288