1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/linkmode.h> 18 #include <linux/netlink.h> 19 #include <linux/mdio.h> 20 #include <linux/mii.h> 21 #include <linux/mii_timestamper.h> 22 #include <linux/module.h> 23 #include <linux/timer.h> 24 #include <linux/workqueue.h> 25 #include <linux/mod_devicetable.h> 26 #include <linux/u64_stats_sync.h> 27 #include <linux/irqreturn.h> 28 #include <linux/iopoll.h> 29 #include <linux/refcount.h> 30 31 #include <linux/atomic.h> 32 33 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 34 SUPPORTED_TP | \ 35 SUPPORTED_MII) 36 37 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 38 SUPPORTED_10baseT_Full) 39 40 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 41 SUPPORTED_100baseT_Full) 42 43 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 44 SUPPORTED_1000baseT_Full) 45 46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 54 55 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 56 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 57 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 58 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 59 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 60 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 61 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 62 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 63 64 extern const int phy_basic_ports_array[3]; 65 extern const int phy_fibre_port_array[1]; 66 extern const int phy_all_ports_features_array[7]; 67 extern const int phy_10_100_features_array[4]; 68 extern const int phy_basic_t1_features_array[3]; 69 extern const int phy_gbit_features_array[2]; 70 extern const int phy_10gbit_features_array[1]; 71 72 /* 73 * Set phydev->irq to PHY_POLL if interrupts are not supported, 74 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 75 * the attached MAC driver handles the interrupt 76 */ 77 #define PHY_POLL -1 78 #define PHY_MAC_INTERRUPT -2 79 80 #define PHY_IS_INTERNAL 0x00000001 81 #define PHY_RST_AFTER_CLK_EN 0x00000002 82 #define PHY_POLL_CABLE_TEST 0x00000004 83 #define MDIO_DEVICE_IS_PHY 0x80000000 84 85 /** 86 * enum phy_interface_t - Interface Mode definitions 87 * 88 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 89 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 90 * @PHY_INTERFACE_MODE_MII: Media-independent interface 91 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 92 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 93 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 94 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 95 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 96 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 97 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 98 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 99 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 100 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 101 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 102 * @PHY_INTERFACE_MODE_SMII: Serial MII 103 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 104 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 105 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 106 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 107 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 108 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 109 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 110 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 111 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 112 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 113 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 114 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 115 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 116 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 117 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 118 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 119 * @PHY_INTERFACE_MODE_MAX: Book keeping 120 * 121 * Describes the interface between the MAC and PHY. 122 */ 123 typedef enum { 124 PHY_INTERFACE_MODE_NA, 125 PHY_INTERFACE_MODE_INTERNAL, 126 PHY_INTERFACE_MODE_MII, 127 PHY_INTERFACE_MODE_GMII, 128 PHY_INTERFACE_MODE_SGMII, 129 PHY_INTERFACE_MODE_TBI, 130 PHY_INTERFACE_MODE_REVMII, 131 PHY_INTERFACE_MODE_RMII, 132 PHY_INTERFACE_MODE_REVRMII, 133 PHY_INTERFACE_MODE_RGMII, 134 PHY_INTERFACE_MODE_RGMII_ID, 135 PHY_INTERFACE_MODE_RGMII_RXID, 136 PHY_INTERFACE_MODE_RGMII_TXID, 137 PHY_INTERFACE_MODE_RTBI, 138 PHY_INTERFACE_MODE_SMII, 139 PHY_INTERFACE_MODE_XGMII, 140 PHY_INTERFACE_MODE_XLGMII, 141 PHY_INTERFACE_MODE_MOCA, 142 PHY_INTERFACE_MODE_QSGMII, 143 PHY_INTERFACE_MODE_TRGMII, 144 PHY_INTERFACE_MODE_100BASEX, 145 PHY_INTERFACE_MODE_1000BASEX, 146 PHY_INTERFACE_MODE_2500BASEX, 147 PHY_INTERFACE_MODE_5GBASER, 148 PHY_INTERFACE_MODE_RXAUI, 149 PHY_INTERFACE_MODE_XAUI, 150 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 151 PHY_INTERFACE_MODE_10GBASER, 152 PHY_INTERFACE_MODE_25GBASER, 153 PHY_INTERFACE_MODE_USXGMII, 154 /* 10GBASE-KR - with Clause 73 AN */ 155 PHY_INTERFACE_MODE_10GKR, 156 PHY_INTERFACE_MODE_QUSGMII, 157 PHY_INTERFACE_MODE_MAX, 158 } phy_interface_t; 159 160 /* PHY interface mode bitmap handling */ 161 #define DECLARE_PHY_INTERFACE_MASK(name) \ 162 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 163 164 static inline void phy_interface_zero(unsigned long *intf) 165 { 166 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 167 } 168 169 static inline bool phy_interface_empty(const unsigned long *intf) 170 { 171 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 172 } 173 174 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 175 const unsigned long *b) 176 { 177 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 178 } 179 180 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 181 const unsigned long *b) 182 { 183 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 184 } 185 186 static inline void phy_interface_set_rgmii(unsigned long *intf) 187 { 188 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 189 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 190 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 191 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 192 } 193 194 /* 195 * phy_supported_speeds - return all speeds currently supported by a PHY device 196 */ 197 unsigned int phy_supported_speeds(struct phy_device *phy, 198 unsigned int *speeds, 199 unsigned int size); 200 201 /** 202 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 203 * @interface: enum phy_interface_t value 204 * 205 * Description: maps enum &phy_interface_t defined in this file 206 * into the device tree binding of 'phy-mode', so that Ethernet 207 * device driver can get PHY interface from device tree. 208 */ 209 static inline const char *phy_modes(phy_interface_t interface) 210 { 211 switch (interface) { 212 case PHY_INTERFACE_MODE_NA: 213 return ""; 214 case PHY_INTERFACE_MODE_INTERNAL: 215 return "internal"; 216 case PHY_INTERFACE_MODE_MII: 217 return "mii"; 218 case PHY_INTERFACE_MODE_GMII: 219 return "gmii"; 220 case PHY_INTERFACE_MODE_SGMII: 221 return "sgmii"; 222 case PHY_INTERFACE_MODE_TBI: 223 return "tbi"; 224 case PHY_INTERFACE_MODE_REVMII: 225 return "rev-mii"; 226 case PHY_INTERFACE_MODE_RMII: 227 return "rmii"; 228 case PHY_INTERFACE_MODE_REVRMII: 229 return "rev-rmii"; 230 case PHY_INTERFACE_MODE_RGMII: 231 return "rgmii"; 232 case PHY_INTERFACE_MODE_RGMII_ID: 233 return "rgmii-id"; 234 case PHY_INTERFACE_MODE_RGMII_RXID: 235 return "rgmii-rxid"; 236 case PHY_INTERFACE_MODE_RGMII_TXID: 237 return "rgmii-txid"; 238 case PHY_INTERFACE_MODE_RTBI: 239 return "rtbi"; 240 case PHY_INTERFACE_MODE_SMII: 241 return "smii"; 242 case PHY_INTERFACE_MODE_XGMII: 243 return "xgmii"; 244 case PHY_INTERFACE_MODE_XLGMII: 245 return "xlgmii"; 246 case PHY_INTERFACE_MODE_MOCA: 247 return "moca"; 248 case PHY_INTERFACE_MODE_QSGMII: 249 return "qsgmii"; 250 case PHY_INTERFACE_MODE_TRGMII: 251 return "trgmii"; 252 case PHY_INTERFACE_MODE_1000BASEX: 253 return "1000base-x"; 254 case PHY_INTERFACE_MODE_2500BASEX: 255 return "2500base-x"; 256 case PHY_INTERFACE_MODE_5GBASER: 257 return "5gbase-r"; 258 case PHY_INTERFACE_MODE_RXAUI: 259 return "rxaui"; 260 case PHY_INTERFACE_MODE_XAUI: 261 return "xaui"; 262 case PHY_INTERFACE_MODE_10GBASER: 263 return "10gbase-r"; 264 case PHY_INTERFACE_MODE_25GBASER: 265 return "25gbase-r"; 266 case PHY_INTERFACE_MODE_USXGMII: 267 return "usxgmii"; 268 case PHY_INTERFACE_MODE_10GKR: 269 return "10gbase-kr"; 270 case PHY_INTERFACE_MODE_100BASEX: 271 return "100base-x"; 272 case PHY_INTERFACE_MODE_QUSGMII: 273 return "qusgmii"; 274 default: 275 return "unknown"; 276 } 277 } 278 279 280 #define PHY_INIT_TIMEOUT 100000 281 #define PHY_FORCE_TIMEOUT 10 282 283 #define PHY_MAX_ADDR 32 284 285 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 286 #define PHY_ID_FMT "%s:%02x" 287 288 #define MII_BUS_ID_SIZE 61 289 290 struct device; 291 struct phylink; 292 struct sfp_bus; 293 struct sfp_upstream_ops; 294 struct sk_buff; 295 296 /** 297 * struct mdio_bus_stats - Statistics counters for MDIO busses 298 * @transfers: Total number of transfers, i.e. @writes + @reads 299 * @errors: Number of MDIO transfers that returned an error 300 * @writes: Number of write transfers 301 * @reads: Number of read transfers 302 * @syncp: Synchronisation for incrementing statistics 303 */ 304 struct mdio_bus_stats { 305 u64_stats_t transfers; 306 u64_stats_t errors; 307 u64_stats_t writes; 308 u64_stats_t reads; 309 /* Must be last, add new statistics above */ 310 struct u64_stats_sync syncp; 311 }; 312 313 /** 314 * struct phy_package_shared - Shared information in PHY packages 315 * @addr: Common PHY address used to combine PHYs in one package 316 * @refcnt: Number of PHYs connected to this shared data 317 * @flags: Initialization of PHY package 318 * @priv_size: Size of the shared private data @priv 319 * @priv: Driver private data shared across a PHY package 320 * 321 * Represents a shared structure between different phydev's in the same 322 * package, for example a quad PHY. See phy_package_join() and 323 * phy_package_leave(). 324 */ 325 struct phy_package_shared { 326 int addr; 327 refcount_t refcnt; 328 unsigned long flags; 329 size_t priv_size; 330 331 /* private data pointer */ 332 /* note that this pointer is shared between different phydevs and 333 * the user has to take care of appropriate locking. It is allocated 334 * and freed automatically by phy_package_join() and 335 * phy_package_leave(). 336 */ 337 void *priv; 338 }; 339 340 /* used as bit number in atomic bitops */ 341 #define PHY_SHARED_F_INIT_DONE 0 342 #define PHY_SHARED_F_PROBE_DONE 1 343 344 /** 345 * struct mii_bus - Represents an MDIO bus 346 * 347 * @owner: Who owns this device 348 * @name: User friendly name for this MDIO device, or driver name 349 * @id: Unique identifier for this bus, typical from bus hierarchy 350 * @priv: Driver private data 351 * 352 * The Bus class for PHYs. Devices which provide access to 353 * PHYs should register using this structure 354 */ 355 struct mii_bus { 356 struct module *owner; 357 const char *name; 358 char id[MII_BUS_ID_SIZE]; 359 void *priv; 360 /** @read: Perform a read transfer on the bus */ 361 int (*read)(struct mii_bus *bus, int addr, int regnum); 362 /** @write: Perform a write transfer on the bus */ 363 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 364 /** @reset: Perform a reset of the bus */ 365 int (*reset)(struct mii_bus *bus); 366 367 /** @stats: Statistic counters per device on the bus */ 368 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 369 370 /** 371 * @mdio_lock: A lock to ensure that only one thing can read/write 372 * the MDIO bus at a time 373 */ 374 struct mutex mdio_lock; 375 376 /** @parent: Parent device of this bus */ 377 struct device *parent; 378 /** @state: State of bus structure */ 379 enum { 380 MDIOBUS_ALLOCATED = 1, 381 MDIOBUS_REGISTERED, 382 MDIOBUS_UNREGISTERED, 383 MDIOBUS_RELEASED, 384 } state; 385 386 /** @dev: Kernel device representation */ 387 struct device dev; 388 389 /** @mdio_map: list of all MDIO devices on bus */ 390 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 391 392 /** @phy_mask: PHY addresses to be ignored when probing */ 393 u32 phy_mask; 394 395 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 396 u32 phy_ignore_ta_mask; 397 398 /** 399 * @irq: An array of interrupts, each PHY's interrupt at the index 400 * matching its address 401 */ 402 int irq[PHY_MAX_ADDR]; 403 404 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 405 int reset_delay_us; 406 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 407 int reset_post_delay_us; 408 /** @reset_gpiod: Reset GPIO descriptor pointer */ 409 struct gpio_desc *reset_gpiod; 410 411 /** @probe_capabilities: bus capabilities, used for probing */ 412 enum { 413 MDIOBUS_NO_CAP = 0, 414 MDIOBUS_C22, 415 MDIOBUS_C45, 416 MDIOBUS_C22_C45, 417 } probe_capabilities; 418 419 /** @shared_lock: protect access to the shared element */ 420 struct mutex shared_lock; 421 422 /** @shared: shared state across different PHYs */ 423 struct phy_package_shared *shared[PHY_MAX_ADDR]; 424 }; 425 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 426 427 struct mii_bus *mdiobus_alloc_size(size_t size); 428 429 /** 430 * mdiobus_alloc - Allocate an MDIO bus structure 431 * 432 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 433 * for the driver to register the bus. 434 */ 435 static inline struct mii_bus *mdiobus_alloc(void) 436 { 437 return mdiobus_alloc_size(0); 438 } 439 440 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 441 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 442 struct module *owner); 443 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 444 #define devm_mdiobus_register(dev, bus) \ 445 __devm_mdiobus_register(dev, bus, THIS_MODULE) 446 447 void mdiobus_unregister(struct mii_bus *bus); 448 void mdiobus_free(struct mii_bus *bus); 449 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 450 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 451 { 452 return devm_mdiobus_alloc_size(dev, 0); 453 } 454 455 struct mii_bus *mdio_find_bus(const char *mdio_name); 456 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); 457 458 #define PHY_INTERRUPT_DISABLED false 459 #define PHY_INTERRUPT_ENABLED true 460 461 /** 462 * enum phy_state - PHY state machine states: 463 * 464 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 465 * should be called if and only if the PHY is in this state, 466 * given that the PHY device exists. 467 * - PHY driver probe function will set the state to @PHY_READY 468 * 469 * @PHY_READY: PHY is ready to send and receive packets, but the 470 * controller is not. By default, PHYs which do not implement 471 * probe will be set to this state by phy_probe(). 472 * - start will set the state to UP 473 * 474 * @PHY_UP: The PHY and attached device are ready to do work. 475 * Interrupts should be started here. 476 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 477 * 478 * @PHY_NOLINK: PHY is up, but not currently plugged in. 479 * - irq or timer will set @PHY_RUNNING if link comes back 480 * - phy_stop moves to @PHY_HALTED 481 * 482 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 483 * and/or receiving packets 484 * - irq or timer will set @PHY_NOLINK if link goes down 485 * - phy_stop moves to @PHY_HALTED 486 * 487 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 488 * is not expected to work, carrier will be indicated as down. PHY will be 489 * poll once per second, or on interrupt for it current state. 490 * Once complete, move to UP to restart the PHY. 491 * - phy_stop aborts the running test and moves to @PHY_HALTED 492 * 493 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or 494 * PHY is in an error state. 495 * - phy_start moves to @PHY_UP 496 */ 497 enum phy_state { 498 PHY_DOWN = 0, 499 PHY_READY, 500 PHY_HALTED, 501 PHY_UP, 502 PHY_RUNNING, 503 PHY_NOLINK, 504 PHY_CABLETEST, 505 }; 506 507 #define MDIO_MMD_NUM 32 508 509 /** 510 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 511 * @devices_in_package: IEEE 802.3 devices in package register value. 512 * @mmds_present: bit vector of MMDs present. 513 * @device_ids: The device identifer for each present device. 514 */ 515 struct phy_c45_device_ids { 516 u32 devices_in_package; 517 u32 mmds_present; 518 u32 device_ids[MDIO_MMD_NUM]; 519 }; 520 521 struct macsec_context; 522 struct macsec_ops; 523 524 /** 525 * struct phy_device - An instance of a PHY 526 * 527 * @mdio: MDIO bus this PHY is on 528 * @drv: Pointer to the driver for this PHY instance 529 * @phy_id: UID for this device found during discovery 530 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 531 * @is_c45: Set to true if this PHY uses clause 45 addressing. 532 * @is_internal: Set to true if this PHY is internal to a MAC. 533 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 534 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 535 * @has_fixups: Set to true if this PHY has fixups/quirks. 536 * @suspended: Set to true if this PHY has been suspended successfully. 537 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 538 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 539 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 540 * @downshifted_rate: Set true if link speed has been downshifted. 541 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 542 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 543 * @state: State of the PHY for management purposes 544 * @dev_flags: Device-specific flags used by the PHY driver. 545 * 546 * - Bits [15:0] are free to use by the PHY driver to communicate 547 * driver specific behavior. 548 * - Bits [23:16] are currently reserved for future use. 549 * - Bits [31:24] are reserved for defining generic 550 * PHY driver behavior. 551 * @irq: IRQ number of the PHY's interrupt (-1 if none) 552 * @phy_timer: The timer for handling the state machine 553 * @phylink: Pointer to phylink instance for this PHY 554 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 555 * @sfp_bus: SFP bus attached to this PHY's fiber port 556 * @attached_dev: The attached enet driver's device instance ptr 557 * @adjust_link: Callback for the enet controller to respond to changes: in the 558 * link state. 559 * @phy_link_change: Callback for phylink for notification of link change 560 * @macsec_ops: MACsec offloading ops. 561 * 562 * @speed: Current link speed 563 * @duplex: Current duplex 564 * @port: Current port 565 * @pause: Current pause 566 * @asym_pause: Current asymmetric pause 567 * @supported: Combined MAC/PHY supported linkmodes 568 * @advertising: Currently advertised linkmodes 569 * @adv_old: Saved advertised while power saving for WoL 570 * @lp_advertising: Current link partner advertised linkmodes 571 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 572 * @autoneg: Flag autoneg being used 573 * @link: Current link state 574 * @autoneg_complete: Flag auto negotiation of the link has completed 575 * @mdix: Current crossover 576 * @mdix_ctrl: User setting of crossover 577 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 578 * @interrupts: Flag interrupts have been enabled 579 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 580 * handling shall be postponed until PHY has resumed 581 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 582 * requiring a rerun of the interrupt handler after resume 583 * @interface: enum phy_interface_t value 584 * @skb: Netlink message for cable diagnostics 585 * @nest: Netlink nest used for cable diagnostics 586 * @ehdr: nNtlink header for cable diagnostics 587 * @phy_led_triggers: Array of LED triggers 588 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 589 * @led_link_trigger: LED trigger for link up/down 590 * @last_triggered: last LED trigger for link speed 591 * @master_slave_set: User requested master/slave configuration 592 * @master_slave_get: Current master/slave advertisement 593 * @master_slave_state: Current master/slave configuration 594 * @mii_ts: Pointer to time stamper callbacks 595 * @lock: Mutex for serialization access to PHY 596 * @state_queue: Work queue for state machine 597 * @shared: Pointer to private data shared by phys in one package 598 * @priv: Pointer to driver private data 599 * 600 * interrupts currently only supports enabled or disabled, 601 * but could be changed in the future to support enabling 602 * and disabling specific interrupts 603 * 604 * Contains some infrastructure for polling and interrupt 605 * handling, as well as handling shifts in PHY hardware state 606 */ 607 struct phy_device { 608 struct mdio_device mdio; 609 610 /* Information about the PHY type */ 611 /* And management functions */ 612 struct phy_driver *drv; 613 614 u32 phy_id; 615 616 struct phy_c45_device_ids c45_ids; 617 unsigned is_c45:1; 618 unsigned is_internal:1; 619 unsigned is_pseudo_fixed_link:1; 620 unsigned is_gigabit_capable:1; 621 unsigned has_fixups:1; 622 unsigned suspended:1; 623 unsigned suspended_by_mdio_bus:1; 624 unsigned sysfs_links:1; 625 unsigned loopback_enabled:1; 626 unsigned downshifted_rate:1; 627 unsigned is_on_sfp_module:1; 628 unsigned mac_managed_pm:1; 629 630 unsigned autoneg:1; 631 /* The most recently read link state */ 632 unsigned link:1; 633 unsigned autoneg_complete:1; 634 635 /* Interrupts are enabled */ 636 unsigned interrupts:1; 637 unsigned irq_suspended:1; 638 unsigned irq_rerun:1; 639 640 enum phy_state state; 641 642 u32 dev_flags; 643 644 phy_interface_t interface; 645 646 /* 647 * forced speed & duplex (no autoneg) 648 * partner speed & duplex & pause (autoneg) 649 */ 650 int speed; 651 int duplex; 652 int port; 653 int pause; 654 int asym_pause; 655 u8 master_slave_get; 656 u8 master_slave_set; 657 u8 master_slave_state; 658 659 /* Union of PHY and Attached devices' supported link modes */ 660 /* See ethtool.h for more info */ 661 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 662 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 663 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 664 /* used with phy_speed_down */ 665 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 666 667 /* Energy efficient ethernet modes which should be prohibited */ 668 u32 eee_broken_modes; 669 670 #ifdef CONFIG_LED_TRIGGER_PHY 671 struct phy_led_trigger *phy_led_triggers; 672 unsigned int phy_num_led_triggers; 673 struct phy_led_trigger *last_triggered; 674 675 struct phy_led_trigger *led_link_trigger; 676 #endif 677 678 /* 679 * Interrupt number for this PHY 680 * -1 means no interrupt 681 */ 682 int irq; 683 684 /* private data pointer */ 685 /* For use by PHYs to maintain extra state */ 686 void *priv; 687 688 /* shared data pointer */ 689 /* For use by PHYs inside the same package that need a shared state. */ 690 struct phy_package_shared *shared; 691 692 /* Reporting cable test results */ 693 struct sk_buff *skb; 694 void *ehdr; 695 struct nlattr *nest; 696 697 /* Interrupt and Polling infrastructure */ 698 struct delayed_work state_queue; 699 700 struct mutex lock; 701 702 /* This may be modified under the rtnl lock */ 703 bool sfp_bus_attached; 704 struct sfp_bus *sfp_bus; 705 struct phylink *phylink; 706 struct net_device *attached_dev; 707 struct mii_timestamper *mii_ts; 708 709 u8 mdix; 710 u8 mdix_ctrl; 711 712 int pma_extable; 713 714 void (*phy_link_change)(struct phy_device *phydev, bool up); 715 void (*adjust_link)(struct net_device *dev); 716 717 #if IS_ENABLED(CONFIG_MACSEC) 718 /* MACsec management functions */ 719 const struct macsec_ops *macsec_ops; 720 #endif 721 }; 722 723 static inline struct phy_device *to_phy_device(const struct device *dev) 724 { 725 return container_of(to_mdio_device(dev), struct phy_device, mdio); 726 } 727 728 /** 729 * struct phy_tdr_config - Configuration of a TDR raw test 730 * 731 * @first: Distance for first data collection point 732 * @last: Distance for last data collection point 733 * @step: Step between data collection points 734 * @pair: Bitmap of cable pairs to collect data for 735 * 736 * A structure containing possible configuration parameters 737 * for a TDR cable test. The driver does not need to implement 738 * all the parameters, but should report what is actually used. 739 * All distances are in centimeters. 740 */ 741 struct phy_tdr_config { 742 u32 first; 743 u32 last; 744 u32 step; 745 s8 pair; 746 }; 747 #define PHY_PAIR_ALL -1 748 749 /** 750 * struct phy_driver - Driver structure for a particular PHY type 751 * 752 * @mdiodrv: Data common to all MDIO devices 753 * @phy_id: The result of reading the UID registers of this PHY 754 * type, and ANDing them with the phy_id_mask. This driver 755 * only works for PHYs with IDs which match this field 756 * @name: The friendly name of this PHY type 757 * @phy_id_mask: Defines the important bits of the phy_id 758 * @features: A mandatory list of features (speed, duplex, etc) 759 * supported by this PHY 760 * @flags: A bitfield defining certain other features this PHY 761 * supports (like interrupts) 762 * @driver_data: Static driver data 763 * 764 * All functions are optional. If config_aneg or read_status 765 * are not implemented, the phy core uses the genphy versions. 766 * Note that none of these functions should be called from 767 * interrupt time. The goal is for the bus read/write functions 768 * to be able to block when the bus transaction is happening, 769 * and be freed up by an interrupt (The MPC85xx has this ability, 770 * though it is not currently supported in the driver). 771 */ 772 struct phy_driver { 773 struct mdio_driver_common mdiodrv; 774 u32 phy_id; 775 char *name; 776 u32 phy_id_mask; 777 const unsigned long * const features; 778 u32 flags; 779 const void *driver_data; 780 781 /** 782 * @soft_reset: Called to issue a PHY software reset 783 */ 784 int (*soft_reset)(struct phy_device *phydev); 785 786 /** 787 * @config_init: Called to initialize the PHY, 788 * including after a reset 789 */ 790 int (*config_init)(struct phy_device *phydev); 791 792 /** 793 * @probe: Called during discovery. Used to set 794 * up device-specific structures, if any 795 */ 796 int (*probe)(struct phy_device *phydev); 797 798 /** 799 * @get_features: Probe the hardware to determine what 800 * abilities it has. Should only set phydev->supported. 801 */ 802 int (*get_features)(struct phy_device *phydev); 803 804 /* PHY Power Management */ 805 /** @suspend: Suspend the hardware, saving state if needed */ 806 int (*suspend)(struct phy_device *phydev); 807 /** @resume: Resume the hardware, restoring state if needed */ 808 int (*resume)(struct phy_device *phydev); 809 810 /** 811 * @config_aneg: Configures the advertisement and resets 812 * autonegotiation if phydev->autoneg is on, 813 * forces the speed to the current settings in phydev 814 * if phydev->autoneg is off 815 */ 816 int (*config_aneg)(struct phy_device *phydev); 817 818 /** @aneg_done: Determines the auto negotiation result */ 819 int (*aneg_done)(struct phy_device *phydev); 820 821 /** @read_status: Determines the negotiated speed and duplex */ 822 int (*read_status)(struct phy_device *phydev); 823 824 /** 825 * @config_intr: Enables or disables interrupts. 826 * It should also clear any pending interrupts prior to enabling the 827 * IRQs and after disabling them. 828 */ 829 int (*config_intr)(struct phy_device *phydev); 830 831 /** @handle_interrupt: Override default interrupt handling */ 832 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 833 834 /** @remove: Clears up any memory if needed */ 835 void (*remove)(struct phy_device *phydev); 836 837 /** 838 * @match_phy_device: Returns true if this is a suitable 839 * driver for the given phydev. If NULL, matching is based on 840 * phy_id and phy_id_mask. 841 */ 842 int (*match_phy_device)(struct phy_device *phydev); 843 844 /** 845 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 846 * register changes to enable Wake on LAN, so set_wol is 847 * provided to be called in the ethernet driver's set_wol 848 * function. 849 */ 850 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 851 852 /** 853 * @get_wol: See set_wol, but for checking whether Wake on LAN 854 * is enabled. 855 */ 856 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 857 858 /** 859 * @link_change_notify: Called to inform a PHY device driver 860 * when the core is about to change the link state. This 861 * callback is supposed to be used as fixup hook for drivers 862 * that need to take action when the link state 863 * changes. Drivers are by no means allowed to mess with the 864 * PHY device structure in their implementations. 865 */ 866 void (*link_change_notify)(struct phy_device *dev); 867 868 /** 869 * @read_mmd: PHY specific driver override for reading a MMD 870 * register. This function is optional for PHY specific 871 * drivers. When not provided, the default MMD read function 872 * will be used by phy_read_mmd(), which will use either a 873 * direct read for Clause 45 PHYs or an indirect read for 874 * Clause 22 PHYs. devnum is the MMD device number within the 875 * PHY device, regnum is the register within the selected MMD 876 * device. 877 */ 878 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 879 880 /** 881 * @write_mmd: PHY specific driver override for writing a MMD 882 * register. This function is optional for PHY specific 883 * drivers. When not provided, the default MMD write function 884 * will be used by phy_write_mmd(), which will use either a 885 * direct write for Clause 45 PHYs, or an indirect write for 886 * Clause 22 PHYs. devnum is the MMD device number within the 887 * PHY device, regnum is the register within the selected MMD 888 * device. val is the value to be written. 889 */ 890 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 891 u16 val); 892 893 /** @read_page: Return the current PHY register page number */ 894 int (*read_page)(struct phy_device *dev); 895 /** @write_page: Set the current PHY register page number */ 896 int (*write_page)(struct phy_device *dev, int page); 897 898 /** 899 * @module_info: Get the size and type of the eeprom contained 900 * within a plug-in module 901 */ 902 int (*module_info)(struct phy_device *dev, 903 struct ethtool_modinfo *modinfo); 904 905 /** 906 * @module_eeprom: Get the eeprom information from the plug-in 907 * module 908 */ 909 int (*module_eeprom)(struct phy_device *dev, 910 struct ethtool_eeprom *ee, u8 *data); 911 912 /** @cable_test_start: Start a cable test */ 913 int (*cable_test_start)(struct phy_device *dev); 914 915 /** @cable_test_tdr_start: Start a raw TDR cable test */ 916 int (*cable_test_tdr_start)(struct phy_device *dev, 917 const struct phy_tdr_config *config); 918 919 /** 920 * @cable_test_get_status: Once per second, or on interrupt, 921 * request the status of the test. 922 */ 923 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 924 925 /* Get statistics from the PHY using ethtool */ 926 /** @get_sset_count: Number of statistic counters */ 927 int (*get_sset_count)(struct phy_device *dev); 928 /** @get_strings: Names of the statistic counters */ 929 void (*get_strings)(struct phy_device *dev, u8 *data); 930 /** @get_stats: Return the statistic counter values */ 931 void (*get_stats)(struct phy_device *dev, 932 struct ethtool_stats *stats, u64 *data); 933 934 /* Get and Set PHY tunables */ 935 /** @get_tunable: Return the value of a tunable */ 936 int (*get_tunable)(struct phy_device *dev, 937 struct ethtool_tunable *tuna, void *data); 938 /** @set_tunable: Set the value of a tunable */ 939 int (*set_tunable)(struct phy_device *dev, 940 struct ethtool_tunable *tuna, 941 const void *data); 942 /** @set_loopback: Set the loopback mood of the PHY */ 943 int (*set_loopback)(struct phy_device *dev, bool enable); 944 /** @get_sqi: Get the signal quality indication */ 945 int (*get_sqi)(struct phy_device *dev); 946 /** @get_sqi_max: Get the maximum signal quality indication */ 947 int (*get_sqi_max)(struct phy_device *dev); 948 }; 949 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 950 struct phy_driver, mdiodrv) 951 952 #define PHY_ANY_ID "MATCH ANY PHY" 953 #define PHY_ANY_UID 0xffffffff 954 955 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 956 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 957 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 958 959 /* A Structure for boards to register fixups with the PHY Lib */ 960 struct phy_fixup { 961 struct list_head list; 962 char bus_id[MII_BUS_ID_SIZE + 3]; 963 u32 phy_uid; 964 u32 phy_uid_mask; 965 int (*run)(struct phy_device *phydev); 966 }; 967 968 const char *phy_speed_to_str(int speed); 969 const char *phy_duplex_to_str(unsigned int duplex); 970 971 int phy_interface_num_ports(phy_interface_t interface); 972 973 /* A structure for mapping a particular speed and duplex 974 * combination to a particular SUPPORTED and ADVERTISED value 975 */ 976 struct phy_setting { 977 u32 speed; 978 u8 duplex; 979 u8 bit; 980 }; 981 982 const struct phy_setting * 983 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 984 bool exact); 985 size_t phy_speeds(unsigned int *speeds, size_t size, 986 unsigned long *mask); 987 void of_set_phy_supported(struct phy_device *phydev); 988 void of_set_phy_eee_broken(struct phy_device *phydev); 989 int phy_speed_down_core(struct phy_device *phydev); 990 991 /** 992 * phy_is_started - Convenience function to check whether PHY is started 993 * @phydev: The phy_device struct 994 */ 995 static inline bool phy_is_started(struct phy_device *phydev) 996 { 997 return phydev->state >= PHY_UP; 998 } 999 1000 void phy_resolve_aneg_pause(struct phy_device *phydev); 1001 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1002 void phy_check_downshift(struct phy_device *phydev); 1003 1004 /** 1005 * phy_read - Convenience function for reading a given PHY register 1006 * @phydev: the phy_device struct 1007 * @regnum: register number to read 1008 * 1009 * NOTE: MUST NOT be called from interrupt context, 1010 * because the bus read/write functions may wait for an interrupt 1011 * to conclude the operation. 1012 */ 1013 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1014 { 1015 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1016 } 1017 1018 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1019 timeout_us, sleep_before_read) \ 1020 ({ \ 1021 int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \ 1022 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1023 if (val < 0) \ 1024 __ret = val; \ 1025 if (__ret) \ 1026 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1027 __ret; \ 1028 }) 1029 1030 1031 /** 1032 * __phy_read - convenience function for reading a given PHY register 1033 * @phydev: the phy_device struct 1034 * @regnum: register number to read 1035 * 1036 * The caller must have taken the MDIO bus lock. 1037 */ 1038 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1039 { 1040 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1041 } 1042 1043 /** 1044 * phy_write - Convenience function for writing a given PHY register 1045 * @phydev: the phy_device struct 1046 * @regnum: register number to write 1047 * @val: value to write to @regnum 1048 * 1049 * NOTE: MUST NOT be called from interrupt context, 1050 * because the bus read/write functions may wait for an interrupt 1051 * to conclude the operation. 1052 */ 1053 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1054 { 1055 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1056 } 1057 1058 /** 1059 * __phy_write - Convenience function for writing a given PHY register 1060 * @phydev: the phy_device struct 1061 * @regnum: register number to write 1062 * @val: value to write to @regnum 1063 * 1064 * The caller must have taken the MDIO bus lock. 1065 */ 1066 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1067 { 1068 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1069 val); 1070 } 1071 1072 /** 1073 * __phy_modify_changed() - Convenience function for modifying a PHY register 1074 * @phydev: a pointer to a &struct phy_device 1075 * @regnum: register number 1076 * @mask: bit mask of bits to clear 1077 * @set: bit mask of bits to set 1078 * 1079 * Unlocked helper function which allows a PHY register to be modified as 1080 * new register value = (old register value & ~mask) | set 1081 * 1082 * Returns negative errno, 0 if there was no change, and 1 in case of change 1083 */ 1084 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1085 u16 mask, u16 set) 1086 { 1087 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1088 regnum, mask, set); 1089 } 1090 1091 /* 1092 * phy_read_mmd - Convenience function for reading a register 1093 * from an MMD on a given PHY. 1094 */ 1095 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1096 1097 /** 1098 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1099 * condition is met or a timeout occurs 1100 * 1101 * @phydev: The phy_device struct 1102 * @devaddr: The MMD to read from 1103 * @regnum: The register on the MMD to read 1104 * @val: Variable to read the register into 1105 * @cond: Break condition (usually involving @val) 1106 * @sleep_us: Maximum time to sleep between reads in us (0 1107 * tight-loops). Should be less than ~20ms since usleep_range 1108 * is used (see Documentation/timers/timers-howto.rst). 1109 * @timeout_us: Timeout in us, 0 means never timeout 1110 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1111 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either 1112 * case, the last read value at @args is stored in @val. Must not 1113 * be called from atomic context if sleep_us or timeout_us are used. 1114 */ 1115 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1116 sleep_us, timeout_us, sleep_before_read) \ 1117 ({ \ 1118 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \ 1119 sleep_us, timeout_us, sleep_before_read, \ 1120 phydev, devaddr, regnum); \ 1121 if (val < 0) \ 1122 __ret = val; \ 1123 if (__ret) \ 1124 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1125 __ret; \ 1126 }) 1127 1128 /* 1129 * __phy_read_mmd - Convenience function for reading a register 1130 * from an MMD on a given PHY. 1131 */ 1132 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1133 1134 /* 1135 * phy_write_mmd - Convenience function for writing a register 1136 * on an MMD on a given PHY. 1137 */ 1138 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1139 1140 /* 1141 * __phy_write_mmd - Convenience function for writing a register 1142 * on an MMD on a given PHY. 1143 */ 1144 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1145 1146 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1147 u16 set); 1148 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1149 u16 set); 1150 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1151 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1152 1153 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1154 u16 mask, u16 set); 1155 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1156 u16 mask, u16 set); 1157 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1158 u16 mask, u16 set); 1159 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1160 u16 mask, u16 set); 1161 1162 /** 1163 * __phy_set_bits - Convenience function for setting bits in a PHY register 1164 * @phydev: the phy_device struct 1165 * @regnum: register number to write 1166 * @val: bits to set 1167 * 1168 * The caller must have taken the MDIO bus lock. 1169 */ 1170 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1171 { 1172 return __phy_modify(phydev, regnum, 0, val); 1173 } 1174 1175 /** 1176 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1177 * @phydev: the phy_device struct 1178 * @regnum: register number to write 1179 * @val: bits to clear 1180 * 1181 * The caller must have taken the MDIO bus lock. 1182 */ 1183 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1184 u16 val) 1185 { 1186 return __phy_modify(phydev, regnum, val, 0); 1187 } 1188 1189 /** 1190 * phy_set_bits - Convenience function for setting bits in a PHY register 1191 * @phydev: the phy_device struct 1192 * @regnum: register number to write 1193 * @val: bits to set 1194 */ 1195 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1196 { 1197 return phy_modify(phydev, regnum, 0, val); 1198 } 1199 1200 /** 1201 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1202 * @phydev: the phy_device struct 1203 * @regnum: register number to write 1204 * @val: bits to clear 1205 */ 1206 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1207 { 1208 return phy_modify(phydev, regnum, val, 0); 1209 } 1210 1211 /** 1212 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1213 * on MMD 1214 * @phydev: the phy_device struct 1215 * @devad: the MMD containing register to modify 1216 * @regnum: register number to modify 1217 * @val: bits to set 1218 * 1219 * The caller must have taken the MDIO bus lock. 1220 */ 1221 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1222 u32 regnum, u16 val) 1223 { 1224 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1225 } 1226 1227 /** 1228 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1229 * on MMD 1230 * @phydev: the phy_device struct 1231 * @devad: the MMD containing register to modify 1232 * @regnum: register number to modify 1233 * @val: bits to clear 1234 * 1235 * The caller must have taken the MDIO bus lock. 1236 */ 1237 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1238 u32 regnum, u16 val) 1239 { 1240 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1241 } 1242 1243 /** 1244 * phy_set_bits_mmd - Convenience function for setting bits in a register 1245 * on MMD 1246 * @phydev: the phy_device struct 1247 * @devad: the MMD containing register to modify 1248 * @regnum: register number to modify 1249 * @val: bits to set 1250 */ 1251 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1252 u32 regnum, u16 val) 1253 { 1254 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1255 } 1256 1257 /** 1258 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1259 * on MMD 1260 * @phydev: the phy_device struct 1261 * @devad: the MMD containing register to modify 1262 * @regnum: register number to modify 1263 * @val: bits to clear 1264 */ 1265 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1266 u32 regnum, u16 val) 1267 { 1268 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1269 } 1270 1271 /** 1272 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1273 * @phydev: the phy_device struct 1274 * 1275 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1276 * PHY_MAC_INTERRUPT 1277 */ 1278 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1279 { 1280 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1281 } 1282 1283 /** 1284 * phy_polling_mode - Convenience function for testing whether polling is 1285 * used to detect PHY status changes 1286 * @phydev: the phy_device struct 1287 */ 1288 static inline bool phy_polling_mode(struct phy_device *phydev) 1289 { 1290 if (phydev->state == PHY_CABLETEST) 1291 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1292 return true; 1293 1294 return phydev->irq == PHY_POLL; 1295 } 1296 1297 /** 1298 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1299 * @phydev: the phy_device struct 1300 */ 1301 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1302 { 1303 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1304 } 1305 1306 /** 1307 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1308 * @phydev: the phy_device struct 1309 */ 1310 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1311 { 1312 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1313 } 1314 1315 /** 1316 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1317 * PTP hardware clock capabilities. 1318 * @phydev: the phy_device struct 1319 */ 1320 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1321 { 1322 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1323 } 1324 1325 /** 1326 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1327 * @phydev: the phy_device struct 1328 */ 1329 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1330 { 1331 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1332 } 1333 1334 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) 1335 { 1336 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); 1337 } 1338 1339 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1340 int type) 1341 { 1342 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1343 } 1344 1345 static inline int phy_ts_info(struct phy_device *phydev, 1346 struct ethtool_ts_info *tsinfo) 1347 { 1348 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1349 } 1350 1351 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1352 int type) 1353 { 1354 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1355 } 1356 1357 /** 1358 * phy_is_internal - Convenience function for testing if a PHY is internal 1359 * @phydev: the phy_device struct 1360 */ 1361 static inline bool phy_is_internal(struct phy_device *phydev) 1362 { 1363 return phydev->is_internal; 1364 } 1365 1366 /** 1367 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1368 * @phydev: the phy_device struct 1369 */ 1370 static inline bool phy_on_sfp(struct phy_device *phydev) 1371 { 1372 return phydev->is_on_sfp_module; 1373 } 1374 1375 /** 1376 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1377 * PHY interface mode is RGMII (all variants) 1378 * @mode: the &phy_interface_t enum 1379 */ 1380 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1381 { 1382 return mode >= PHY_INTERFACE_MODE_RGMII && 1383 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1384 }; 1385 1386 /** 1387 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1388 * negotiation 1389 * @mode: one of &enum phy_interface_t 1390 * 1391 * Returns true if the PHY interface mode uses the 16-bit negotiation 1392 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1393 */ 1394 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1395 { 1396 return mode == PHY_INTERFACE_MODE_1000BASEX || 1397 mode == PHY_INTERFACE_MODE_2500BASEX; 1398 } 1399 1400 /** 1401 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1402 * is RGMII (all variants) 1403 * @phydev: the phy_device struct 1404 */ 1405 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1406 { 1407 return phy_interface_mode_is_rgmii(phydev->interface); 1408 }; 1409 1410 /** 1411 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1412 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1413 * @phydev: the phy_device struct 1414 */ 1415 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1416 { 1417 return phydev->is_pseudo_fixed_link; 1418 } 1419 1420 int phy_save_page(struct phy_device *phydev); 1421 int phy_select_page(struct phy_device *phydev, int page); 1422 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1423 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1424 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1425 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1426 u16 mask, u16 set); 1427 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1428 u16 mask, u16 set); 1429 1430 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1431 bool is_c45, 1432 struct phy_c45_device_ids *c45_ids); 1433 #if IS_ENABLED(CONFIG_PHYLIB) 1434 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1435 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1436 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1437 struct phy_device *device_phy_find_device(struct device *dev); 1438 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode); 1439 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1440 int phy_device_register(struct phy_device *phy); 1441 void phy_device_free(struct phy_device *phydev); 1442 #else 1443 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1444 { 1445 return 0; 1446 } 1447 static inline 1448 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1449 { 1450 return 0; 1451 } 1452 1453 static inline 1454 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1455 { 1456 return NULL; 1457 } 1458 1459 static inline struct phy_device *device_phy_find_device(struct device *dev) 1460 { 1461 return NULL; 1462 } 1463 1464 static inline 1465 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1466 { 1467 return NULL; 1468 } 1469 1470 static inline 1471 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1472 { 1473 return NULL; 1474 } 1475 1476 static inline int phy_device_register(struct phy_device *phy) 1477 { 1478 return 0; 1479 } 1480 1481 static inline void phy_device_free(struct phy_device *phydev) { } 1482 #endif /* CONFIG_PHYLIB */ 1483 void phy_device_remove(struct phy_device *phydev); 1484 int phy_get_c45_ids(struct phy_device *phydev); 1485 int phy_init_hw(struct phy_device *phydev); 1486 int phy_suspend(struct phy_device *phydev); 1487 int phy_resume(struct phy_device *phydev); 1488 int __phy_resume(struct phy_device *phydev); 1489 int phy_loopback(struct phy_device *phydev, bool enable); 1490 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1491 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1492 int phy_sfp_probe(struct phy_device *phydev, 1493 const struct sfp_upstream_ops *ops); 1494 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1495 phy_interface_t interface); 1496 struct phy_device *phy_find_first(struct mii_bus *bus); 1497 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1498 u32 flags, phy_interface_t interface); 1499 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1500 void (*handler)(struct net_device *), 1501 phy_interface_t interface); 1502 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1503 void (*handler)(struct net_device *), 1504 phy_interface_t interface); 1505 void phy_disconnect(struct phy_device *phydev); 1506 void phy_detach(struct phy_device *phydev); 1507 void phy_start(struct phy_device *phydev); 1508 void phy_stop(struct phy_device *phydev); 1509 int phy_config_aneg(struct phy_device *phydev); 1510 int phy_start_aneg(struct phy_device *phydev); 1511 int phy_aneg_done(struct phy_device *phydev); 1512 int phy_speed_down(struct phy_device *phydev, bool sync); 1513 int phy_speed_up(struct phy_device *phydev); 1514 1515 int phy_restart_aneg(struct phy_device *phydev); 1516 int phy_reset_after_clk_enable(struct phy_device *phydev); 1517 1518 #if IS_ENABLED(CONFIG_PHYLIB) 1519 int phy_start_cable_test(struct phy_device *phydev, 1520 struct netlink_ext_ack *extack); 1521 int phy_start_cable_test_tdr(struct phy_device *phydev, 1522 struct netlink_ext_ack *extack, 1523 const struct phy_tdr_config *config); 1524 #else 1525 static inline 1526 int phy_start_cable_test(struct phy_device *phydev, 1527 struct netlink_ext_ack *extack) 1528 { 1529 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1530 return -EOPNOTSUPP; 1531 } 1532 static inline 1533 int phy_start_cable_test_tdr(struct phy_device *phydev, 1534 struct netlink_ext_ack *extack, 1535 const struct phy_tdr_config *config) 1536 { 1537 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1538 return -EOPNOTSUPP; 1539 } 1540 #endif 1541 1542 int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result); 1543 int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair, 1544 u16 cm); 1545 1546 static inline void phy_device_reset(struct phy_device *phydev, int value) 1547 { 1548 mdio_device_reset(&phydev->mdio, value); 1549 } 1550 1551 #define phydev_err(_phydev, format, args...) \ 1552 dev_err(&_phydev->mdio.dev, format, ##args) 1553 1554 #define phydev_err_probe(_phydev, err, format, args...) \ 1555 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1556 1557 #define phydev_info(_phydev, format, args...) \ 1558 dev_info(&_phydev->mdio.dev, format, ##args) 1559 1560 #define phydev_warn(_phydev, format, args...) \ 1561 dev_warn(&_phydev->mdio.dev, format, ##args) 1562 1563 #define phydev_dbg(_phydev, format, args...) \ 1564 dev_dbg(&_phydev->mdio.dev, format, ##args) 1565 1566 static inline const char *phydev_name(const struct phy_device *phydev) 1567 { 1568 return dev_name(&phydev->mdio.dev); 1569 } 1570 1571 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1572 { 1573 mutex_lock(&phydev->mdio.bus->mdio_lock); 1574 } 1575 1576 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1577 { 1578 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1579 } 1580 1581 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1582 __printf(2, 3); 1583 char *phy_attached_info_irq(struct phy_device *phydev) 1584 __malloc; 1585 void phy_attached_info(struct phy_device *phydev); 1586 1587 /* Clause 22 PHY */ 1588 int genphy_read_abilities(struct phy_device *phydev); 1589 int genphy_setup_forced(struct phy_device *phydev); 1590 int genphy_restart_aneg(struct phy_device *phydev); 1591 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1592 int genphy_config_eee_advert(struct phy_device *phydev); 1593 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1594 int genphy_aneg_done(struct phy_device *phydev); 1595 int genphy_update_link(struct phy_device *phydev); 1596 int genphy_read_lpa(struct phy_device *phydev); 1597 int genphy_read_status_fixed(struct phy_device *phydev); 1598 int genphy_read_status(struct phy_device *phydev); 1599 int genphy_read_master_slave(struct phy_device *phydev); 1600 int genphy_suspend(struct phy_device *phydev); 1601 int genphy_resume(struct phy_device *phydev); 1602 int genphy_loopback(struct phy_device *phydev, bool enable); 1603 int genphy_soft_reset(struct phy_device *phydev); 1604 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1605 1606 static inline int genphy_config_aneg(struct phy_device *phydev) 1607 { 1608 return __genphy_config_aneg(phydev, false); 1609 } 1610 1611 static inline int genphy_no_config_intr(struct phy_device *phydev) 1612 { 1613 return 0; 1614 } 1615 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1616 u16 regnum); 1617 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1618 u16 regnum, u16 val); 1619 1620 /* Clause 37 */ 1621 int genphy_c37_config_aneg(struct phy_device *phydev); 1622 int genphy_c37_read_status(struct phy_device *phydev); 1623 1624 /* Clause 45 PHY */ 1625 int genphy_c45_restart_aneg(struct phy_device *phydev); 1626 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1627 int genphy_c45_aneg_done(struct phy_device *phydev); 1628 int genphy_c45_read_link(struct phy_device *phydev); 1629 int genphy_c45_read_lpa(struct phy_device *phydev); 1630 int genphy_c45_read_pma(struct phy_device *phydev); 1631 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1632 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 1633 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1634 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1635 int genphy_c45_read_mdix(struct phy_device *phydev); 1636 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1637 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 1638 int genphy_c45_read_status(struct phy_device *phydev); 1639 int genphy_c45_baset1_read_status(struct phy_device *phydev); 1640 int genphy_c45_config_aneg(struct phy_device *phydev); 1641 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1642 int genphy_c45_pma_resume(struct phy_device *phydev); 1643 int genphy_c45_pma_suspend(struct phy_device *phydev); 1644 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 1645 1646 /* Generic C45 PHY driver */ 1647 extern struct phy_driver genphy_c45_driver; 1648 1649 /* The gen10g_* functions are the old Clause 45 stub */ 1650 int gen10g_config_aneg(struct phy_device *phydev); 1651 1652 static inline int phy_read_status(struct phy_device *phydev) 1653 { 1654 if (!phydev->drv) 1655 return -EIO; 1656 1657 if (phydev->drv->read_status) 1658 return phydev->drv->read_status(phydev); 1659 else 1660 return genphy_read_status(phydev); 1661 } 1662 1663 void phy_driver_unregister(struct phy_driver *drv); 1664 void phy_drivers_unregister(struct phy_driver *drv, int n); 1665 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1666 int phy_drivers_register(struct phy_driver *new_driver, int n, 1667 struct module *owner); 1668 void phy_error(struct phy_device *phydev); 1669 void phy_state_machine(struct work_struct *work); 1670 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1671 void phy_trigger_machine(struct phy_device *phydev); 1672 void phy_mac_interrupt(struct phy_device *phydev); 1673 void phy_start_machine(struct phy_device *phydev); 1674 void phy_stop_machine(struct phy_device *phydev); 1675 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1676 struct ethtool_link_ksettings *cmd); 1677 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1678 const struct ethtool_link_ksettings *cmd); 1679 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1680 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1681 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1682 int phy_disable_interrupts(struct phy_device *phydev); 1683 void phy_request_interrupt(struct phy_device *phydev); 1684 void phy_free_interrupt(struct phy_device *phydev); 1685 void phy_print_status(struct phy_device *phydev); 1686 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1687 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1688 void phy_advertise_supported(struct phy_device *phydev); 1689 void phy_support_sym_pause(struct phy_device *phydev); 1690 void phy_support_asym_pause(struct phy_device *phydev); 1691 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1692 bool autoneg); 1693 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1694 bool phy_validate_pause(struct phy_device *phydev, 1695 struct ethtool_pauseparam *pp); 1696 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1697 1698 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 1699 const int *delay_values, int size, bool is_rx); 1700 1701 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1702 bool *tx_pause, bool *rx_pause); 1703 1704 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1705 int (*run)(struct phy_device *)); 1706 int phy_register_fixup_for_id(const char *bus_id, 1707 int (*run)(struct phy_device *)); 1708 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1709 int (*run)(struct phy_device *)); 1710 1711 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1712 int phy_unregister_fixup_for_id(const char *bus_id); 1713 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1714 1715 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1716 int phy_get_eee_err(struct phy_device *phydev); 1717 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1718 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1719 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1720 void phy_ethtool_get_wol(struct phy_device *phydev, 1721 struct ethtool_wolinfo *wol); 1722 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1723 struct ethtool_link_ksettings *cmd); 1724 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1725 const struct ethtool_link_ksettings *cmd); 1726 int phy_ethtool_nway_reset(struct net_device *ndev); 1727 int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size); 1728 void phy_package_leave(struct phy_device *phydev); 1729 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 1730 int addr, size_t priv_size); 1731 1732 #if IS_ENABLED(CONFIG_PHYLIB) 1733 int __init mdio_bus_init(void); 1734 void mdio_bus_exit(void); 1735 #endif 1736 1737 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 1738 int phy_ethtool_get_sset_count(struct phy_device *phydev); 1739 int phy_ethtool_get_stats(struct phy_device *phydev, 1740 struct ethtool_stats *stats, u64 *data); 1741 1742 static inline int phy_package_read(struct phy_device *phydev, u32 regnum) 1743 { 1744 struct phy_package_shared *shared = phydev->shared; 1745 1746 if (!shared) 1747 return -EIO; 1748 1749 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1750 } 1751 1752 static inline int __phy_package_read(struct phy_device *phydev, u32 regnum) 1753 { 1754 struct phy_package_shared *shared = phydev->shared; 1755 1756 if (!shared) 1757 return -EIO; 1758 1759 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1760 } 1761 1762 static inline int phy_package_write(struct phy_device *phydev, 1763 u32 regnum, u16 val) 1764 { 1765 struct phy_package_shared *shared = phydev->shared; 1766 1767 if (!shared) 1768 return -EIO; 1769 1770 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1771 } 1772 1773 static inline int __phy_package_write(struct phy_device *phydev, 1774 u32 regnum, u16 val) 1775 { 1776 struct phy_package_shared *shared = phydev->shared; 1777 1778 if (!shared) 1779 return -EIO; 1780 1781 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1782 } 1783 1784 static inline bool __phy_package_set_once(struct phy_device *phydev, 1785 unsigned int b) 1786 { 1787 struct phy_package_shared *shared = phydev->shared; 1788 1789 if (!shared) 1790 return false; 1791 1792 return !test_and_set_bit(b, &shared->flags); 1793 } 1794 1795 static inline bool phy_package_init_once(struct phy_device *phydev) 1796 { 1797 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 1798 } 1799 1800 static inline bool phy_package_probe_once(struct phy_device *phydev) 1801 { 1802 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 1803 } 1804 1805 extern struct bus_type mdio_bus_type; 1806 1807 struct mdio_board_info { 1808 const char *bus_id; 1809 char modalias[MDIO_NAME_SIZE]; 1810 int mdio_addr; 1811 const void *platform_data; 1812 }; 1813 1814 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1815 int mdiobus_register_board_info(const struct mdio_board_info *info, 1816 unsigned int n); 1817 #else 1818 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1819 unsigned int n) 1820 { 1821 return 0; 1822 } 1823 #endif 1824 1825 1826 /** 1827 * phy_module_driver() - Helper macro for registering PHY drivers 1828 * @__phy_drivers: array of PHY drivers to register 1829 * @__count: Numbers of members in array 1830 * 1831 * Helper macro for PHY drivers which do not do anything special in module 1832 * init/exit. Each module may only use this macro once, and calling it 1833 * replaces module_init() and module_exit(). 1834 */ 1835 #define phy_module_driver(__phy_drivers, __count) \ 1836 static int __init phy_module_init(void) \ 1837 { \ 1838 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 1839 } \ 1840 module_init(phy_module_init); \ 1841 static void __exit phy_module_exit(void) \ 1842 { \ 1843 phy_drivers_unregister(__phy_drivers, __count); \ 1844 } \ 1845 module_exit(phy_module_exit) 1846 1847 #define module_phy_driver(__phy_drivers) \ 1848 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 1849 1850 bool phy_driver_is_genphy(struct phy_device *phydev); 1851 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 1852 1853 #endif /* __PHY_H */ 1854