1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/linkmode.h> 18 #include <linux/netlink.h> 19 #include <linux/mdio.h> 20 #include <linux/mii.h> 21 #include <linux/mii_timestamper.h> 22 #include <linux/module.h> 23 #include <linux/timer.h> 24 #include <linux/workqueue.h> 25 #include <linux/mod_devicetable.h> 26 #include <linux/u64_stats_sync.h> 27 #include <linux/irqreturn.h> 28 #include <linux/iopoll.h> 29 #include <linux/refcount.h> 30 31 #include <linux/atomic.h> 32 33 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 34 SUPPORTED_TP | \ 35 SUPPORTED_MII) 36 37 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 38 SUPPORTED_10baseT_Full) 39 40 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 41 SUPPORTED_100baseT_Full) 42 43 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 44 SUPPORTED_1000baseT_Full) 45 46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 54 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 55 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init; 56 57 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 58 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 59 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 60 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 61 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 62 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 63 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 64 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 65 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 66 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features) 67 68 extern const int phy_basic_ports_array[3]; 69 extern const int phy_fibre_port_array[1]; 70 extern const int phy_all_ports_features_array[7]; 71 extern const int phy_10_100_features_array[4]; 72 extern const int phy_basic_t1_features_array[3]; 73 extern const int phy_basic_t1s_p2mp_features_array[2]; 74 extern const int phy_gbit_features_array[2]; 75 extern const int phy_10gbit_features_array[1]; 76 77 /* 78 * Set phydev->irq to PHY_POLL if interrupts are not supported, 79 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 80 * the attached MAC driver handles the interrupt 81 */ 82 #define PHY_POLL -1 83 #define PHY_MAC_INTERRUPT -2 84 85 #define PHY_IS_INTERNAL 0x00000001 86 #define PHY_RST_AFTER_CLK_EN 0x00000002 87 #define PHY_POLL_CABLE_TEST 0x00000004 88 #define MDIO_DEVICE_IS_PHY 0x80000000 89 90 /** 91 * enum phy_interface_t - Interface Mode definitions 92 * 93 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 94 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 95 * @PHY_INTERFACE_MODE_MII: Media-independent interface 96 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 97 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 98 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 99 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 100 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 101 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 102 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 103 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 104 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 105 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 106 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 107 * @PHY_INTERFACE_MODE_SMII: Serial MII 108 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 109 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 110 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 111 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 112 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 113 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 114 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 115 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 116 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 117 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 118 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 119 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 120 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 121 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 122 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 123 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 124 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 125 * @PHY_INTERFACE_MODE_MAX: Book keeping 126 * 127 * Describes the interface between the MAC and PHY. 128 */ 129 typedef enum { 130 PHY_INTERFACE_MODE_NA, 131 PHY_INTERFACE_MODE_INTERNAL, 132 PHY_INTERFACE_MODE_MII, 133 PHY_INTERFACE_MODE_GMII, 134 PHY_INTERFACE_MODE_SGMII, 135 PHY_INTERFACE_MODE_TBI, 136 PHY_INTERFACE_MODE_REVMII, 137 PHY_INTERFACE_MODE_RMII, 138 PHY_INTERFACE_MODE_REVRMII, 139 PHY_INTERFACE_MODE_RGMII, 140 PHY_INTERFACE_MODE_RGMII_ID, 141 PHY_INTERFACE_MODE_RGMII_RXID, 142 PHY_INTERFACE_MODE_RGMII_TXID, 143 PHY_INTERFACE_MODE_RTBI, 144 PHY_INTERFACE_MODE_SMII, 145 PHY_INTERFACE_MODE_XGMII, 146 PHY_INTERFACE_MODE_XLGMII, 147 PHY_INTERFACE_MODE_MOCA, 148 PHY_INTERFACE_MODE_QSGMII, 149 PHY_INTERFACE_MODE_TRGMII, 150 PHY_INTERFACE_MODE_100BASEX, 151 PHY_INTERFACE_MODE_1000BASEX, 152 PHY_INTERFACE_MODE_2500BASEX, 153 PHY_INTERFACE_MODE_5GBASER, 154 PHY_INTERFACE_MODE_RXAUI, 155 PHY_INTERFACE_MODE_XAUI, 156 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 157 PHY_INTERFACE_MODE_10GBASER, 158 PHY_INTERFACE_MODE_25GBASER, 159 PHY_INTERFACE_MODE_USXGMII, 160 /* 10GBASE-KR - with Clause 73 AN */ 161 PHY_INTERFACE_MODE_10GKR, 162 PHY_INTERFACE_MODE_QUSGMII, 163 PHY_INTERFACE_MODE_1000BASEKX, 164 PHY_INTERFACE_MODE_MAX, 165 } phy_interface_t; 166 167 /* PHY interface mode bitmap handling */ 168 #define DECLARE_PHY_INTERFACE_MASK(name) \ 169 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 170 171 static inline void phy_interface_zero(unsigned long *intf) 172 { 173 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 174 } 175 176 static inline bool phy_interface_empty(const unsigned long *intf) 177 { 178 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 179 } 180 181 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 182 const unsigned long *b) 183 { 184 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 185 } 186 187 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 188 const unsigned long *b) 189 { 190 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 191 } 192 193 static inline void phy_interface_set_rgmii(unsigned long *intf) 194 { 195 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 196 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 197 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 198 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 199 } 200 201 /* 202 * phy_supported_speeds - return all speeds currently supported by a PHY device 203 */ 204 unsigned int phy_supported_speeds(struct phy_device *phy, 205 unsigned int *speeds, 206 unsigned int size); 207 208 /** 209 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 210 * @interface: enum phy_interface_t value 211 * 212 * Description: maps enum &phy_interface_t defined in this file 213 * into the device tree binding of 'phy-mode', so that Ethernet 214 * device driver can get PHY interface from device tree. 215 */ 216 static inline const char *phy_modes(phy_interface_t interface) 217 { 218 switch (interface) { 219 case PHY_INTERFACE_MODE_NA: 220 return ""; 221 case PHY_INTERFACE_MODE_INTERNAL: 222 return "internal"; 223 case PHY_INTERFACE_MODE_MII: 224 return "mii"; 225 case PHY_INTERFACE_MODE_GMII: 226 return "gmii"; 227 case PHY_INTERFACE_MODE_SGMII: 228 return "sgmii"; 229 case PHY_INTERFACE_MODE_TBI: 230 return "tbi"; 231 case PHY_INTERFACE_MODE_REVMII: 232 return "rev-mii"; 233 case PHY_INTERFACE_MODE_RMII: 234 return "rmii"; 235 case PHY_INTERFACE_MODE_REVRMII: 236 return "rev-rmii"; 237 case PHY_INTERFACE_MODE_RGMII: 238 return "rgmii"; 239 case PHY_INTERFACE_MODE_RGMII_ID: 240 return "rgmii-id"; 241 case PHY_INTERFACE_MODE_RGMII_RXID: 242 return "rgmii-rxid"; 243 case PHY_INTERFACE_MODE_RGMII_TXID: 244 return "rgmii-txid"; 245 case PHY_INTERFACE_MODE_RTBI: 246 return "rtbi"; 247 case PHY_INTERFACE_MODE_SMII: 248 return "smii"; 249 case PHY_INTERFACE_MODE_XGMII: 250 return "xgmii"; 251 case PHY_INTERFACE_MODE_XLGMII: 252 return "xlgmii"; 253 case PHY_INTERFACE_MODE_MOCA: 254 return "moca"; 255 case PHY_INTERFACE_MODE_QSGMII: 256 return "qsgmii"; 257 case PHY_INTERFACE_MODE_TRGMII: 258 return "trgmii"; 259 case PHY_INTERFACE_MODE_1000BASEX: 260 return "1000base-x"; 261 case PHY_INTERFACE_MODE_1000BASEKX: 262 return "1000base-kx"; 263 case PHY_INTERFACE_MODE_2500BASEX: 264 return "2500base-x"; 265 case PHY_INTERFACE_MODE_5GBASER: 266 return "5gbase-r"; 267 case PHY_INTERFACE_MODE_RXAUI: 268 return "rxaui"; 269 case PHY_INTERFACE_MODE_XAUI: 270 return "xaui"; 271 case PHY_INTERFACE_MODE_10GBASER: 272 return "10gbase-r"; 273 case PHY_INTERFACE_MODE_25GBASER: 274 return "25gbase-r"; 275 case PHY_INTERFACE_MODE_USXGMII: 276 return "usxgmii"; 277 case PHY_INTERFACE_MODE_10GKR: 278 return "10gbase-kr"; 279 case PHY_INTERFACE_MODE_100BASEX: 280 return "100base-x"; 281 case PHY_INTERFACE_MODE_QUSGMII: 282 return "qusgmii"; 283 default: 284 return "unknown"; 285 } 286 } 287 288 #define PHY_INIT_TIMEOUT 100000 289 #define PHY_FORCE_TIMEOUT 10 290 291 #define PHY_MAX_ADDR 32 292 293 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 294 #define PHY_ID_FMT "%s:%02x" 295 296 #define MII_BUS_ID_SIZE 61 297 298 struct device; 299 struct phylink; 300 struct sfp_bus; 301 struct sfp_upstream_ops; 302 struct sk_buff; 303 304 /** 305 * struct mdio_bus_stats - Statistics counters for MDIO busses 306 * @transfers: Total number of transfers, i.e. @writes + @reads 307 * @errors: Number of MDIO transfers that returned an error 308 * @writes: Number of write transfers 309 * @reads: Number of read transfers 310 * @syncp: Synchronisation for incrementing statistics 311 */ 312 struct mdio_bus_stats { 313 u64_stats_t transfers; 314 u64_stats_t errors; 315 u64_stats_t writes; 316 u64_stats_t reads; 317 /* Must be last, add new statistics above */ 318 struct u64_stats_sync syncp; 319 }; 320 321 /** 322 * struct phy_package_shared - Shared information in PHY packages 323 * @addr: Common PHY address used to combine PHYs in one package 324 * @refcnt: Number of PHYs connected to this shared data 325 * @flags: Initialization of PHY package 326 * @priv_size: Size of the shared private data @priv 327 * @priv: Driver private data shared across a PHY package 328 * 329 * Represents a shared structure between different phydev's in the same 330 * package, for example a quad PHY. See phy_package_join() and 331 * phy_package_leave(). 332 */ 333 struct phy_package_shared { 334 int addr; 335 refcount_t refcnt; 336 unsigned long flags; 337 size_t priv_size; 338 339 /* private data pointer */ 340 /* note that this pointer is shared between different phydevs and 341 * the user has to take care of appropriate locking. It is allocated 342 * and freed automatically by phy_package_join() and 343 * phy_package_leave(). 344 */ 345 void *priv; 346 }; 347 348 /* used as bit number in atomic bitops */ 349 #define PHY_SHARED_F_INIT_DONE 0 350 #define PHY_SHARED_F_PROBE_DONE 1 351 352 /** 353 * struct mii_bus - Represents an MDIO bus 354 * 355 * @owner: Who owns this device 356 * @name: User friendly name for this MDIO device, or driver name 357 * @id: Unique identifier for this bus, typical from bus hierarchy 358 * @priv: Driver private data 359 * 360 * The Bus class for PHYs. Devices which provide access to 361 * PHYs should register using this structure 362 */ 363 struct mii_bus { 364 struct module *owner; 365 const char *name; 366 char id[MII_BUS_ID_SIZE]; 367 void *priv; 368 /** @read: Perform a read transfer on the bus */ 369 int (*read)(struct mii_bus *bus, int addr, int regnum); 370 /** @write: Perform a write transfer on the bus */ 371 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 372 /** @read_c45: Perform a C45 read transfer on the bus */ 373 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 374 /** @write_c45: Perform a C45 write transfer on the bus */ 375 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 376 int regnum, u16 val); 377 /** @reset: Perform a reset of the bus */ 378 int (*reset)(struct mii_bus *bus); 379 380 /** @stats: Statistic counters per device on the bus */ 381 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 382 383 /** 384 * @mdio_lock: A lock to ensure that only one thing can read/write 385 * the MDIO bus at a time 386 */ 387 struct mutex mdio_lock; 388 389 /** @parent: Parent device of this bus */ 390 struct device *parent; 391 /** @state: State of bus structure */ 392 enum { 393 MDIOBUS_ALLOCATED = 1, 394 MDIOBUS_REGISTERED, 395 MDIOBUS_UNREGISTERED, 396 MDIOBUS_RELEASED, 397 } state; 398 399 /** @dev: Kernel device representation */ 400 struct device dev; 401 402 /** @mdio_map: list of all MDIO devices on bus */ 403 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 404 405 /** @phy_mask: PHY addresses to be ignored when probing */ 406 u32 phy_mask; 407 408 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 409 u32 phy_ignore_ta_mask; 410 411 /** 412 * @irq: An array of interrupts, each PHY's interrupt at the index 413 * matching its address 414 */ 415 int irq[PHY_MAX_ADDR]; 416 417 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 418 int reset_delay_us; 419 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 420 int reset_post_delay_us; 421 /** @reset_gpiod: Reset GPIO descriptor pointer */ 422 struct gpio_desc *reset_gpiod; 423 424 /** @shared_lock: protect access to the shared element */ 425 struct mutex shared_lock; 426 427 /** @shared: shared state across different PHYs */ 428 struct phy_package_shared *shared[PHY_MAX_ADDR]; 429 }; 430 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 431 432 struct mii_bus *mdiobus_alloc_size(size_t size); 433 434 /** 435 * mdiobus_alloc - Allocate an MDIO bus structure 436 * 437 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 438 * for the driver to register the bus. 439 */ 440 static inline struct mii_bus *mdiobus_alloc(void) 441 { 442 return mdiobus_alloc_size(0); 443 } 444 445 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 446 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 447 struct module *owner); 448 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 449 #define devm_mdiobus_register(dev, bus) \ 450 __devm_mdiobus_register(dev, bus, THIS_MODULE) 451 452 void mdiobus_unregister(struct mii_bus *bus); 453 void mdiobus_free(struct mii_bus *bus); 454 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 455 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 456 { 457 return devm_mdiobus_alloc_size(dev, 0); 458 } 459 460 struct mii_bus *mdio_find_bus(const char *mdio_name); 461 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); 462 463 #define PHY_INTERRUPT_DISABLED false 464 #define PHY_INTERRUPT_ENABLED true 465 466 /** 467 * enum phy_state - PHY state machine states: 468 * 469 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 470 * should be called if and only if the PHY is in this state, 471 * given that the PHY device exists. 472 * - PHY driver probe function will set the state to @PHY_READY 473 * 474 * @PHY_READY: PHY is ready to send and receive packets, but the 475 * controller is not. By default, PHYs which do not implement 476 * probe will be set to this state by phy_probe(). 477 * - start will set the state to UP 478 * 479 * @PHY_UP: The PHY and attached device are ready to do work. 480 * Interrupts should be started here. 481 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 482 * 483 * @PHY_NOLINK: PHY is up, but not currently plugged in. 484 * - irq or timer will set @PHY_RUNNING if link comes back 485 * - phy_stop moves to @PHY_HALTED 486 * 487 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 488 * and/or receiving packets 489 * - irq or timer will set @PHY_NOLINK if link goes down 490 * - phy_stop moves to @PHY_HALTED 491 * 492 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 493 * is not expected to work, carrier will be indicated as down. PHY will be 494 * poll once per second, or on interrupt for it current state. 495 * Once complete, move to UP to restart the PHY. 496 * - phy_stop aborts the running test and moves to @PHY_HALTED 497 * 498 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or 499 * PHY is in an error state. 500 * - phy_start moves to @PHY_UP 501 */ 502 enum phy_state { 503 PHY_DOWN = 0, 504 PHY_READY, 505 PHY_HALTED, 506 PHY_UP, 507 PHY_RUNNING, 508 PHY_NOLINK, 509 PHY_CABLETEST, 510 }; 511 512 #define MDIO_MMD_NUM 32 513 514 /** 515 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 516 * @devices_in_package: IEEE 802.3 devices in package register value. 517 * @mmds_present: bit vector of MMDs present. 518 * @device_ids: The device identifer for each present device. 519 */ 520 struct phy_c45_device_ids { 521 u32 devices_in_package; 522 u32 mmds_present; 523 u32 device_ids[MDIO_MMD_NUM]; 524 }; 525 526 struct macsec_context; 527 struct macsec_ops; 528 529 /** 530 * struct phy_device - An instance of a PHY 531 * 532 * @mdio: MDIO bus this PHY is on 533 * @drv: Pointer to the driver for this PHY instance 534 * @devlink: Create a link between phy dev and mac dev, if the external phy 535 * used by current mac interface is managed by another mac interface. 536 * @phy_id: UID for this device found during discovery 537 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 538 * @is_c45: Set to true if this PHY uses clause 45 addressing. 539 * @is_internal: Set to true if this PHY is internal to a MAC. 540 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 541 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 542 * @has_fixups: Set to true if this PHY has fixups/quirks. 543 * @suspended: Set to true if this PHY has been suspended successfully. 544 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 545 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 546 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 547 * @downshifted_rate: Set true if link speed has been downshifted. 548 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 549 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 550 * @state: State of the PHY for management purposes 551 * @dev_flags: Device-specific flags used by the PHY driver. 552 * 553 * - Bits [15:0] are free to use by the PHY driver to communicate 554 * driver specific behavior. 555 * - Bits [23:16] are currently reserved for future use. 556 * - Bits [31:24] are reserved for defining generic 557 * PHY driver behavior. 558 * @irq: IRQ number of the PHY's interrupt (-1 if none) 559 * @phy_timer: The timer for handling the state machine 560 * @phylink: Pointer to phylink instance for this PHY 561 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 562 * @sfp_bus: SFP bus attached to this PHY's fiber port 563 * @attached_dev: The attached enet driver's device instance ptr 564 * @adjust_link: Callback for the enet controller to respond to changes: in the 565 * link state. 566 * @phy_link_change: Callback for phylink for notification of link change 567 * @macsec_ops: MACsec offloading ops. 568 * 569 * @speed: Current link speed 570 * @duplex: Current duplex 571 * @port: Current port 572 * @pause: Current pause 573 * @asym_pause: Current asymmetric pause 574 * @supported: Combined MAC/PHY supported linkmodes 575 * @advertising: Currently advertised linkmodes 576 * @adv_old: Saved advertised while power saving for WoL 577 * @supported_eee: supported PHY EEE linkmodes 578 * @lp_advertising: Current link partner advertised linkmodes 579 * @host_interfaces: PHY interface modes supported by host 580 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 581 * @autoneg: Flag autoneg being used 582 * @rate_matching: Current rate matching mode 583 * @link: Current link state 584 * @autoneg_complete: Flag auto negotiation of the link has completed 585 * @mdix: Current crossover 586 * @mdix_ctrl: User setting of crossover 587 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 588 * @interrupts: Flag interrupts have been enabled 589 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 590 * handling shall be postponed until PHY has resumed 591 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 592 * requiring a rerun of the interrupt handler after resume 593 * @interface: enum phy_interface_t value 594 * @skb: Netlink message for cable diagnostics 595 * @nest: Netlink nest used for cable diagnostics 596 * @ehdr: nNtlink header for cable diagnostics 597 * @phy_led_triggers: Array of LED triggers 598 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 599 * @led_link_trigger: LED trigger for link up/down 600 * @last_triggered: last LED trigger for link speed 601 * @master_slave_set: User requested master/slave configuration 602 * @master_slave_get: Current master/slave advertisement 603 * @master_slave_state: Current master/slave configuration 604 * @mii_ts: Pointer to time stamper callbacks 605 * @psec: Pointer to Power Sourcing Equipment control struct 606 * @lock: Mutex for serialization access to PHY 607 * @state_queue: Work queue for state machine 608 * @link_down_events: Number of times link was lost 609 * @shared: Pointer to private data shared by phys in one package 610 * @priv: Pointer to driver private data 611 * 612 * interrupts currently only supports enabled or disabled, 613 * but could be changed in the future to support enabling 614 * and disabling specific interrupts 615 * 616 * Contains some infrastructure for polling and interrupt 617 * handling, as well as handling shifts in PHY hardware state 618 */ 619 struct phy_device { 620 struct mdio_device mdio; 621 622 /* Information about the PHY type */ 623 /* And management functions */ 624 struct phy_driver *drv; 625 626 struct device_link *devlink; 627 628 u32 phy_id; 629 630 struct phy_c45_device_ids c45_ids; 631 unsigned is_c45:1; 632 unsigned is_internal:1; 633 unsigned is_pseudo_fixed_link:1; 634 unsigned is_gigabit_capable:1; 635 unsigned has_fixups:1; 636 unsigned suspended:1; 637 unsigned suspended_by_mdio_bus:1; 638 unsigned sysfs_links:1; 639 unsigned loopback_enabled:1; 640 unsigned downshifted_rate:1; 641 unsigned is_on_sfp_module:1; 642 unsigned mac_managed_pm:1; 643 644 unsigned autoneg:1; 645 /* The most recently read link state */ 646 unsigned link:1; 647 unsigned autoneg_complete:1; 648 649 /* Interrupts are enabled */ 650 unsigned interrupts:1; 651 unsigned irq_suspended:1; 652 unsigned irq_rerun:1; 653 654 int rate_matching; 655 656 enum phy_state state; 657 658 u32 dev_flags; 659 660 phy_interface_t interface; 661 662 /* 663 * forced speed & duplex (no autoneg) 664 * partner speed & duplex & pause (autoneg) 665 */ 666 int speed; 667 int duplex; 668 int port; 669 int pause; 670 int asym_pause; 671 u8 master_slave_get; 672 u8 master_slave_set; 673 u8 master_slave_state; 674 675 /* Union of PHY and Attached devices' supported link modes */ 676 /* See ethtool.h for more info */ 677 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 678 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 679 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 680 /* used with phy_speed_down */ 681 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 682 /* used for eee validation */ 683 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee); 684 685 /* Host supported PHY interface types. Should be ignored if empty. */ 686 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 687 688 /* Energy efficient ethernet modes which should be prohibited */ 689 u32 eee_broken_modes; 690 691 #ifdef CONFIG_LED_TRIGGER_PHY 692 struct phy_led_trigger *phy_led_triggers; 693 unsigned int phy_num_led_triggers; 694 struct phy_led_trigger *last_triggered; 695 696 struct phy_led_trigger *led_link_trigger; 697 #endif 698 699 /* 700 * Interrupt number for this PHY 701 * -1 means no interrupt 702 */ 703 int irq; 704 705 /* private data pointer */ 706 /* For use by PHYs to maintain extra state */ 707 void *priv; 708 709 /* shared data pointer */ 710 /* For use by PHYs inside the same package that need a shared state. */ 711 struct phy_package_shared *shared; 712 713 /* Reporting cable test results */ 714 struct sk_buff *skb; 715 void *ehdr; 716 struct nlattr *nest; 717 718 /* Interrupt and Polling infrastructure */ 719 struct delayed_work state_queue; 720 721 struct mutex lock; 722 723 /* This may be modified under the rtnl lock */ 724 bool sfp_bus_attached; 725 struct sfp_bus *sfp_bus; 726 struct phylink *phylink; 727 struct net_device *attached_dev; 728 struct mii_timestamper *mii_ts; 729 struct pse_control *psec; 730 731 u8 mdix; 732 u8 mdix_ctrl; 733 734 int pma_extable; 735 736 unsigned int link_down_events; 737 738 void (*phy_link_change)(struct phy_device *phydev, bool up); 739 void (*adjust_link)(struct net_device *dev); 740 741 #if IS_ENABLED(CONFIG_MACSEC) 742 /* MACsec management functions */ 743 const struct macsec_ops *macsec_ops; 744 #endif 745 }; 746 747 /* Generic phy_device::dev_flags */ 748 #define PHY_F_NO_IRQ 0x80000000 749 750 static inline struct phy_device *to_phy_device(const struct device *dev) 751 { 752 return container_of(to_mdio_device(dev), struct phy_device, mdio); 753 } 754 755 /** 756 * struct phy_tdr_config - Configuration of a TDR raw test 757 * 758 * @first: Distance for first data collection point 759 * @last: Distance for last data collection point 760 * @step: Step between data collection points 761 * @pair: Bitmap of cable pairs to collect data for 762 * 763 * A structure containing possible configuration parameters 764 * for a TDR cable test. The driver does not need to implement 765 * all the parameters, but should report what is actually used. 766 * All distances are in centimeters. 767 */ 768 struct phy_tdr_config { 769 u32 first; 770 u32 last; 771 u32 step; 772 s8 pair; 773 }; 774 #define PHY_PAIR_ALL -1 775 776 /** 777 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 778 * Avoidance) Reconciliation Sublayer. 779 * 780 * @version: read-only PLCA register map version. -1 = not available. Ignored 781 * when setting the configuration. Format is the same as reported by the PLCA 782 * IDVER register (31.CA00). -1 = not available. 783 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 784 * set. 0 = disabled, anything else = enabled. 785 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 786 * Allowed values [0 .. 254]. 255 = node disabled. 787 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 788 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 789 * set. Allowed values [1 .. 255]. 790 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 791 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 792 * more details. The to_timer shall be set equal over all nodes. 793 * -1 = not available / don't set. Allowed values [0 .. 255]. 794 * @burst_cnt: controls how many additional frames a node is allowed to send in 795 * single transmit opportunity (TO). The default value of 0 means that the 796 * node is allowed exactly one frame per TO. A value of 1 allows two frames 797 * per TO, and so on. -1 = not available / don't set. 798 * Allowed values [0 .. 255]. 799 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 800 * frame before interrupting the burst. This value should be set to a value 801 * greater than the MAC inter-packet gap (which is typically 96 bits). 802 * -1 = not available / don't set. Allowed values [0 .. 255]. 803 * 804 * A structure containing configuration parameters for setting/getting the PLCA 805 * RS configuration. The driver does not need to implement all the parameters, 806 * but should report what is actually used. 807 */ 808 struct phy_plca_cfg { 809 int version; 810 int enabled; 811 int node_id; 812 int node_cnt; 813 int to_tmr; 814 int burst_cnt; 815 int burst_tmr; 816 }; 817 818 /** 819 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 820 * Avoidance) Reconciliation Sublayer. 821 * 822 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 823 * register(31.CA03), indicating BEACON activity. 824 * 825 * A structure containing status information of the PLCA RS configuration. 826 * The driver does not need to implement all the parameters, but should report 827 * what is actually used. 828 */ 829 struct phy_plca_status { 830 bool pst; 831 }; 832 833 /** 834 * struct phy_driver - Driver structure for a particular PHY type 835 * 836 * @mdiodrv: Data common to all MDIO devices 837 * @phy_id: The result of reading the UID registers of this PHY 838 * type, and ANDing them with the phy_id_mask. This driver 839 * only works for PHYs with IDs which match this field 840 * @name: The friendly name of this PHY type 841 * @phy_id_mask: Defines the important bits of the phy_id 842 * @features: A mandatory list of features (speed, duplex, etc) 843 * supported by this PHY 844 * @flags: A bitfield defining certain other features this PHY 845 * supports (like interrupts) 846 * @driver_data: Static driver data 847 * 848 * All functions are optional. If config_aneg or read_status 849 * are not implemented, the phy core uses the genphy versions. 850 * Note that none of these functions should be called from 851 * interrupt time. The goal is for the bus read/write functions 852 * to be able to block when the bus transaction is happening, 853 * and be freed up by an interrupt (The MPC85xx has this ability, 854 * though it is not currently supported in the driver). 855 */ 856 struct phy_driver { 857 struct mdio_driver_common mdiodrv; 858 u32 phy_id; 859 char *name; 860 u32 phy_id_mask; 861 const unsigned long * const features; 862 u32 flags; 863 const void *driver_data; 864 865 /** 866 * @soft_reset: Called to issue a PHY software reset 867 */ 868 int (*soft_reset)(struct phy_device *phydev); 869 870 /** 871 * @config_init: Called to initialize the PHY, 872 * including after a reset 873 */ 874 int (*config_init)(struct phy_device *phydev); 875 876 /** 877 * @probe: Called during discovery. Used to set 878 * up device-specific structures, if any 879 */ 880 int (*probe)(struct phy_device *phydev); 881 882 /** 883 * @get_features: Probe the hardware to determine what 884 * abilities it has. Should only set phydev->supported. 885 */ 886 int (*get_features)(struct phy_device *phydev); 887 888 /** 889 * @get_rate_matching: Get the supported type of rate matching for a 890 * particular phy interface. This is used by phy consumers to determine 891 * whether to advertise lower-speed modes for that interface. It is 892 * assumed that if a rate matching mode is supported on an interface, 893 * then that interface's rate can be adapted to all slower link speeds 894 * supported by the phy. If the interface is not supported, this should 895 * return %RATE_MATCH_NONE. 896 */ 897 int (*get_rate_matching)(struct phy_device *phydev, 898 phy_interface_t iface); 899 900 /* PHY Power Management */ 901 /** @suspend: Suspend the hardware, saving state if needed */ 902 int (*suspend)(struct phy_device *phydev); 903 /** @resume: Resume the hardware, restoring state if needed */ 904 int (*resume)(struct phy_device *phydev); 905 906 /** 907 * @config_aneg: Configures the advertisement and resets 908 * autonegotiation if phydev->autoneg is on, 909 * forces the speed to the current settings in phydev 910 * if phydev->autoneg is off 911 */ 912 int (*config_aneg)(struct phy_device *phydev); 913 914 /** @aneg_done: Determines the auto negotiation result */ 915 int (*aneg_done)(struct phy_device *phydev); 916 917 /** @read_status: Determines the negotiated speed and duplex */ 918 int (*read_status)(struct phy_device *phydev); 919 920 /** 921 * @config_intr: Enables or disables interrupts. 922 * It should also clear any pending interrupts prior to enabling the 923 * IRQs and after disabling them. 924 */ 925 int (*config_intr)(struct phy_device *phydev); 926 927 /** @handle_interrupt: Override default interrupt handling */ 928 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 929 930 /** @remove: Clears up any memory if needed */ 931 void (*remove)(struct phy_device *phydev); 932 933 /** 934 * @match_phy_device: Returns true if this is a suitable 935 * driver for the given phydev. If NULL, matching is based on 936 * phy_id and phy_id_mask. 937 */ 938 int (*match_phy_device)(struct phy_device *phydev); 939 940 /** 941 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 942 * register changes to enable Wake on LAN, so set_wol is 943 * provided to be called in the ethernet driver's set_wol 944 * function. 945 */ 946 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 947 948 /** 949 * @get_wol: See set_wol, but for checking whether Wake on LAN 950 * is enabled. 951 */ 952 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 953 954 /** 955 * @link_change_notify: Called to inform a PHY device driver 956 * when the core is about to change the link state. This 957 * callback is supposed to be used as fixup hook for drivers 958 * that need to take action when the link state 959 * changes. Drivers are by no means allowed to mess with the 960 * PHY device structure in their implementations. 961 */ 962 void (*link_change_notify)(struct phy_device *dev); 963 964 /** 965 * @read_mmd: PHY specific driver override for reading a MMD 966 * register. This function is optional for PHY specific 967 * drivers. When not provided, the default MMD read function 968 * will be used by phy_read_mmd(), which will use either a 969 * direct read for Clause 45 PHYs or an indirect read for 970 * Clause 22 PHYs. devnum is the MMD device number within the 971 * PHY device, regnum is the register within the selected MMD 972 * device. 973 */ 974 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 975 976 /** 977 * @write_mmd: PHY specific driver override for writing a MMD 978 * register. This function is optional for PHY specific 979 * drivers. When not provided, the default MMD write function 980 * will be used by phy_write_mmd(), which will use either a 981 * direct write for Clause 45 PHYs, or an indirect write for 982 * Clause 22 PHYs. devnum is the MMD device number within the 983 * PHY device, regnum is the register within the selected MMD 984 * device. val is the value to be written. 985 */ 986 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 987 u16 val); 988 989 /** @read_page: Return the current PHY register page number */ 990 int (*read_page)(struct phy_device *dev); 991 /** @write_page: Set the current PHY register page number */ 992 int (*write_page)(struct phy_device *dev, int page); 993 994 /** 995 * @module_info: Get the size and type of the eeprom contained 996 * within a plug-in module 997 */ 998 int (*module_info)(struct phy_device *dev, 999 struct ethtool_modinfo *modinfo); 1000 1001 /** 1002 * @module_eeprom: Get the eeprom information from the plug-in 1003 * module 1004 */ 1005 int (*module_eeprom)(struct phy_device *dev, 1006 struct ethtool_eeprom *ee, u8 *data); 1007 1008 /** @cable_test_start: Start a cable test */ 1009 int (*cable_test_start)(struct phy_device *dev); 1010 1011 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1012 int (*cable_test_tdr_start)(struct phy_device *dev, 1013 const struct phy_tdr_config *config); 1014 1015 /** 1016 * @cable_test_get_status: Once per second, or on interrupt, 1017 * request the status of the test. 1018 */ 1019 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1020 1021 /* Get statistics from the PHY using ethtool */ 1022 /** @get_sset_count: Number of statistic counters */ 1023 int (*get_sset_count)(struct phy_device *dev); 1024 /** @get_strings: Names of the statistic counters */ 1025 void (*get_strings)(struct phy_device *dev, u8 *data); 1026 /** @get_stats: Return the statistic counter values */ 1027 void (*get_stats)(struct phy_device *dev, 1028 struct ethtool_stats *stats, u64 *data); 1029 1030 /* Get and Set PHY tunables */ 1031 /** @get_tunable: Return the value of a tunable */ 1032 int (*get_tunable)(struct phy_device *dev, 1033 struct ethtool_tunable *tuna, void *data); 1034 /** @set_tunable: Set the value of a tunable */ 1035 int (*set_tunable)(struct phy_device *dev, 1036 struct ethtool_tunable *tuna, 1037 const void *data); 1038 /** @set_loopback: Set the loopback mood of the PHY */ 1039 int (*set_loopback)(struct phy_device *dev, bool enable); 1040 /** @get_sqi: Get the signal quality indication */ 1041 int (*get_sqi)(struct phy_device *dev); 1042 /** @get_sqi_max: Get the maximum signal quality indication */ 1043 int (*get_sqi_max)(struct phy_device *dev); 1044 1045 /* PLCA RS interface */ 1046 /** @get_plca_cfg: Return the current PLCA configuration */ 1047 int (*get_plca_cfg)(struct phy_device *dev, 1048 struct phy_plca_cfg *plca_cfg); 1049 /** @set_plca_cfg: Set the PLCA configuration */ 1050 int (*set_plca_cfg)(struct phy_device *dev, 1051 const struct phy_plca_cfg *plca_cfg); 1052 /** @get_plca_status: Return the current PLCA status info */ 1053 int (*get_plca_status)(struct phy_device *dev, 1054 struct phy_plca_status *plca_st); 1055 }; 1056 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 1057 struct phy_driver, mdiodrv) 1058 1059 #define PHY_ANY_ID "MATCH ANY PHY" 1060 #define PHY_ANY_UID 0xffffffff 1061 1062 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 1063 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 1064 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 1065 1066 /* A Structure for boards to register fixups with the PHY Lib */ 1067 struct phy_fixup { 1068 struct list_head list; 1069 char bus_id[MII_BUS_ID_SIZE + 3]; 1070 u32 phy_uid; 1071 u32 phy_uid_mask; 1072 int (*run)(struct phy_device *phydev); 1073 }; 1074 1075 const char *phy_speed_to_str(int speed); 1076 const char *phy_duplex_to_str(unsigned int duplex); 1077 const char *phy_rate_matching_to_str(int rate_matching); 1078 1079 int phy_interface_num_ports(phy_interface_t interface); 1080 1081 /* A structure for mapping a particular speed and duplex 1082 * combination to a particular SUPPORTED and ADVERTISED value 1083 */ 1084 struct phy_setting { 1085 u32 speed; 1086 u8 duplex; 1087 u8 bit; 1088 }; 1089 1090 const struct phy_setting * 1091 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 1092 bool exact); 1093 size_t phy_speeds(unsigned int *speeds, size_t size, 1094 unsigned long *mask); 1095 void of_set_phy_supported(struct phy_device *phydev); 1096 void of_set_phy_eee_broken(struct phy_device *phydev); 1097 int phy_speed_down_core(struct phy_device *phydev); 1098 1099 /** 1100 * phy_is_started - Convenience function to check whether PHY is started 1101 * @phydev: The phy_device struct 1102 */ 1103 static inline bool phy_is_started(struct phy_device *phydev) 1104 { 1105 return phydev->state >= PHY_UP; 1106 } 1107 1108 void phy_resolve_aneg_pause(struct phy_device *phydev); 1109 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1110 void phy_check_downshift(struct phy_device *phydev); 1111 1112 /** 1113 * phy_read - Convenience function for reading a given PHY register 1114 * @phydev: the phy_device struct 1115 * @regnum: register number to read 1116 * 1117 * NOTE: MUST NOT be called from interrupt context, 1118 * because the bus read/write functions may wait for an interrupt 1119 * to conclude the operation. 1120 */ 1121 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1122 { 1123 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1124 } 1125 1126 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1127 timeout_us, sleep_before_read) \ 1128 ({ \ 1129 int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \ 1130 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1131 if (val < 0) \ 1132 __ret = val; \ 1133 if (__ret) \ 1134 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1135 __ret; \ 1136 }) 1137 1138 1139 /** 1140 * __phy_read - convenience function for reading a given PHY register 1141 * @phydev: the phy_device struct 1142 * @regnum: register number to read 1143 * 1144 * The caller must have taken the MDIO bus lock. 1145 */ 1146 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1147 { 1148 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1149 } 1150 1151 /** 1152 * phy_write - Convenience function for writing a given PHY register 1153 * @phydev: the phy_device struct 1154 * @regnum: register number to write 1155 * @val: value to write to @regnum 1156 * 1157 * NOTE: MUST NOT be called from interrupt context, 1158 * because the bus read/write functions may wait for an interrupt 1159 * to conclude the operation. 1160 */ 1161 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1162 { 1163 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1164 } 1165 1166 /** 1167 * __phy_write - Convenience function for writing a given PHY register 1168 * @phydev: the phy_device struct 1169 * @regnum: register number to write 1170 * @val: value to write to @regnum 1171 * 1172 * The caller must have taken the MDIO bus lock. 1173 */ 1174 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1175 { 1176 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1177 val); 1178 } 1179 1180 /** 1181 * __phy_modify_changed() - Convenience function for modifying a PHY register 1182 * @phydev: a pointer to a &struct phy_device 1183 * @regnum: register number 1184 * @mask: bit mask of bits to clear 1185 * @set: bit mask of bits to set 1186 * 1187 * Unlocked helper function which allows a PHY register to be modified as 1188 * new register value = (old register value & ~mask) | set 1189 * 1190 * Returns negative errno, 0 if there was no change, and 1 in case of change 1191 */ 1192 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1193 u16 mask, u16 set) 1194 { 1195 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1196 regnum, mask, set); 1197 } 1198 1199 /* 1200 * phy_read_mmd - Convenience function for reading a register 1201 * from an MMD on a given PHY. 1202 */ 1203 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1204 1205 /** 1206 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1207 * condition is met or a timeout occurs 1208 * 1209 * @phydev: The phy_device struct 1210 * @devaddr: The MMD to read from 1211 * @regnum: The register on the MMD to read 1212 * @val: Variable to read the register into 1213 * @cond: Break condition (usually involving @val) 1214 * @sleep_us: Maximum time to sleep between reads in us (0 1215 * tight-loops). Should be less than ~20ms since usleep_range 1216 * is used (see Documentation/timers/timers-howto.rst). 1217 * @timeout_us: Timeout in us, 0 means never timeout 1218 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1219 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either 1220 * case, the last read value at @args is stored in @val. Must not 1221 * be called from atomic context if sleep_us or timeout_us are used. 1222 */ 1223 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1224 sleep_us, timeout_us, sleep_before_read) \ 1225 ({ \ 1226 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \ 1227 sleep_us, timeout_us, sleep_before_read, \ 1228 phydev, devaddr, regnum); \ 1229 if (val < 0) \ 1230 __ret = val; \ 1231 if (__ret) \ 1232 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1233 __ret; \ 1234 }) 1235 1236 /* 1237 * __phy_read_mmd - Convenience function for reading a register 1238 * from an MMD on a given PHY. 1239 */ 1240 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1241 1242 /* 1243 * phy_write_mmd - Convenience function for writing a register 1244 * on an MMD on a given PHY. 1245 */ 1246 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1247 1248 /* 1249 * __phy_write_mmd - Convenience function for writing a register 1250 * on an MMD on a given PHY. 1251 */ 1252 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1253 1254 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1255 u16 set); 1256 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1257 u16 set); 1258 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1259 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1260 1261 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1262 u16 mask, u16 set); 1263 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1264 u16 mask, u16 set); 1265 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1266 u16 mask, u16 set); 1267 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1268 u16 mask, u16 set); 1269 1270 /** 1271 * __phy_set_bits - Convenience function for setting bits in a PHY register 1272 * @phydev: the phy_device struct 1273 * @regnum: register number to write 1274 * @val: bits to set 1275 * 1276 * The caller must have taken the MDIO bus lock. 1277 */ 1278 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1279 { 1280 return __phy_modify(phydev, regnum, 0, val); 1281 } 1282 1283 /** 1284 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1285 * @phydev: the phy_device struct 1286 * @regnum: register number to write 1287 * @val: bits to clear 1288 * 1289 * The caller must have taken the MDIO bus lock. 1290 */ 1291 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1292 u16 val) 1293 { 1294 return __phy_modify(phydev, regnum, val, 0); 1295 } 1296 1297 /** 1298 * phy_set_bits - Convenience function for setting bits in a PHY register 1299 * @phydev: the phy_device struct 1300 * @regnum: register number to write 1301 * @val: bits to set 1302 */ 1303 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1304 { 1305 return phy_modify(phydev, regnum, 0, val); 1306 } 1307 1308 /** 1309 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1310 * @phydev: the phy_device struct 1311 * @regnum: register number to write 1312 * @val: bits to clear 1313 */ 1314 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1315 { 1316 return phy_modify(phydev, regnum, val, 0); 1317 } 1318 1319 /** 1320 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1321 * on MMD 1322 * @phydev: the phy_device struct 1323 * @devad: the MMD containing register to modify 1324 * @regnum: register number to modify 1325 * @val: bits to set 1326 * 1327 * The caller must have taken the MDIO bus lock. 1328 */ 1329 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1330 u32 regnum, u16 val) 1331 { 1332 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1333 } 1334 1335 /** 1336 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1337 * on MMD 1338 * @phydev: the phy_device struct 1339 * @devad: the MMD containing register to modify 1340 * @regnum: register number to modify 1341 * @val: bits to clear 1342 * 1343 * The caller must have taken the MDIO bus lock. 1344 */ 1345 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1346 u32 regnum, u16 val) 1347 { 1348 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1349 } 1350 1351 /** 1352 * phy_set_bits_mmd - Convenience function for setting bits in a register 1353 * on MMD 1354 * @phydev: the phy_device struct 1355 * @devad: the MMD containing register to modify 1356 * @regnum: register number to modify 1357 * @val: bits to set 1358 */ 1359 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1360 u32 regnum, u16 val) 1361 { 1362 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1363 } 1364 1365 /** 1366 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1367 * on MMD 1368 * @phydev: the phy_device struct 1369 * @devad: the MMD containing register to modify 1370 * @regnum: register number to modify 1371 * @val: bits to clear 1372 */ 1373 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1374 u32 regnum, u16 val) 1375 { 1376 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1377 } 1378 1379 /** 1380 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1381 * @phydev: the phy_device struct 1382 * 1383 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1384 * PHY_MAC_INTERRUPT 1385 */ 1386 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1387 { 1388 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1389 } 1390 1391 /** 1392 * phy_polling_mode - Convenience function for testing whether polling is 1393 * used to detect PHY status changes 1394 * @phydev: the phy_device struct 1395 */ 1396 static inline bool phy_polling_mode(struct phy_device *phydev) 1397 { 1398 if (phydev->state == PHY_CABLETEST) 1399 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1400 return true; 1401 1402 return phydev->irq == PHY_POLL; 1403 } 1404 1405 /** 1406 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1407 * @phydev: the phy_device struct 1408 */ 1409 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1410 { 1411 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1412 } 1413 1414 /** 1415 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1416 * @phydev: the phy_device struct 1417 */ 1418 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1419 { 1420 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1421 } 1422 1423 /** 1424 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1425 * PTP hardware clock capabilities. 1426 * @phydev: the phy_device struct 1427 */ 1428 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1429 { 1430 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1431 } 1432 1433 /** 1434 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1435 * @phydev: the phy_device struct 1436 */ 1437 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1438 { 1439 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1440 } 1441 1442 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) 1443 { 1444 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); 1445 } 1446 1447 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1448 int type) 1449 { 1450 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1451 } 1452 1453 static inline int phy_ts_info(struct phy_device *phydev, 1454 struct ethtool_ts_info *tsinfo) 1455 { 1456 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1457 } 1458 1459 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1460 int type) 1461 { 1462 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1463 } 1464 1465 /** 1466 * phy_is_internal - Convenience function for testing if a PHY is internal 1467 * @phydev: the phy_device struct 1468 */ 1469 static inline bool phy_is_internal(struct phy_device *phydev) 1470 { 1471 return phydev->is_internal; 1472 } 1473 1474 /** 1475 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1476 * @phydev: the phy_device struct 1477 */ 1478 static inline bool phy_on_sfp(struct phy_device *phydev) 1479 { 1480 return phydev->is_on_sfp_module; 1481 } 1482 1483 /** 1484 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1485 * PHY interface mode is RGMII (all variants) 1486 * @mode: the &phy_interface_t enum 1487 */ 1488 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1489 { 1490 return mode >= PHY_INTERFACE_MODE_RGMII && 1491 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1492 }; 1493 1494 /** 1495 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1496 * negotiation 1497 * @mode: one of &enum phy_interface_t 1498 * 1499 * Returns true if the PHY interface mode uses the 16-bit negotiation 1500 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1501 */ 1502 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1503 { 1504 return mode == PHY_INTERFACE_MODE_1000BASEX || 1505 mode == PHY_INTERFACE_MODE_2500BASEX; 1506 } 1507 1508 /** 1509 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1510 * is RGMII (all variants) 1511 * @phydev: the phy_device struct 1512 */ 1513 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1514 { 1515 return phy_interface_mode_is_rgmii(phydev->interface); 1516 }; 1517 1518 /** 1519 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1520 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1521 * @phydev: the phy_device struct 1522 */ 1523 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1524 { 1525 return phydev->is_pseudo_fixed_link; 1526 } 1527 1528 int phy_save_page(struct phy_device *phydev); 1529 int phy_select_page(struct phy_device *phydev, int page); 1530 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1531 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1532 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1533 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1534 u16 mask, u16 set); 1535 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1536 u16 mask, u16 set); 1537 1538 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1539 bool is_c45, 1540 struct phy_c45_device_ids *c45_ids); 1541 #if IS_ENABLED(CONFIG_PHYLIB) 1542 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1543 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1544 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1545 struct phy_device *device_phy_find_device(struct device *dev); 1546 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode); 1547 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1548 int phy_device_register(struct phy_device *phy); 1549 void phy_device_free(struct phy_device *phydev); 1550 #else 1551 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1552 { 1553 return 0; 1554 } 1555 static inline 1556 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1557 { 1558 return 0; 1559 } 1560 1561 static inline 1562 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1563 { 1564 return NULL; 1565 } 1566 1567 static inline struct phy_device *device_phy_find_device(struct device *dev) 1568 { 1569 return NULL; 1570 } 1571 1572 static inline 1573 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1574 { 1575 return NULL; 1576 } 1577 1578 static inline 1579 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1580 { 1581 return NULL; 1582 } 1583 1584 static inline int phy_device_register(struct phy_device *phy) 1585 { 1586 return 0; 1587 } 1588 1589 static inline void phy_device_free(struct phy_device *phydev) { } 1590 #endif /* CONFIG_PHYLIB */ 1591 void phy_device_remove(struct phy_device *phydev); 1592 int phy_get_c45_ids(struct phy_device *phydev); 1593 int phy_init_hw(struct phy_device *phydev); 1594 int phy_suspend(struct phy_device *phydev); 1595 int phy_resume(struct phy_device *phydev); 1596 int __phy_resume(struct phy_device *phydev); 1597 int phy_loopback(struct phy_device *phydev, bool enable); 1598 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1599 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1600 int phy_sfp_probe(struct phy_device *phydev, 1601 const struct sfp_upstream_ops *ops); 1602 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1603 phy_interface_t interface); 1604 struct phy_device *phy_find_first(struct mii_bus *bus); 1605 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1606 u32 flags, phy_interface_t interface); 1607 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1608 void (*handler)(struct net_device *), 1609 phy_interface_t interface); 1610 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1611 void (*handler)(struct net_device *), 1612 phy_interface_t interface); 1613 void phy_disconnect(struct phy_device *phydev); 1614 void phy_detach(struct phy_device *phydev); 1615 void phy_start(struct phy_device *phydev); 1616 void phy_stop(struct phy_device *phydev); 1617 int phy_config_aneg(struct phy_device *phydev); 1618 int phy_start_aneg(struct phy_device *phydev); 1619 int phy_aneg_done(struct phy_device *phydev); 1620 int phy_speed_down(struct phy_device *phydev, bool sync); 1621 int phy_speed_up(struct phy_device *phydev); 1622 bool phy_check_valid(int speed, int duplex, unsigned long *features); 1623 1624 int phy_restart_aneg(struct phy_device *phydev); 1625 int phy_reset_after_clk_enable(struct phy_device *phydev); 1626 1627 #if IS_ENABLED(CONFIG_PHYLIB) 1628 int phy_start_cable_test(struct phy_device *phydev, 1629 struct netlink_ext_ack *extack); 1630 int phy_start_cable_test_tdr(struct phy_device *phydev, 1631 struct netlink_ext_ack *extack, 1632 const struct phy_tdr_config *config); 1633 #else 1634 static inline 1635 int phy_start_cable_test(struct phy_device *phydev, 1636 struct netlink_ext_ack *extack) 1637 { 1638 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1639 return -EOPNOTSUPP; 1640 } 1641 static inline 1642 int phy_start_cable_test_tdr(struct phy_device *phydev, 1643 struct netlink_ext_ack *extack, 1644 const struct phy_tdr_config *config) 1645 { 1646 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1647 return -EOPNOTSUPP; 1648 } 1649 #endif 1650 1651 int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result); 1652 int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair, 1653 u16 cm); 1654 1655 static inline void phy_device_reset(struct phy_device *phydev, int value) 1656 { 1657 mdio_device_reset(&phydev->mdio, value); 1658 } 1659 1660 #define phydev_err(_phydev, format, args...) \ 1661 dev_err(&_phydev->mdio.dev, format, ##args) 1662 1663 #define phydev_err_probe(_phydev, err, format, args...) \ 1664 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1665 1666 #define phydev_info(_phydev, format, args...) \ 1667 dev_info(&_phydev->mdio.dev, format, ##args) 1668 1669 #define phydev_warn(_phydev, format, args...) \ 1670 dev_warn(&_phydev->mdio.dev, format, ##args) 1671 1672 #define phydev_dbg(_phydev, format, args...) \ 1673 dev_dbg(&_phydev->mdio.dev, format, ##args) 1674 1675 static inline const char *phydev_name(const struct phy_device *phydev) 1676 { 1677 return dev_name(&phydev->mdio.dev); 1678 } 1679 1680 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1681 { 1682 mutex_lock(&phydev->mdio.bus->mdio_lock); 1683 } 1684 1685 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1686 { 1687 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1688 } 1689 1690 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1691 __printf(2, 3); 1692 char *phy_attached_info_irq(struct phy_device *phydev) 1693 __malloc; 1694 void phy_attached_info(struct phy_device *phydev); 1695 1696 /* Clause 22 PHY */ 1697 int genphy_read_abilities(struct phy_device *phydev); 1698 int genphy_setup_forced(struct phy_device *phydev); 1699 int genphy_restart_aneg(struct phy_device *phydev); 1700 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1701 int genphy_config_eee_advert(struct phy_device *phydev); 1702 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1703 int genphy_aneg_done(struct phy_device *phydev); 1704 int genphy_update_link(struct phy_device *phydev); 1705 int genphy_read_lpa(struct phy_device *phydev); 1706 int genphy_read_status_fixed(struct phy_device *phydev); 1707 int genphy_read_status(struct phy_device *phydev); 1708 int genphy_read_master_slave(struct phy_device *phydev); 1709 int genphy_suspend(struct phy_device *phydev); 1710 int genphy_resume(struct phy_device *phydev); 1711 int genphy_loopback(struct phy_device *phydev, bool enable); 1712 int genphy_soft_reset(struct phy_device *phydev); 1713 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1714 1715 static inline int genphy_config_aneg(struct phy_device *phydev) 1716 { 1717 return __genphy_config_aneg(phydev, false); 1718 } 1719 1720 static inline int genphy_no_config_intr(struct phy_device *phydev) 1721 { 1722 return 0; 1723 } 1724 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1725 u16 regnum); 1726 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1727 u16 regnum, u16 val); 1728 1729 /* Clause 37 */ 1730 int genphy_c37_config_aneg(struct phy_device *phydev); 1731 int genphy_c37_read_status(struct phy_device *phydev); 1732 1733 /* Clause 45 PHY */ 1734 int genphy_c45_restart_aneg(struct phy_device *phydev); 1735 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1736 int genphy_c45_aneg_done(struct phy_device *phydev); 1737 int genphy_c45_read_link(struct phy_device *phydev); 1738 int genphy_c45_read_lpa(struct phy_device *phydev); 1739 int genphy_c45_read_pma(struct phy_device *phydev); 1740 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1741 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 1742 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1743 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1744 int genphy_c45_read_mdix(struct phy_device *phydev); 1745 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1746 int genphy_c45_read_eee_abilities(struct phy_device *phydev); 1747 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 1748 int genphy_c45_read_status(struct phy_device *phydev); 1749 int genphy_c45_baset1_read_status(struct phy_device *phydev); 1750 int genphy_c45_config_aneg(struct phy_device *phydev); 1751 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1752 int genphy_c45_pma_resume(struct phy_device *phydev); 1753 int genphy_c45_pma_suspend(struct phy_device *phydev); 1754 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 1755 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 1756 struct phy_plca_cfg *plca_cfg); 1757 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 1758 const struct phy_plca_cfg *plca_cfg); 1759 int genphy_c45_plca_get_status(struct phy_device *phydev, 1760 struct phy_plca_status *plca_st); 1761 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv, 1762 unsigned long *lp, bool *is_enabled); 1763 int genphy_c45_ethtool_get_eee(struct phy_device *phydev, 1764 struct ethtool_eee *data); 1765 int genphy_c45_ethtool_set_eee(struct phy_device *phydev, 1766 struct ethtool_eee *data); 1767 int genphy_c45_write_eee_adv(struct phy_device *phydev, unsigned long *adv); 1768 1769 /* Generic C45 PHY driver */ 1770 extern struct phy_driver genphy_c45_driver; 1771 1772 /* The gen10g_* functions are the old Clause 45 stub */ 1773 int gen10g_config_aneg(struct phy_device *phydev); 1774 1775 static inline int phy_read_status(struct phy_device *phydev) 1776 { 1777 if (!phydev->drv) 1778 return -EIO; 1779 1780 if (phydev->drv->read_status) 1781 return phydev->drv->read_status(phydev); 1782 else 1783 return genphy_read_status(phydev); 1784 } 1785 1786 void phy_driver_unregister(struct phy_driver *drv); 1787 void phy_drivers_unregister(struct phy_driver *drv, int n); 1788 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1789 int phy_drivers_register(struct phy_driver *new_driver, int n, 1790 struct module *owner); 1791 void phy_error(struct phy_device *phydev); 1792 void phy_state_machine(struct work_struct *work); 1793 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1794 void phy_trigger_machine(struct phy_device *phydev); 1795 void phy_mac_interrupt(struct phy_device *phydev); 1796 void phy_start_machine(struct phy_device *phydev); 1797 void phy_stop_machine(struct phy_device *phydev); 1798 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1799 struct ethtool_link_ksettings *cmd); 1800 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1801 const struct ethtool_link_ksettings *cmd); 1802 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1803 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1804 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1805 int phy_disable_interrupts(struct phy_device *phydev); 1806 void phy_request_interrupt(struct phy_device *phydev); 1807 void phy_free_interrupt(struct phy_device *phydev); 1808 void phy_print_status(struct phy_device *phydev); 1809 int phy_get_rate_matching(struct phy_device *phydev, 1810 phy_interface_t iface); 1811 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1812 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1813 void phy_advertise_supported(struct phy_device *phydev); 1814 void phy_support_sym_pause(struct phy_device *phydev); 1815 void phy_support_asym_pause(struct phy_device *phydev); 1816 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1817 bool autoneg); 1818 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1819 bool phy_validate_pause(struct phy_device *phydev, 1820 struct ethtool_pauseparam *pp); 1821 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1822 1823 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 1824 const int *delay_values, int size, bool is_rx); 1825 1826 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1827 bool *tx_pause, bool *rx_pause); 1828 1829 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1830 int (*run)(struct phy_device *)); 1831 int phy_register_fixup_for_id(const char *bus_id, 1832 int (*run)(struct phy_device *)); 1833 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1834 int (*run)(struct phy_device *)); 1835 1836 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1837 int phy_unregister_fixup_for_id(const char *bus_id); 1838 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1839 1840 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1841 int phy_get_eee_err(struct phy_device *phydev); 1842 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1843 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1844 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1845 void phy_ethtool_get_wol(struct phy_device *phydev, 1846 struct ethtool_wolinfo *wol); 1847 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1848 struct ethtool_link_ksettings *cmd); 1849 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1850 const struct ethtool_link_ksettings *cmd); 1851 int phy_ethtool_nway_reset(struct net_device *ndev); 1852 int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size); 1853 void phy_package_leave(struct phy_device *phydev); 1854 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 1855 int addr, size_t priv_size); 1856 1857 #if IS_ENABLED(CONFIG_PHYLIB) 1858 int __init mdio_bus_init(void); 1859 void mdio_bus_exit(void); 1860 #endif 1861 1862 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 1863 int phy_ethtool_get_sset_count(struct phy_device *phydev); 1864 int phy_ethtool_get_stats(struct phy_device *phydev, 1865 struct ethtool_stats *stats, u64 *data); 1866 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 1867 struct phy_plca_cfg *plca_cfg); 1868 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 1869 const struct phy_plca_cfg *plca_cfg, 1870 struct netlink_ext_ack *extack); 1871 int phy_ethtool_get_plca_status(struct phy_device *phydev, 1872 struct phy_plca_status *plca_st); 1873 1874 static inline int phy_package_read(struct phy_device *phydev, u32 regnum) 1875 { 1876 struct phy_package_shared *shared = phydev->shared; 1877 1878 if (!shared) 1879 return -EIO; 1880 1881 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1882 } 1883 1884 static inline int __phy_package_read(struct phy_device *phydev, u32 regnum) 1885 { 1886 struct phy_package_shared *shared = phydev->shared; 1887 1888 if (!shared) 1889 return -EIO; 1890 1891 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1892 } 1893 1894 static inline int phy_package_write(struct phy_device *phydev, 1895 u32 regnum, u16 val) 1896 { 1897 struct phy_package_shared *shared = phydev->shared; 1898 1899 if (!shared) 1900 return -EIO; 1901 1902 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1903 } 1904 1905 static inline int __phy_package_write(struct phy_device *phydev, 1906 u32 regnum, u16 val) 1907 { 1908 struct phy_package_shared *shared = phydev->shared; 1909 1910 if (!shared) 1911 return -EIO; 1912 1913 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1914 } 1915 1916 static inline bool __phy_package_set_once(struct phy_device *phydev, 1917 unsigned int b) 1918 { 1919 struct phy_package_shared *shared = phydev->shared; 1920 1921 if (!shared) 1922 return false; 1923 1924 return !test_and_set_bit(b, &shared->flags); 1925 } 1926 1927 static inline bool phy_package_init_once(struct phy_device *phydev) 1928 { 1929 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 1930 } 1931 1932 static inline bool phy_package_probe_once(struct phy_device *phydev) 1933 { 1934 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 1935 } 1936 1937 extern struct bus_type mdio_bus_type; 1938 1939 struct mdio_board_info { 1940 const char *bus_id; 1941 char modalias[MDIO_NAME_SIZE]; 1942 int mdio_addr; 1943 const void *platform_data; 1944 }; 1945 1946 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1947 int mdiobus_register_board_info(const struct mdio_board_info *info, 1948 unsigned int n); 1949 #else 1950 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1951 unsigned int n) 1952 { 1953 return 0; 1954 } 1955 #endif 1956 1957 1958 /** 1959 * phy_module_driver() - Helper macro for registering PHY drivers 1960 * @__phy_drivers: array of PHY drivers to register 1961 * @__count: Numbers of members in array 1962 * 1963 * Helper macro for PHY drivers which do not do anything special in module 1964 * init/exit. Each module may only use this macro once, and calling it 1965 * replaces module_init() and module_exit(). 1966 */ 1967 #define phy_module_driver(__phy_drivers, __count) \ 1968 static int __init phy_module_init(void) \ 1969 { \ 1970 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 1971 } \ 1972 module_init(phy_module_init); \ 1973 static void __exit phy_module_exit(void) \ 1974 { \ 1975 phy_drivers_unregister(__phy_drivers, __count); \ 1976 } \ 1977 module_exit(phy_module_exit) 1978 1979 #define module_phy_driver(__phy_drivers) \ 1980 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 1981 1982 bool phy_driver_is_genphy(struct phy_device *phydev); 1983 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 1984 1985 #endif /* __PHY_H */ 1986