1 /* 2 * Framework and drivers for configuring and reading different PHYs 3 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 4 * 5 * Author: Andy Fleming 6 * 7 * Copyright (c) 2004 Freescale Semiconductor, Inc. 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or (at your 12 * option) any later version. 13 * 14 */ 15 16 #ifndef __PHY_H 17 #define __PHY_H 18 19 #include <linux/compiler.h> 20 #include <linux/spinlock.h> 21 #include <linux/ethtool.h> 22 #include <linux/linkmode.h> 23 #include <linux/mdio.h> 24 #include <linux/mii.h> 25 #include <linux/module.h> 26 #include <linux/timer.h> 27 #include <linux/workqueue.h> 28 #include <linux/mod_devicetable.h> 29 30 #include <linux/atomic.h> 31 32 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 33 SUPPORTED_TP | \ 34 SUPPORTED_MII) 35 36 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 37 SUPPORTED_10baseT_Full) 38 39 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 40 SUPPORTED_100baseT_Full) 41 42 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 43 SUPPORTED_1000baseT_Full) 44 45 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 53 54 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 55 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 56 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 57 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 58 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 59 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 60 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 61 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 62 63 extern const int phy_10_100_features_array[4]; 64 extern const int phy_basic_t1_features_array[2]; 65 extern const int phy_gbit_features_array[2]; 66 extern const int phy_10gbit_features_array[1]; 67 68 /* 69 * Set phydev->irq to PHY_POLL if interrupts are not supported, 70 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if 71 * the attached driver handles the interrupt 72 */ 73 #define PHY_POLL -1 74 #define PHY_IGNORE_INTERRUPT -2 75 76 #define PHY_IS_INTERNAL 0x00000001 77 #define PHY_RST_AFTER_CLK_EN 0x00000002 78 #define MDIO_DEVICE_IS_PHY 0x80000000 79 80 /* Interface Mode definitions */ 81 typedef enum { 82 PHY_INTERFACE_MODE_NA, 83 PHY_INTERFACE_MODE_INTERNAL, 84 PHY_INTERFACE_MODE_MII, 85 PHY_INTERFACE_MODE_GMII, 86 PHY_INTERFACE_MODE_SGMII, 87 PHY_INTERFACE_MODE_TBI, 88 PHY_INTERFACE_MODE_REVMII, 89 PHY_INTERFACE_MODE_RMII, 90 PHY_INTERFACE_MODE_RGMII, 91 PHY_INTERFACE_MODE_RGMII_ID, 92 PHY_INTERFACE_MODE_RGMII_RXID, 93 PHY_INTERFACE_MODE_RGMII_TXID, 94 PHY_INTERFACE_MODE_RTBI, 95 PHY_INTERFACE_MODE_SMII, 96 PHY_INTERFACE_MODE_XGMII, 97 PHY_INTERFACE_MODE_MOCA, 98 PHY_INTERFACE_MODE_QSGMII, 99 PHY_INTERFACE_MODE_TRGMII, 100 PHY_INTERFACE_MODE_1000BASEX, 101 PHY_INTERFACE_MODE_2500BASEX, 102 PHY_INTERFACE_MODE_RXAUI, 103 PHY_INTERFACE_MODE_XAUI, 104 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */ 105 PHY_INTERFACE_MODE_10GKR, 106 PHY_INTERFACE_MODE_MAX, 107 } phy_interface_t; 108 109 /** 110 * phy_supported_speeds - return all speeds currently supported by a phy device 111 * @phy: The phy device to return supported speeds of. 112 * @speeds: buffer to store supported speeds in. 113 * @size: size of speeds buffer. 114 * 115 * Description: Returns the number of supported speeds, and fills 116 * the speeds buffer with the supported speeds. If speeds buffer is 117 * too small to contain all currently supported speeds, will return as 118 * many speeds as can fit. 119 */ 120 unsigned int phy_supported_speeds(struct phy_device *phy, 121 unsigned int *speeds, 122 unsigned int size); 123 124 /** 125 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 126 * @interface: enum phy_interface_t value 127 * 128 * Description: maps 'enum phy_interface_t' defined in this file 129 * into the device tree binding of 'phy-mode', so that Ethernet 130 * device driver can get phy interface from device tree. 131 */ 132 static inline const char *phy_modes(phy_interface_t interface) 133 { 134 switch (interface) { 135 case PHY_INTERFACE_MODE_NA: 136 return ""; 137 case PHY_INTERFACE_MODE_INTERNAL: 138 return "internal"; 139 case PHY_INTERFACE_MODE_MII: 140 return "mii"; 141 case PHY_INTERFACE_MODE_GMII: 142 return "gmii"; 143 case PHY_INTERFACE_MODE_SGMII: 144 return "sgmii"; 145 case PHY_INTERFACE_MODE_TBI: 146 return "tbi"; 147 case PHY_INTERFACE_MODE_REVMII: 148 return "rev-mii"; 149 case PHY_INTERFACE_MODE_RMII: 150 return "rmii"; 151 case PHY_INTERFACE_MODE_RGMII: 152 return "rgmii"; 153 case PHY_INTERFACE_MODE_RGMII_ID: 154 return "rgmii-id"; 155 case PHY_INTERFACE_MODE_RGMII_RXID: 156 return "rgmii-rxid"; 157 case PHY_INTERFACE_MODE_RGMII_TXID: 158 return "rgmii-txid"; 159 case PHY_INTERFACE_MODE_RTBI: 160 return "rtbi"; 161 case PHY_INTERFACE_MODE_SMII: 162 return "smii"; 163 case PHY_INTERFACE_MODE_XGMII: 164 return "xgmii"; 165 case PHY_INTERFACE_MODE_MOCA: 166 return "moca"; 167 case PHY_INTERFACE_MODE_QSGMII: 168 return "qsgmii"; 169 case PHY_INTERFACE_MODE_TRGMII: 170 return "trgmii"; 171 case PHY_INTERFACE_MODE_1000BASEX: 172 return "1000base-x"; 173 case PHY_INTERFACE_MODE_2500BASEX: 174 return "2500base-x"; 175 case PHY_INTERFACE_MODE_RXAUI: 176 return "rxaui"; 177 case PHY_INTERFACE_MODE_XAUI: 178 return "xaui"; 179 case PHY_INTERFACE_MODE_10GKR: 180 return "10gbase-kr"; 181 default: 182 return "unknown"; 183 } 184 } 185 186 187 #define PHY_INIT_TIMEOUT 100000 188 #define PHY_STATE_TIME 1 189 #define PHY_FORCE_TIMEOUT 10 190 191 #define PHY_MAX_ADDR 32 192 193 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 194 #define PHY_ID_FMT "%s:%02x" 195 196 #define MII_BUS_ID_SIZE 61 197 198 /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit 199 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */ 200 #define MII_ADDR_C45 (1<<30) 201 202 struct device; 203 struct phylink; 204 struct sk_buff; 205 206 /* 207 * The Bus class for PHYs. Devices which provide access to 208 * PHYs should register using this structure 209 */ 210 struct mii_bus { 211 struct module *owner; 212 const char *name; 213 char id[MII_BUS_ID_SIZE]; 214 void *priv; 215 int (*read)(struct mii_bus *bus, int addr, int regnum); 216 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 217 int (*reset)(struct mii_bus *bus); 218 219 /* 220 * A lock to ensure that only one thing can read/write 221 * the MDIO bus at a time 222 */ 223 struct mutex mdio_lock; 224 225 struct device *parent; 226 enum { 227 MDIOBUS_ALLOCATED = 1, 228 MDIOBUS_REGISTERED, 229 MDIOBUS_UNREGISTERED, 230 MDIOBUS_RELEASED, 231 } state; 232 struct device dev; 233 234 /* list of all PHYs on bus */ 235 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 236 237 /* PHY addresses to be ignored when probing */ 238 u32 phy_mask; 239 240 /* PHY addresses to ignore the TA/read failure */ 241 u32 phy_ignore_ta_mask; 242 243 /* 244 * An array of interrupts, each PHY's interrupt at the index 245 * matching its address 246 */ 247 int irq[PHY_MAX_ADDR]; 248 249 /* GPIO reset pulse width in microseconds */ 250 int reset_delay_us; 251 /* RESET GPIO descriptor pointer */ 252 struct gpio_desc *reset_gpiod; 253 }; 254 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 255 256 struct mii_bus *mdiobus_alloc_size(size_t); 257 static inline struct mii_bus *mdiobus_alloc(void) 258 { 259 return mdiobus_alloc_size(0); 260 } 261 262 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 263 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 264 void mdiobus_unregister(struct mii_bus *bus); 265 void mdiobus_free(struct mii_bus *bus); 266 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 267 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 268 { 269 return devm_mdiobus_alloc_size(dev, 0); 270 } 271 272 void devm_mdiobus_free(struct device *dev, struct mii_bus *bus); 273 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); 274 275 #define PHY_INTERRUPT_DISABLED false 276 #define PHY_INTERRUPT_ENABLED true 277 278 /* PHY state machine states: 279 * 280 * DOWN: PHY device and driver are not ready for anything. probe 281 * should be called if and only if the PHY is in this state, 282 * given that the PHY device exists. 283 * - PHY driver probe function will set the state to READY 284 * 285 * READY: PHY is ready to send and receive packets, but the 286 * controller is not. By default, PHYs which do not implement 287 * probe will be set to this state by phy_probe(). 288 * - start will set the state to UP 289 * 290 * UP: The PHY and attached device are ready to do work. 291 * Interrupts should be started here. 292 * - timer moves to NOLINK or RUNNING 293 * 294 * NOLINK: PHY is up, but not currently plugged in. 295 * - irq or timer will set RUNNING if link comes back 296 * - phy_stop moves to HALTED 297 * 298 * FORCING: PHY is being configured with forced settings 299 * - if link is up, move to RUNNING 300 * - If link is down, we drop to the next highest setting, and 301 * retry (FORCING) after a timeout 302 * - phy_stop moves to HALTED 303 * 304 * RUNNING: PHY is currently up, running, and possibly sending 305 * and/or receiving packets 306 * - irq or timer will set NOLINK if link goes down 307 * - phy_stop moves to HALTED 308 * 309 * HALTED: PHY is up, but no polling or interrupts are done. Or 310 * PHY is in an error state. 311 * - phy_start moves to UP 312 */ 313 enum phy_state { 314 PHY_DOWN = 0, 315 PHY_READY, 316 PHY_HALTED, 317 PHY_UP, 318 PHY_RUNNING, 319 PHY_NOLINK, 320 PHY_FORCING, 321 }; 322 323 /** 324 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 325 * @devices_in_package: Bit vector of devices present. 326 * @device_ids: The device identifer for each present device. 327 */ 328 struct phy_c45_device_ids { 329 u32 devices_in_package; 330 u32 device_ids[8]; 331 }; 332 333 /* phy_device: An instance of a PHY 334 * 335 * drv: Pointer to the driver for this PHY instance 336 * phy_id: UID for this device found during discovery 337 * c45_ids: 802.3-c45 Device Identifers if is_c45. 338 * is_c45: Set to true if this phy uses clause 45 addressing. 339 * is_internal: Set to true if this phy is internal to a MAC. 340 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc. 341 * is_gigabit_capable: Set to true if PHY supports 1000Mbps 342 * has_fixups: Set to true if this phy has fixups/quirks. 343 * suspended: Set to true if this phy has been suspended successfully. 344 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 345 * loopback_enabled: Set true if this phy has been loopbacked successfully. 346 * state: state of the PHY for management purposes 347 * dev_flags: Device-specific flags used by the PHY driver. 348 * link_timeout: The number of timer firings to wait before the 349 * giving up on the current attempt at acquiring a link 350 * irq: IRQ number of the PHY's interrupt (-1 if none) 351 * phy_timer: The timer for handling the state machine 352 * attached_dev: The attached enet driver's device instance ptr 353 * adjust_link: Callback for the enet controller to respond to 354 * changes in the link state. 355 * 356 * speed, duplex, pause, supported, advertising, lp_advertising, 357 * and autoneg are used like in mii_if_info 358 * 359 * interrupts currently only supports enabled or disabled, 360 * but could be changed in the future to support enabling 361 * and disabling specific interrupts 362 * 363 * Contains some infrastructure for polling and interrupt 364 * handling, as well as handling shifts in PHY hardware state 365 */ 366 struct phy_device { 367 struct mdio_device mdio; 368 369 /* Information about the PHY type */ 370 /* And management functions */ 371 struct phy_driver *drv; 372 373 u32 phy_id; 374 375 struct phy_c45_device_ids c45_ids; 376 unsigned is_c45:1; 377 unsigned is_internal:1; 378 unsigned is_pseudo_fixed_link:1; 379 unsigned is_gigabit_capable:1; 380 unsigned has_fixups:1; 381 unsigned suspended:1; 382 unsigned sysfs_links:1; 383 unsigned loopback_enabled:1; 384 385 unsigned autoneg:1; 386 /* The most recently read link state */ 387 unsigned link:1; 388 unsigned autoneg_complete:1; 389 390 /* Interrupts are enabled */ 391 unsigned interrupts:1; 392 393 enum phy_state state; 394 395 u32 dev_flags; 396 397 phy_interface_t interface; 398 399 /* 400 * forced speed & duplex (no autoneg) 401 * partner speed & duplex & pause (autoneg) 402 */ 403 int speed; 404 int duplex; 405 int pause; 406 int asym_pause; 407 408 /* Union of PHY and Attached devices' supported link modes */ 409 /* See ethtool.h for more info */ 410 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 411 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 412 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 413 414 /* Energy efficient ethernet modes which should be prohibited */ 415 u32 eee_broken_modes; 416 417 int link_timeout; 418 419 #ifdef CONFIG_LED_TRIGGER_PHY 420 struct phy_led_trigger *phy_led_triggers; 421 unsigned int phy_num_led_triggers; 422 struct phy_led_trigger *last_triggered; 423 424 struct phy_led_trigger *led_link_trigger; 425 #endif 426 427 /* 428 * Interrupt number for this PHY 429 * -1 means no interrupt 430 */ 431 int irq; 432 433 /* private data pointer */ 434 /* For use by PHYs to maintain extra state */ 435 void *priv; 436 437 /* Interrupt and Polling infrastructure */ 438 struct delayed_work state_queue; 439 440 struct mutex lock; 441 442 struct phylink *phylink; 443 struct net_device *attached_dev; 444 445 u8 mdix; 446 u8 mdix_ctrl; 447 448 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier); 449 void (*adjust_link)(struct net_device *dev); 450 }; 451 #define to_phy_device(d) container_of(to_mdio_device(d), \ 452 struct phy_device, mdio) 453 454 /* struct phy_driver: Driver structure for a particular PHY type 455 * 456 * driver_data: static driver data 457 * phy_id: The result of reading the UID registers of this PHY 458 * type, and ANDing them with the phy_id_mask. This driver 459 * only works for PHYs with IDs which match this field 460 * name: The friendly name of this PHY type 461 * phy_id_mask: Defines the important bits of the phy_id 462 * features: A mandatory list of features (speed, duplex, etc) 463 * supported by this PHY 464 * flags: A bitfield defining certain other features this PHY 465 * supports (like interrupts) 466 * 467 * All functions are optional. If config_aneg or read_status 468 * are not implemented, the phy core uses the genphy versions. 469 * Note that none of these functions should be called from 470 * interrupt time. The goal is for the bus read/write functions 471 * to be able to block when the bus transaction is happening, 472 * and be freed up by an interrupt (The MPC85xx has this ability, 473 * though it is not currently supported in the driver). 474 */ 475 struct phy_driver { 476 struct mdio_driver_common mdiodrv; 477 u32 phy_id; 478 char *name; 479 u32 phy_id_mask; 480 const unsigned long * const features; 481 u32 flags; 482 const void *driver_data; 483 484 /* 485 * Called to issue a PHY software reset 486 */ 487 int (*soft_reset)(struct phy_device *phydev); 488 489 /* 490 * Called to initialize the PHY, 491 * including after a reset 492 */ 493 int (*config_init)(struct phy_device *phydev); 494 495 /* 496 * Called during discovery. Used to set 497 * up device-specific structures, if any 498 */ 499 int (*probe)(struct phy_device *phydev); 500 501 /* 502 * Probe the hardware to determine what abilities it has. 503 * Should only set phydev->supported. 504 */ 505 int (*get_features)(struct phy_device *phydev); 506 507 /* PHY Power Management */ 508 int (*suspend)(struct phy_device *phydev); 509 int (*resume)(struct phy_device *phydev); 510 511 /* 512 * Configures the advertisement and resets 513 * autonegotiation if phydev->autoneg is on, 514 * forces the speed to the current settings in phydev 515 * if phydev->autoneg is off 516 */ 517 int (*config_aneg)(struct phy_device *phydev); 518 519 /* Determines the auto negotiation result */ 520 int (*aneg_done)(struct phy_device *phydev); 521 522 /* Determines the negotiated speed and duplex */ 523 int (*read_status)(struct phy_device *phydev); 524 525 /* Clears any pending interrupts */ 526 int (*ack_interrupt)(struct phy_device *phydev); 527 528 /* Enables or disables interrupts */ 529 int (*config_intr)(struct phy_device *phydev); 530 531 /* 532 * Checks if the PHY generated an interrupt. 533 * For multi-PHY devices with shared PHY interrupt pin 534 */ 535 int (*did_interrupt)(struct phy_device *phydev); 536 537 /* Clears up any memory if needed */ 538 void (*remove)(struct phy_device *phydev); 539 540 /* Returns true if this is a suitable driver for the given 541 * phydev. If NULL, matching is based on phy_id and 542 * phy_id_mask. 543 */ 544 int (*match_phy_device)(struct phy_device *phydev); 545 546 /* Handles ethtool queries for hardware time stamping. */ 547 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti); 548 549 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */ 550 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr); 551 552 /* 553 * Requests a Rx timestamp for 'skb'. If the skb is accepted, 554 * the phy driver promises to deliver it using netif_rx() as 555 * soon as a timestamp becomes available. One of the 556 * PTP_CLASS_ values is passed in 'type'. The function must 557 * return true if the skb is accepted for delivery. 558 */ 559 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); 560 561 /* 562 * Requests a Tx timestamp for 'skb'. The phy driver promises 563 * to deliver it using skb_complete_tx_timestamp() as soon as a 564 * timestamp becomes available. One of the PTP_CLASS_ values 565 * is passed in 'type'. 566 */ 567 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); 568 569 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to 570 * enable Wake on LAN, so set_wol is provided to be called in the 571 * ethernet driver's set_wol function. */ 572 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 573 574 /* See set_wol, but for checking whether Wake on LAN is enabled. */ 575 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 576 577 /* 578 * Called to inform a PHY device driver when the core is about to 579 * change the link state. This callback is supposed to be used as 580 * fixup hook for drivers that need to take action when the link 581 * state changes. Drivers are by no means allowed to mess with the 582 * PHY device structure in their implementations. 583 */ 584 void (*link_change_notify)(struct phy_device *dev); 585 586 /* 587 * Phy specific driver override for reading a MMD register. 588 * This function is optional for PHY specific drivers. When 589 * not provided, the default MMD read function will be used 590 * by phy_read_mmd(), which will use either a direct read for 591 * Clause 45 PHYs or an indirect read for Clause 22 PHYs. 592 * devnum is the MMD device number within the PHY device, 593 * regnum is the register within the selected MMD device. 594 */ 595 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 596 597 /* 598 * Phy specific driver override for writing a MMD register. 599 * This function is optional for PHY specific drivers. When 600 * not provided, the default MMD write function will be used 601 * by phy_write_mmd(), which will use either a direct write for 602 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs. 603 * devnum is the MMD device number within the PHY device, 604 * regnum is the register within the selected MMD device. 605 * val is the value to be written. 606 */ 607 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 608 u16 val); 609 610 int (*read_page)(struct phy_device *dev); 611 int (*write_page)(struct phy_device *dev, int page); 612 613 /* Get the size and type of the eeprom contained within a plug-in 614 * module */ 615 int (*module_info)(struct phy_device *dev, 616 struct ethtool_modinfo *modinfo); 617 618 /* Get the eeprom information from the plug-in module */ 619 int (*module_eeprom)(struct phy_device *dev, 620 struct ethtool_eeprom *ee, u8 *data); 621 622 /* Get statistics from the phy using ethtool */ 623 int (*get_sset_count)(struct phy_device *dev); 624 void (*get_strings)(struct phy_device *dev, u8 *data); 625 void (*get_stats)(struct phy_device *dev, 626 struct ethtool_stats *stats, u64 *data); 627 628 /* Get and Set PHY tunables */ 629 int (*get_tunable)(struct phy_device *dev, 630 struct ethtool_tunable *tuna, void *data); 631 int (*set_tunable)(struct phy_device *dev, 632 struct ethtool_tunable *tuna, 633 const void *data); 634 int (*set_loopback)(struct phy_device *dev, bool enable); 635 }; 636 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 637 struct phy_driver, mdiodrv) 638 639 #define PHY_ANY_ID "MATCH ANY PHY" 640 #define PHY_ANY_UID 0xffffffff 641 642 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 643 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 644 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 645 646 /* A Structure for boards to register fixups with the PHY Lib */ 647 struct phy_fixup { 648 struct list_head list; 649 char bus_id[MII_BUS_ID_SIZE + 3]; 650 u32 phy_uid; 651 u32 phy_uid_mask; 652 int (*run)(struct phy_device *phydev); 653 }; 654 655 const char *phy_speed_to_str(int speed); 656 const char *phy_duplex_to_str(unsigned int duplex); 657 658 /* A structure for mapping a particular speed and duplex 659 * combination to a particular SUPPORTED and ADVERTISED value 660 */ 661 struct phy_setting { 662 u32 speed; 663 u8 duplex; 664 u8 bit; 665 }; 666 667 const struct phy_setting * 668 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 669 bool exact); 670 size_t phy_speeds(unsigned int *speeds, size_t size, 671 unsigned long *mask); 672 void of_set_phy_supported(struct phy_device *phydev); 673 void of_set_phy_eee_broken(struct phy_device *phydev); 674 675 /** 676 * phy_is_started - Convenience function to check whether PHY is started 677 * @phydev: The phy_device struct 678 */ 679 static inline bool phy_is_started(struct phy_device *phydev) 680 { 681 return phydev->state >= PHY_UP; 682 } 683 684 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 685 686 /** 687 * phy_read - Convenience function for reading a given PHY register 688 * @phydev: the phy_device struct 689 * @regnum: register number to read 690 * 691 * NOTE: MUST NOT be called from interrupt context, 692 * because the bus read/write functions may wait for an interrupt 693 * to conclude the operation. 694 */ 695 static inline int phy_read(struct phy_device *phydev, u32 regnum) 696 { 697 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 698 } 699 700 /** 701 * __phy_read - convenience function for reading a given PHY register 702 * @phydev: the phy_device struct 703 * @regnum: register number to read 704 * 705 * The caller must have taken the MDIO bus lock. 706 */ 707 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 708 { 709 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 710 } 711 712 /** 713 * phy_write - Convenience function for writing a given PHY register 714 * @phydev: the phy_device struct 715 * @regnum: register number to write 716 * @val: value to write to @regnum 717 * 718 * NOTE: MUST NOT be called from interrupt context, 719 * because the bus read/write functions may wait for an interrupt 720 * to conclude the operation. 721 */ 722 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 723 { 724 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 725 } 726 727 /** 728 * __phy_write - Convenience function for writing a given PHY register 729 * @phydev: the phy_device struct 730 * @regnum: register number to write 731 * @val: value to write to @regnum 732 * 733 * The caller must have taken the MDIO bus lock. 734 */ 735 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 736 { 737 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 738 val); 739 } 740 741 /** 742 * phy_read_mmd - Convenience function for reading a register 743 * from an MMD on a given PHY. 744 * @phydev: The phy_device struct 745 * @devad: The MMD to read from 746 * @regnum: The register on the MMD to read 747 * 748 * Same rules as for phy_read(); 749 */ 750 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 751 752 /** 753 * __phy_read_mmd - Convenience function for reading a register 754 * from an MMD on a given PHY. 755 * @phydev: The phy_device struct 756 * @devad: The MMD to read from 757 * @regnum: The register on the MMD to read 758 * 759 * Same rules as for __phy_read(); 760 */ 761 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 762 763 /** 764 * phy_write_mmd - Convenience function for writing a register 765 * on an MMD on a given PHY. 766 * @phydev: The phy_device struct 767 * @devad: The MMD to write to 768 * @regnum: The register on the MMD to read 769 * @val: value to write to @regnum 770 * 771 * Same rules as for phy_write(); 772 */ 773 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 774 775 /** 776 * __phy_write_mmd - Convenience function for writing a register 777 * on an MMD on a given PHY. 778 * @phydev: The phy_device struct 779 * @devad: The MMD to write to 780 * @regnum: The register on the MMD to read 781 * @val: value to write to @regnum 782 * 783 * Same rules as for __phy_write(); 784 */ 785 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 786 787 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 788 u16 set); 789 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 790 u16 set); 791 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 792 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 793 794 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 795 u16 mask, u16 set); 796 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 797 u16 mask, u16 set); 798 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 799 u16 mask, u16 set); 800 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 801 u16 mask, u16 set); 802 803 /** 804 * __phy_set_bits - Convenience function for setting bits in a PHY register 805 * @phydev: the phy_device struct 806 * @regnum: register number to write 807 * @val: bits to set 808 * 809 * The caller must have taken the MDIO bus lock. 810 */ 811 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 812 { 813 return __phy_modify(phydev, regnum, 0, val); 814 } 815 816 /** 817 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 818 * @phydev: the phy_device struct 819 * @regnum: register number to write 820 * @val: bits to clear 821 * 822 * The caller must have taken the MDIO bus lock. 823 */ 824 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 825 u16 val) 826 { 827 return __phy_modify(phydev, regnum, val, 0); 828 } 829 830 /** 831 * phy_set_bits - Convenience function for setting bits in a PHY register 832 * @phydev: the phy_device struct 833 * @regnum: register number to write 834 * @val: bits to set 835 */ 836 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 837 { 838 return phy_modify(phydev, regnum, 0, val); 839 } 840 841 /** 842 * phy_clear_bits - Convenience function for clearing bits in a PHY register 843 * @phydev: the phy_device struct 844 * @regnum: register number to write 845 * @val: bits to clear 846 */ 847 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 848 { 849 return phy_modify(phydev, regnum, val, 0); 850 } 851 852 /** 853 * __phy_set_bits_mmd - Convenience function for setting bits in a register 854 * on MMD 855 * @phydev: the phy_device struct 856 * @devad: the MMD containing register to modify 857 * @regnum: register number to modify 858 * @val: bits to set 859 * 860 * The caller must have taken the MDIO bus lock. 861 */ 862 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 863 u32 regnum, u16 val) 864 { 865 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 866 } 867 868 /** 869 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 870 * on MMD 871 * @phydev: the phy_device struct 872 * @devad: the MMD containing register to modify 873 * @regnum: register number to modify 874 * @val: bits to clear 875 * 876 * The caller must have taken the MDIO bus lock. 877 */ 878 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 879 u32 regnum, u16 val) 880 { 881 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 882 } 883 884 /** 885 * phy_set_bits_mmd - Convenience function for setting bits in a register 886 * on MMD 887 * @phydev: the phy_device struct 888 * @devad: the MMD containing register to modify 889 * @regnum: register number to modify 890 * @val: bits to set 891 */ 892 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 893 u32 regnum, u16 val) 894 { 895 return phy_modify_mmd(phydev, devad, regnum, 0, val); 896 } 897 898 /** 899 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 900 * on MMD 901 * @phydev: the phy_device struct 902 * @devad: the MMD containing register to modify 903 * @regnum: register number to modify 904 * @val: bits to clear 905 */ 906 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 907 u32 regnum, u16 val) 908 { 909 return phy_modify_mmd(phydev, devad, regnum, val, 0); 910 } 911 912 /** 913 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 914 * @phydev: the phy_device struct 915 * 916 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 917 * PHY_IGNORE_INTERRUPT 918 */ 919 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 920 { 921 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT; 922 } 923 924 /** 925 * phy_polling_mode - Convenience function for testing whether polling is 926 * used to detect PHY status changes 927 * @phydev: the phy_device struct 928 */ 929 static inline bool phy_polling_mode(struct phy_device *phydev) 930 { 931 return phydev->irq == PHY_POLL; 932 } 933 934 /** 935 * phy_is_internal - Convenience function for testing if a PHY is internal 936 * @phydev: the phy_device struct 937 */ 938 static inline bool phy_is_internal(struct phy_device *phydev) 939 { 940 return phydev->is_internal; 941 } 942 943 /** 944 * phy_interface_mode_is_rgmii - Convenience function for testing if a 945 * PHY interface mode is RGMII (all variants) 946 * @mode: the phy_interface_t enum 947 */ 948 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 949 { 950 return mode >= PHY_INTERFACE_MODE_RGMII && 951 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 952 }; 953 954 /** 955 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z 956 * negotiation 957 * @mode: one of &enum phy_interface_t 958 * 959 * Returns true if the phy interface mode uses the 16-bit negotiation 960 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 961 */ 962 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 963 { 964 return mode == PHY_INTERFACE_MODE_1000BASEX || 965 mode == PHY_INTERFACE_MODE_2500BASEX; 966 } 967 968 /** 969 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 970 * is RGMII (all variants) 971 * @phydev: the phy_device struct 972 */ 973 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 974 { 975 return phy_interface_mode_is_rgmii(phydev->interface); 976 }; 977 978 /* 979 * phy_is_pseudo_fixed_link - Convenience function for testing if this 980 * PHY is the CPU port facing side of an Ethernet switch, or similar. 981 * @phydev: the phy_device struct 982 */ 983 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 984 { 985 return phydev->is_pseudo_fixed_link; 986 } 987 988 int phy_save_page(struct phy_device *phydev); 989 int phy_select_page(struct phy_device *phydev, int page); 990 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 991 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 992 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 993 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 994 u16 mask, u16 set); 995 996 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id, 997 bool is_c45, 998 struct phy_c45_device_ids *c45_ids); 999 #if IS_ENABLED(CONFIG_PHYLIB) 1000 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1001 int phy_device_register(struct phy_device *phy); 1002 void phy_device_free(struct phy_device *phydev); 1003 #else 1004 static inline 1005 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1006 { 1007 return NULL; 1008 } 1009 1010 static inline int phy_device_register(struct phy_device *phy) 1011 { 1012 return 0; 1013 } 1014 1015 static inline void phy_device_free(struct phy_device *phydev) { } 1016 #endif /* CONFIG_PHYLIB */ 1017 void phy_device_remove(struct phy_device *phydev); 1018 int phy_init_hw(struct phy_device *phydev); 1019 int phy_suspend(struct phy_device *phydev); 1020 int phy_resume(struct phy_device *phydev); 1021 int __phy_resume(struct phy_device *phydev); 1022 int phy_loopback(struct phy_device *phydev, bool enable); 1023 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1024 phy_interface_t interface); 1025 struct phy_device *phy_find_first(struct mii_bus *bus); 1026 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1027 u32 flags, phy_interface_t interface); 1028 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1029 void (*handler)(struct net_device *), 1030 phy_interface_t interface); 1031 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1032 void (*handler)(struct net_device *), 1033 phy_interface_t interface); 1034 void phy_disconnect(struct phy_device *phydev); 1035 void phy_detach(struct phy_device *phydev); 1036 void phy_start(struct phy_device *phydev); 1037 void phy_stop(struct phy_device *phydev); 1038 int phy_start_aneg(struct phy_device *phydev); 1039 int phy_aneg_done(struct phy_device *phydev); 1040 int phy_speed_down(struct phy_device *phydev, bool sync); 1041 int phy_speed_up(struct phy_device *phydev); 1042 1043 int phy_restart_aneg(struct phy_device *phydev); 1044 int phy_reset_after_clk_enable(struct phy_device *phydev); 1045 1046 static inline void phy_device_reset(struct phy_device *phydev, int value) 1047 { 1048 mdio_device_reset(&phydev->mdio, value); 1049 } 1050 1051 #define phydev_err(_phydev, format, args...) \ 1052 dev_err(&_phydev->mdio.dev, format, ##args) 1053 1054 #define phydev_info(_phydev, format, args...) \ 1055 dev_info(&_phydev->mdio.dev, format, ##args) 1056 1057 #define phydev_warn(_phydev, format, args...) \ 1058 dev_warn(&_phydev->mdio.dev, format, ##args) 1059 1060 #define phydev_dbg(_phydev, format, args...) \ 1061 dev_dbg(&_phydev->mdio.dev, format, ##args) 1062 1063 static inline const char *phydev_name(const struct phy_device *phydev) 1064 { 1065 return dev_name(&phydev->mdio.dev); 1066 } 1067 1068 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1069 __printf(2, 3); 1070 void phy_attached_info(struct phy_device *phydev); 1071 1072 /* Clause 22 PHY */ 1073 int genphy_config_init(struct phy_device *phydev); 1074 int genphy_read_abilities(struct phy_device *phydev); 1075 int genphy_setup_forced(struct phy_device *phydev); 1076 int genphy_restart_aneg(struct phy_device *phydev); 1077 int genphy_config_eee_advert(struct phy_device *phydev); 1078 int genphy_config_aneg(struct phy_device *phydev); 1079 int genphy_aneg_done(struct phy_device *phydev); 1080 int genphy_update_link(struct phy_device *phydev); 1081 int genphy_read_status(struct phy_device *phydev); 1082 int genphy_suspend(struct phy_device *phydev); 1083 int genphy_resume(struct phy_device *phydev); 1084 int genphy_loopback(struct phy_device *phydev, bool enable); 1085 int genphy_soft_reset(struct phy_device *phydev); 1086 static inline int genphy_no_soft_reset(struct phy_device *phydev) 1087 { 1088 return 0; 1089 } 1090 static inline int genphy_no_ack_interrupt(struct phy_device *phydev) 1091 { 1092 return 0; 1093 } 1094 static inline int genphy_no_config_intr(struct phy_device *phydev) 1095 { 1096 return 0; 1097 } 1098 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1099 u16 regnum); 1100 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1101 u16 regnum, u16 val); 1102 1103 /* Clause 45 PHY */ 1104 int genphy_c45_restart_aneg(struct phy_device *phydev); 1105 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1106 int genphy_c45_aneg_done(struct phy_device *phydev); 1107 int genphy_c45_read_link(struct phy_device *phydev); 1108 int genphy_c45_read_lpa(struct phy_device *phydev); 1109 int genphy_c45_read_pma(struct phy_device *phydev); 1110 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1111 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1112 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1113 int genphy_c45_read_mdix(struct phy_device *phydev); 1114 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1115 int genphy_c45_read_status(struct phy_device *phydev); 1116 1117 /* The gen10g_* functions are the old Clause 45 stub */ 1118 int gen10g_config_aneg(struct phy_device *phydev); 1119 1120 static inline int phy_read_status(struct phy_device *phydev) 1121 { 1122 if (!phydev->drv) 1123 return -EIO; 1124 1125 if (phydev->drv->read_status) 1126 return phydev->drv->read_status(phydev); 1127 else 1128 return genphy_read_status(phydev); 1129 } 1130 1131 void phy_driver_unregister(struct phy_driver *drv); 1132 void phy_drivers_unregister(struct phy_driver *drv, int n); 1133 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1134 int phy_drivers_register(struct phy_driver *new_driver, int n, 1135 struct module *owner); 1136 void phy_state_machine(struct work_struct *work); 1137 void phy_mac_interrupt(struct phy_device *phydev); 1138 void phy_start_machine(struct phy_device *phydev); 1139 void phy_stop_machine(struct phy_device *phydev); 1140 int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd); 1141 void phy_ethtool_ksettings_get(struct phy_device *phydev, 1142 struct ethtool_link_ksettings *cmd); 1143 int phy_ethtool_ksettings_set(struct phy_device *phydev, 1144 const struct ethtool_link_ksettings *cmd); 1145 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1146 void phy_request_interrupt(struct phy_device *phydev); 1147 void phy_print_status(struct phy_device *phydev); 1148 int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1149 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1150 void phy_advertise_supported(struct phy_device *phydev); 1151 void phy_support_sym_pause(struct phy_device *phydev); 1152 void phy_support_asym_pause(struct phy_device *phydev); 1153 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1154 bool autoneg); 1155 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1156 bool phy_validate_pause(struct phy_device *phydev, 1157 struct ethtool_pauseparam *pp); 1158 1159 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1160 int (*run)(struct phy_device *)); 1161 int phy_register_fixup_for_id(const char *bus_id, 1162 int (*run)(struct phy_device *)); 1163 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1164 int (*run)(struct phy_device *)); 1165 1166 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1167 int phy_unregister_fixup_for_id(const char *bus_id); 1168 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1169 1170 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1171 int phy_get_eee_err(struct phy_device *phydev); 1172 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1173 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1174 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1175 void phy_ethtool_get_wol(struct phy_device *phydev, 1176 struct ethtool_wolinfo *wol); 1177 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1178 struct ethtool_link_ksettings *cmd); 1179 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1180 const struct ethtool_link_ksettings *cmd); 1181 int phy_ethtool_nway_reset(struct net_device *ndev); 1182 1183 #if IS_ENABLED(CONFIG_PHYLIB) 1184 int __init mdio_bus_init(void); 1185 void mdio_bus_exit(void); 1186 #endif 1187 1188 /* Inline function for use within net/core/ethtool.c (built-in) */ 1189 static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data) 1190 { 1191 if (!phydev->drv) 1192 return -EIO; 1193 1194 mutex_lock(&phydev->lock); 1195 phydev->drv->get_strings(phydev, data); 1196 mutex_unlock(&phydev->lock); 1197 1198 return 0; 1199 } 1200 1201 static inline int phy_ethtool_get_sset_count(struct phy_device *phydev) 1202 { 1203 int ret; 1204 1205 if (!phydev->drv) 1206 return -EIO; 1207 1208 if (phydev->drv->get_sset_count && 1209 phydev->drv->get_strings && 1210 phydev->drv->get_stats) { 1211 mutex_lock(&phydev->lock); 1212 ret = phydev->drv->get_sset_count(phydev); 1213 mutex_unlock(&phydev->lock); 1214 1215 return ret; 1216 } 1217 1218 return -EOPNOTSUPP; 1219 } 1220 1221 static inline int phy_ethtool_get_stats(struct phy_device *phydev, 1222 struct ethtool_stats *stats, u64 *data) 1223 { 1224 if (!phydev->drv) 1225 return -EIO; 1226 1227 mutex_lock(&phydev->lock); 1228 phydev->drv->get_stats(phydev, stats, data); 1229 mutex_unlock(&phydev->lock); 1230 1231 return 0; 1232 } 1233 1234 extern struct bus_type mdio_bus_type; 1235 1236 struct mdio_board_info { 1237 const char *bus_id; 1238 char modalias[MDIO_NAME_SIZE]; 1239 int mdio_addr; 1240 const void *platform_data; 1241 }; 1242 1243 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 1244 int mdiobus_register_board_info(const struct mdio_board_info *info, 1245 unsigned int n); 1246 #else 1247 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1248 unsigned int n) 1249 { 1250 return 0; 1251 } 1252 #endif 1253 1254 1255 /** 1256 * module_phy_driver() - Helper macro for registering PHY drivers 1257 * @__phy_drivers: array of PHY drivers to register 1258 * 1259 * Helper macro for PHY drivers which do not do anything special in module 1260 * init/exit. Each module may only use this macro once, and calling it 1261 * replaces module_init() and module_exit(). 1262 */ 1263 #define phy_module_driver(__phy_drivers, __count) \ 1264 static int __init phy_module_init(void) \ 1265 { \ 1266 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 1267 } \ 1268 module_init(phy_module_init); \ 1269 static void __exit phy_module_exit(void) \ 1270 { \ 1271 phy_drivers_unregister(__phy_drivers, __count); \ 1272 } \ 1273 module_exit(phy_module_exit) 1274 1275 #define module_phy_driver(__phy_drivers) \ 1276 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 1277 1278 bool phy_driver_is_genphy(struct phy_device *phydev); 1279 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 1280 1281 #endif /* __PHY_H */ 1282