1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11 #ifndef __PHY_H 12 #define __PHY_H 13 14 #include <linux/compiler.h> 15 #include <linux/spinlock.h> 16 #include <linux/ethtool.h> 17 #include <linux/leds.h> 18 #include <linux/linkmode.h> 19 #include <linux/netlink.h> 20 #include <linux/mdio.h> 21 #include <linux/mii.h> 22 #include <linux/mii_timestamper.h> 23 #include <linux/module.h> 24 #include <linux/timer.h> 25 #include <linux/workqueue.h> 26 #include <linux/mod_devicetable.h> 27 #include <linux/u64_stats_sync.h> 28 #include <linux/irqreturn.h> 29 #include <linux/iopoll.h> 30 #include <linux/refcount.h> 31 32 #include <linux/atomic.h> 33 #include <net/eee.h> 34 35 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 36 SUPPORTED_TP | \ 37 SUPPORTED_MII) 38 39 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 40 SUPPORTED_10baseT_Full) 41 42 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 43 SUPPORTED_100baseT_Full) 44 45 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 46 SUPPORTED_1000baseT_Full) 47 48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; 51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 54 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 55 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 56 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 57 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init; 58 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap2_features) __ro_after_init; 59 60 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 61 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 62 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) 63 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 64 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 65 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 66 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 67 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 68 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 69 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features) 70 #define PHY_EEE_CAP2_FEATURES ((unsigned long *)&phy_eee_cap2_features) 71 72 extern const int phy_basic_ports_array[3]; 73 extern const int phy_fibre_port_array[1]; 74 extern const int phy_all_ports_features_array[7]; 75 extern const int phy_10_100_features_array[4]; 76 extern const int phy_basic_t1_features_array[3]; 77 extern const int phy_basic_t1s_p2mp_features_array[2]; 78 extern const int phy_gbit_features_array[2]; 79 extern const int phy_10gbit_features_array[1]; 80 81 /* 82 * Set phydev->irq to PHY_POLL if interrupts are not supported, 83 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 84 * the attached MAC driver handles the interrupt 85 */ 86 #define PHY_POLL -1 87 #define PHY_MAC_INTERRUPT -2 88 89 #define PHY_IS_INTERNAL 0x00000001 90 #define PHY_RST_AFTER_CLK_EN 0x00000002 91 #define PHY_POLL_CABLE_TEST 0x00000004 92 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008 93 #define MDIO_DEVICE_IS_PHY 0x80000000 94 95 /** 96 * enum phy_interface_t - Interface Mode definitions 97 * 98 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 99 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 100 * @PHY_INTERFACE_MODE_MII: Media-independent interface 101 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface 102 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 103 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 104 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 105 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 106 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 107 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 108 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 109 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 110 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 111 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 112 * @PHY_INTERFACE_MODE_SMII: Serial MII 113 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 114 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 115 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 116 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII 117 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 118 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 119 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 120 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 121 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 122 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 123 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 124 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 125 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 126 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 127 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 128 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 129 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII 130 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN 131 * @PHY_INTERFACE_MODE_10G_QXGMII: 10G-QXGMII - 4 ports over 10G USXGMII 132 * @PHY_INTERFACE_MODE_MAX: Book keeping 133 * 134 * Describes the interface between the MAC and PHY. 135 */ 136 typedef enum { 137 PHY_INTERFACE_MODE_NA, 138 PHY_INTERFACE_MODE_INTERNAL, 139 PHY_INTERFACE_MODE_MII, 140 PHY_INTERFACE_MODE_GMII, 141 PHY_INTERFACE_MODE_SGMII, 142 PHY_INTERFACE_MODE_TBI, 143 PHY_INTERFACE_MODE_REVMII, 144 PHY_INTERFACE_MODE_RMII, 145 PHY_INTERFACE_MODE_REVRMII, 146 PHY_INTERFACE_MODE_RGMII, 147 PHY_INTERFACE_MODE_RGMII_ID, 148 PHY_INTERFACE_MODE_RGMII_RXID, 149 PHY_INTERFACE_MODE_RGMII_TXID, 150 PHY_INTERFACE_MODE_RTBI, 151 PHY_INTERFACE_MODE_SMII, 152 PHY_INTERFACE_MODE_XGMII, 153 PHY_INTERFACE_MODE_XLGMII, 154 PHY_INTERFACE_MODE_MOCA, 155 PHY_INTERFACE_MODE_PSGMII, 156 PHY_INTERFACE_MODE_QSGMII, 157 PHY_INTERFACE_MODE_TRGMII, 158 PHY_INTERFACE_MODE_100BASEX, 159 PHY_INTERFACE_MODE_1000BASEX, 160 PHY_INTERFACE_MODE_2500BASEX, 161 PHY_INTERFACE_MODE_5GBASER, 162 PHY_INTERFACE_MODE_RXAUI, 163 PHY_INTERFACE_MODE_XAUI, 164 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 165 PHY_INTERFACE_MODE_10GBASER, 166 PHY_INTERFACE_MODE_25GBASER, 167 PHY_INTERFACE_MODE_USXGMII, 168 /* 10GBASE-KR - with Clause 73 AN */ 169 PHY_INTERFACE_MODE_10GKR, 170 PHY_INTERFACE_MODE_QUSGMII, 171 PHY_INTERFACE_MODE_1000BASEKX, 172 PHY_INTERFACE_MODE_10G_QXGMII, 173 PHY_INTERFACE_MODE_MAX, 174 } phy_interface_t; 175 176 /* PHY interface mode bitmap handling */ 177 #define DECLARE_PHY_INTERFACE_MASK(name) \ 178 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 179 180 static inline void phy_interface_zero(unsigned long *intf) 181 { 182 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 183 } 184 185 static inline bool phy_interface_empty(const unsigned long *intf) 186 { 187 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 188 } 189 190 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 191 const unsigned long *b) 192 { 193 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 194 } 195 196 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 197 const unsigned long *b) 198 { 199 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 200 } 201 202 static inline void phy_interface_set_rgmii(unsigned long *intf) 203 { 204 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 205 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 206 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 207 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 208 } 209 210 /* 211 * phy_supported_speeds - return all speeds currently supported by a PHY device 212 */ 213 unsigned int phy_supported_speeds(struct phy_device *phy, 214 unsigned int *speeds, 215 unsigned int size); 216 217 /** 218 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 219 * @interface: enum phy_interface_t value 220 * 221 * Description: maps enum &phy_interface_t defined in this file 222 * into the device tree binding of 'phy-mode', so that Ethernet 223 * device driver can get PHY interface from device tree. 224 */ 225 static inline const char *phy_modes(phy_interface_t interface) 226 { 227 switch (interface) { 228 case PHY_INTERFACE_MODE_NA: 229 return ""; 230 case PHY_INTERFACE_MODE_INTERNAL: 231 return "internal"; 232 case PHY_INTERFACE_MODE_MII: 233 return "mii"; 234 case PHY_INTERFACE_MODE_GMII: 235 return "gmii"; 236 case PHY_INTERFACE_MODE_SGMII: 237 return "sgmii"; 238 case PHY_INTERFACE_MODE_TBI: 239 return "tbi"; 240 case PHY_INTERFACE_MODE_REVMII: 241 return "rev-mii"; 242 case PHY_INTERFACE_MODE_RMII: 243 return "rmii"; 244 case PHY_INTERFACE_MODE_REVRMII: 245 return "rev-rmii"; 246 case PHY_INTERFACE_MODE_RGMII: 247 return "rgmii"; 248 case PHY_INTERFACE_MODE_RGMII_ID: 249 return "rgmii-id"; 250 case PHY_INTERFACE_MODE_RGMII_RXID: 251 return "rgmii-rxid"; 252 case PHY_INTERFACE_MODE_RGMII_TXID: 253 return "rgmii-txid"; 254 case PHY_INTERFACE_MODE_RTBI: 255 return "rtbi"; 256 case PHY_INTERFACE_MODE_SMII: 257 return "smii"; 258 case PHY_INTERFACE_MODE_XGMII: 259 return "xgmii"; 260 case PHY_INTERFACE_MODE_XLGMII: 261 return "xlgmii"; 262 case PHY_INTERFACE_MODE_MOCA: 263 return "moca"; 264 case PHY_INTERFACE_MODE_PSGMII: 265 return "psgmii"; 266 case PHY_INTERFACE_MODE_QSGMII: 267 return "qsgmii"; 268 case PHY_INTERFACE_MODE_TRGMII: 269 return "trgmii"; 270 case PHY_INTERFACE_MODE_1000BASEX: 271 return "1000base-x"; 272 case PHY_INTERFACE_MODE_1000BASEKX: 273 return "1000base-kx"; 274 case PHY_INTERFACE_MODE_2500BASEX: 275 return "2500base-x"; 276 case PHY_INTERFACE_MODE_5GBASER: 277 return "5gbase-r"; 278 case PHY_INTERFACE_MODE_RXAUI: 279 return "rxaui"; 280 case PHY_INTERFACE_MODE_XAUI: 281 return "xaui"; 282 case PHY_INTERFACE_MODE_10GBASER: 283 return "10gbase-r"; 284 case PHY_INTERFACE_MODE_25GBASER: 285 return "25gbase-r"; 286 case PHY_INTERFACE_MODE_USXGMII: 287 return "usxgmii"; 288 case PHY_INTERFACE_MODE_10GKR: 289 return "10gbase-kr"; 290 case PHY_INTERFACE_MODE_100BASEX: 291 return "100base-x"; 292 case PHY_INTERFACE_MODE_QUSGMII: 293 return "qusgmii"; 294 case PHY_INTERFACE_MODE_10G_QXGMII: 295 return "10g-qxgmii"; 296 default: 297 return "unknown"; 298 } 299 } 300 301 #define PHY_INIT_TIMEOUT 100000 302 #define PHY_FORCE_TIMEOUT 10 303 304 #define PHY_MAX_ADDR 32 305 306 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 307 #define PHY_ID_FMT "%s:%02x" 308 309 #define MII_BUS_ID_SIZE 61 310 311 struct device; 312 struct kernel_hwtstamp_config; 313 struct phylink; 314 struct sfp_bus; 315 struct sfp_upstream_ops; 316 struct sk_buff; 317 318 /** 319 * struct mdio_bus_stats - Statistics counters for MDIO busses 320 * @transfers: Total number of transfers, i.e. @writes + @reads 321 * @errors: Number of MDIO transfers that returned an error 322 * @writes: Number of write transfers 323 * @reads: Number of read transfers 324 * @syncp: Synchronisation for incrementing statistics 325 */ 326 struct mdio_bus_stats { 327 u64_stats_t transfers; 328 u64_stats_t errors; 329 u64_stats_t writes; 330 u64_stats_t reads; 331 /* Must be last, add new statistics above */ 332 struct u64_stats_sync syncp; 333 }; 334 335 /** 336 * struct phy_package_shared - Shared information in PHY packages 337 * @base_addr: Base PHY address of PHY package used to combine PHYs 338 * in one package and for offset calculation of phy_package_read/write 339 * @np: Pointer to the Device Node if PHY package defined in DT 340 * @refcnt: Number of PHYs connected to this shared data 341 * @flags: Initialization of PHY package 342 * @priv_size: Size of the shared private data @priv 343 * @priv: Driver private data shared across a PHY package 344 * 345 * Represents a shared structure between different phydev's in the same 346 * package, for example a quad PHY. See phy_package_join() and 347 * phy_package_leave(). 348 */ 349 struct phy_package_shared { 350 u8 base_addr; 351 /* With PHY package defined in DT this points to the PHY package node */ 352 struct device_node *np; 353 refcount_t refcnt; 354 unsigned long flags; 355 size_t priv_size; 356 357 /* private data pointer */ 358 /* note that this pointer is shared between different phydevs and 359 * the user has to take care of appropriate locking. It is allocated 360 * and freed automatically by phy_package_join() and 361 * phy_package_leave(). 362 */ 363 void *priv; 364 }; 365 366 /* used as bit number in atomic bitops */ 367 #define PHY_SHARED_F_INIT_DONE 0 368 #define PHY_SHARED_F_PROBE_DONE 1 369 370 /** 371 * struct mii_bus - Represents an MDIO bus 372 * 373 * @owner: Who owns this device 374 * @name: User friendly name for this MDIO device, or driver name 375 * @id: Unique identifier for this bus, typical from bus hierarchy 376 * @priv: Driver private data 377 * 378 * The Bus class for PHYs. Devices which provide access to 379 * PHYs should register using this structure 380 */ 381 struct mii_bus { 382 struct module *owner; 383 const char *name; 384 char id[MII_BUS_ID_SIZE]; 385 void *priv; 386 /** @read: Perform a read transfer on the bus */ 387 int (*read)(struct mii_bus *bus, int addr, int regnum); 388 /** @write: Perform a write transfer on the bus */ 389 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 390 /** @read_c45: Perform a C45 read transfer on the bus */ 391 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); 392 /** @write_c45: Perform a C45 write transfer on the bus */ 393 int (*write_c45)(struct mii_bus *bus, int addr, int devnum, 394 int regnum, u16 val); 395 /** @reset: Perform a reset of the bus */ 396 int (*reset)(struct mii_bus *bus); 397 398 /** @stats: Statistic counters per device on the bus */ 399 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 400 401 /** 402 * @mdio_lock: A lock to ensure that only one thing can read/write 403 * the MDIO bus at a time 404 */ 405 struct mutex mdio_lock; 406 407 /** @parent: Parent device of this bus */ 408 struct device *parent; 409 /** @state: State of bus structure */ 410 enum { 411 MDIOBUS_ALLOCATED = 1, 412 MDIOBUS_REGISTERED, 413 MDIOBUS_UNREGISTERED, 414 MDIOBUS_RELEASED, 415 } state; 416 417 /** @dev: Kernel device representation */ 418 struct device dev; 419 420 /** @mdio_map: list of all MDIO devices on bus */ 421 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 422 423 /** @phy_mask: PHY addresses to be ignored when probing */ 424 u32 phy_mask; 425 426 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 427 u32 phy_ignore_ta_mask; 428 429 /** 430 * @irq: An array of interrupts, each PHY's interrupt at the index 431 * matching its address 432 */ 433 int irq[PHY_MAX_ADDR]; 434 435 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 436 int reset_delay_us; 437 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 438 int reset_post_delay_us; 439 /** @reset_gpiod: Reset GPIO descriptor pointer */ 440 struct gpio_desc *reset_gpiod; 441 442 /** @shared_lock: protect access to the shared element */ 443 struct mutex shared_lock; 444 445 /** @shared: shared state across different PHYs */ 446 struct phy_package_shared *shared[PHY_MAX_ADDR]; 447 }; 448 #define to_mii_bus(d) container_of(d, struct mii_bus, dev) 449 450 struct mii_bus *mdiobus_alloc_size(size_t size); 451 452 /** 453 * mdiobus_alloc - Allocate an MDIO bus structure 454 * 455 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 456 * for the driver to register the bus. 457 */ 458 static inline struct mii_bus *mdiobus_alloc(void) 459 { 460 return mdiobus_alloc_size(0); 461 } 462 463 int __mdiobus_register(struct mii_bus *bus, struct module *owner); 464 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 465 struct module *owner); 466 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 467 #define devm_mdiobus_register(dev, bus) \ 468 __devm_mdiobus_register(dev, bus, THIS_MODULE) 469 470 void mdiobus_unregister(struct mii_bus *bus); 471 void mdiobus_free(struct mii_bus *bus); 472 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 473 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 474 { 475 return devm_mdiobus_alloc_size(dev, 0); 476 } 477 478 struct mii_bus *mdio_find_bus(const char *mdio_name); 479 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); 480 481 #define PHY_INTERRUPT_DISABLED false 482 #define PHY_INTERRUPT_ENABLED true 483 484 /** 485 * enum phy_state - PHY state machine states: 486 * 487 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 488 * should be called if and only if the PHY is in this state, 489 * given that the PHY device exists. 490 * - PHY driver probe function will set the state to @PHY_READY 491 * 492 * @PHY_READY: PHY is ready to send and receive packets, but the 493 * controller is not. By default, PHYs which do not implement 494 * probe will be set to this state by phy_probe(). 495 * - start will set the state to UP 496 * 497 * @PHY_UP: The PHY and attached device are ready to do work. 498 * Interrupts should be started here. 499 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 500 * 501 * @PHY_NOLINK: PHY is up, but not currently plugged in. 502 * - irq or timer will set @PHY_RUNNING if link comes back 503 * - phy_stop moves to @PHY_HALTED 504 * 505 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 506 * and/or receiving packets 507 * - irq or timer will set @PHY_NOLINK if link goes down 508 * - phy_stop moves to @PHY_HALTED 509 * 510 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 511 * is not expected to work, carrier will be indicated as down. PHY will be 512 * poll once per second, or on interrupt for it current state. 513 * Once complete, move to UP to restart the PHY. 514 * - phy_stop aborts the running test and moves to @PHY_HALTED 515 * 516 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. 517 * - phy_start moves to @PHY_UP 518 * 519 * @PHY_ERROR: PHY is up, but is in an error state. 520 * - phy_stop moves to @PHY_HALTED 521 */ 522 enum phy_state { 523 PHY_DOWN = 0, 524 PHY_READY, 525 PHY_HALTED, 526 PHY_ERROR, 527 PHY_UP, 528 PHY_RUNNING, 529 PHY_NOLINK, 530 PHY_CABLETEST, 531 }; 532 533 #define MDIO_MMD_NUM 32 534 535 /** 536 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 537 * @devices_in_package: IEEE 802.3 devices in package register value. 538 * @mmds_present: bit vector of MMDs present. 539 * @device_ids: The device identifer for each present device. 540 */ 541 struct phy_c45_device_ids { 542 u32 devices_in_package; 543 u32 mmds_present; 544 u32 device_ids[MDIO_MMD_NUM]; 545 }; 546 547 struct macsec_context; 548 struct macsec_ops; 549 550 /** 551 * struct phy_device - An instance of a PHY 552 * 553 * @mdio: MDIO bus this PHY is on 554 * @drv: Pointer to the driver for this PHY instance 555 * @devlink: Create a link between phy dev and mac dev, if the external phy 556 * used by current mac interface is managed by another mac interface. 557 * @phyindex: Unique id across the phy's parent tree of phys to address the PHY 558 * from userspace, similar to ifindex. A zero index means the PHY 559 * wasn't assigned an id yet. 560 * @phy_id: UID for this device found during discovery 561 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 562 * @is_c45: Set to true if this PHY uses clause 45 addressing. 563 * @is_internal: Set to true if this PHY is internal to a MAC. 564 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 565 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 566 * @has_fixups: Set to true if this PHY has fixups/quirks. 567 * @suspended: Set to true if this PHY has been suspended successfully. 568 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 569 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 570 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 571 * @downshifted_rate: Set true if link speed has been downshifted. 572 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 573 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 574 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN 575 * enabled. 576 * @state: State of the PHY for management purposes 577 * @dev_flags: Device-specific flags used by the PHY driver. 578 * 579 * - Bits [15:0] are free to use by the PHY driver to communicate 580 * driver specific behavior. 581 * - Bits [23:16] are currently reserved for future use. 582 * - Bits [31:24] are reserved for defining generic 583 * PHY driver behavior. 584 * @irq: IRQ number of the PHY's interrupt (-1 if none) 585 * @phylink: Pointer to phylink instance for this PHY 586 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 587 * @sfp_bus: SFP bus attached to this PHY's fiber port 588 * @attached_dev: The attached enet driver's device instance ptr 589 * @adjust_link: Callback for the enet controller to respond to changes: in the 590 * link state. 591 * @phy_link_change: Callback for phylink for notification of link change 592 * @macsec_ops: MACsec offloading ops. 593 * 594 * @speed: Current link speed 595 * @duplex: Current duplex 596 * @port: Current port 597 * @pause: Current pause 598 * @asym_pause: Current asymmetric pause 599 * @supported: Combined MAC/PHY supported linkmodes 600 * @advertising: Currently advertised linkmodes 601 * @adv_old: Saved advertised while power saving for WoL 602 * @supported_eee: supported PHY EEE linkmodes 603 * @advertising_eee: Currently advertised EEE linkmodes 604 * @enable_tx_lpi: When True, MAC should transmit LPI to PHY 605 * @eee_active: phylib private state, indicating that EEE has been negotiated 606 * @eee_cfg: User configuration of EEE 607 * @lp_advertising: Current link partner advertised linkmodes 608 * @host_interfaces: PHY interface modes supported by host 609 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 610 * @autoneg: Flag autoneg being used 611 * @rate_matching: Current rate matching mode 612 * @link: Current link state 613 * @autoneg_complete: Flag auto negotiation of the link has completed 614 * @mdix: Current crossover 615 * @mdix_ctrl: User setting of crossover 616 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register 617 * @interrupts: Flag interrupts have been enabled 618 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt 619 * handling shall be postponed until PHY has resumed 620 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, 621 * requiring a rerun of the interrupt handler after resume 622 * @default_timestamp: Flag indicating whether we are using the phy 623 * timestamp as the default one 624 * @interface: enum phy_interface_t value 625 * @possible_interfaces: bitmap if interface modes that the attached PHY 626 * will switch between depending on media speed. 627 * @skb: Netlink message for cable diagnostics 628 * @nest: Netlink nest used for cable diagnostics 629 * @ehdr: nNtlink header for cable diagnostics 630 * @phy_led_triggers: Array of LED triggers 631 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 632 * @led_link_trigger: LED trigger for link up/down 633 * @last_triggered: last LED trigger for link speed 634 * @leds: list of PHY LED structures 635 * @master_slave_set: User requested master/slave configuration 636 * @master_slave_get: Current master/slave advertisement 637 * @master_slave_state: Current master/slave configuration 638 * @mii_ts: Pointer to time stamper callbacks 639 * @psec: Pointer to Power Sourcing Equipment control struct 640 * @lock: Mutex for serialization access to PHY 641 * @state_queue: Work queue for state machine 642 * @link_down_events: Number of times link was lost 643 * @shared: Pointer to private data shared by phys in one package 644 * @priv: Pointer to driver private data 645 * 646 * interrupts currently only supports enabled or disabled, 647 * but could be changed in the future to support enabling 648 * and disabling specific interrupts 649 * 650 * Contains some infrastructure for polling and interrupt 651 * handling, as well as handling shifts in PHY hardware state 652 */ 653 struct phy_device { 654 struct mdio_device mdio; 655 656 /* Information about the PHY type */ 657 /* And management functions */ 658 const struct phy_driver *drv; 659 660 struct device_link *devlink; 661 662 u32 phyindex; 663 u32 phy_id; 664 665 struct phy_c45_device_ids c45_ids; 666 unsigned is_c45:1; 667 unsigned is_internal:1; 668 unsigned is_pseudo_fixed_link:1; 669 unsigned is_gigabit_capable:1; 670 unsigned has_fixups:1; 671 unsigned suspended:1; 672 unsigned suspended_by_mdio_bus:1; 673 unsigned sysfs_links:1; 674 unsigned loopback_enabled:1; 675 unsigned downshifted_rate:1; 676 unsigned is_on_sfp_module:1; 677 unsigned mac_managed_pm:1; 678 unsigned wol_enabled:1; 679 680 unsigned autoneg:1; 681 /* The most recently read link state */ 682 unsigned link:1; 683 unsigned autoneg_complete:1; 684 685 /* Interrupts are enabled */ 686 unsigned interrupts:1; 687 unsigned irq_suspended:1; 688 unsigned irq_rerun:1; 689 690 unsigned default_timestamp:1; 691 692 int rate_matching; 693 694 enum phy_state state; 695 696 u32 dev_flags; 697 698 phy_interface_t interface; 699 DECLARE_PHY_INTERFACE_MASK(possible_interfaces); 700 701 /* 702 * forced speed & duplex (no autoneg) 703 * partner speed & duplex & pause (autoneg) 704 */ 705 int speed; 706 int duplex; 707 int port; 708 int pause; 709 int asym_pause; 710 u8 master_slave_get; 711 u8 master_slave_set; 712 u8 master_slave_state; 713 714 /* Union of PHY and Attached devices' supported link modes */ 715 /* See ethtool.h for more info */ 716 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 717 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 718 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 719 /* used with phy_speed_down */ 720 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 721 /* used for eee validation and configuration*/ 722 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee); 723 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee); 724 /* Energy efficient ethernet modes which should be prohibited */ 725 __ETHTOOL_DECLARE_LINK_MODE_MASK(eee_broken_modes); 726 bool enable_tx_lpi; 727 bool eee_active; 728 struct eee_config eee_cfg; 729 730 /* Host supported PHY interface types. Should be ignored if empty. */ 731 DECLARE_PHY_INTERFACE_MASK(host_interfaces); 732 733 #ifdef CONFIG_LED_TRIGGER_PHY 734 struct phy_led_trigger *phy_led_triggers; 735 unsigned int phy_num_led_triggers; 736 struct phy_led_trigger *last_triggered; 737 738 struct phy_led_trigger *led_link_trigger; 739 #endif 740 struct list_head leds; 741 742 /* 743 * Interrupt number for this PHY 744 * -1 means no interrupt 745 */ 746 int irq; 747 748 /* private data pointer */ 749 /* For use by PHYs to maintain extra state */ 750 void *priv; 751 752 /* shared data pointer */ 753 /* For use by PHYs inside the same package that need a shared state. */ 754 struct phy_package_shared *shared; 755 756 /* Reporting cable test results */ 757 struct sk_buff *skb; 758 void *ehdr; 759 struct nlattr *nest; 760 761 /* Interrupt and Polling infrastructure */ 762 struct delayed_work state_queue; 763 764 struct mutex lock; 765 766 /* This may be modified under the rtnl lock */ 767 bool sfp_bus_attached; 768 struct sfp_bus *sfp_bus; 769 struct phylink *phylink; 770 struct net_device *attached_dev; 771 struct mii_timestamper *mii_ts; 772 struct pse_control *psec; 773 774 u8 mdix; 775 u8 mdix_ctrl; 776 777 int pma_extable; 778 779 unsigned int link_down_events; 780 781 void (*phy_link_change)(struct phy_device *phydev, bool up); 782 void (*adjust_link)(struct net_device *dev); 783 784 #if IS_ENABLED(CONFIG_MACSEC) 785 /* MACsec management functions */ 786 const struct macsec_ops *macsec_ops; 787 #endif 788 }; 789 790 /* Generic phy_device::dev_flags */ 791 #define PHY_F_NO_IRQ 0x80000000 792 #define PHY_F_RXC_ALWAYS_ON 0x40000000 793 794 static inline struct phy_device *to_phy_device(const struct device *dev) 795 { 796 return container_of(to_mdio_device(dev), struct phy_device, mdio); 797 } 798 799 /** 800 * struct phy_tdr_config - Configuration of a TDR raw test 801 * 802 * @first: Distance for first data collection point 803 * @last: Distance for last data collection point 804 * @step: Step between data collection points 805 * @pair: Bitmap of cable pairs to collect data for 806 * 807 * A structure containing possible configuration parameters 808 * for a TDR cable test. The driver does not need to implement 809 * all the parameters, but should report what is actually used. 810 * All distances are in centimeters. 811 */ 812 struct phy_tdr_config { 813 u32 first; 814 u32 last; 815 u32 step; 816 s8 pair; 817 }; 818 #define PHY_PAIR_ALL -1 819 820 /** 821 * enum link_inband_signalling - in-band signalling modes that are supported 822 * 823 * @LINK_INBAND_DISABLE: in-band signalling can be disabled 824 * @LINK_INBAND_ENABLE: in-band signalling can be enabled without bypass 825 * @LINK_INBAND_BYPASS: in-band signalling can be enabled with bypass 826 * 827 * The possible and required bits can only be used if the valid bit is set. 828 * If possible is clear, that means inband signalling can not be used. 829 * Required is only valid when possible is set, and means that inband 830 * signalling must be used. 831 */ 832 enum link_inband_signalling { 833 LINK_INBAND_DISABLE = BIT(0), 834 LINK_INBAND_ENABLE = BIT(1), 835 LINK_INBAND_BYPASS = BIT(2), 836 }; 837 838 /** 839 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision 840 * Avoidance) Reconciliation Sublayer. 841 * 842 * @version: read-only PLCA register map version. -1 = not available. Ignored 843 * when setting the configuration. Format is the same as reported by the PLCA 844 * IDVER register (31.CA00). -1 = not available. 845 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't 846 * set. 0 = disabled, anything else = enabled. 847 * @node_id: the PLCA local node identifier. -1 = not available / don't set. 848 * Allowed values [0 .. 254]. 255 = node disabled. 849 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only 850 * meaningful for the coordinator (node_id = 0). -1 = not available / don't 851 * set. Allowed values [1 .. 255]. 852 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the 853 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for 854 * more details. The to_timer shall be set equal over all nodes. 855 * -1 = not available / don't set. Allowed values [0 .. 255]. 856 * @burst_cnt: controls how many additional frames a node is allowed to send in 857 * single transmit opportunity (TO). The default value of 0 means that the 858 * node is allowed exactly one frame per TO. A value of 1 allows two frames 859 * per TO, and so on. -1 = not available / don't set. 860 * Allowed values [0 .. 255]. 861 * @burst_tmr: controls how many bit times to wait for the MAC to send a new 862 * frame before interrupting the burst. This value should be set to a value 863 * greater than the MAC inter-packet gap (which is typically 96 bits). 864 * -1 = not available / don't set. Allowed values [0 .. 255]. 865 * 866 * A structure containing configuration parameters for setting/getting the PLCA 867 * RS configuration. The driver does not need to implement all the parameters, 868 * but should report what is actually used. 869 */ 870 struct phy_plca_cfg { 871 int version; 872 int enabled; 873 int node_id; 874 int node_cnt; 875 int to_tmr; 876 int burst_cnt; 877 int burst_tmr; 878 }; 879 880 /** 881 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision 882 * Avoidance) Reconciliation Sublayer. 883 * 884 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS 885 * register(31.CA03), indicating BEACON activity. 886 * 887 * A structure containing status information of the PLCA RS configuration. 888 * The driver does not need to implement all the parameters, but should report 889 * what is actually used. 890 */ 891 struct phy_plca_status { 892 bool pst; 893 }; 894 895 /* Modes for PHY LED configuration */ 896 enum phy_led_modes { 897 PHY_LED_ACTIVE_HIGH = 0, 898 PHY_LED_ACTIVE_LOW = 1, 899 PHY_LED_INACTIVE_HIGH_IMPEDANCE = 2, 900 901 /* keep it last */ 902 __PHY_LED_MODES_NUM, 903 }; 904 905 /** 906 * struct phy_led: An LED driven by the PHY 907 * 908 * @list: List of LEDs 909 * @phydev: PHY this LED is attached to 910 * @led_cdev: Standard LED class structure 911 * @index: Number of the LED 912 */ 913 struct phy_led { 914 struct list_head list; 915 struct phy_device *phydev; 916 struct led_classdev led_cdev; 917 u8 index; 918 }; 919 920 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev) 921 922 /** 923 * struct phy_driver - Driver structure for a particular PHY type 924 * 925 * @mdiodrv: Data common to all MDIO devices 926 * @phy_id: The result of reading the UID registers of this PHY 927 * type, and ANDing them with the phy_id_mask. This driver 928 * only works for PHYs with IDs which match this field 929 * @name: The friendly name of this PHY type 930 * @phy_id_mask: Defines the important bits of the phy_id 931 * @features: A mandatory list of features (speed, duplex, etc) 932 * supported by this PHY 933 * @flags: A bitfield defining certain other features this PHY 934 * supports (like interrupts) 935 * @driver_data: Static driver data 936 * 937 * All functions are optional. If config_aneg or read_status 938 * are not implemented, the phy core uses the genphy versions. 939 * Note that none of these functions should be called from 940 * interrupt time. The goal is for the bus read/write functions 941 * to be able to block when the bus transaction is happening, 942 * and be freed up by an interrupt (The MPC85xx has this ability, 943 * though it is not currently supported in the driver). 944 */ 945 struct phy_driver { 946 struct mdio_driver_common mdiodrv; 947 u32 phy_id; 948 char *name; 949 u32 phy_id_mask; 950 const unsigned long * const features; 951 u32 flags; 952 const void *driver_data; 953 954 /** 955 * @soft_reset: Called to issue a PHY software reset 956 */ 957 int (*soft_reset)(struct phy_device *phydev); 958 959 /** 960 * @config_init: Called to initialize the PHY, 961 * including after a reset 962 */ 963 int (*config_init)(struct phy_device *phydev); 964 965 /** 966 * @probe: Called during discovery. Used to set 967 * up device-specific structures, if any 968 */ 969 int (*probe)(struct phy_device *phydev); 970 971 /** 972 * @get_features: Probe the hardware to determine what 973 * abilities it has. Should only set phydev->supported. 974 */ 975 int (*get_features)(struct phy_device *phydev); 976 977 /** 978 * @inband_caps: query whether in-band is supported for the given PHY 979 * interface mode. Returns a bitmask of bits defined by enum 980 * link_inband_signalling. 981 */ 982 unsigned int (*inband_caps)(struct phy_device *phydev, 983 phy_interface_t interface); 984 985 /** 986 * @config_inband: configure in-band mode for the PHY 987 */ 988 int (*config_inband)(struct phy_device *phydev, unsigned int modes); 989 990 /** 991 * @get_rate_matching: Get the supported type of rate matching for a 992 * particular phy interface. This is used by phy consumers to determine 993 * whether to advertise lower-speed modes for that interface. It is 994 * assumed that if a rate matching mode is supported on an interface, 995 * then that interface's rate can be adapted to all slower link speeds 996 * supported by the phy. If the interface is not supported, this should 997 * return %RATE_MATCH_NONE. 998 */ 999 int (*get_rate_matching)(struct phy_device *phydev, 1000 phy_interface_t iface); 1001 1002 /* PHY Power Management */ 1003 /** @suspend: Suspend the hardware, saving state if needed */ 1004 int (*suspend)(struct phy_device *phydev); 1005 /** @resume: Resume the hardware, restoring state if needed */ 1006 int (*resume)(struct phy_device *phydev); 1007 1008 /** 1009 * @config_aneg: Configures the advertisement and resets 1010 * autonegotiation if phydev->autoneg is on, 1011 * forces the speed to the current settings in phydev 1012 * if phydev->autoneg is off 1013 */ 1014 int (*config_aneg)(struct phy_device *phydev); 1015 1016 /** @aneg_done: Determines the auto negotiation result */ 1017 int (*aneg_done)(struct phy_device *phydev); 1018 1019 /** @read_status: Determines the negotiated speed and duplex */ 1020 int (*read_status)(struct phy_device *phydev); 1021 1022 /** 1023 * @config_intr: Enables or disables interrupts. 1024 * It should also clear any pending interrupts prior to enabling the 1025 * IRQs and after disabling them. 1026 */ 1027 int (*config_intr)(struct phy_device *phydev); 1028 1029 /** @handle_interrupt: Override default interrupt handling */ 1030 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 1031 1032 /** @remove: Clears up any memory if needed */ 1033 void (*remove)(struct phy_device *phydev); 1034 1035 /** 1036 * @match_phy_device: Returns true if this is a suitable 1037 * driver for the given phydev. If NULL, matching is based on 1038 * phy_id and phy_id_mask. 1039 */ 1040 int (*match_phy_device)(struct phy_device *phydev); 1041 1042 /** 1043 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 1044 * register changes to enable Wake on LAN, so set_wol is 1045 * provided to be called in the ethernet driver's set_wol 1046 * function. 1047 */ 1048 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1049 1050 /** 1051 * @get_wol: See set_wol, but for checking whether Wake on LAN 1052 * is enabled. 1053 */ 1054 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 1055 1056 /** 1057 * @link_change_notify: Called to inform a PHY device driver 1058 * when the core is about to change the link state. This 1059 * callback is supposed to be used as fixup hook for drivers 1060 * that need to take action when the link state 1061 * changes. Drivers are by no means allowed to mess with the 1062 * PHY device structure in their implementations. 1063 */ 1064 void (*link_change_notify)(struct phy_device *dev); 1065 1066 /** 1067 * @read_mmd: PHY specific driver override for reading a MMD 1068 * register. This function is optional for PHY specific 1069 * drivers. When not provided, the default MMD read function 1070 * will be used by phy_read_mmd(), which will use either a 1071 * direct read for Clause 45 PHYs or an indirect read for 1072 * Clause 22 PHYs. devnum is the MMD device number within the 1073 * PHY device, regnum is the register within the selected MMD 1074 * device. 1075 */ 1076 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 1077 1078 /** 1079 * @write_mmd: PHY specific driver override for writing a MMD 1080 * register. This function is optional for PHY specific 1081 * drivers. When not provided, the default MMD write function 1082 * will be used by phy_write_mmd(), which will use either a 1083 * direct write for Clause 45 PHYs, or an indirect write for 1084 * Clause 22 PHYs. devnum is the MMD device number within the 1085 * PHY device, regnum is the register within the selected MMD 1086 * device. val is the value to be written. 1087 */ 1088 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 1089 u16 val); 1090 1091 /** @read_page: Return the current PHY register page number */ 1092 int (*read_page)(struct phy_device *dev); 1093 /** @write_page: Set the current PHY register page number */ 1094 int (*write_page)(struct phy_device *dev, int page); 1095 1096 /** 1097 * @module_info: Get the size and type of the eeprom contained 1098 * within a plug-in module 1099 */ 1100 int (*module_info)(struct phy_device *dev, 1101 struct ethtool_modinfo *modinfo); 1102 1103 /** 1104 * @module_eeprom: Get the eeprom information from the plug-in 1105 * module 1106 */ 1107 int (*module_eeprom)(struct phy_device *dev, 1108 struct ethtool_eeprom *ee, u8 *data); 1109 1110 /** @cable_test_start: Start a cable test */ 1111 int (*cable_test_start)(struct phy_device *dev); 1112 1113 /** @cable_test_tdr_start: Start a raw TDR cable test */ 1114 int (*cable_test_tdr_start)(struct phy_device *dev, 1115 const struct phy_tdr_config *config); 1116 1117 /** 1118 * @cable_test_get_status: Once per second, or on interrupt, 1119 * request the status of the test. 1120 */ 1121 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 1122 1123 /* Get statistics from the PHY using ethtool */ 1124 /** @get_sset_count: Number of statistic counters */ 1125 int (*get_sset_count)(struct phy_device *dev); 1126 /** @get_strings: Names of the statistic counters */ 1127 void (*get_strings)(struct phy_device *dev, u8 *data); 1128 /** @get_stats: Return the statistic counter values */ 1129 void (*get_stats)(struct phy_device *dev, 1130 struct ethtool_stats *stats, u64 *data); 1131 1132 /* Get and Set PHY tunables */ 1133 /** @get_tunable: Return the value of a tunable */ 1134 int (*get_tunable)(struct phy_device *dev, 1135 struct ethtool_tunable *tuna, void *data); 1136 /** @set_tunable: Set the value of a tunable */ 1137 int (*set_tunable)(struct phy_device *dev, 1138 struct ethtool_tunable *tuna, 1139 const void *data); 1140 /** @set_loopback: Set the loopback mood of the PHY */ 1141 int (*set_loopback)(struct phy_device *dev, bool enable); 1142 /** @get_sqi: Get the signal quality indication */ 1143 int (*get_sqi)(struct phy_device *dev); 1144 /** @get_sqi_max: Get the maximum signal quality indication */ 1145 int (*get_sqi_max)(struct phy_device *dev); 1146 1147 /* PLCA RS interface */ 1148 /** @get_plca_cfg: Return the current PLCA configuration */ 1149 int (*get_plca_cfg)(struct phy_device *dev, 1150 struct phy_plca_cfg *plca_cfg); 1151 /** @set_plca_cfg: Set the PLCA configuration */ 1152 int (*set_plca_cfg)(struct phy_device *dev, 1153 const struct phy_plca_cfg *plca_cfg); 1154 /** @get_plca_status: Return the current PLCA status info */ 1155 int (*get_plca_status)(struct phy_device *dev, 1156 struct phy_plca_status *plca_st); 1157 1158 /** 1159 * @led_brightness_set: Set a PHY LED brightness. Index 1160 * indicates which of the PHYs led should be set. Value 1161 * follows the standard LED class meaning, e.g. LED_OFF, 1162 * LED_HALF, LED_FULL. 1163 */ 1164 int (*led_brightness_set)(struct phy_device *dev, 1165 u8 index, enum led_brightness value); 1166 1167 /** 1168 * @led_blink_set: Set a PHY LED blinking. Index indicates 1169 * which of the PHYs led should be configured to blink. Delays 1170 * are in milliseconds and if both are zero then a sensible 1171 * default should be chosen. The call should adjust the 1172 * timings in that case and if it can't match the values 1173 * specified exactly. 1174 */ 1175 int (*led_blink_set)(struct phy_device *dev, u8 index, 1176 unsigned long *delay_on, 1177 unsigned long *delay_off); 1178 /** 1179 * @led_hw_is_supported: Can the HW support the given rules. 1180 * @dev: PHY device which has the LED 1181 * @index: Which LED of the PHY device 1182 * @rules The core is interested in these rules 1183 * 1184 * Return 0 if yes, -EOPNOTSUPP if not, or an error code. 1185 */ 1186 int (*led_hw_is_supported)(struct phy_device *dev, u8 index, 1187 unsigned long rules); 1188 /** 1189 * @led_hw_control_set: Set the HW to control the LED 1190 * @dev: PHY device which has the LED 1191 * @index: Which LED of the PHY device 1192 * @rules The rules used to control the LED 1193 * 1194 * Returns 0, or a an error code. 1195 */ 1196 int (*led_hw_control_set)(struct phy_device *dev, u8 index, 1197 unsigned long rules); 1198 /** 1199 * @led_hw_control_get: Get how the HW is controlling the LED 1200 * @dev: PHY device which has the LED 1201 * @index: Which LED of the PHY device 1202 * @rules Pointer to the rules used to control the LED 1203 * 1204 * Set *@rules to how the HW is currently blinking. Returns 0 1205 * on success, or a error code if the current blinking cannot 1206 * be represented in rules, or some other error happens. 1207 */ 1208 int (*led_hw_control_get)(struct phy_device *dev, u8 index, 1209 unsigned long *rules); 1210 1211 /** 1212 * @led_polarity_set: Set the LED polarity modes 1213 * @dev: PHY device which has the LED 1214 * @index: Which LED of the PHY device 1215 * @modes: bitmap of LED polarity modes 1216 * 1217 * Configure LED with all the required polarity modes in @modes 1218 * to make it correctly turn ON or OFF. 1219 * 1220 * Returns 0, or an error code. 1221 */ 1222 int (*led_polarity_set)(struct phy_device *dev, int index, 1223 unsigned long modes); 1224 }; 1225 #define to_phy_driver(d) container_of_const(to_mdio_common_driver(d), \ 1226 struct phy_driver, mdiodrv) 1227 1228 #define PHY_ANY_ID "MATCH ANY PHY" 1229 #define PHY_ANY_UID 0xffffffff 1230 1231 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 1232 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 1233 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 1234 1235 /** 1236 * phy_id_compare - compare @id1 with @id2 taking account of @mask 1237 * @id1: first PHY ID 1238 * @id2: second PHY ID 1239 * @mask: the PHY ID mask, set bits are significant in matching 1240 * 1241 * Return true if the bits from @id1 and @id2 specified by @mask match. 1242 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask). 1243 */ 1244 static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask) 1245 { 1246 return !((id1 ^ id2) & mask); 1247 } 1248 1249 /** 1250 * phydev_id_compare - compare @id with the PHY's Clause 22 ID 1251 * @phydev: the PHY device 1252 * @id: the PHY ID to be matched 1253 * 1254 * Compare the @phydev clause 22 ID with the provided @id and return true or 1255 * false depending whether it matches, using the bound driver mask. The 1256 * @phydev must be bound to a driver. 1257 */ 1258 static inline bool phydev_id_compare(struct phy_device *phydev, u32 id) 1259 { 1260 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask); 1261 } 1262 1263 /* A Structure for boards to register fixups with the PHY Lib */ 1264 struct phy_fixup { 1265 struct list_head list; 1266 char bus_id[MII_BUS_ID_SIZE + 3]; 1267 u32 phy_uid; 1268 u32 phy_uid_mask; 1269 int (*run)(struct phy_device *phydev); 1270 }; 1271 1272 const char *phy_speed_to_str(int speed); 1273 const char *phy_duplex_to_str(unsigned int duplex); 1274 const char *phy_rate_matching_to_str(int rate_matching); 1275 1276 int phy_interface_num_ports(phy_interface_t interface); 1277 1278 /* A structure for mapping a particular speed and duplex 1279 * combination to a particular SUPPORTED and ADVERTISED value 1280 */ 1281 struct phy_setting { 1282 u32 speed; 1283 u8 duplex; 1284 u8 bit; 1285 }; 1286 1287 const struct phy_setting * 1288 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 1289 bool exact); 1290 size_t phy_speeds(unsigned int *speeds, size_t size, 1291 unsigned long *mask); 1292 void of_set_phy_supported(struct phy_device *phydev); 1293 void of_set_phy_eee_broken(struct phy_device *phydev); 1294 void of_set_phy_timing_role(struct phy_device *phydev); 1295 int phy_speed_down_core(struct phy_device *phydev); 1296 1297 /** 1298 * phy_set_eee_broken - Mark an EEE mode as broken so that it isn't advertised. 1299 * @phydev: The phy_device struct 1300 * @link_mode: The broken EEE mode 1301 */ 1302 static inline void phy_set_eee_broken(struct phy_device *phydev, u32 link_mode) 1303 { 1304 linkmode_set_bit(link_mode, phydev->eee_broken_modes); 1305 } 1306 1307 /** 1308 * phy_is_started - Convenience function to check whether PHY is started 1309 * @phydev: The phy_device struct 1310 */ 1311 static inline bool phy_is_started(struct phy_device *phydev) 1312 { 1313 return phydev->state >= PHY_UP; 1314 } 1315 1316 void phy_resolve_aneg_pause(struct phy_device *phydev); 1317 void phy_resolve_aneg_linkmode(struct phy_device *phydev); 1318 void phy_check_downshift(struct phy_device *phydev); 1319 1320 /** 1321 * phy_read - Convenience function for reading a given PHY register 1322 * @phydev: the phy_device struct 1323 * @regnum: register number to read 1324 * 1325 * NOTE: MUST NOT be called from interrupt context, 1326 * because the bus read/write functions may wait for an interrupt 1327 * to conclude the operation. 1328 */ 1329 static inline int phy_read(struct phy_device *phydev, u32 regnum) 1330 { 1331 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1332 } 1333 1334 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1335 timeout_us, sleep_before_read) \ 1336 ({ \ 1337 int __ret, __val; \ 1338 __ret = read_poll_timeout(__val = phy_read, val, \ 1339 __val < 0 || (cond), \ 1340 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1341 if (__val < 0) \ 1342 __ret = __val; \ 1343 if (__ret) \ 1344 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1345 __ret; \ 1346 }) 1347 1348 /** 1349 * __phy_read - convenience function for reading a given PHY register 1350 * @phydev: the phy_device struct 1351 * @regnum: register number to read 1352 * 1353 * The caller must have taken the MDIO bus lock. 1354 */ 1355 static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1356 { 1357 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1358 } 1359 1360 /** 1361 * phy_write - Convenience function for writing a given PHY register 1362 * @phydev: the phy_device struct 1363 * @regnum: register number to write 1364 * @val: value to write to @regnum 1365 * 1366 * NOTE: MUST NOT be called from interrupt context, 1367 * because the bus read/write functions may wait for an interrupt 1368 * to conclude the operation. 1369 */ 1370 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1371 { 1372 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1373 } 1374 1375 /** 1376 * __phy_write - Convenience function for writing a given PHY register 1377 * @phydev: the phy_device struct 1378 * @regnum: register number to write 1379 * @val: value to write to @regnum 1380 * 1381 * The caller must have taken the MDIO bus lock. 1382 */ 1383 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1384 { 1385 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1386 val); 1387 } 1388 1389 /** 1390 * __phy_modify_changed() - Convenience function for modifying a PHY register 1391 * @phydev: a pointer to a &struct phy_device 1392 * @regnum: register number 1393 * @mask: bit mask of bits to clear 1394 * @set: bit mask of bits to set 1395 * 1396 * Unlocked helper function which allows a PHY register to be modified as 1397 * new register value = (old register value & ~mask) | set 1398 * 1399 * Returns negative errno, 0 if there was no change, and 1 in case of change 1400 */ 1401 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1402 u16 mask, u16 set) 1403 { 1404 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1405 regnum, mask, set); 1406 } 1407 1408 /* 1409 * phy_read_mmd - Convenience function for reading a register 1410 * from an MMD on a given PHY. 1411 */ 1412 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1413 1414 /** 1415 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1416 * condition is met or a timeout occurs 1417 * 1418 * @phydev: The phy_device struct 1419 * @devaddr: The MMD to read from 1420 * @regnum: The register on the MMD to read 1421 * @val: Variable to read the register into 1422 * @cond: Break condition (usually involving @val) 1423 * @sleep_us: Maximum time to sleep between reads in us (0 tight-loops). Please 1424 * read usleep_range() function description for details and 1425 * limitations. 1426 * @timeout_us: Timeout in us, 0 means never timeout 1427 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1428 * 1429 * Returns: 0 on success and -ETIMEDOUT upon a timeout. In either 1430 * case, the last read value at @args is stored in @val. Must not 1431 * be called from atomic context if sleep_us or timeout_us are used. 1432 */ 1433 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1434 sleep_us, timeout_us, sleep_before_read) \ 1435 ({ \ 1436 int __ret, __val; \ 1437 __ret = read_poll_timeout(__val = phy_read_mmd, val, \ 1438 __val < 0 || (cond), \ 1439 sleep_us, timeout_us, sleep_before_read, \ 1440 phydev, devaddr, regnum); \ 1441 if (__val < 0) \ 1442 __ret = __val; \ 1443 if (__ret) \ 1444 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1445 __ret; \ 1446 }) 1447 1448 /* 1449 * __phy_read_mmd - Convenience function for reading a register 1450 * from an MMD on a given PHY. 1451 */ 1452 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1453 1454 /* 1455 * phy_write_mmd - Convenience function for writing a register 1456 * on an MMD on a given PHY. 1457 */ 1458 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1459 1460 /* 1461 * __phy_write_mmd - Convenience function for writing a register 1462 * on an MMD on a given PHY. 1463 */ 1464 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1465 1466 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1467 u16 set); 1468 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1469 u16 set); 1470 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1471 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1472 1473 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1474 u16 mask, u16 set); 1475 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1476 u16 mask, u16 set); 1477 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1478 u16 mask, u16 set); 1479 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1480 u16 mask, u16 set); 1481 1482 /** 1483 * __phy_set_bits - Convenience function for setting bits in a PHY register 1484 * @phydev: the phy_device struct 1485 * @regnum: register number to write 1486 * @val: bits to set 1487 * 1488 * The caller must have taken the MDIO bus lock. 1489 */ 1490 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1491 { 1492 return __phy_modify(phydev, regnum, 0, val); 1493 } 1494 1495 /** 1496 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1497 * @phydev: the phy_device struct 1498 * @regnum: register number to write 1499 * @val: bits to clear 1500 * 1501 * The caller must have taken the MDIO bus lock. 1502 */ 1503 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1504 u16 val) 1505 { 1506 return __phy_modify(phydev, regnum, val, 0); 1507 } 1508 1509 /** 1510 * phy_set_bits - Convenience function for setting bits in a PHY register 1511 * @phydev: the phy_device struct 1512 * @regnum: register number to write 1513 * @val: bits to set 1514 */ 1515 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1516 { 1517 return phy_modify(phydev, regnum, 0, val); 1518 } 1519 1520 /** 1521 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1522 * @phydev: the phy_device struct 1523 * @regnum: register number to write 1524 * @val: bits to clear 1525 */ 1526 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1527 { 1528 return phy_modify(phydev, regnum, val, 0); 1529 } 1530 1531 /** 1532 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1533 * on MMD 1534 * @phydev: the phy_device struct 1535 * @devad: the MMD containing register to modify 1536 * @regnum: register number to modify 1537 * @val: bits to set 1538 * 1539 * The caller must have taken the MDIO bus lock. 1540 */ 1541 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1542 u32 regnum, u16 val) 1543 { 1544 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1545 } 1546 1547 /** 1548 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1549 * on MMD 1550 * @phydev: the phy_device struct 1551 * @devad: the MMD containing register to modify 1552 * @regnum: register number to modify 1553 * @val: bits to clear 1554 * 1555 * The caller must have taken the MDIO bus lock. 1556 */ 1557 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1558 u32 regnum, u16 val) 1559 { 1560 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1561 } 1562 1563 /** 1564 * phy_set_bits_mmd - Convenience function for setting bits in a register 1565 * on MMD 1566 * @phydev: the phy_device struct 1567 * @devad: the MMD containing register to modify 1568 * @regnum: register number to modify 1569 * @val: bits to set 1570 */ 1571 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1572 u32 regnum, u16 val) 1573 { 1574 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1575 } 1576 1577 /** 1578 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1579 * on MMD 1580 * @phydev: the phy_device struct 1581 * @devad: the MMD containing register to modify 1582 * @regnum: register number to modify 1583 * @val: bits to clear 1584 */ 1585 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1586 u32 regnum, u16 val) 1587 { 1588 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1589 } 1590 1591 /** 1592 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1593 * @phydev: the phy_device struct 1594 * 1595 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1596 * PHY_MAC_INTERRUPT 1597 */ 1598 static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1599 { 1600 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1601 } 1602 1603 /** 1604 * phy_polling_mode - Convenience function for testing whether polling is 1605 * used to detect PHY status changes 1606 * @phydev: the phy_device struct 1607 */ 1608 static inline bool phy_polling_mode(struct phy_device *phydev) 1609 { 1610 if (phydev->state == PHY_CABLETEST) 1611 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1612 return true; 1613 1614 return phydev->irq == PHY_POLL; 1615 } 1616 1617 /** 1618 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1619 * @phydev: the phy_device struct 1620 */ 1621 static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1622 { 1623 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1624 } 1625 1626 /** 1627 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1628 * @phydev: the phy_device struct 1629 */ 1630 static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1631 { 1632 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1633 } 1634 1635 /** 1636 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1637 * PTP hardware clock capabilities. 1638 * @phydev: the phy_device struct 1639 */ 1640 static inline bool phy_has_tsinfo(struct phy_device *phydev) 1641 { 1642 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1643 } 1644 1645 /** 1646 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1647 * @phydev: the phy_device struct 1648 */ 1649 static inline bool phy_has_txtstamp(struct phy_device *phydev) 1650 { 1651 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1652 } 1653 1654 static inline int phy_hwtstamp(struct phy_device *phydev, 1655 struct kernel_hwtstamp_config *cfg, 1656 struct netlink_ext_ack *extack) 1657 { 1658 return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack); 1659 } 1660 1661 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1662 int type) 1663 { 1664 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1665 } 1666 1667 static inline int phy_ts_info(struct phy_device *phydev, 1668 struct kernel_ethtool_ts_info *tsinfo) 1669 { 1670 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1671 } 1672 1673 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1674 int type) 1675 { 1676 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1677 } 1678 1679 /** 1680 * phy_is_default_hwtstamp - Is the PHY hwtstamp the default timestamp 1681 * @phydev: Pointer to phy_device 1682 * 1683 * This is used to get default timestamping device taking into account 1684 * the new API choice, which is selecting the timestamping from MAC by 1685 * default if the phydev does not have default_timestamp flag enabled. 1686 * 1687 * Return: True if phy is the default hw timestamp, false otherwise. 1688 */ 1689 static inline bool phy_is_default_hwtstamp(struct phy_device *phydev) 1690 { 1691 return phy_has_hwtstamp(phydev) && phydev->default_timestamp; 1692 } 1693 1694 /** 1695 * phy_is_internal - Convenience function for testing if a PHY is internal 1696 * @phydev: the phy_device struct 1697 */ 1698 static inline bool phy_is_internal(struct phy_device *phydev) 1699 { 1700 return phydev->is_internal; 1701 } 1702 1703 /** 1704 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1705 * @phydev: the phy_device struct 1706 */ 1707 static inline bool phy_on_sfp(struct phy_device *phydev) 1708 { 1709 return phydev->is_on_sfp_module; 1710 } 1711 1712 /** 1713 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1714 * PHY interface mode is RGMII (all variants) 1715 * @mode: the &phy_interface_t enum 1716 */ 1717 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1718 { 1719 return mode >= PHY_INTERFACE_MODE_RGMII && 1720 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1721 }; 1722 1723 /** 1724 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1725 * negotiation 1726 * @mode: one of &enum phy_interface_t 1727 * 1728 * Returns true if the PHY interface mode uses the 16-bit negotiation 1729 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1730 */ 1731 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1732 { 1733 return mode == PHY_INTERFACE_MODE_1000BASEX || 1734 mode == PHY_INTERFACE_MODE_2500BASEX; 1735 } 1736 1737 /** 1738 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1739 * is RGMII (all variants) 1740 * @phydev: the phy_device struct 1741 */ 1742 static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1743 { 1744 return phy_interface_mode_is_rgmii(phydev->interface); 1745 }; 1746 1747 /** 1748 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1749 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1750 * @phydev: the phy_device struct 1751 */ 1752 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1753 { 1754 return phydev->is_pseudo_fixed_link; 1755 } 1756 1757 int phy_save_page(struct phy_device *phydev); 1758 int phy_select_page(struct phy_device *phydev, int page); 1759 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1760 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1761 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1762 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1763 u16 mask, u16 set); 1764 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1765 u16 mask, u16 set); 1766 1767 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1768 bool is_c45, 1769 struct phy_c45_device_ids *c45_ids); 1770 #if IS_ENABLED(CONFIG_PHYLIB) 1771 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1772 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1773 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1774 struct phy_device *device_phy_find_device(struct device *dev); 1775 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode); 1776 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1777 int phy_device_register(struct phy_device *phy); 1778 void phy_device_free(struct phy_device *phydev); 1779 #else 1780 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1781 { 1782 return 0; 1783 } 1784 static inline 1785 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1786 { 1787 return 0; 1788 } 1789 1790 static inline 1791 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1792 { 1793 return NULL; 1794 } 1795 1796 static inline struct phy_device *device_phy_find_device(struct device *dev) 1797 { 1798 return NULL; 1799 } 1800 1801 static inline 1802 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1803 { 1804 return NULL; 1805 } 1806 1807 static inline 1808 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1809 { 1810 return NULL; 1811 } 1812 1813 static inline int phy_device_register(struct phy_device *phy) 1814 { 1815 return 0; 1816 } 1817 1818 static inline void phy_device_free(struct phy_device *phydev) { } 1819 #endif /* CONFIG_PHYLIB */ 1820 void phy_device_remove(struct phy_device *phydev); 1821 int phy_get_c45_ids(struct phy_device *phydev); 1822 int phy_init_hw(struct phy_device *phydev); 1823 int phy_suspend(struct phy_device *phydev); 1824 int phy_resume(struct phy_device *phydev); 1825 int __phy_resume(struct phy_device *phydev); 1826 int phy_loopback(struct phy_device *phydev, bool enable); 1827 int phy_sfp_connect_phy(void *upstream, struct phy_device *phy); 1828 void phy_sfp_disconnect_phy(void *upstream, struct phy_device *phy); 1829 void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1830 void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1831 int phy_sfp_probe(struct phy_device *phydev, 1832 const struct sfp_upstream_ops *ops); 1833 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1834 phy_interface_t interface); 1835 struct phy_device *phy_find_first(struct mii_bus *bus); 1836 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1837 u32 flags, phy_interface_t interface); 1838 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1839 void (*handler)(struct net_device *), 1840 phy_interface_t interface); 1841 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1842 void (*handler)(struct net_device *), 1843 phy_interface_t interface); 1844 void phy_disconnect(struct phy_device *phydev); 1845 void phy_detach(struct phy_device *phydev); 1846 void phy_start(struct phy_device *phydev); 1847 void phy_stop(struct phy_device *phydev); 1848 int phy_config_aneg(struct phy_device *phydev); 1849 int _phy_start_aneg(struct phy_device *phydev); 1850 int phy_start_aneg(struct phy_device *phydev); 1851 int phy_aneg_done(struct phy_device *phydev); 1852 unsigned int phy_inband_caps(struct phy_device *phydev, 1853 phy_interface_t interface); 1854 int phy_config_inband(struct phy_device *phydev, unsigned int modes); 1855 int phy_speed_down(struct phy_device *phydev, bool sync); 1856 int phy_speed_up(struct phy_device *phydev); 1857 bool phy_check_valid(int speed, int duplex, unsigned long *features); 1858 1859 int phy_restart_aneg(struct phy_device *phydev); 1860 int phy_reset_after_clk_enable(struct phy_device *phydev); 1861 1862 #if IS_ENABLED(CONFIG_PHYLIB) 1863 int phy_start_cable_test(struct phy_device *phydev, 1864 struct netlink_ext_ack *extack); 1865 int phy_start_cable_test_tdr(struct phy_device *phydev, 1866 struct netlink_ext_ack *extack, 1867 const struct phy_tdr_config *config); 1868 #else 1869 static inline 1870 int phy_start_cable_test(struct phy_device *phydev, 1871 struct netlink_ext_ack *extack) 1872 { 1873 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1874 return -EOPNOTSUPP; 1875 } 1876 static inline 1877 int phy_start_cable_test_tdr(struct phy_device *phydev, 1878 struct netlink_ext_ack *extack, 1879 const struct phy_tdr_config *config) 1880 { 1881 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1882 return -EOPNOTSUPP; 1883 } 1884 #endif 1885 1886 static inline void phy_device_reset(struct phy_device *phydev, int value) 1887 { 1888 mdio_device_reset(&phydev->mdio, value); 1889 } 1890 1891 #define phydev_err(_phydev, format, args...) \ 1892 dev_err(&_phydev->mdio.dev, format, ##args) 1893 1894 #define phydev_err_probe(_phydev, err, format, args...) \ 1895 dev_err_probe(&_phydev->mdio.dev, err, format, ##args) 1896 1897 #define phydev_info(_phydev, format, args...) \ 1898 dev_info(&_phydev->mdio.dev, format, ##args) 1899 1900 #define phydev_warn(_phydev, format, args...) \ 1901 dev_warn(&_phydev->mdio.dev, format, ##args) 1902 1903 #define phydev_dbg(_phydev, format, args...) \ 1904 dev_dbg(&_phydev->mdio.dev, format, ##args) 1905 1906 static inline const char *phydev_name(const struct phy_device *phydev) 1907 { 1908 return dev_name(&phydev->mdio.dev); 1909 } 1910 1911 static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1912 { 1913 mutex_lock(&phydev->mdio.bus->mdio_lock); 1914 } 1915 1916 static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1917 { 1918 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1919 } 1920 1921 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1922 __printf(2, 3); 1923 char *phy_attached_info_irq(struct phy_device *phydev) 1924 __malloc; 1925 void phy_attached_info(struct phy_device *phydev); 1926 1927 /* Clause 22 PHY */ 1928 int genphy_read_abilities(struct phy_device *phydev); 1929 int genphy_setup_forced(struct phy_device *phydev); 1930 int genphy_restart_aneg(struct phy_device *phydev); 1931 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1932 int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1933 int genphy_aneg_done(struct phy_device *phydev); 1934 int genphy_update_link(struct phy_device *phydev); 1935 int genphy_read_lpa(struct phy_device *phydev); 1936 int genphy_read_status_fixed(struct phy_device *phydev); 1937 int genphy_read_status(struct phy_device *phydev); 1938 int genphy_read_master_slave(struct phy_device *phydev); 1939 int genphy_suspend(struct phy_device *phydev); 1940 int genphy_resume(struct phy_device *phydev); 1941 int genphy_loopback(struct phy_device *phydev, bool enable); 1942 int genphy_soft_reset(struct phy_device *phydev); 1943 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1944 1945 static inline int genphy_config_aneg(struct phy_device *phydev) 1946 { 1947 return __genphy_config_aneg(phydev, false); 1948 } 1949 1950 static inline int genphy_no_config_intr(struct phy_device *phydev) 1951 { 1952 return 0; 1953 } 1954 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1955 u16 regnum); 1956 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1957 u16 regnum, u16 val); 1958 1959 /* Clause 37 */ 1960 int genphy_c37_config_aneg(struct phy_device *phydev); 1961 int genphy_c37_read_status(struct phy_device *phydev, bool *changed); 1962 1963 /* Clause 45 PHY */ 1964 int genphy_c45_restart_aneg(struct phy_device *phydev); 1965 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1966 int genphy_c45_aneg_done(struct phy_device *phydev); 1967 int genphy_c45_read_link(struct phy_device *phydev); 1968 int genphy_c45_read_lpa(struct phy_device *phydev); 1969 int genphy_c45_read_pma(struct phy_device *phydev); 1970 int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1971 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); 1972 int genphy_c45_an_config_aneg(struct phy_device *phydev); 1973 int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1974 int genphy_c45_read_mdix(struct phy_device *phydev); 1975 int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1976 int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev); 1977 int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev); 1978 int genphy_c45_read_eee_abilities(struct phy_device *phydev); 1979 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); 1980 int genphy_c45_read_status(struct phy_device *phydev); 1981 int genphy_c45_baset1_read_status(struct phy_device *phydev); 1982 int genphy_c45_config_aneg(struct phy_device *phydev); 1983 int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1984 int genphy_c45_pma_resume(struct phy_device *phydev); 1985 int genphy_c45_pma_suspend(struct phy_device *phydev); 1986 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 1987 int genphy_c45_plca_get_cfg(struct phy_device *phydev, 1988 struct phy_plca_cfg *plca_cfg); 1989 int genphy_c45_plca_set_cfg(struct phy_device *phydev, 1990 const struct phy_plca_cfg *plca_cfg); 1991 int genphy_c45_plca_get_status(struct phy_device *phydev, 1992 struct phy_plca_status *plca_st); 1993 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv, 1994 unsigned long *lp, bool *is_enabled); 1995 int genphy_c45_ethtool_get_eee(struct phy_device *phydev, 1996 struct ethtool_keee *data); 1997 int genphy_c45_ethtool_set_eee(struct phy_device *phydev, 1998 struct ethtool_keee *data); 1999 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev); 2000 int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv); 2001 2002 /* Generic C45 PHY driver */ 2003 extern struct phy_driver genphy_c45_driver; 2004 2005 /* The gen10g_* functions are the old Clause 45 stub */ 2006 int gen10g_config_aneg(struct phy_device *phydev); 2007 2008 static inline int phy_read_status(struct phy_device *phydev) 2009 { 2010 if (!phydev->drv) 2011 return -EIO; 2012 2013 if (phydev->drv->read_status) 2014 return phydev->drv->read_status(phydev); 2015 else 2016 return genphy_read_status(phydev); 2017 } 2018 2019 void phy_driver_unregister(struct phy_driver *drv); 2020 void phy_drivers_unregister(struct phy_driver *drv, int n); 2021 int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 2022 int phy_drivers_register(struct phy_driver *new_driver, int n, 2023 struct module *owner); 2024 void phy_error(struct phy_device *phydev); 2025 void phy_state_machine(struct work_struct *work); 2026 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 2027 void phy_trigger_machine(struct phy_device *phydev); 2028 void phy_mac_interrupt(struct phy_device *phydev); 2029 void phy_start_machine(struct phy_device *phydev); 2030 void phy_stop_machine(struct phy_device *phydev); 2031 void phy_ethtool_ksettings_get(struct phy_device *phydev, 2032 struct ethtool_link_ksettings *cmd); 2033 int phy_ethtool_ksettings_set(struct phy_device *phydev, 2034 const struct ethtool_link_ksettings *cmd); 2035 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 2036 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 2037 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 2038 int phy_disable_interrupts(struct phy_device *phydev); 2039 void phy_request_interrupt(struct phy_device *phydev); 2040 void phy_free_interrupt(struct phy_device *phydev); 2041 void phy_print_status(struct phy_device *phydev); 2042 int phy_get_rate_matching(struct phy_device *phydev, 2043 phy_interface_t iface); 2044 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 2045 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 2046 void phy_advertise_supported(struct phy_device *phydev); 2047 void phy_advertise_eee_all(struct phy_device *phydev); 2048 void phy_support_sym_pause(struct phy_device *phydev); 2049 void phy_support_asym_pause(struct phy_device *phydev); 2050 void phy_support_eee(struct phy_device *phydev); 2051 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 2052 bool autoneg); 2053 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 2054 bool phy_validate_pause(struct phy_device *phydev, 2055 struct ethtool_pauseparam *pp); 2056 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 2057 2058 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 2059 const int *delay_values, int size, bool is_rx); 2060 2061 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 2062 bool *tx_pause, bool *rx_pause); 2063 2064 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 2065 int (*run)(struct phy_device *)); 2066 int phy_register_fixup_for_id(const char *bus_id, 2067 int (*run)(struct phy_device *)); 2068 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 2069 int (*run)(struct phy_device *)); 2070 2071 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 2072 int phy_unregister_fixup_for_id(const char *bus_id); 2073 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 2074 2075 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 2076 int phy_get_eee_err(struct phy_device *phydev); 2077 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data); 2078 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_keee *data); 2079 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 2080 void phy_ethtool_get_wol(struct phy_device *phydev, 2081 struct ethtool_wolinfo *wol); 2082 int phy_ethtool_get_link_ksettings(struct net_device *ndev, 2083 struct ethtool_link_ksettings *cmd); 2084 int phy_ethtool_set_link_ksettings(struct net_device *ndev, 2085 const struct ethtool_link_ksettings *cmd); 2086 int phy_ethtool_nway_reset(struct net_device *ndev); 2087 int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size); 2088 int of_phy_package_join(struct phy_device *phydev, size_t priv_size); 2089 void phy_package_leave(struct phy_device *phydev); 2090 int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 2091 int base_addr, size_t priv_size); 2092 int devm_of_phy_package_join(struct device *dev, struct phy_device *phydev, 2093 size_t priv_size); 2094 2095 int __init mdio_bus_init(void); 2096 void mdio_bus_exit(void); 2097 2098 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 2099 int phy_ethtool_get_sset_count(struct phy_device *phydev); 2100 int phy_ethtool_get_stats(struct phy_device *phydev, 2101 struct ethtool_stats *stats, u64 *data); 2102 int phy_ethtool_get_plca_cfg(struct phy_device *phydev, 2103 struct phy_plca_cfg *plca_cfg); 2104 int phy_ethtool_set_plca_cfg(struct phy_device *phydev, 2105 const struct phy_plca_cfg *plca_cfg, 2106 struct netlink_ext_ack *extack); 2107 int phy_ethtool_get_plca_status(struct phy_device *phydev, 2108 struct phy_plca_status *plca_st); 2109 2110 int __phy_hwtstamp_get(struct phy_device *phydev, 2111 struct kernel_hwtstamp_config *config); 2112 int __phy_hwtstamp_set(struct phy_device *phydev, 2113 struct kernel_hwtstamp_config *config, 2114 struct netlink_ext_ack *extack); 2115 2116 static inline int phy_package_address(struct phy_device *phydev, 2117 unsigned int addr_offset) 2118 { 2119 struct phy_package_shared *shared = phydev->shared; 2120 u8 base_addr = shared->base_addr; 2121 2122 if (addr_offset >= PHY_MAX_ADDR - base_addr) 2123 return -EIO; 2124 2125 /* we know that addr will be in the range 0..31 and thus the 2126 * implicit cast to a signed int is not a problem. 2127 */ 2128 return base_addr + addr_offset; 2129 } 2130 2131 static inline int phy_package_read(struct phy_device *phydev, 2132 unsigned int addr_offset, u32 regnum) 2133 { 2134 int addr = phy_package_address(phydev, addr_offset); 2135 2136 if (addr < 0) 2137 return addr; 2138 2139 return mdiobus_read(phydev->mdio.bus, addr, regnum); 2140 } 2141 2142 static inline int __phy_package_read(struct phy_device *phydev, 2143 unsigned int addr_offset, u32 regnum) 2144 { 2145 int addr = phy_package_address(phydev, addr_offset); 2146 2147 if (addr < 0) 2148 return addr; 2149 2150 return __mdiobus_read(phydev->mdio.bus, addr, regnum); 2151 } 2152 2153 static inline int phy_package_write(struct phy_device *phydev, 2154 unsigned int addr_offset, u32 regnum, 2155 u16 val) 2156 { 2157 int addr = phy_package_address(phydev, addr_offset); 2158 2159 if (addr < 0) 2160 return addr; 2161 2162 return mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2163 } 2164 2165 static inline int __phy_package_write(struct phy_device *phydev, 2166 unsigned int addr_offset, u32 regnum, 2167 u16 val) 2168 { 2169 int addr = phy_package_address(phydev, addr_offset); 2170 2171 if (addr < 0) 2172 return addr; 2173 2174 return __mdiobus_write(phydev->mdio.bus, addr, regnum, val); 2175 } 2176 2177 int __phy_package_read_mmd(struct phy_device *phydev, 2178 unsigned int addr_offset, int devad, 2179 u32 regnum); 2180 2181 int phy_package_read_mmd(struct phy_device *phydev, 2182 unsigned int addr_offset, int devad, 2183 u32 regnum); 2184 2185 int __phy_package_write_mmd(struct phy_device *phydev, 2186 unsigned int addr_offset, int devad, 2187 u32 regnum, u16 val); 2188 2189 int phy_package_write_mmd(struct phy_device *phydev, 2190 unsigned int addr_offset, int devad, 2191 u32 regnum, u16 val); 2192 2193 static inline bool __phy_package_set_once(struct phy_device *phydev, 2194 unsigned int b) 2195 { 2196 struct phy_package_shared *shared = phydev->shared; 2197 2198 if (!shared) 2199 return false; 2200 2201 return !test_and_set_bit(b, &shared->flags); 2202 } 2203 2204 static inline bool phy_package_init_once(struct phy_device *phydev) 2205 { 2206 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 2207 } 2208 2209 static inline bool phy_package_probe_once(struct phy_device *phydev) 2210 { 2211 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 2212 } 2213 2214 extern const struct bus_type mdio_bus_type; 2215 2216 struct mdio_board_info { 2217 const char *bus_id; 2218 char modalias[MDIO_NAME_SIZE]; 2219 int mdio_addr; 2220 const void *platform_data; 2221 }; 2222 2223 #if IS_ENABLED(CONFIG_MDIO_DEVICE) 2224 int mdiobus_register_board_info(const struct mdio_board_info *info, 2225 unsigned int n); 2226 #else 2227 static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 2228 unsigned int n) 2229 { 2230 return 0; 2231 } 2232 #endif 2233 2234 2235 /** 2236 * phy_module_driver() - Helper macro for registering PHY drivers 2237 * @__phy_drivers: array of PHY drivers to register 2238 * @__count: Numbers of members in array 2239 * 2240 * Helper macro for PHY drivers which do not do anything special in module 2241 * init/exit. Each module may only use this macro once, and calling it 2242 * replaces module_init() and module_exit(). 2243 */ 2244 #define phy_module_driver(__phy_drivers, __count) \ 2245 static int __init phy_module_init(void) \ 2246 { \ 2247 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 2248 } \ 2249 module_init(phy_module_init); \ 2250 static void __exit phy_module_exit(void) \ 2251 { \ 2252 phy_drivers_unregister(__phy_drivers, __count); \ 2253 } \ 2254 module_exit(phy_module_exit) 2255 2256 #define module_phy_driver(__phy_drivers) \ 2257 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 2258 2259 bool phy_driver_is_genphy(struct phy_device *phydev); 2260 bool phy_driver_is_genphy_10g(struct phy_device *phydev); 2261 2262 #endif /* __PHY_H */ 2263