1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _LINUX_PGTABLE_H 3 #define _LINUX_PGTABLE_H 4 5 #include <linux/pfn.h> 6 #include <asm/pgtable.h> 7 8 #ifndef __ASSEMBLY__ 9 #ifdef CONFIG_MMU 10 11 #include <linux/mm_types.h> 12 #include <linux/bug.h> 13 #include <linux/errno.h> 14 #include <asm-generic/pgtable_uffd.h> 15 #include <linux/page_table_check.h> 16 17 #if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \ 18 defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS 19 #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED 20 #endif 21 22 /* 23 * On almost all architectures and configurations, 0 can be used as the 24 * upper ceiling to free_pgtables(): on many architectures it has the same 25 * effect as using TASK_SIZE. However, there is one configuration which 26 * must impose a more careful limit, to avoid freeing kernel pgtables. 27 */ 28 #ifndef USER_PGTABLES_CEILING 29 #define USER_PGTABLES_CEILING 0UL 30 #endif 31 32 /* 33 * This defines the first usable user address. Platforms 34 * can override its value with custom FIRST_USER_ADDRESS 35 * defined in their respective <asm/pgtable.h>. 36 */ 37 #ifndef FIRST_USER_ADDRESS 38 #define FIRST_USER_ADDRESS 0UL 39 #endif 40 41 /* 42 * This defines the generic helper for accessing PMD page 43 * table page. Although platforms can still override this 44 * via their respective <asm/pgtable.h>. 45 */ 46 #ifndef pmd_pgtable 47 #define pmd_pgtable(pmd) pmd_page(pmd) 48 #endif 49 50 /* 51 * A page table page can be thought of an array like this: pXd_t[PTRS_PER_PxD] 52 * 53 * The pXx_index() functions return the index of the entry in the page 54 * table page which would control the given virtual address 55 * 56 * As these functions may be used by the same code for different levels of 57 * the page table folding, they are always available, regardless of 58 * CONFIG_PGTABLE_LEVELS value. For the folded levels they simply return 0 59 * because in such cases PTRS_PER_PxD equals 1. 60 */ 61 62 static inline unsigned long pte_index(unsigned long address) 63 { 64 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); 65 } 66 #define pte_index pte_index 67 68 #ifndef pmd_index 69 static inline unsigned long pmd_index(unsigned long address) 70 { 71 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1); 72 } 73 #define pmd_index pmd_index 74 #endif 75 76 #ifndef pud_index 77 static inline unsigned long pud_index(unsigned long address) 78 { 79 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1); 80 } 81 #define pud_index pud_index 82 #endif 83 84 #ifndef pgd_index 85 /* Must be a compile-time constant, so implement it as a macro */ 86 #define pgd_index(a) (((a) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) 87 #endif 88 89 #ifndef pte_offset_kernel 90 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address) 91 { 92 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address); 93 } 94 #define pte_offset_kernel pte_offset_kernel 95 #endif 96 97 #ifdef CONFIG_HIGHPTE 98 #define __pte_map(pmd, address) \ 99 ((pte_t *)kmap_local_page(pmd_page(*(pmd))) + pte_index((address))) 100 #define pte_unmap(pte) do { \ 101 kunmap_local((pte)); \ 102 rcu_read_unlock(); \ 103 } while (0) 104 #else 105 static inline pte_t *__pte_map(pmd_t *pmd, unsigned long address) 106 { 107 return pte_offset_kernel(pmd, address); 108 } 109 static inline void pte_unmap(pte_t *pte) 110 { 111 rcu_read_unlock(); 112 } 113 #endif 114 115 void pte_free_defer(struct mm_struct *mm, pgtable_t pgtable); 116 117 /* Find an entry in the second-level page table.. */ 118 #ifndef pmd_offset 119 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) 120 { 121 return pud_pgtable(*pud) + pmd_index(address); 122 } 123 #define pmd_offset pmd_offset 124 #endif 125 126 #ifndef pud_offset 127 static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address) 128 { 129 return p4d_pgtable(*p4d) + pud_index(address); 130 } 131 #define pud_offset pud_offset 132 #endif 133 134 static inline pgd_t *pgd_offset_pgd(pgd_t *pgd, unsigned long address) 135 { 136 return (pgd + pgd_index(address)); 137 }; 138 139 /* 140 * a shortcut to get a pgd_t in a given mm 141 */ 142 #ifndef pgd_offset 143 #define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address)) 144 #endif 145 146 /* 147 * a shortcut which implies the use of the kernel's pgd, instead 148 * of a process's 149 */ 150 #ifndef pgd_offset_k 151 #define pgd_offset_k(address) pgd_offset(&init_mm, (address)) 152 #endif 153 154 /* 155 * In many cases it is known that a virtual address is mapped at PMD or PTE 156 * level, so instead of traversing all the page table levels, we can get a 157 * pointer to the PMD entry in user or kernel page table or translate a virtual 158 * address to the pointer in the PTE in the kernel page tables with simple 159 * helpers. 160 */ 161 static inline pmd_t *pmd_off(struct mm_struct *mm, unsigned long va) 162 { 163 return pmd_offset(pud_offset(p4d_offset(pgd_offset(mm, va), va), va), va); 164 } 165 166 static inline pmd_t *pmd_off_k(unsigned long va) 167 { 168 return pmd_offset(pud_offset(p4d_offset(pgd_offset_k(va), va), va), va); 169 } 170 171 static inline pte_t *virt_to_kpte(unsigned long vaddr) 172 { 173 pmd_t *pmd = pmd_off_k(vaddr); 174 175 return pmd_none(*pmd) ? NULL : pte_offset_kernel(pmd, vaddr); 176 } 177 178 #ifndef pmd_young 179 static inline int pmd_young(pmd_t pmd) 180 { 181 return 0; 182 } 183 #endif 184 185 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 186 extern int ptep_set_access_flags(struct vm_area_struct *vma, 187 unsigned long address, pte_t *ptep, 188 pte_t entry, int dirty); 189 #endif 190 191 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS 192 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 193 extern int pmdp_set_access_flags(struct vm_area_struct *vma, 194 unsigned long address, pmd_t *pmdp, 195 pmd_t entry, int dirty); 196 extern int pudp_set_access_flags(struct vm_area_struct *vma, 197 unsigned long address, pud_t *pudp, 198 pud_t entry, int dirty); 199 #else 200 static inline int pmdp_set_access_flags(struct vm_area_struct *vma, 201 unsigned long address, pmd_t *pmdp, 202 pmd_t entry, int dirty) 203 { 204 BUILD_BUG(); 205 return 0; 206 } 207 static inline int pudp_set_access_flags(struct vm_area_struct *vma, 208 unsigned long address, pud_t *pudp, 209 pud_t entry, int dirty) 210 { 211 BUILD_BUG(); 212 return 0; 213 } 214 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 215 #endif 216 217 #ifndef ptep_get 218 static inline pte_t ptep_get(pte_t *ptep) 219 { 220 return READ_ONCE(*ptep); 221 } 222 #endif 223 224 #ifndef pmdp_get 225 static inline pmd_t pmdp_get(pmd_t *pmdp) 226 { 227 return READ_ONCE(*pmdp); 228 } 229 #endif 230 231 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 232 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, 233 unsigned long address, 234 pte_t *ptep) 235 { 236 pte_t pte = ptep_get(ptep); 237 int r = 1; 238 if (!pte_young(pte)) 239 r = 0; 240 else 241 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte)); 242 return r; 243 } 244 #endif 245 246 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG 247 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG) 248 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, 249 unsigned long address, 250 pmd_t *pmdp) 251 { 252 pmd_t pmd = *pmdp; 253 int r = 1; 254 if (!pmd_young(pmd)) 255 r = 0; 256 else 257 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd)); 258 return r; 259 } 260 #else 261 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, 262 unsigned long address, 263 pmd_t *pmdp) 264 { 265 BUILD_BUG(); 266 return 0; 267 } 268 #endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG */ 269 #endif 270 271 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 272 int ptep_clear_flush_young(struct vm_area_struct *vma, 273 unsigned long address, pte_t *ptep); 274 #endif 275 276 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH 277 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 278 extern int pmdp_clear_flush_young(struct vm_area_struct *vma, 279 unsigned long address, pmd_t *pmdp); 280 #else 281 /* 282 * Despite relevant to THP only, this API is called from generic rmap code 283 * under PageTransHuge(), hence needs a dummy implementation for !THP 284 */ 285 static inline int pmdp_clear_flush_young(struct vm_area_struct *vma, 286 unsigned long address, pmd_t *pmdp) 287 { 288 BUILD_BUG(); 289 return 0; 290 } 291 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 292 #endif 293 294 #ifndef arch_has_hw_nonleaf_pmd_young 295 /* 296 * Return whether the accessed bit in non-leaf PMD entries is supported on the 297 * local CPU. 298 */ 299 static inline bool arch_has_hw_nonleaf_pmd_young(void) 300 { 301 return IS_ENABLED(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG); 302 } 303 #endif 304 305 #ifndef arch_has_hw_pte_young 306 /* 307 * Return whether the accessed bit is supported on the local CPU. 308 * 309 * This stub assumes accessing through an old PTE triggers a page fault. 310 * Architectures that automatically set the access bit should overwrite it. 311 */ 312 static inline bool arch_has_hw_pte_young(void) 313 { 314 return false; 315 } 316 #endif 317 318 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR 319 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, 320 unsigned long address, 321 pte_t *ptep) 322 { 323 pte_t pte = ptep_get(ptep); 324 pte_clear(mm, address, ptep); 325 page_table_check_pte_clear(mm, pte); 326 return pte; 327 } 328 #endif 329 330 static inline void ptep_clear(struct mm_struct *mm, unsigned long addr, 331 pte_t *ptep) 332 { 333 ptep_get_and_clear(mm, addr, ptep); 334 } 335 336 #ifdef CONFIG_GUP_GET_PXX_LOW_HIGH 337 /* 338 * For walking the pagetables without holding any locks. Some architectures 339 * (eg x86-32 PAE) cannot load the entries atomically without using expensive 340 * instructions. We are guaranteed that a PTE will only either go from not 341 * present to present, or present to not present -- it will not switch to a 342 * completely different present page without a TLB flush inbetween; which we 343 * are blocking by holding interrupts off. 344 * 345 * Setting ptes from not present to present goes: 346 * 347 * ptep->pte_high = h; 348 * smp_wmb(); 349 * ptep->pte_low = l; 350 * 351 * And present to not present goes: 352 * 353 * ptep->pte_low = 0; 354 * smp_wmb(); 355 * ptep->pte_high = 0; 356 * 357 * We must ensure here that the load of pte_low sees 'l' IFF pte_high sees 'h'. 358 * We load pte_high *after* loading pte_low, which ensures we don't see an older 359 * value of pte_high. *Then* we recheck pte_low, which ensures that we haven't 360 * picked up a changed pte high. We might have gotten rubbish values from 361 * pte_low and pte_high, but we are guaranteed that pte_low will not have the 362 * present bit set *unless* it is 'l'. Because get_user_pages_fast() only 363 * operates on present ptes we're safe. 364 */ 365 static inline pte_t ptep_get_lockless(pte_t *ptep) 366 { 367 pte_t pte; 368 369 do { 370 pte.pte_low = ptep->pte_low; 371 smp_rmb(); 372 pte.pte_high = ptep->pte_high; 373 smp_rmb(); 374 } while (unlikely(pte.pte_low != ptep->pte_low)); 375 376 return pte; 377 } 378 #define ptep_get_lockless ptep_get_lockless 379 380 #if CONFIG_PGTABLE_LEVELS > 2 381 static inline pmd_t pmdp_get_lockless(pmd_t *pmdp) 382 { 383 pmd_t pmd; 384 385 do { 386 pmd.pmd_low = pmdp->pmd_low; 387 smp_rmb(); 388 pmd.pmd_high = pmdp->pmd_high; 389 smp_rmb(); 390 } while (unlikely(pmd.pmd_low != pmdp->pmd_low)); 391 392 return pmd; 393 } 394 #define pmdp_get_lockless pmdp_get_lockless 395 #define pmdp_get_lockless_sync() tlb_remove_table_sync_one() 396 #endif /* CONFIG_PGTABLE_LEVELS > 2 */ 397 #endif /* CONFIG_GUP_GET_PXX_LOW_HIGH */ 398 399 /* 400 * We require that the PTE can be read atomically. 401 */ 402 #ifndef ptep_get_lockless 403 static inline pte_t ptep_get_lockless(pte_t *ptep) 404 { 405 return ptep_get(ptep); 406 } 407 #endif 408 409 #ifndef pmdp_get_lockless 410 static inline pmd_t pmdp_get_lockless(pmd_t *pmdp) 411 { 412 return pmdp_get(pmdp); 413 } 414 static inline void pmdp_get_lockless_sync(void) 415 { 416 } 417 #endif 418 419 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 420 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR 421 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, 422 unsigned long address, 423 pmd_t *pmdp) 424 { 425 pmd_t pmd = *pmdp; 426 427 pmd_clear(pmdp); 428 page_table_check_pmd_clear(mm, pmd); 429 430 return pmd; 431 } 432 #endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */ 433 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR 434 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm, 435 unsigned long address, 436 pud_t *pudp) 437 { 438 pud_t pud = *pudp; 439 440 pud_clear(pudp); 441 page_table_check_pud_clear(mm, pud); 442 443 return pud; 444 } 445 #endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */ 446 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 447 448 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 449 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL 450 static inline pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma, 451 unsigned long address, pmd_t *pmdp, 452 int full) 453 { 454 return pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp); 455 } 456 #endif 457 458 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL 459 static inline pud_t pudp_huge_get_and_clear_full(struct vm_area_struct *vma, 460 unsigned long address, pud_t *pudp, 461 int full) 462 { 463 return pudp_huge_get_and_clear(vma->vm_mm, address, pudp); 464 } 465 #endif 466 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 467 468 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL 469 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, 470 unsigned long address, pte_t *ptep, 471 int full) 472 { 473 return ptep_get_and_clear(mm, address, ptep); 474 } 475 #endif 476 477 478 /* 479 * If two threads concurrently fault at the same page, the thread that 480 * won the race updates the PTE and its local TLB/Cache. The other thread 481 * gives up, simply does nothing, and continues; on architectures where 482 * software can update TLB, local TLB can be updated here to avoid next page 483 * fault. This function updates TLB only, do nothing with cache or others. 484 * It is the difference with function update_mmu_cache. 485 */ 486 #ifndef __HAVE_ARCH_UPDATE_MMU_TLB 487 static inline void update_mmu_tlb(struct vm_area_struct *vma, 488 unsigned long address, pte_t *ptep) 489 { 490 } 491 #define __HAVE_ARCH_UPDATE_MMU_TLB 492 #endif 493 494 /* 495 * Some architectures may be able to avoid expensive synchronization 496 * primitives when modifications are made to PTE's which are already 497 * not present, or in the process of an address space destruction. 498 */ 499 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL 500 static inline void pte_clear_not_present_full(struct mm_struct *mm, 501 unsigned long address, 502 pte_t *ptep, 503 int full) 504 { 505 pte_clear(mm, address, ptep); 506 } 507 #endif 508 509 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH 510 extern pte_t ptep_clear_flush(struct vm_area_struct *vma, 511 unsigned long address, 512 pte_t *ptep); 513 #endif 514 515 #ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH 516 extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma, 517 unsigned long address, 518 pmd_t *pmdp); 519 extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma, 520 unsigned long address, 521 pud_t *pudp); 522 #endif 523 524 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT 525 struct mm_struct; 526 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep) 527 { 528 pte_t old_pte = ptep_get(ptep); 529 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte)); 530 } 531 #endif 532 533 /* 534 * On some architectures hardware does not set page access bit when accessing 535 * memory page, it is responsibility of software setting this bit. It brings 536 * out extra page fault penalty to track page access bit. For optimization page 537 * access bit can be set during all page fault flow on these arches. 538 * To be differentiate with macro pte_mkyoung, this macro is used on platforms 539 * where software maintains page access bit. 540 */ 541 #ifndef pte_sw_mkyoung 542 static inline pte_t pte_sw_mkyoung(pte_t pte) 543 { 544 return pte; 545 } 546 #define pte_sw_mkyoung pte_sw_mkyoung 547 #endif 548 549 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT 550 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 551 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 552 unsigned long address, pmd_t *pmdp) 553 { 554 pmd_t old_pmd = *pmdp; 555 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd)); 556 } 557 #else 558 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 559 unsigned long address, pmd_t *pmdp) 560 { 561 BUILD_BUG(); 562 } 563 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 564 #endif 565 #ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT 566 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 567 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 568 static inline void pudp_set_wrprotect(struct mm_struct *mm, 569 unsigned long address, pud_t *pudp) 570 { 571 pud_t old_pud = *pudp; 572 573 set_pud_at(mm, address, pudp, pud_wrprotect(old_pud)); 574 } 575 #else 576 static inline void pudp_set_wrprotect(struct mm_struct *mm, 577 unsigned long address, pud_t *pudp) 578 { 579 BUILD_BUG(); 580 } 581 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 582 #endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */ 583 #endif 584 585 #ifndef pmdp_collapse_flush 586 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 587 extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, 588 unsigned long address, pmd_t *pmdp); 589 #else 590 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, 591 unsigned long address, 592 pmd_t *pmdp) 593 { 594 BUILD_BUG(); 595 return *pmdp; 596 } 597 #define pmdp_collapse_flush pmdp_collapse_flush 598 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 599 #endif 600 601 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT 602 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp, 603 pgtable_t pgtable); 604 #endif 605 606 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW 607 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp); 608 #endif 609 610 #ifndef arch_needs_pgtable_deposit 611 #define arch_needs_pgtable_deposit() (false) 612 #endif 613 614 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 615 /* 616 * This is an implementation of pmdp_establish() that is only suitable for an 617 * architecture that doesn't have hardware dirty/accessed bits. In this case we 618 * can't race with CPU which sets these bits and non-atomic approach is fine. 619 */ 620 static inline pmd_t generic_pmdp_establish(struct vm_area_struct *vma, 621 unsigned long address, pmd_t *pmdp, pmd_t pmd) 622 { 623 pmd_t old_pmd = *pmdp; 624 set_pmd_at(vma->vm_mm, address, pmdp, pmd); 625 return old_pmd; 626 } 627 #endif 628 629 #ifndef __HAVE_ARCH_PMDP_INVALIDATE 630 extern pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address, 631 pmd_t *pmdp); 632 #endif 633 634 #ifndef __HAVE_ARCH_PMDP_INVALIDATE_AD 635 636 /* 637 * pmdp_invalidate_ad() invalidates the PMD while changing a transparent 638 * hugepage mapping in the page tables. This function is similar to 639 * pmdp_invalidate(), but should only be used if the access and dirty bits would 640 * not be cleared by the software in the new PMD value. The function ensures 641 * that hardware changes of the access and dirty bits updates would not be lost. 642 * 643 * Doing so can allow in certain architectures to avoid a TLB flush in most 644 * cases. Yet, another TLB flush might be necessary later if the PMD update 645 * itself requires such flush (e.g., if protection was set to be stricter). Yet, 646 * even when a TLB flush is needed because of the update, the caller may be able 647 * to batch these TLB flushing operations, so fewer TLB flush operations are 648 * needed. 649 */ 650 extern pmd_t pmdp_invalidate_ad(struct vm_area_struct *vma, 651 unsigned long address, pmd_t *pmdp); 652 #endif 653 654 #ifndef __HAVE_ARCH_PTE_SAME 655 static inline int pte_same(pte_t pte_a, pte_t pte_b) 656 { 657 return pte_val(pte_a) == pte_val(pte_b); 658 } 659 #endif 660 661 #ifndef __HAVE_ARCH_PTE_UNUSED 662 /* 663 * Some architectures provide facilities to virtualization guests 664 * so that they can flag allocated pages as unused. This allows the 665 * host to transparently reclaim unused pages. This function returns 666 * whether the pte's page is unused. 667 */ 668 static inline int pte_unused(pte_t pte) 669 { 670 return 0; 671 } 672 #endif 673 674 #ifndef pte_access_permitted 675 #define pte_access_permitted(pte, write) \ 676 (pte_present(pte) && (!(write) || pte_write(pte))) 677 #endif 678 679 #ifndef pmd_access_permitted 680 #define pmd_access_permitted(pmd, write) \ 681 (pmd_present(pmd) && (!(write) || pmd_write(pmd))) 682 #endif 683 684 #ifndef pud_access_permitted 685 #define pud_access_permitted(pud, write) \ 686 (pud_present(pud) && (!(write) || pud_write(pud))) 687 #endif 688 689 #ifndef p4d_access_permitted 690 #define p4d_access_permitted(p4d, write) \ 691 (p4d_present(p4d) && (!(write) || p4d_write(p4d))) 692 #endif 693 694 #ifndef pgd_access_permitted 695 #define pgd_access_permitted(pgd, write) \ 696 (pgd_present(pgd) && (!(write) || pgd_write(pgd))) 697 #endif 698 699 #ifndef __HAVE_ARCH_PMD_SAME 700 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b) 701 { 702 return pmd_val(pmd_a) == pmd_val(pmd_b); 703 } 704 #endif 705 706 #ifndef pud_same 707 static inline int pud_same(pud_t pud_a, pud_t pud_b) 708 { 709 return pud_val(pud_a) == pud_val(pud_b); 710 } 711 #define pud_same pud_same 712 #endif 713 714 #ifndef __HAVE_ARCH_P4D_SAME 715 static inline int p4d_same(p4d_t p4d_a, p4d_t p4d_b) 716 { 717 return p4d_val(p4d_a) == p4d_val(p4d_b); 718 } 719 #endif 720 721 #ifndef __HAVE_ARCH_PGD_SAME 722 static inline int pgd_same(pgd_t pgd_a, pgd_t pgd_b) 723 { 724 return pgd_val(pgd_a) == pgd_val(pgd_b); 725 } 726 #endif 727 728 /* 729 * Use set_p*_safe(), and elide TLB flushing, when confident that *no* 730 * TLB flush will be required as a result of the "set". For example, use 731 * in scenarios where it is known ahead of time that the routine is 732 * setting non-present entries, or re-setting an existing entry to the 733 * same value. Otherwise, use the typical "set" helpers and flush the 734 * TLB. 735 */ 736 #define set_pte_safe(ptep, pte) \ 737 ({ \ 738 WARN_ON_ONCE(pte_present(*ptep) && !pte_same(*ptep, pte)); \ 739 set_pte(ptep, pte); \ 740 }) 741 742 #define set_pmd_safe(pmdp, pmd) \ 743 ({ \ 744 WARN_ON_ONCE(pmd_present(*pmdp) && !pmd_same(*pmdp, pmd)); \ 745 set_pmd(pmdp, pmd); \ 746 }) 747 748 #define set_pud_safe(pudp, pud) \ 749 ({ \ 750 WARN_ON_ONCE(pud_present(*pudp) && !pud_same(*pudp, pud)); \ 751 set_pud(pudp, pud); \ 752 }) 753 754 #define set_p4d_safe(p4dp, p4d) \ 755 ({ \ 756 WARN_ON_ONCE(p4d_present(*p4dp) && !p4d_same(*p4dp, p4d)); \ 757 set_p4d(p4dp, p4d); \ 758 }) 759 760 #define set_pgd_safe(pgdp, pgd) \ 761 ({ \ 762 WARN_ON_ONCE(pgd_present(*pgdp) && !pgd_same(*pgdp, pgd)); \ 763 set_pgd(pgdp, pgd); \ 764 }) 765 766 #ifndef __HAVE_ARCH_DO_SWAP_PAGE 767 /* 768 * Some architectures support metadata associated with a page. When a 769 * page is being swapped out, this metadata must be saved so it can be 770 * restored when the page is swapped back in. SPARC M7 and newer 771 * processors support an ADI (Application Data Integrity) tag for the 772 * page as metadata for the page. arch_do_swap_page() can restore this 773 * metadata when a page is swapped back in. 774 */ 775 static inline void arch_do_swap_page(struct mm_struct *mm, 776 struct vm_area_struct *vma, 777 unsigned long addr, 778 pte_t pte, pte_t oldpte) 779 { 780 781 } 782 #endif 783 784 #ifndef __HAVE_ARCH_UNMAP_ONE 785 /* 786 * Some architectures support metadata associated with a page. When a 787 * page is being swapped out, this metadata must be saved so it can be 788 * restored when the page is swapped back in. SPARC M7 and newer 789 * processors support an ADI (Application Data Integrity) tag for the 790 * page as metadata for the page. arch_unmap_one() can save this 791 * metadata on a swap-out of a page. 792 */ 793 static inline int arch_unmap_one(struct mm_struct *mm, 794 struct vm_area_struct *vma, 795 unsigned long addr, 796 pte_t orig_pte) 797 { 798 return 0; 799 } 800 #endif 801 802 /* 803 * Allow architectures to preserve additional metadata associated with 804 * swapped-out pages. The corresponding __HAVE_ARCH_SWAP_* macros and function 805 * prototypes must be defined in the arch-specific asm/pgtable.h file. 806 */ 807 #ifndef __HAVE_ARCH_PREPARE_TO_SWAP 808 static inline int arch_prepare_to_swap(struct page *page) 809 { 810 return 0; 811 } 812 #endif 813 814 #ifndef __HAVE_ARCH_SWAP_INVALIDATE 815 static inline void arch_swap_invalidate_page(int type, pgoff_t offset) 816 { 817 } 818 819 static inline void arch_swap_invalidate_area(int type) 820 { 821 } 822 #endif 823 824 #ifndef __HAVE_ARCH_SWAP_RESTORE 825 static inline void arch_swap_restore(swp_entry_t entry, struct folio *folio) 826 { 827 } 828 #endif 829 830 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE 831 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr) 832 #endif 833 834 #ifndef __HAVE_ARCH_MOVE_PTE 835 #define move_pte(pte, prot, old_addr, new_addr) (pte) 836 #endif 837 838 #ifndef pte_accessible 839 # define pte_accessible(mm, pte) ((void)(pte), 1) 840 #endif 841 842 #ifndef flush_tlb_fix_spurious_fault 843 #define flush_tlb_fix_spurious_fault(vma, address, ptep) flush_tlb_page(vma, address) 844 #endif 845 846 /* 847 * When walking page tables, get the address of the next boundary, 848 * or the end address of the range if that comes earlier. Although no 849 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout. 850 */ 851 852 #define pgd_addr_end(addr, end) \ 853 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \ 854 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 855 }) 856 857 #ifndef p4d_addr_end 858 #define p4d_addr_end(addr, end) \ 859 ({ unsigned long __boundary = ((addr) + P4D_SIZE) & P4D_MASK; \ 860 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 861 }) 862 #endif 863 864 #ifndef pud_addr_end 865 #define pud_addr_end(addr, end) \ 866 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \ 867 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 868 }) 869 #endif 870 871 #ifndef pmd_addr_end 872 #define pmd_addr_end(addr, end) \ 873 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \ 874 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 875 }) 876 #endif 877 878 /* 879 * When walking page tables, we usually want to skip any p?d_none entries; 880 * and any p?d_bad entries - reporting the error before resetting to none. 881 * Do the tests inline, but report and clear the bad entry in mm/memory.c. 882 */ 883 void pgd_clear_bad(pgd_t *); 884 885 #ifndef __PAGETABLE_P4D_FOLDED 886 void p4d_clear_bad(p4d_t *); 887 #else 888 #define p4d_clear_bad(p4d) do { } while (0) 889 #endif 890 891 #ifndef __PAGETABLE_PUD_FOLDED 892 void pud_clear_bad(pud_t *); 893 #else 894 #define pud_clear_bad(p4d) do { } while (0) 895 #endif 896 897 void pmd_clear_bad(pmd_t *); 898 899 static inline int pgd_none_or_clear_bad(pgd_t *pgd) 900 { 901 if (pgd_none(*pgd)) 902 return 1; 903 if (unlikely(pgd_bad(*pgd))) { 904 pgd_clear_bad(pgd); 905 return 1; 906 } 907 return 0; 908 } 909 910 static inline int p4d_none_or_clear_bad(p4d_t *p4d) 911 { 912 if (p4d_none(*p4d)) 913 return 1; 914 if (unlikely(p4d_bad(*p4d))) { 915 p4d_clear_bad(p4d); 916 return 1; 917 } 918 return 0; 919 } 920 921 static inline int pud_none_or_clear_bad(pud_t *pud) 922 { 923 if (pud_none(*pud)) 924 return 1; 925 if (unlikely(pud_bad(*pud))) { 926 pud_clear_bad(pud); 927 return 1; 928 } 929 return 0; 930 } 931 932 static inline int pmd_none_or_clear_bad(pmd_t *pmd) 933 { 934 if (pmd_none(*pmd)) 935 return 1; 936 if (unlikely(pmd_bad(*pmd))) { 937 pmd_clear_bad(pmd); 938 return 1; 939 } 940 return 0; 941 } 942 943 static inline pte_t __ptep_modify_prot_start(struct vm_area_struct *vma, 944 unsigned long addr, 945 pte_t *ptep) 946 { 947 /* 948 * Get the current pte state, but zero it out to make it 949 * non-present, preventing the hardware from asynchronously 950 * updating it. 951 */ 952 return ptep_get_and_clear(vma->vm_mm, addr, ptep); 953 } 954 955 static inline void __ptep_modify_prot_commit(struct vm_area_struct *vma, 956 unsigned long addr, 957 pte_t *ptep, pte_t pte) 958 { 959 /* 960 * The pte is non-present, so there's no hardware state to 961 * preserve. 962 */ 963 set_pte_at(vma->vm_mm, addr, ptep, pte); 964 } 965 966 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION 967 /* 968 * Start a pte protection read-modify-write transaction, which 969 * protects against asynchronous hardware modifications to the pte. 970 * The intention is not to prevent the hardware from making pte 971 * updates, but to prevent any updates it may make from being lost. 972 * 973 * This does not protect against other software modifications of the 974 * pte; the appropriate pte lock must be held over the transaction. 975 * 976 * Note that this interface is intended to be batchable, meaning that 977 * ptep_modify_prot_commit may not actually update the pte, but merely 978 * queue the update to be done at some later time. The update must be 979 * actually committed before the pte lock is released, however. 980 */ 981 static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma, 982 unsigned long addr, 983 pte_t *ptep) 984 { 985 return __ptep_modify_prot_start(vma, addr, ptep); 986 } 987 988 /* 989 * Commit an update to a pte, leaving any hardware-controlled bits in 990 * the PTE unmodified. 991 */ 992 static inline void ptep_modify_prot_commit(struct vm_area_struct *vma, 993 unsigned long addr, 994 pte_t *ptep, pte_t old_pte, pte_t pte) 995 { 996 __ptep_modify_prot_commit(vma, addr, ptep, pte); 997 } 998 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */ 999 #endif /* CONFIG_MMU */ 1000 1001 /* 1002 * No-op macros that just return the current protection value. Defined here 1003 * because these macros can be used even if CONFIG_MMU is not defined. 1004 */ 1005 1006 #ifndef pgprot_nx 1007 #define pgprot_nx(prot) (prot) 1008 #endif 1009 1010 #ifndef pgprot_noncached 1011 #define pgprot_noncached(prot) (prot) 1012 #endif 1013 1014 #ifndef pgprot_writecombine 1015 #define pgprot_writecombine pgprot_noncached 1016 #endif 1017 1018 #ifndef pgprot_writethrough 1019 #define pgprot_writethrough pgprot_noncached 1020 #endif 1021 1022 #ifndef pgprot_device 1023 #define pgprot_device pgprot_noncached 1024 #endif 1025 1026 #ifndef pgprot_mhp 1027 #define pgprot_mhp(prot) (prot) 1028 #endif 1029 1030 #ifdef CONFIG_MMU 1031 #ifndef pgprot_modify 1032 #define pgprot_modify pgprot_modify 1033 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) 1034 { 1035 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot))) 1036 newprot = pgprot_noncached(newprot); 1037 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot))) 1038 newprot = pgprot_writecombine(newprot); 1039 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot))) 1040 newprot = pgprot_device(newprot); 1041 return newprot; 1042 } 1043 #endif 1044 #endif /* CONFIG_MMU */ 1045 1046 #ifndef pgprot_encrypted 1047 #define pgprot_encrypted(prot) (prot) 1048 #endif 1049 1050 #ifndef pgprot_decrypted 1051 #define pgprot_decrypted(prot) (prot) 1052 #endif 1053 1054 /* 1055 * A facility to provide lazy MMU batching. This allows PTE updates and 1056 * page invalidations to be delayed until a call to leave lazy MMU mode 1057 * is issued. Some architectures may benefit from doing this, and it is 1058 * beneficial for both shadow and direct mode hypervisors, which may batch 1059 * the PTE updates which happen during this window. Note that using this 1060 * interface requires that read hazards be removed from the code. A read 1061 * hazard could result in the direct mode hypervisor case, since the actual 1062 * write to the page tables may not yet have taken place, so reads though 1063 * a raw PTE pointer after it has been modified are not guaranteed to be 1064 * up to date. This mode can only be entered and left under the protection of 1065 * the page table locks for all page tables which may be modified. In the UP 1066 * case, this is required so that preemption is disabled, and in the SMP case, 1067 * it must synchronize the delayed page table writes properly on other CPUs. 1068 */ 1069 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE 1070 #define arch_enter_lazy_mmu_mode() do {} while (0) 1071 #define arch_leave_lazy_mmu_mode() do {} while (0) 1072 #define arch_flush_lazy_mmu_mode() do {} while (0) 1073 #endif 1074 1075 /* 1076 * A facility to provide batching of the reload of page tables and 1077 * other process state with the actual context switch code for 1078 * paravirtualized guests. By convention, only one of the batched 1079 * update (lazy) modes (CPU, MMU) should be active at any given time, 1080 * entry should never be nested, and entry and exits should always be 1081 * paired. This is for sanity of maintaining and reasoning about the 1082 * kernel code. In this case, the exit (end of the context switch) is 1083 * in architecture-specific code, and so doesn't need a generic 1084 * definition. 1085 */ 1086 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH 1087 #define arch_start_context_switch(prev) do {} while (0) 1088 #endif 1089 1090 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 1091 #ifndef CONFIG_ARCH_ENABLE_THP_MIGRATION 1092 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 1093 { 1094 return pmd; 1095 } 1096 1097 static inline int pmd_swp_soft_dirty(pmd_t pmd) 1098 { 1099 return 0; 1100 } 1101 1102 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 1103 { 1104 return pmd; 1105 } 1106 #endif 1107 #else /* !CONFIG_HAVE_ARCH_SOFT_DIRTY */ 1108 static inline int pte_soft_dirty(pte_t pte) 1109 { 1110 return 0; 1111 } 1112 1113 static inline int pmd_soft_dirty(pmd_t pmd) 1114 { 1115 return 0; 1116 } 1117 1118 static inline pte_t pte_mksoft_dirty(pte_t pte) 1119 { 1120 return pte; 1121 } 1122 1123 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) 1124 { 1125 return pmd; 1126 } 1127 1128 static inline pte_t pte_clear_soft_dirty(pte_t pte) 1129 { 1130 return pte; 1131 } 1132 1133 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) 1134 { 1135 return pmd; 1136 } 1137 1138 static inline pte_t pte_swp_mksoft_dirty(pte_t pte) 1139 { 1140 return pte; 1141 } 1142 1143 static inline int pte_swp_soft_dirty(pte_t pte) 1144 { 1145 return 0; 1146 } 1147 1148 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) 1149 { 1150 return pte; 1151 } 1152 1153 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 1154 { 1155 return pmd; 1156 } 1157 1158 static inline int pmd_swp_soft_dirty(pmd_t pmd) 1159 { 1160 return 0; 1161 } 1162 1163 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 1164 { 1165 return pmd; 1166 } 1167 #endif 1168 1169 #ifndef __HAVE_PFNMAP_TRACKING 1170 /* 1171 * Interfaces that can be used by architecture code to keep track of 1172 * memory type of pfn mappings specified by the remap_pfn_range, 1173 * vmf_insert_pfn. 1174 */ 1175 1176 /* 1177 * track_pfn_remap is called when a _new_ pfn mapping is being established 1178 * by remap_pfn_range() for physical range indicated by pfn and size. 1179 */ 1180 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot, 1181 unsigned long pfn, unsigned long addr, 1182 unsigned long size) 1183 { 1184 return 0; 1185 } 1186 1187 /* 1188 * track_pfn_insert is called when a _new_ single pfn is established 1189 * by vmf_insert_pfn(). 1190 */ 1191 static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, 1192 pfn_t pfn) 1193 { 1194 } 1195 1196 /* 1197 * track_pfn_copy is called when vma that is covering the pfnmap gets 1198 * copied through copy_page_range(). 1199 */ 1200 static inline int track_pfn_copy(struct vm_area_struct *vma) 1201 { 1202 return 0; 1203 } 1204 1205 /* 1206 * untrack_pfn is called while unmapping a pfnmap for a region. 1207 * untrack can be called for a specific region indicated by pfn and size or 1208 * can be for the entire vma (in which case pfn, size are zero). 1209 */ 1210 static inline void untrack_pfn(struct vm_area_struct *vma, 1211 unsigned long pfn, unsigned long size, 1212 bool mm_wr_locked) 1213 { 1214 } 1215 1216 /* 1217 * untrack_pfn_clear is called while mremapping a pfnmap for a new region 1218 * or fails to copy pgtable during duplicate vm area. 1219 */ 1220 static inline void untrack_pfn_clear(struct vm_area_struct *vma) 1221 { 1222 } 1223 #else 1224 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot, 1225 unsigned long pfn, unsigned long addr, 1226 unsigned long size); 1227 extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, 1228 pfn_t pfn); 1229 extern int track_pfn_copy(struct vm_area_struct *vma); 1230 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn, 1231 unsigned long size, bool mm_wr_locked); 1232 extern void untrack_pfn_clear(struct vm_area_struct *vma); 1233 #endif 1234 1235 #ifdef CONFIG_MMU 1236 #ifdef __HAVE_COLOR_ZERO_PAGE 1237 static inline int is_zero_pfn(unsigned long pfn) 1238 { 1239 extern unsigned long zero_pfn; 1240 unsigned long offset_from_zero_pfn = pfn - zero_pfn; 1241 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT); 1242 } 1243 1244 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr)) 1245 1246 #else 1247 static inline int is_zero_pfn(unsigned long pfn) 1248 { 1249 extern unsigned long zero_pfn; 1250 return pfn == zero_pfn; 1251 } 1252 1253 static inline unsigned long my_zero_pfn(unsigned long addr) 1254 { 1255 extern unsigned long zero_pfn; 1256 return zero_pfn; 1257 } 1258 #endif 1259 #else 1260 static inline int is_zero_pfn(unsigned long pfn) 1261 { 1262 return 0; 1263 } 1264 1265 static inline unsigned long my_zero_pfn(unsigned long addr) 1266 { 1267 return 0; 1268 } 1269 #endif /* CONFIG_MMU */ 1270 1271 #ifdef CONFIG_MMU 1272 1273 #ifndef CONFIG_TRANSPARENT_HUGEPAGE 1274 static inline int pmd_trans_huge(pmd_t pmd) 1275 { 1276 return 0; 1277 } 1278 #ifndef pmd_write 1279 static inline int pmd_write(pmd_t pmd) 1280 { 1281 BUG(); 1282 return 0; 1283 } 1284 #endif /* pmd_write */ 1285 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 1286 1287 #ifndef pud_write 1288 static inline int pud_write(pud_t pud) 1289 { 1290 BUG(); 1291 return 0; 1292 } 1293 #endif /* pud_write */ 1294 1295 #if !defined(CONFIG_ARCH_HAS_PTE_DEVMAP) || !defined(CONFIG_TRANSPARENT_HUGEPAGE) 1296 static inline int pmd_devmap(pmd_t pmd) 1297 { 1298 return 0; 1299 } 1300 static inline int pud_devmap(pud_t pud) 1301 { 1302 return 0; 1303 } 1304 static inline int pgd_devmap(pgd_t pgd) 1305 { 1306 return 0; 1307 } 1308 #endif 1309 1310 #if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \ 1311 !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD) 1312 static inline int pud_trans_huge(pud_t pud) 1313 { 1314 return 0; 1315 } 1316 #endif 1317 1318 static inline int pud_trans_unstable(pud_t *pud) 1319 { 1320 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && \ 1321 defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD) 1322 pud_t pudval = READ_ONCE(*pud); 1323 1324 if (pud_none(pudval) || pud_trans_huge(pudval) || pud_devmap(pudval)) 1325 return 1; 1326 if (unlikely(pud_bad(pudval))) { 1327 pud_clear_bad(pud); 1328 return 1; 1329 } 1330 #endif 1331 return 0; 1332 } 1333 1334 #ifndef CONFIG_NUMA_BALANCING 1335 /* 1336 * In an inaccessible (PROT_NONE) VMA, pte_protnone() may indicate "yes". It is 1337 * perfectly valid to indicate "no" in that case, which is why our default 1338 * implementation defaults to "always no". 1339 * 1340 * In an accessible VMA, however, pte_protnone() reliably indicates PROT_NONE 1341 * page protection due to NUMA hinting. NUMA hinting faults only apply in 1342 * accessible VMAs. 1343 * 1344 * So, to reliably identify PROT_NONE PTEs that require a NUMA hinting fault, 1345 * looking at the VMA accessibility is sufficient. 1346 */ 1347 static inline int pte_protnone(pte_t pte) 1348 { 1349 return 0; 1350 } 1351 1352 static inline int pmd_protnone(pmd_t pmd) 1353 { 1354 return 0; 1355 } 1356 #endif /* CONFIG_NUMA_BALANCING */ 1357 1358 #endif /* CONFIG_MMU */ 1359 1360 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP 1361 1362 #ifndef __PAGETABLE_P4D_FOLDED 1363 int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot); 1364 void p4d_clear_huge(p4d_t *p4d); 1365 #else 1366 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot) 1367 { 1368 return 0; 1369 } 1370 static inline void p4d_clear_huge(p4d_t *p4d) { } 1371 #endif /* !__PAGETABLE_P4D_FOLDED */ 1372 1373 int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot); 1374 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot); 1375 int pud_clear_huge(pud_t *pud); 1376 int pmd_clear_huge(pmd_t *pmd); 1377 int p4d_free_pud_page(p4d_t *p4d, unsigned long addr); 1378 int pud_free_pmd_page(pud_t *pud, unsigned long addr); 1379 int pmd_free_pte_page(pmd_t *pmd, unsigned long addr); 1380 #else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */ 1381 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot) 1382 { 1383 return 0; 1384 } 1385 static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot) 1386 { 1387 return 0; 1388 } 1389 static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot) 1390 { 1391 return 0; 1392 } 1393 static inline void p4d_clear_huge(p4d_t *p4d) { } 1394 static inline int pud_clear_huge(pud_t *pud) 1395 { 1396 return 0; 1397 } 1398 static inline int pmd_clear_huge(pmd_t *pmd) 1399 { 1400 return 0; 1401 } 1402 static inline int p4d_free_pud_page(p4d_t *p4d, unsigned long addr) 1403 { 1404 return 0; 1405 } 1406 static inline int pud_free_pmd_page(pud_t *pud, unsigned long addr) 1407 { 1408 return 0; 1409 } 1410 static inline int pmd_free_pte_page(pmd_t *pmd, unsigned long addr) 1411 { 1412 return 0; 1413 } 1414 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */ 1415 1416 #ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE 1417 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 1418 /* 1419 * ARCHes with special requirements for evicting THP backing TLB entries can 1420 * implement this. Otherwise also, it can help optimize normal TLB flush in 1421 * THP regime. Stock flush_tlb_range() typically has optimization to nuke the 1422 * entire TLB if flush span is greater than a threshold, which will 1423 * likely be true for a single huge page. Thus a single THP flush will 1424 * invalidate the entire TLB which is not desirable. 1425 * e.g. see arch/arc: flush_pmd_tlb_range 1426 */ 1427 #define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end) 1428 #define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end) 1429 #else 1430 #define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG() 1431 #define flush_pud_tlb_range(vma, addr, end) BUILD_BUG() 1432 #endif 1433 #endif 1434 1435 struct file; 1436 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, 1437 unsigned long size, pgprot_t *vma_prot); 1438 1439 #ifndef CONFIG_X86_ESPFIX64 1440 static inline void init_espfix_bsp(void) { } 1441 #endif 1442 1443 extern void __init pgtable_cache_init(void); 1444 1445 #ifndef __HAVE_ARCH_PFN_MODIFY_ALLOWED 1446 static inline bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot) 1447 { 1448 return true; 1449 } 1450 1451 static inline bool arch_has_pfn_modify_check(void) 1452 { 1453 return false; 1454 } 1455 #endif /* !_HAVE_ARCH_PFN_MODIFY_ALLOWED */ 1456 1457 /* 1458 * Architecture PAGE_KERNEL_* fallbacks 1459 * 1460 * Some architectures don't define certain PAGE_KERNEL_* flags. This is either 1461 * because they really don't support them, or the port needs to be updated to 1462 * reflect the required functionality. Below are a set of relatively safe 1463 * fallbacks, as best effort, which we can count on in lieu of the architectures 1464 * not defining them on their own yet. 1465 */ 1466 1467 #ifndef PAGE_KERNEL_RO 1468 # define PAGE_KERNEL_RO PAGE_KERNEL 1469 #endif 1470 1471 #ifndef PAGE_KERNEL_EXEC 1472 # define PAGE_KERNEL_EXEC PAGE_KERNEL 1473 #endif 1474 1475 /* 1476 * Page Table Modification bits for pgtbl_mod_mask. 1477 * 1478 * These are used by the p?d_alloc_track*() set of functions an in the generic 1479 * vmalloc/ioremap code to track at which page-table levels entries have been 1480 * modified. Based on that the code can better decide when vmalloc and ioremap 1481 * mapping changes need to be synchronized to other page-tables in the system. 1482 */ 1483 #define __PGTBL_PGD_MODIFIED 0 1484 #define __PGTBL_P4D_MODIFIED 1 1485 #define __PGTBL_PUD_MODIFIED 2 1486 #define __PGTBL_PMD_MODIFIED 3 1487 #define __PGTBL_PTE_MODIFIED 4 1488 1489 #define PGTBL_PGD_MODIFIED BIT(__PGTBL_PGD_MODIFIED) 1490 #define PGTBL_P4D_MODIFIED BIT(__PGTBL_P4D_MODIFIED) 1491 #define PGTBL_PUD_MODIFIED BIT(__PGTBL_PUD_MODIFIED) 1492 #define PGTBL_PMD_MODIFIED BIT(__PGTBL_PMD_MODIFIED) 1493 #define PGTBL_PTE_MODIFIED BIT(__PGTBL_PTE_MODIFIED) 1494 1495 /* Page-Table Modification Mask */ 1496 typedef unsigned int pgtbl_mod_mask; 1497 1498 #endif /* !__ASSEMBLY__ */ 1499 1500 #if !defined(MAX_POSSIBLE_PHYSMEM_BITS) && !defined(CONFIG_64BIT) 1501 #ifdef CONFIG_PHYS_ADDR_T_64BIT 1502 /* 1503 * ZSMALLOC needs to know the highest PFN on 32-bit architectures 1504 * with physical address space extension, but falls back to 1505 * BITS_PER_LONG otherwise. 1506 */ 1507 #error Missing MAX_POSSIBLE_PHYSMEM_BITS definition 1508 #else 1509 #define MAX_POSSIBLE_PHYSMEM_BITS 32 1510 #endif 1511 #endif 1512 1513 #ifndef has_transparent_hugepage 1514 #define has_transparent_hugepage() IS_BUILTIN(CONFIG_TRANSPARENT_HUGEPAGE) 1515 #endif 1516 1517 #ifndef has_transparent_pud_hugepage 1518 #define has_transparent_pud_hugepage() IS_BUILTIN(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD) 1519 #endif 1520 /* 1521 * On some architectures it depends on the mm if the p4d/pud or pmd 1522 * layer of the page table hierarchy is folded or not. 1523 */ 1524 #ifndef mm_p4d_folded 1525 #define mm_p4d_folded(mm) __is_defined(__PAGETABLE_P4D_FOLDED) 1526 #endif 1527 1528 #ifndef mm_pud_folded 1529 #define mm_pud_folded(mm) __is_defined(__PAGETABLE_PUD_FOLDED) 1530 #endif 1531 1532 #ifndef mm_pmd_folded 1533 #define mm_pmd_folded(mm) __is_defined(__PAGETABLE_PMD_FOLDED) 1534 #endif 1535 1536 #ifndef p4d_offset_lockless 1537 #define p4d_offset_lockless(pgdp, pgd, address) p4d_offset(&(pgd), address) 1538 #endif 1539 #ifndef pud_offset_lockless 1540 #define pud_offset_lockless(p4dp, p4d, address) pud_offset(&(p4d), address) 1541 #endif 1542 #ifndef pmd_offset_lockless 1543 #define pmd_offset_lockless(pudp, pud, address) pmd_offset(&(pud), address) 1544 #endif 1545 1546 /* 1547 * p?d_leaf() - true if this entry is a final mapping to a physical address. 1548 * This differs from p?d_huge() by the fact that they are always available (if 1549 * the architecture supports large pages at the appropriate level) even 1550 * if CONFIG_HUGETLB_PAGE is not defined. 1551 * Only meaningful when called on a valid entry. 1552 */ 1553 #ifndef pgd_leaf 1554 #define pgd_leaf(x) 0 1555 #endif 1556 #ifndef p4d_leaf 1557 #define p4d_leaf(x) 0 1558 #endif 1559 #ifndef pud_leaf 1560 #define pud_leaf(x) 0 1561 #endif 1562 #ifndef pmd_leaf 1563 #define pmd_leaf(x) 0 1564 #endif 1565 1566 #ifndef pgd_leaf_size 1567 #define pgd_leaf_size(x) (1ULL << PGDIR_SHIFT) 1568 #endif 1569 #ifndef p4d_leaf_size 1570 #define p4d_leaf_size(x) P4D_SIZE 1571 #endif 1572 #ifndef pud_leaf_size 1573 #define pud_leaf_size(x) PUD_SIZE 1574 #endif 1575 #ifndef pmd_leaf_size 1576 #define pmd_leaf_size(x) PMD_SIZE 1577 #endif 1578 #ifndef pte_leaf_size 1579 #define pte_leaf_size(x) PAGE_SIZE 1580 #endif 1581 1582 /* 1583 * Some architectures have MMUs that are configurable or selectable at boot 1584 * time. These lead to variable PTRS_PER_x. For statically allocated arrays it 1585 * helps to have a static maximum value. 1586 */ 1587 1588 #ifndef MAX_PTRS_PER_PTE 1589 #define MAX_PTRS_PER_PTE PTRS_PER_PTE 1590 #endif 1591 1592 #ifndef MAX_PTRS_PER_PMD 1593 #define MAX_PTRS_PER_PMD PTRS_PER_PMD 1594 #endif 1595 1596 #ifndef MAX_PTRS_PER_PUD 1597 #define MAX_PTRS_PER_PUD PTRS_PER_PUD 1598 #endif 1599 1600 #ifndef MAX_PTRS_PER_P4D 1601 #define MAX_PTRS_PER_P4D PTRS_PER_P4D 1602 #endif 1603 1604 /* description of effects of mapping type and prot in current implementation. 1605 * this is due to the limited x86 page protection hardware. The expected 1606 * behavior is in parens: 1607 * 1608 * map_type prot 1609 * PROT_NONE PROT_READ PROT_WRITE PROT_EXEC 1610 * MAP_SHARED r: (no) no r: (yes) yes r: (no) yes r: (no) yes 1611 * w: (no) no w: (no) no w: (yes) yes w: (no) no 1612 * x: (no) no x: (no) yes x: (no) yes x: (yes) yes 1613 * 1614 * MAP_PRIVATE r: (no) no r: (yes) yes r: (no) yes r: (no) yes 1615 * w: (no) no w: (no) no w: (copy) copy w: (no) no 1616 * x: (no) no x: (no) yes x: (no) yes x: (yes) yes 1617 * 1618 * On arm64, PROT_EXEC has the following behaviour for both MAP_SHARED and 1619 * MAP_PRIVATE (with Enhanced PAN supported): 1620 * r: (no) no 1621 * w: (no) no 1622 * x: (yes) yes 1623 */ 1624 #define DECLARE_VM_GET_PAGE_PROT \ 1625 pgprot_t vm_get_page_prot(unsigned long vm_flags) \ 1626 { \ 1627 return protection_map[vm_flags & \ 1628 (VM_READ | VM_WRITE | VM_EXEC | VM_SHARED)]; \ 1629 } \ 1630 EXPORT_SYMBOL(vm_get_page_prot); 1631 1632 #endif /* _LINUX_PGTABLE_H */ 1633