1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _LINUX_PGTABLE_H 3 #define _LINUX_PGTABLE_H 4 5 #include <linux/pfn.h> 6 #include <asm/pgtable.h> 7 8 #ifndef __ASSEMBLY__ 9 #ifdef CONFIG_MMU 10 11 #include <linux/mm_types.h> 12 #include <linux/bug.h> 13 #include <linux/errno.h> 14 #include <asm-generic/pgtable_uffd.h> 15 16 #if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \ 17 defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS 18 #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED 19 #endif 20 21 /* 22 * On almost all architectures and configurations, 0 can be used as the 23 * upper ceiling to free_pgtables(): on many architectures it has the same 24 * effect as using TASK_SIZE. However, there is one configuration which 25 * must impose a more careful limit, to avoid freeing kernel pgtables. 26 */ 27 #ifndef USER_PGTABLES_CEILING 28 #define USER_PGTABLES_CEILING 0UL 29 #endif 30 31 /* 32 * A page table page can be thought of an array like this: pXd_t[PTRS_PER_PxD] 33 * 34 * The pXx_index() functions return the index of the entry in the page 35 * table page which would control the given virtual address 36 * 37 * As these functions may be used by the same code for different levels of 38 * the page table folding, they are always available, regardless of 39 * CONFIG_PGTABLE_LEVELS value. For the folded levels they simply return 0 40 * because in such cases PTRS_PER_PxD equals 1. 41 */ 42 43 static inline unsigned long pte_index(unsigned long address) 44 { 45 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); 46 } 47 48 #ifndef pmd_index 49 static inline unsigned long pmd_index(unsigned long address) 50 { 51 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1); 52 } 53 #define pmd_index pmd_index 54 #endif 55 56 #ifndef pud_index 57 static inline unsigned long pud_index(unsigned long address) 58 { 59 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1); 60 } 61 #define pud_index pud_index 62 #endif 63 64 #ifndef pgd_index 65 /* Must be a compile-time constant, so implement it as a macro */ 66 #define pgd_index(a) (((a) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) 67 #endif 68 69 #ifndef pte_offset_kernel 70 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address) 71 { 72 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address); 73 } 74 #define pte_offset_kernel pte_offset_kernel 75 #endif 76 77 #if defined(CONFIG_HIGHPTE) 78 #define pte_offset_map(dir, address) \ 79 ((pte_t *)kmap_atomic(pmd_page(*(dir))) + \ 80 pte_index((address))) 81 #define pte_unmap(pte) kunmap_atomic((pte)) 82 #else 83 #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address)) 84 #define pte_unmap(pte) ((void)(pte)) /* NOP */ 85 #endif 86 87 /* Find an entry in the second-level page table.. */ 88 #ifndef pmd_offset 89 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) 90 { 91 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address); 92 } 93 #define pmd_offset pmd_offset 94 #endif 95 96 #ifndef pud_offset 97 static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address) 98 { 99 return (pud_t *)p4d_page_vaddr(*p4d) + pud_index(address); 100 } 101 #define pud_offset pud_offset 102 #endif 103 104 static inline pgd_t *pgd_offset_pgd(pgd_t *pgd, unsigned long address) 105 { 106 return (pgd + pgd_index(address)); 107 }; 108 109 /* 110 * a shortcut to get a pgd_t in a given mm 111 */ 112 #ifndef pgd_offset 113 #define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address)) 114 #endif 115 116 /* 117 * a shortcut which implies the use of the kernel's pgd, instead 118 * of a process's 119 */ 120 #ifndef pgd_offset_k 121 #define pgd_offset_k(address) pgd_offset(&init_mm, (address)) 122 #endif 123 124 /* 125 * In many cases it is known that a virtual address is mapped at PMD or PTE 126 * level, so instead of traversing all the page table levels, we can get a 127 * pointer to the PMD entry in user or kernel page table or translate a virtual 128 * address to the pointer in the PTE in the kernel page tables with simple 129 * helpers. 130 */ 131 static inline pmd_t *pmd_off(struct mm_struct *mm, unsigned long va) 132 { 133 return pmd_offset(pud_offset(p4d_offset(pgd_offset(mm, va), va), va), va); 134 } 135 136 static inline pmd_t *pmd_off_k(unsigned long va) 137 { 138 return pmd_offset(pud_offset(p4d_offset(pgd_offset_k(va), va), va), va); 139 } 140 141 static inline pte_t *virt_to_kpte(unsigned long vaddr) 142 { 143 pmd_t *pmd = pmd_off_k(vaddr); 144 145 return pmd_none(*pmd) ? NULL : pte_offset_kernel(pmd, vaddr); 146 } 147 148 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 149 extern int ptep_set_access_flags(struct vm_area_struct *vma, 150 unsigned long address, pte_t *ptep, 151 pte_t entry, int dirty); 152 #endif 153 154 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS 155 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 156 extern int pmdp_set_access_flags(struct vm_area_struct *vma, 157 unsigned long address, pmd_t *pmdp, 158 pmd_t entry, int dirty); 159 extern int pudp_set_access_flags(struct vm_area_struct *vma, 160 unsigned long address, pud_t *pudp, 161 pud_t entry, int dirty); 162 #else 163 static inline int pmdp_set_access_flags(struct vm_area_struct *vma, 164 unsigned long address, pmd_t *pmdp, 165 pmd_t entry, int dirty) 166 { 167 BUILD_BUG(); 168 return 0; 169 } 170 static inline int pudp_set_access_flags(struct vm_area_struct *vma, 171 unsigned long address, pud_t *pudp, 172 pud_t entry, int dirty) 173 { 174 BUILD_BUG(); 175 return 0; 176 } 177 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 178 #endif 179 180 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 181 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, 182 unsigned long address, 183 pte_t *ptep) 184 { 185 pte_t pte = *ptep; 186 int r = 1; 187 if (!pte_young(pte)) 188 r = 0; 189 else 190 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte)); 191 return r; 192 } 193 #endif 194 195 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG 196 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 197 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, 198 unsigned long address, 199 pmd_t *pmdp) 200 { 201 pmd_t pmd = *pmdp; 202 int r = 1; 203 if (!pmd_young(pmd)) 204 r = 0; 205 else 206 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd)); 207 return r; 208 } 209 #else 210 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, 211 unsigned long address, 212 pmd_t *pmdp) 213 { 214 BUILD_BUG(); 215 return 0; 216 } 217 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 218 #endif 219 220 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 221 int ptep_clear_flush_young(struct vm_area_struct *vma, 222 unsigned long address, pte_t *ptep); 223 #endif 224 225 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH 226 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 227 extern int pmdp_clear_flush_young(struct vm_area_struct *vma, 228 unsigned long address, pmd_t *pmdp); 229 #else 230 /* 231 * Despite relevant to THP only, this API is called from generic rmap code 232 * under PageTransHuge(), hence needs a dummy implementation for !THP 233 */ 234 static inline int pmdp_clear_flush_young(struct vm_area_struct *vma, 235 unsigned long address, pmd_t *pmdp) 236 { 237 BUILD_BUG(); 238 return 0; 239 } 240 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 241 #endif 242 243 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR 244 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, 245 unsigned long address, 246 pte_t *ptep) 247 { 248 pte_t pte = *ptep; 249 pte_clear(mm, address, ptep); 250 return pte; 251 } 252 #endif 253 254 #ifndef __HAVE_ARCH_PTEP_GET 255 static inline pte_t ptep_get(pte_t *ptep) 256 { 257 return READ_ONCE(*ptep); 258 } 259 #endif 260 261 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 262 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR 263 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, 264 unsigned long address, 265 pmd_t *pmdp) 266 { 267 pmd_t pmd = *pmdp; 268 pmd_clear(pmdp); 269 return pmd; 270 } 271 #endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */ 272 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR 273 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm, 274 unsigned long address, 275 pud_t *pudp) 276 { 277 pud_t pud = *pudp; 278 279 pud_clear(pudp); 280 return pud; 281 } 282 #endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */ 283 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 284 285 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 286 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL 287 static inline pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma, 288 unsigned long address, pmd_t *pmdp, 289 int full) 290 { 291 return pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp); 292 } 293 #endif 294 295 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL 296 static inline pud_t pudp_huge_get_and_clear_full(struct mm_struct *mm, 297 unsigned long address, pud_t *pudp, 298 int full) 299 { 300 return pudp_huge_get_and_clear(mm, address, pudp); 301 } 302 #endif 303 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 304 305 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL 306 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, 307 unsigned long address, pte_t *ptep, 308 int full) 309 { 310 pte_t pte; 311 pte = ptep_get_and_clear(mm, address, ptep); 312 return pte; 313 } 314 #endif 315 316 317 /* 318 * If two threads concurrently fault at the same page, the thread that 319 * won the race updates the PTE and its local TLB/Cache. The other thread 320 * gives up, simply does nothing, and continues; on architectures where 321 * software can update TLB, local TLB can be updated here to avoid next page 322 * fault. This function updates TLB only, do nothing with cache or others. 323 * It is the difference with function update_mmu_cache. 324 */ 325 #ifndef __HAVE_ARCH_UPDATE_MMU_TLB 326 static inline void update_mmu_tlb(struct vm_area_struct *vma, 327 unsigned long address, pte_t *ptep) 328 { 329 } 330 #define __HAVE_ARCH_UPDATE_MMU_TLB 331 #endif 332 333 /* 334 * Some architectures may be able to avoid expensive synchronization 335 * primitives when modifications are made to PTE's which are already 336 * not present, or in the process of an address space destruction. 337 */ 338 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL 339 static inline void pte_clear_not_present_full(struct mm_struct *mm, 340 unsigned long address, 341 pte_t *ptep, 342 int full) 343 { 344 pte_clear(mm, address, ptep); 345 } 346 #endif 347 348 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH 349 extern pte_t ptep_clear_flush(struct vm_area_struct *vma, 350 unsigned long address, 351 pte_t *ptep); 352 #endif 353 354 #ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH 355 extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma, 356 unsigned long address, 357 pmd_t *pmdp); 358 extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma, 359 unsigned long address, 360 pud_t *pudp); 361 #endif 362 363 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT 364 struct mm_struct; 365 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep) 366 { 367 pte_t old_pte = *ptep; 368 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte)); 369 } 370 #endif 371 372 /* 373 * On some architectures hardware does not set page access bit when accessing 374 * memory page, it is responsibilty of software setting this bit. It brings 375 * out extra page fault penalty to track page access bit. For optimization page 376 * access bit can be set during all page fault flow on these arches. 377 * To be differentiate with macro pte_mkyoung, this macro is used on platforms 378 * where software maintains page access bit. 379 */ 380 #ifndef pte_sw_mkyoung 381 static inline pte_t pte_sw_mkyoung(pte_t pte) 382 { 383 return pte; 384 } 385 #define pte_sw_mkyoung pte_sw_mkyoung 386 #endif 387 388 #ifndef pte_savedwrite 389 #define pte_savedwrite pte_write 390 #endif 391 392 #ifndef pte_mk_savedwrite 393 #define pte_mk_savedwrite pte_mkwrite 394 #endif 395 396 #ifndef pte_clear_savedwrite 397 #define pte_clear_savedwrite pte_wrprotect 398 #endif 399 400 #ifndef pmd_savedwrite 401 #define pmd_savedwrite pmd_write 402 #endif 403 404 #ifndef pmd_mk_savedwrite 405 #define pmd_mk_savedwrite pmd_mkwrite 406 #endif 407 408 #ifndef pmd_clear_savedwrite 409 #define pmd_clear_savedwrite pmd_wrprotect 410 #endif 411 412 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT 413 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 414 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 415 unsigned long address, pmd_t *pmdp) 416 { 417 pmd_t old_pmd = *pmdp; 418 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd)); 419 } 420 #else 421 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 422 unsigned long address, pmd_t *pmdp) 423 { 424 BUILD_BUG(); 425 } 426 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 427 #endif 428 #ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT 429 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 430 static inline void pudp_set_wrprotect(struct mm_struct *mm, 431 unsigned long address, pud_t *pudp) 432 { 433 pud_t old_pud = *pudp; 434 435 set_pud_at(mm, address, pudp, pud_wrprotect(old_pud)); 436 } 437 #else 438 static inline void pudp_set_wrprotect(struct mm_struct *mm, 439 unsigned long address, pud_t *pudp) 440 { 441 BUILD_BUG(); 442 } 443 #endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */ 444 #endif 445 446 #ifndef pmdp_collapse_flush 447 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 448 extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, 449 unsigned long address, pmd_t *pmdp); 450 #else 451 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, 452 unsigned long address, 453 pmd_t *pmdp) 454 { 455 BUILD_BUG(); 456 return *pmdp; 457 } 458 #define pmdp_collapse_flush pmdp_collapse_flush 459 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 460 #endif 461 462 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT 463 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp, 464 pgtable_t pgtable); 465 #endif 466 467 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW 468 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp); 469 #endif 470 471 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 472 /* 473 * This is an implementation of pmdp_establish() that is only suitable for an 474 * architecture that doesn't have hardware dirty/accessed bits. In this case we 475 * can't race with CPU which sets these bits and non-atomic aproach is fine. 476 */ 477 static inline pmd_t generic_pmdp_establish(struct vm_area_struct *vma, 478 unsigned long address, pmd_t *pmdp, pmd_t pmd) 479 { 480 pmd_t old_pmd = *pmdp; 481 set_pmd_at(vma->vm_mm, address, pmdp, pmd); 482 return old_pmd; 483 } 484 #endif 485 486 #ifndef __HAVE_ARCH_PMDP_INVALIDATE 487 extern pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address, 488 pmd_t *pmdp); 489 #endif 490 491 #ifndef __HAVE_ARCH_PTE_SAME 492 static inline int pte_same(pte_t pte_a, pte_t pte_b) 493 { 494 return pte_val(pte_a) == pte_val(pte_b); 495 } 496 #endif 497 498 #ifndef __HAVE_ARCH_PTE_UNUSED 499 /* 500 * Some architectures provide facilities to virtualization guests 501 * so that they can flag allocated pages as unused. This allows the 502 * host to transparently reclaim unused pages. This function returns 503 * whether the pte's page is unused. 504 */ 505 static inline int pte_unused(pte_t pte) 506 { 507 return 0; 508 } 509 #endif 510 511 #ifndef pte_access_permitted 512 #define pte_access_permitted(pte, write) \ 513 (pte_present(pte) && (!(write) || pte_write(pte))) 514 #endif 515 516 #ifndef pmd_access_permitted 517 #define pmd_access_permitted(pmd, write) \ 518 (pmd_present(pmd) && (!(write) || pmd_write(pmd))) 519 #endif 520 521 #ifndef pud_access_permitted 522 #define pud_access_permitted(pud, write) \ 523 (pud_present(pud) && (!(write) || pud_write(pud))) 524 #endif 525 526 #ifndef p4d_access_permitted 527 #define p4d_access_permitted(p4d, write) \ 528 (p4d_present(p4d) && (!(write) || p4d_write(p4d))) 529 #endif 530 531 #ifndef pgd_access_permitted 532 #define pgd_access_permitted(pgd, write) \ 533 (pgd_present(pgd) && (!(write) || pgd_write(pgd))) 534 #endif 535 536 #ifndef __HAVE_ARCH_PMD_SAME 537 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b) 538 { 539 return pmd_val(pmd_a) == pmd_val(pmd_b); 540 } 541 542 static inline int pud_same(pud_t pud_a, pud_t pud_b) 543 { 544 return pud_val(pud_a) == pud_val(pud_b); 545 } 546 #endif 547 548 #ifndef __HAVE_ARCH_P4D_SAME 549 static inline int p4d_same(p4d_t p4d_a, p4d_t p4d_b) 550 { 551 return p4d_val(p4d_a) == p4d_val(p4d_b); 552 } 553 #endif 554 555 #ifndef __HAVE_ARCH_PGD_SAME 556 static inline int pgd_same(pgd_t pgd_a, pgd_t pgd_b) 557 { 558 return pgd_val(pgd_a) == pgd_val(pgd_b); 559 } 560 #endif 561 562 /* 563 * Use set_p*_safe(), and elide TLB flushing, when confident that *no* 564 * TLB flush will be required as a result of the "set". For example, use 565 * in scenarios where it is known ahead of time that the routine is 566 * setting non-present entries, or re-setting an existing entry to the 567 * same value. Otherwise, use the typical "set" helpers and flush the 568 * TLB. 569 */ 570 #define set_pte_safe(ptep, pte) \ 571 ({ \ 572 WARN_ON_ONCE(pte_present(*ptep) && !pte_same(*ptep, pte)); \ 573 set_pte(ptep, pte); \ 574 }) 575 576 #define set_pmd_safe(pmdp, pmd) \ 577 ({ \ 578 WARN_ON_ONCE(pmd_present(*pmdp) && !pmd_same(*pmdp, pmd)); \ 579 set_pmd(pmdp, pmd); \ 580 }) 581 582 #define set_pud_safe(pudp, pud) \ 583 ({ \ 584 WARN_ON_ONCE(pud_present(*pudp) && !pud_same(*pudp, pud)); \ 585 set_pud(pudp, pud); \ 586 }) 587 588 #define set_p4d_safe(p4dp, p4d) \ 589 ({ \ 590 WARN_ON_ONCE(p4d_present(*p4dp) && !p4d_same(*p4dp, p4d)); \ 591 set_p4d(p4dp, p4d); \ 592 }) 593 594 #define set_pgd_safe(pgdp, pgd) \ 595 ({ \ 596 WARN_ON_ONCE(pgd_present(*pgdp) && !pgd_same(*pgdp, pgd)); \ 597 set_pgd(pgdp, pgd); \ 598 }) 599 600 #ifndef __HAVE_ARCH_DO_SWAP_PAGE 601 /* 602 * Some architectures support metadata associated with a page. When a 603 * page is being swapped out, this metadata must be saved so it can be 604 * restored when the page is swapped back in. SPARC M7 and newer 605 * processors support an ADI (Application Data Integrity) tag for the 606 * page as metadata for the page. arch_do_swap_page() can restore this 607 * metadata when a page is swapped back in. 608 */ 609 static inline void arch_do_swap_page(struct mm_struct *mm, 610 struct vm_area_struct *vma, 611 unsigned long addr, 612 pte_t pte, pte_t oldpte) 613 { 614 615 } 616 #endif 617 618 #ifndef __HAVE_ARCH_UNMAP_ONE 619 /* 620 * Some architectures support metadata associated with a page. When a 621 * page is being swapped out, this metadata must be saved so it can be 622 * restored when the page is swapped back in. SPARC M7 and newer 623 * processors support an ADI (Application Data Integrity) tag for the 624 * page as metadata for the page. arch_unmap_one() can save this 625 * metadata on a swap-out of a page. 626 */ 627 static inline int arch_unmap_one(struct mm_struct *mm, 628 struct vm_area_struct *vma, 629 unsigned long addr, 630 pte_t orig_pte) 631 { 632 return 0; 633 } 634 #endif 635 636 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE 637 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr) 638 #endif 639 640 #ifndef __HAVE_ARCH_MOVE_PTE 641 #define move_pte(pte, prot, old_addr, new_addr) (pte) 642 #endif 643 644 #ifndef pte_accessible 645 # define pte_accessible(mm, pte) ((void)(pte), 1) 646 #endif 647 648 #ifndef flush_tlb_fix_spurious_fault 649 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address) 650 #endif 651 652 /* 653 * When walking page tables, get the address of the next boundary, 654 * or the end address of the range if that comes earlier. Although no 655 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout. 656 */ 657 658 #define pgd_addr_end(addr, end) \ 659 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \ 660 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 661 }) 662 663 #ifndef p4d_addr_end 664 #define p4d_addr_end(addr, end) \ 665 ({ unsigned long __boundary = ((addr) + P4D_SIZE) & P4D_MASK; \ 666 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 667 }) 668 #endif 669 670 #ifndef pud_addr_end 671 #define pud_addr_end(addr, end) \ 672 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \ 673 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 674 }) 675 #endif 676 677 #ifndef pmd_addr_end 678 #define pmd_addr_end(addr, end) \ 679 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \ 680 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 681 }) 682 #endif 683 684 /* 685 * When walking page tables, we usually want to skip any p?d_none entries; 686 * and any p?d_bad entries - reporting the error before resetting to none. 687 * Do the tests inline, but report and clear the bad entry in mm/memory.c. 688 */ 689 void pgd_clear_bad(pgd_t *); 690 691 #ifndef __PAGETABLE_P4D_FOLDED 692 void p4d_clear_bad(p4d_t *); 693 #else 694 #define p4d_clear_bad(p4d) do { } while (0) 695 #endif 696 697 #ifndef __PAGETABLE_PUD_FOLDED 698 void pud_clear_bad(pud_t *); 699 #else 700 #define pud_clear_bad(p4d) do { } while (0) 701 #endif 702 703 void pmd_clear_bad(pmd_t *); 704 705 static inline int pgd_none_or_clear_bad(pgd_t *pgd) 706 { 707 if (pgd_none(*pgd)) 708 return 1; 709 if (unlikely(pgd_bad(*pgd))) { 710 pgd_clear_bad(pgd); 711 return 1; 712 } 713 return 0; 714 } 715 716 static inline int p4d_none_or_clear_bad(p4d_t *p4d) 717 { 718 if (p4d_none(*p4d)) 719 return 1; 720 if (unlikely(p4d_bad(*p4d))) { 721 p4d_clear_bad(p4d); 722 return 1; 723 } 724 return 0; 725 } 726 727 static inline int pud_none_or_clear_bad(pud_t *pud) 728 { 729 if (pud_none(*pud)) 730 return 1; 731 if (unlikely(pud_bad(*pud))) { 732 pud_clear_bad(pud); 733 return 1; 734 } 735 return 0; 736 } 737 738 static inline int pmd_none_or_clear_bad(pmd_t *pmd) 739 { 740 if (pmd_none(*pmd)) 741 return 1; 742 if (unlikely(pmd_bad(*pmd))) { 743 pmd_clear_bad(pmd); 744 return 1; 745 } 746 return 0; 747 } 748 749 static inline pte_t __ptep_modify_prot_start(struct vm_area_struct *vma, 750 unsigned long addr, 751 pte_t *ptep) 752 { 753 /* 754 * Get the current pte state, but zero it out to make it 755 * non-present, preventing the hardware from asynchronously 756 * updating it. 757 */ 758 return ptep_get_and_clear(vma->vm_mm, addr, ptep); 759 } 760 761 static inline void __ptep_modify_prot_commit(struct vm_area_struct *vma, 762 unsigned long addr, 763 pte_t *ptep, pte_t pte) 764 { 765 /* 766 * The pte is non-present, so there's no hardware state to 767 * preserve. 768 */ 769 set_pte_at(vma->vm_mm, addr, ptep, pte); 770 } 771 772 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION 773 /* 774 * Start a pte protection read-modify-write transaction, which 775 * protects against asynchronous hardware modifications to the pte. 776 * The intention is not to prevent the hardware from making pte 777 * updates, but to prevent any updates it may make from being lost. 778 * 779 * This does not protect against other software modifications of the 780 * pte; the appropriate pte lock must be held over the transation. 781 * 782 * Note that this interface is intended to be batchable, meaning that 783 * ptep_modify_prot_commit may not actually update the pte, but merely 784 * queue the update to be done at some later time. The update must be 785 * actually committed before the pte lock is released, however. 786 */ 787 static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma, 788 unsigned long addr, 789 pte_t *ptep) 790 { 791 return __ptep_modify_prot_start(vma, addr, ptep); 792 } 793 794 /* 795 * Commit an update to a pte, leaving any hardware-controlled bits in 796 * the PTE unmodified. 797 */ 798 static inline void ptep_modify_prot_commit(struct vm_area_struct *vma, 799 unsigned long addr, 800 pte_t *ptep, pte_t old_pte, pte_t pte) 801 { 802 __ptep_modify_prot_commit(vma, addr, ptep, pte); 803 } 804 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */ 805 #endif /* CONFIG_MMU */ 806 807 /* 808 * No-op macros that just return the current protection value. Defined here 809 * because these macros can be used even if CONFIG_MMU is not defined. 810 */ 811 812 #ifndef pgprot_nx 813 #define pgprot_nx(prot) (prot) 814 #endif 815 816 #ifndef pgprot_noncached 817 #define pgprot_noncached(prot) (prot) 818 #endif 819 820 #ifndef pgprot_writecombine 821 #define pgprot_writecombine pgprot_noncached 822 #endif 823 824 #ifndef pgprot_writethrough 825 #define pgprot_writethrough pgprot_noncached 826 #endif 827 828 #ifndef pgprot_device 829 #define pgprot_device pgprot_noncached 830 #endif 831 832 #ifdef CONFIG_MMU 833 #ifndef pgprot_modify 834 #define pgprot_modify pgprot_modify 835 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) 836 { 837 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot))) 838 newprot = pgprot_noncached(newprot); 839 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot))) 840 newprot = pgprot_writecombine(newprot); 841 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot))) 842 newprot = pgprot_device(newprot); 843 return newprot; 844 } 845 #endif 846 #endif /* CONFIG_MMU */ 847 848 #ifndef pgprot_encrypted 849 #define pgprot_encrypted(prot) (prot) 850 #endif 851 852 #ifndef pgprot_decrypted 853 #define pgprot_decrypted(prot) (prot) 854 #endif 855 856 /* 857 * A facility to provide lazy MMU batching. This allows PTE updates and 858 * page invalidations to be delayed until a call to leave lazy MMU mode 859 * is issued. Some architectures may benefit from doing this, and it is 860 * beneficial for both shadow and direct mode hypervisors, which may batch 861 * the PTE updates which happen during this window. Note that using this 862 * interface requires that read hazards be removed from the code. A read 863 * hazard could result in the direct mode hypervisor case, since the actual 864 * write to the page tables may not yet have taken place, so reads though 865 * a raw PTE pointer after it has been modified are not guaranteed to be 866 * up to date. This mode can only be entered and left under the protection of 867 * the page table locks for all page tables which may be modified. In the UP 868 * case, this is required so that preemption is disabled, and in the SMP case, 869 * it must synchronize the delayed page table writes properly on other CPUs. 870 */ 871 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE 872 #define arch_enter_lazy_mmu_mode() do {} while (0) 873 #define arch_leave_lazy_mmu_mode() do {} while (0) 874 #define arch_flush_lazy_mmu_mode() do {} while (0) 875 #endif 876 877 /* 878 * A facility to provide batching of the reload of page tables and 879 * other process state with the actual context switch code for 880 * paravirtualized guests. By convention, only one of the batched 881 * update (lazy) modes (CPU, MMU) should be active at any given time, 882 * entry should never be nested, and entry and exits should always be 883 * paired. This is for sanity of maintaining and reasoning about the 884 * kernel code. In this case, the exit (end of the context switch) is 885 * in architecture-specific code, and so doesn't need a generic 886 * definition. 887 */ 888 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH 889 #define arch_start_context_switch(prev) do {} while (0) 890 #endif 891 892 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 893 #ifndef CONFIG_ARCH_ENABLE_THP_MIGRATION 894 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 895 { 896 return pmd; 897 } 898 899 static inline int pmd_swp_soft_dirty(pmd_t pmd) 900 { 901 return 0; 902 } 903 904 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 905 { 906 return pmd; 907 } 908 #endif 909 #else /* !CONFIG_HAVE_ARCH_SOFT_DIRTY */ 910 static inline int pte_soft_dirty(pte_t pte) 911 { 912 return 0; 913 } 914 915 static inline int pmd_soft_dirty(pmd_t pmd) 916 { 917 return 0; 918 } 919 920 static inline pte_t pte_mksoft_dirty(pte_t pte) 921 { 922 return pte; 923 } 924 925 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) 926 { 927 return pmd; 928 } 929 930 static inline pte_t pte_clear_soft_dirty(pte_t pte) 931 { 932 return pte; 933 } 934 935 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) 936 { 937 return pmd; 938 } 939 940 static inline pte_t pte_swp_mksoft_dirty(pte_t pte) 941 { 942 return pte; 943 } 944 945 static inline int pte_swp_soft_dirty(pte_t pte) 946 { 947 return 0; 948 } 949 950 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) 951 { 952 return pte; 953 } 954 955 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 956 { 957 return pmd; 958 } 959 960 static inline int pmd_swp_soft_dirty(pmd_t pmd) 961 { 962 return 0; 963 } 964 965 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 966 { 967 return pmd; 968 } 969 #endif 970 971 #ifndef __HAVE_PFNMAP_TRACKING 972 /* 973 * Interfaces that can be used by architecture code to keep track of 974 * memory type of pfn mappings specified by the remap_pfn_range, 975 * vmf_insert_pfn. 976 */ 977 978 /* 979 * track_pfn_remap is called when a _new_ pfn mapping is being established 980 * by remap_pfn_range() for physical range indicated by pfn and size. 981 */ 982 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot, 983 unsigned long pfn, unsigned long addr, 984 unsigned long size) 985 { 986 return 0; 987 } 988 989 /* 990 * track_pfn_insert is called when a _new_ single pfn is established 991 * by vmf_insert_pfn(). 992 */ 993 static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, 994 pfn_t pfn) 995 { 996 } 997 998 /* 999 * track_pfn_copy is called when vma that is covering the pfnmap gets 1000 * copied through copy_page_range(). 1001 */ 1002 static inline int track_pfn_copy(struct vm_area_struct *vma) 1003 { 1004 return 0; 1005 } 1006 1007 /* 1008 * untrack_pfn is called while unmapping a pfnmap for a region. 1009 * untrack can be called for a specific region indicated by pfn and size or 1010 * can be for the entire vma (in which case pfn, size are zero). 1011 */ 1012 static inline void untrack_pfn(struct vm_area_struct *vma, 1013 unsigned long pfn, unsigned long size) 1014 { 1015 } 1016 1017 /* 1018 * untrack_pfn_moved is called while mremapping a pfnmap for a new region. 1019 */ 1020 static inline void untrack_pfn_moved(struct vm_area_struct *vma) 1021 { 1022 } 1023 #else 1024 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot, 1025 unsigned long pfn, unsigned long addr, 1026 unsigned long size); 1027 extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, 1028 pfn_t pfn); 1029 extern int track_pfn_copy(struct vm_area_struct *vma); 1030 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn, 1031 unsigned long size); 1032 extern void untrack_pfn_moved(struct vm_area_struct *vma); 1033 #endif 1034 1035 #ifdef __HAVE_COLOR_ZERO_PAGE 1036 static inline int is_zero_pfn(unsigned long pfn) 1037 { 1038 extern unsigned long zero_pfn; 1039 unsigned long offset_from_zero_pfn = pfn - zero_pfn; 1040 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT); 1041 } 1042 1043 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr)) 1044 1045 #else 1046 static inline int is_zero_pfn(unsigned long pfn) 1047 { 1048 extern unsigned long zero_pfn; 1049 return pfn == zero_pfn; 1050 } 1051 1052 static inline unsigned long my_zero_pfn(unsigned long addr) 1053 { 1054 extern unsigned long zero_pfn; 1055 return zero_pfn; 1056 } 1057 #endif 1058 1059 #ifdef CONFIG_MMU 1060 1061 #ifndef CONFIG_TRANSPARENT_HUGEPAGE 1062 static inline int pmd_trans_huge(pmd_t pmd) 1063 { 1064 return 0; 1065 } 1066 #ifndef pmd_write 1067 static inline int pmd_write(pmd_t pmd) 1068 { 1069 BUG(); 1070 return 0; 1071 } 1072 #endif /* pmd_write */ 1073 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 1074 1075 #ifndef pud_write 1076 static inline int pud_write(pud_t pud) 1077 { 1078 BUG(); 1079 return 0; 1080 } 1081 #endif /* pud_write */ 1082 1083 #if !defined(CONFIG_ARCH_HAS_PTE_DEVMAP) || !defined(CONFIG_TRANSPARENT_HUGEPAGE) 1084 static inline int pmd_devmap(pmd_t pmd) 1085 { 1086 return 0; 1087 } 1088 static inline int pud_devmap(pud_t pud) 1089 { 1090 return 0; 1091 } 1092 static inline int pgd_devmap(pgd_t pgd) 1093 { 1094 return 0; 1095 } 1096 #endif 1097 1098 #if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \ 1099 (defined(CONFIG_TRANSPARENT_HUGEPAGE) && \ 1100 !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD)) 1101 static inline int pud_trans_huge(pud_t pud) 1102 { 1103 return 0; 1104 } 1105 #endif 1106 1107 /* See pmd_none_or_trans_huge_or_clear_bad for discussion. */ 1108 static inline int pud_none_or_trans_huge_or_dev_or_clear_bad(pud_t *pud) 1109 { 1110 pud_t pudval = READ_ONCE(*pud); 1111 1112 if (pud_none(pudval) || pud_trans_huge(pudval) || pud_devmap(pudval)) 1113 return 1; 1114 if (unlikely(pud_bad(pudval))) { 1115 pud_clear_bad(pud); 1116 return 1; 1117 } 1118 return 0; 1119 } 1120 1121 /* See pmd_trans_unstable for discussion. */ 1122 static inline int pud_trans_unstable(pud_t *pud) 1123 { 1124 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && \ 1125 defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD) 1126 return pud_none_or_trans_huge_or_dev_or_clear_bad(pud); 1127 #else 1128 return 0; 1129 #endif 1130 } 1131 1132 #ifndef pmd_read_atomic 1133 static inline pmd_t pmd_read_atomic(pmd_t *pmdp) 1134 { 1135 /* 1136 * Depend on compiler for an atomic pmd read. NOTE: this is 1137 * only going to work, if the pmdval_t isn't larger than 1138 * an unsigned long. 1139 */ 1140 return *pmdp; 1141 } 1142 #endif 1143 1144 #ifndef arch_needs_pgtable_deposit 1145 #define arch_needs_pgtable_deposit() (false) 1146 #endif 1147 /* 1148 * This function is meant to be used by sites walking pagetables with 1149 * the mmap_lock held in read mode to protect against MADV_DONTNEED and 1150 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd 1151 * into a null pmd and the transhuge page fault can convert a null pmd 1152 * into an hugepmd or into a regular pmd (if the hugepage allocation 1153 * fails). While holding the mmap_lock in read mode the pmd becomes 1154 * stable and stops changing under us only if it's not null and not a 1155 * transhuge pmd. When those races occurs and this function makes a 1156 * difference vs the standard pmd_none_or_clear_bad, the result is 1157 * undefined so behaving like if the pmd was none is safe (because it 1158 * can return none anyway). The compiler level barrier() is critically 1159 * important to compute the two checks atomically on the same pmdval. 1160 * 1161 * For 32bit kernels with a 64bit large pmd_t this automatically takes 1162 * care of reading the pmd atomically to avoid SMP race conditions 1163 * against pmd_populate() when the mmap_lock is hold for reading by the 1164 * caller (a special atomic read not done by "gcc" as in the generic 1165 * version above, is also needed when THP is disabled because the page 1166 * fault can populate the pmd from under us). 1167 */ 1168 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd) 1169 { 1170 pmd_t pmdval = pmd_read_atomic(pmd); 1171 /* 1172 * The barrier will stabilize the pmdval in a register or on 1173 * the stack so that it will stop changing under the code. 1174 * 1175 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE, 1176 * pmd_read_atomic is allowed to return a not atomic pmdval 1177 * (for example pointing to an hugepage that has never been 1178 * mapped in the pmd). The below checks will only care about 1179 * the low part of the pmd with 32bit PAE x86 anyway, with the 1180 * exception of pmd_none(). So the important thing is that if 1181 * the low part of the pmd is found null, the high part will 1182 * be also null or the pmd_none() check below would be 1183 * confused. 1184 */ 1185 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 1186 barrier(); 1187 #endif 1188 /* 1189 * !pmd_present() checks for pmd migration entries 1190 * 1191 * The complete check uses is_pmd_migration_entry() in linux/swapops.h 1192 * But using that requires moving current function and pmd_trans_unstable() 1193 * to linux/swapops.h to resovle dependency, which is too much code move. 1194 * 1195 * !pmd_present() is equivalent to is_pmd_migration_entry() currently, 1196 * because !pmd_present() pages can only be under migration not swapped 1197 * out. 1198 * 1199 * pmd_none() is preseved for future condition checks on pmd migration 1200 * entries and not confusing with this function name, although it is 1201 * redundant with !pmd_present(). 1202 */ 1203 if (pmd_none(pmdval) || pmd_trans_huge(pmdval) || 1204 (IS_ENABLED(CONFIG_ARCH_ENABLE_THP_MIGRATION) && !pmd_present(pmdval))) 1205 return 1; 1206 if (unlikely(pmd_bad(pmdval))) { 1207 pmd_clear_bad(pmd); 1208 return 1; 1209 } 1210 return 0; 1211 } 1212 1213 /* 1214 * This is a noop if Transparent Hugepage Support is not built into 1215 * the kernel. Otherwise it is equivalent to 1216 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in 1217 * places that already verified the pmd is not none and they want to 1218 * walk ptes while holding the mmap sem in read mode (write mode don't 1219 * need this). If THP is not enabled, the pmd can't go away under the 1220 * code even if MADV_DONTNEED runs, but if THP is enabled we need to 1221 * run a pmd_trans_unstable before walking the ptes after 1222 * split_huge_pmd returns (because it may have run when the pmd become 1223 * null, but then a page fault can map in a THP and not a regular page). 1224 */ 1225 static inline int pmd_trans_unstable(pmd_t *pmd) 1226 { 1227 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 1228 return pmd_none_or_trans_huge_or_clear_bad(pmd); 1229 #else 1230 return 0; 1231 #endif 1232 } 1233 1234 #ifndef CONFIG_NUMA_BALANCING 1235 /* 1236 * Technically a PTE can be PROTNONE even when not doing NUMA balancing but 1237 * the only case the kernel cares is for NUMA balancing and is only ever set 1238 * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked 1239 * _PAGE_PROTNONE so by default, implement the helper as "always no". It 1240 * is the responsibility of the caller to distinguish between PROT_NONE 1241 * protections and NUMA hinting fault protections. 1242 */ 1243 static inline int pte_protnone(pte_t pte) 1244 { 1245 return 0; 1246 } 1247 1248 static inline int pmd_protnone(pmd_t pmd) 1249 { 1250 return 0; 1251 } 1252 #endif /* CONFIG_NUMA_BALANCING */ 1253 1254 #endif /* CONFIG_MMU */ 1255 1256 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP 1257 1258 #ifndef __PAGETABLE_P4D_FOLDED 1259 int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot); 1260 int p4d_clear_huge(p4d_t *p4d); 1261 #else 1262 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot) 1263 { 1264 return 0; 1265 } 1266 static inline int p4d_clear_huge(p4d_t *p4d) 1267 { 1268 return 0; 1269 } 1270 #endif /* !__PAGETABLE_P4D_FOLDED */ 1271 1272 int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot); 1273 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot); 1274 int pud_clear_huge(pud_t *pud); 1275 int pmd_clear_huge(pmd_t *pmd); 1276 int p4d_free_pud_page(p4d_t *p4d, unsigned long addr); 1277 int pud_free_pmd_page(pud_t *pud, unsigned long addr); 1278 int pmd_free_pte_page(pmd_t *pmd, unsigned long addr); 1279 #else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */ 1280 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot) 1281 { 1282 return 0; 1283 } 1284 static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot) 1285 { 1286 return 0; 1287 } 1288 static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot) 1289 { 1290 return 0; 1291 } 1292 static inline int p4d_clear_huge(p4d_t *p4d) 1293 { 1294 return 0; 1295 } 1296 static inline int pud_clear_huge(pud_t *pud) 1297 { 1298 return 0; 1299 } 1300 static inline int pmd_clear_huge(pmd_t *pmd) 1301 { 1302 return 0; 1303 } 1304 static inline int p4d_free_pud_page(p4d_t *p4d, unsigned long addr) 1305 { 1306 return 0; 1307 } 1308 static inline int pud_free_pmd_page(pud_t *pud, unsigned long addr) 1309 { 1310 return 0; 1311 } 1312 static inline int pmd_free_pte_page(pmd_t *pmd, unsigned long addr) 1313 { 1314 return 0; 1315 } 1316 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */ 1317 1318 #ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE 1319 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 1320 /* 1321 * ARCHes with special requirements for evicting THP backing TLB entries can 1322 * implement this. Otherwise also, it can help optimize normal TLB flush in 1323 * THP regime. Stock flush_tlb_range() typically has optimization to nuke the 1324 * entire TLB if flush span is greater than a threshold, which will 1325 * likely be true for a single huge page. Thus a single THP flush will 1326 * invalidate the entire TLB which is not desirable. 1327 * e.g. see arch/arc: flush_pmd_tlb_range 1328 */ 1329 #define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end) 1330 #define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end) 1331 #else 1332 #define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG() 1333 #define flush_pud_tlb_range(vma, addr, end) BUILD_BUG() 1334 #endif 1335 #endif 1336 1337 struct file; 1338 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, 1339 unsigned long size, pgprot_t *vma_prot); 1340 1341 #ifndef CONFIG_X86_ESPFIX64 1342 static inline void init_espfix_bsp(void) { } 1343 #endif 1344 1345 extern void __init pgtable_cache_init(void); 1346 1347 #ifndef __HAVE_ARCH_PFN_MODIFY_ALLOWED 1348 static inline bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot) 1349 { 1350 return true; 1351 } 1352 1353 static inline bool arch_has_pfn_modify_check(void) 1354 { 1355 return false; 1356 } 1357 #endif /* !_HAVE_ARCH_PFN_MODIFY_ALLOWED */ 1358 1359 /* 1360 * Architecture PAGE_KERNEL_* fallbacks 1361 * 1362 * Some architectures don't define certain PAGE_KERNEL_* flags. This is either 1363 * because they really don't support them, or the port needs to be updated to 1364 * reflect the required functionality. Below are a set of relatively safe 1365 * fallbacks, as best effort, which we can count on in lieu of the architectures 1366 * not defining them on their own yet. 1367 */ 1368 1369 #ifndef PAGE_KERNEL_RO 1370 # define PAGE_KERNEL_RO PAGE_KERNEL 1371 #endif 1372 1373 #ifndef PAGE_KERNEL_EXEC 1374 # define PAGE_KERNEL_EXEC PAGE_KERNEL 1375 #endif 1376 1377 /* 1378 * Page Table Modification bits for pgtbl_mod_mask. 1379 * 1380 * These are used by the p?d_alloc_track*() set of functions an in the generic 1381 * vmalloc/ioremap code to track at which page-table levels entries have been 1382 * modified. Based on that the code can better decide when vmalloc and ioremap 1383 * mapping changes need to be synchronized to other page-tables in the system. 1384 */ 1385 #define __PGTBL_PGD_MODIFIED 0 1386 #define __PGTBL_P4D_MODIFIED 1 1387 #define __PGTBL_PUD_MODIFIED 2 1388 #define __PGTBL_PMD_MODIFIED 3 1389 #define __PGTBL_PTE_MODIFIED 4 1390 1391 #define PGTBL_PGD_MODIFIED BIT(__PGTBL_PGD_MODIFIED) 1392 #define PGTBL_P4D_MODIFIED BIT(__PGTBL_P4D_MODIFIED) 1393 #define PGTBL_PUD_MODIFIED BIT(__PGTBL_PUD_MODIFIED) 1394 #define PGTBL_PMD_MODIFIED BIT(__PGTBL_PMD_MODIFIED) 1395 #define PGTBL_PTE_MODIFIED BIT(__PGTBL_PTE_MODIFIED) 1396 1397 /* Page-Table Modification Mask */ 1398 typedef unsigned int pgtbl_mod_mask; 1399 1400 #endif /* !__ASSEMBLY__ */ 1401 1402 #ifndef io_remap_pfn_range 1403 #define io_remap_pfn_range remap_pfn_range 1404 #endif 1405 1406 #ifndef has_transparent_hugepage 1407 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 1408 #define has_transparent_hugepage() 1 1409 #else 1410 #define has_transparent_hugepage() 0 1411 #endif 1412 #endif 1413 1414 /* 1415 * On some architectures it depends on the mm if the p4d/pud or pmd 1416 * layer of the page table hierarchy is folded or not. 1417 */ 1418 #ifndef mm_p4d_folded 1419 #define mm_p4d_folded(mm) __is_defined(__PAGETABLE_P4D_FOLDED) 1420 #endif 1421 1422 #ifndef mm_pud_folded 1423 #define mm_pud_folded(mm) __is_defined(__PAGETABLE_PUD_FOLDED) 1424 #endif 1425 1426 #ifndef mm_pmd_folded 1427 #define mm_pmd_folded(mm) __is_defined(__PAGETABLE_PMD_FOLDED) 1428 #endif 1429 1430 #ifndef p4d_offset_lockless 1431 #define p4d_offset_lockless(pgdp, pgd, address) p4d_offset(&(pgd), address) 1432 #endif 1433 #ifndef pud_offset_lockless 1434 #define pud_offset_lockless(p4dp, p4d, address) pud_offset(&(p4d), address) 1435 #endif 1436 #ifndef pmd_offset_lockless 1437 #define pmd_offset_lockless(pudp, pud, address) pmd_offset(&(pud), address) 1438 #endif 1439 1440 /* 1441 * p?d_leaf() - true if this entry is a final mapping to a physical address. 1442 * This differs from p?d_huge() by the fact that they are always available (if 1443 * the architecture supports large pages at the appropriate level) even 1444 * if CONFIG_HUGETLB_PAGE is not defined. 1445 * Only meaningful when called on a valid entry. 1446 */ 1447 #ifndef pgd_leaf 1448 #define pgd_leaf(x) 0 1449 #endif 1450 #ifndef p4d_leaf 1451 #define p4d_leaf(x) 0 1452 #endif 1453 #ifndef pud_leaf 1454 #define pud_leaf(x) 0 1455 #endif 1456 #ifndef pmd_leaf 1457 #define pmd_leaf(x) 0 1458 #endif 1459 1460 #endif /* _LINUX_PGTABLE_H */ 1461