1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _LINUX_PGTABLE_H 3 #define _LINUX_PGTABLE_H 4 5 #include <linux/pfn.h> 6 #include <asm/pgtable.h> 7 8 #define PMD_ORDER (PMD_SHIFT - PAGE_SHIFT) 9 #define PUD_ORDER (PUD_SHIFT - PAGE_SHIFT) 10 11 #ifndef __ASSEMBLY__ 12 #ifdef CONFIG_MMU 13 14 #include <linux/mm_types.h> 15 #include <linux/bug.h> 16 #include <linux/errno.h> 17 #include <asm-generic/pgtable_uffd.h> 18 #include <linux/page_table_check.h> 19 20 #if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \ 21 defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS 22 #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED 23 #endif 24 25 /* 26 * On almost all architectures and configurations, 0 can be used as the 27 * upper ceiling to free_pgtables(): on many architectures it has the same 28 * effect as using TASK_SIZE. However, there is one configuration which 29 * must impose a more careful limit, to avoid freeing kernel pgtables. 30 */ 31 #ifndef USER_PGTABLES_CEILING 32 #define USER_PGTABLES_CEILING 0UL 33 #endif 34 35 /* 36 * This defines the first usable user address. Platforms 37 * can override its value with custom FIRST_USER_ADDRESS 38 * defined in their respective <asm/pgtable.h>. 39 */ 40 #ifndef FIRST_USER_ADDRESS 41 #define FIRST_USER_ADDRESS 0UL 42 #endif 43 44 /* 45 * This defines the generic helper for accessing PMD page 46 * table page. Although platforms can still override this 47 * via their respective <asm/pgtable.h>. 48 */ 49 #ifndef pmd_pgtable 50 #define pmd_pgtable(pmd) pmd_page(pmd) 51 #endif 52 53 #define pmd_folio(pmd) page_folio(pmd_page(pmd)) 54 55 /* 56 * A page table page can be thought of an array like this: pXd_t[PTRS_PER_PxD] 57 * 58 * The pXx_index() functions return the index of the entry in the page 59 * table page which would control the given virtual address 60 * 61 * As these functions may be used by the same code for different levels of 62 * the page table folding, they are always available, regardless of 63 * CONFIG_PGTABLE_LEVELS value. For the folded levels they simply return 0 64 * because in such cases PTRS_PER_PxD equals 1. 65 */ 66 67 static inline unsigned long pte_index(unsigned long address) 68 { 69 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); 70 } 71 72 #ifndef pmd_index 73 static inline unsigned long pmd_index(unsigned long address) 74 { 75 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1); 76 } 77 #define pmd_index pmd_index 78 #endif 79 80 #ifndef pud_index 81 static inline unsigned long pud_index(unsigned long address) 82 { 83 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1); 84 } 85 #define pud_index pud_index 86 #endif 87 88 #ifndef pgd_index 89 /* Must be a compile-time constant, so implement it as a macro */ 90 #define pgd_index(a) (((a) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) 91 #endif 92 93 #ifndef kernel_pte_init 94 static inline void kernel_pte_init(void *addr) 95 { 96 } 97 #define kernel_pte_init kernel_pte_init 98 #endif 99 100 #ifndef pmd_init 101 static inline void pmd_init(void *addr) 102 { 103 } 104 #define pmd_init pmd_init 105 #endif 106 107 #ifndef pud_init 108 static inline void pud_init(void *addr) 109 { 110 } 111 #define pud_init pud_init 112 #endif 113 114 #ifndef pte_offset_kernel 115 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address) 116 { 117 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address); 118 } 119 #define pte_offset_kernel pte_offset_kernel 120 #endif 121 122 #ifdef CONFIG_HIGHPTE 123 #define __pte_map(pmd, address) \ 124 ((pte_t *)kmap_local_page(pmd_page(*(pmd))) + pte_index((address))) 125 #define pte_unmap(pte) do { \ 126 kunmap_local((pte)); \ 127 rcu_read_unlock(); \ 128 } while (0) 129 #else 130 static inline pte_t *__pte_map(pmd_t *pmd, unsigned long address) 131 { 132 return pte_offset_kernel(pmd, address); 133 } 134 static inline void pte_unmap(pte_t *pte) 135 { 136 rcu_read_unlock(); 137 } 138 #endif 139 140 void pte_free_defer(struct mm_struct *mm, pgtable_t pgtable); 141 142 /* Find an entry in the second-level page table.. */ 143 #ifndef pmd_offset 144 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) 145 { 146 return pud_pgtable(*pud) + pmd_index(address); 147 } 148 #define pmd_offset pmd_offset 149 #endif 150 151 #ifndef pud_offset 152 static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address) 153 { 154 return p4d_pgtable(*p4d) + pud_index(address); 155 } 156 #define pud_offset pud_offset 157 #endif 158 159 static inline pgd_t *pgd_offset_pgd(pgd_t *pgd, unsigned long address) 160 { 161 return (pgd + pgd_index(address)); 162 }; 163 164 /* 165 * a shortcut to get a pgd_t in a given mm 166 */ 167 #ifndef pgd_offset 168 #define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address)) 169 #endif 170 171 /* 172 * a shortcut which implies the use of the kernel's pgd, instead 173 * of a process's 174 */ 175 #define pgd_offset_k(address) pgd_offset(&init_mm, (address)) 176 177 /* 178 * In many cases it is known that a virtual address is mapped at PMD or PTE 179 * level, so instead of traversing all the page table levels, we can get a 180 * pointer to the PMD entry in user or kernel page table or translate a virtual 181 * address to the pointer in the PTE in the kernel page tables with simple 182 * helpers. 183 */ 184 static inline pmd_t *pmd_off(struct mm_struct *mm, unsigned long va) 185 { 186 return pmd_offset(pud_offset(p4d_offset(pgd_offset(mm, va), va), va), va); 187 } 188 189 static inline pmd_t *pmd_off_k(unsigned long va) 190 { 191 return pmd_offset(pud_offset(p4d_offset(pgd_offset_k(va), va), va), va); 192 } 193 194 static inline pte_t *virt_to_kpte(unsigned long vaddr) 195 { 196 pmd_t *pmd = pmd_off_k(vaddr); 197 198 return pmd_none(*pmd) ? NULL : pte_offset_kernel(pmd, vaddr); 199 } 200 201 #ifndef pmd_young 202 static inline int pmd_young(pmd_t pmd) 203 { 204 return 0; 205 } 206 #endif 207 208 #ifndef pmd_dirty 209 static inline int pmd_dirty(pmd_t pmd) 210 { 211 return 0; 212 } 213 #endif 214 215 /* 216 * A facility to provide lazy MMU batching. This allows PTE updates and 217 * page invalidations to be delayed until a call to leave lazy MMU mode 218 * is issued. Some architectures may benefit from doing this, and it is 219 * beneficial for both shadow and direct mode hypervisors, which may batch 220 * the PTE updates which happen during this window. Note that using this 221 * interface requires that read hazards be removed from the code. A read 222 * hazard could result in the direct mode hypervisor case, since the actual 223 * write to the page tables may not yet have taken place, so reads though 224 * a raw PTE pointer after it has been modified are not guaranteed to be 225 * up to date. This mode can only be entered and left under the protection of 226 * the page table locks for all page tables which may be modified. In the UP 227 * case, this is required so that preemption is disabled, and in the SMP case, 228 * it must synchronize the delayed page table writes properly on other CPUs. 229 */ 230 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE 231 #define arch_enter_lazy_mmu_mode() do {} while (0) 232 #define arch_leave_lazy_mmu_mode() do {} while (0) 233 #define arch_flush_lazy_mmu_mode() do {} while (0) 234 #endif 235 236 #ifndef pte_batch_hint 237 /** 238 * pte_batch_hint - Number of pages that can be added to batch without scanning. 239 * @ptep: Page table pointer for the entry. 240 * @pte: Page table entry. 241 * 242 * Some architectures know that a set of contiguous ptes all map the same 243 * contiguous memory with the same permissions. In this case, it can provide a 244 * hint to aid pte batching without the core code needing to scan every pte. 245 * 246 * An architecture implementation may ignore the PTE accessed state. Further, 247 * the dirty state must apply atomically to all the PTEs described by the hint. 248 * 249 * May be overridden by the architecture, else pte_batch_hint is always 1. 250 */ 251 static inline unsigned int pte_batch_hint(pte_t *ptep, pte_t pte) 252 { 253 return 1; 254 } 255 #endif 256 257 #ifndef pte_advance_pfn 258 static inline pte_t pte_advance_pfn(pte_t pte, unsigned long nr) 259 { 260 return __pte(pte_val(pte) + (nr << PFN_PTE_SHIFT)); 261 } 262 #endif 263 264 #define pte_next_pfn(pte) pte_advance_pfn(pte, 1) 265 266 #ifndef set_ptes 267 /** 268 * set_ptes - Map consecutive pages to a contiguous range of addresses. 269 * @mm: Address space to map the pages into. 270 * @addr: Address to map the first page at. 271 * @ptep: Page table pointer for the first entry. 272 * @pte: Page table entry for the first page. 273 * @nr: Number of pages to map. 274 * 275 * When nr==1, initial state of pte may be present or not present, and new state 276 * may be present or not present. When nr>1, initial state of all ptes must be 277 * not present, and new state must be present. 278 * 279 * May be overridden by the architecture, or the architecture can define 280 * set_pte() and PFN_PTE_SHIFT. 281 * 282 * Context: The caller holds the page table lock. The pages all belong 283 * to the same folio. The PTEs are all in the same PMD. 284 */ 285 static inline void set_ptes(struct mm_struct *mm, unsigned long addr, 286 pte_t *ptep, pte_t pte, unsigned int nr) 287 { 288 page_table_check_ptes_set(mm, ptep, pte, nr); 289 290 arch_enter_lazy_mmu_mode(); 291 for (;;) { 292 set_pte(ptep, pte); 293 if (--nr == 0) 294 break; 295 ptep++; 296 pte = pte_next_pfn(pte); 297 } 298 arch_leave_lazy_mmu_mode(); 299 } 300 #endif 301 #define set_pte_at(mm, addr, ptep, pte) set_ptes(mm, addr, ptep, pte, 1) 302 303 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 304 extern int ptep_set_access_flags(struct vm_area_struct *vma, 305 unsigned long address, pte_t *ptep, 306 pte_t entry, int dirty); 307 #endif 308 309 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS 310 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 311 extern int pmdp_set_access_flags(struct vm_area_struct *vma, 312 unsigned long address, pmd_t *pmdp, 313 pmd_t entry, int dirty); 314 extern int pudp_set_access_flags(struct vm_area_struct *vma, 315 unsigned long address, pud_t *pudp, 316 pud_t entry, int dirty); 317 #else 318 static inline int pmdp_set_access_flags(struct vm_area_struct *vma, 319 unsigned long address, pmd_t *pmdp, 320 pmd_t entry, int dirty) 321 { 322 BUILD_BUG(); 323 return 0; 324 } 325 static inline int pudp_set_access_flags(struct vm_area_struct *vma, 326 unsigned long address, pud_t *pudp, 327 pud_t entry, int dirty) 328 { 329 BUILD_BUG(); 330 return 0; 331 } 332 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 333 #endif 334 335 #ifndef ptep_get 336 static inline pte_t ptep_get(pte_t *ptep) 337 { 338 return READ_ONCE(*ptep); 339 } 340 #endif 341 342 #ifndef pmdp_get 343 static inline pmd_t pmdp_get(pmd_t *pmdp) 344 { 345 return READ_ONCE(*pmdp); 346 } 347 #endif 348 349 #ifndef pudp_get 350 static inline pud_t pudp_get(pud_t *pudp) 351 { 352 return READ_ONCE(*pudp); 353 } 354 #endif 355 356 #ifndef p4dp_get 357 static inline p4d_t p4dp_get(p4d_t *p4dp) 358 { 359 return READ_ONCE(*p4dp); 360 } 361 #endif 362 363 #ifndef pgdp_get 364 static inline pgd_t pgdp_get(pgd_t *pgdp) 365 { 366 return READ_ONCE(*pgdp); 367 } 368 #endif 369 370 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 371 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, 372 unsigned long address, 373 pte_t *ptep) 374 { 375 pte_t pte = ptep_get(ptep); 376 int r = 1; 377 if (!pte_young(pte)) 378 r = 0; 379 else 380 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte)); 381 return r; 382 } 383 #endif 384 385 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG 386 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG) 387 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, 388 unsigned long address, 389 pmd_t *pmdp) 390 { 391 pmd_t pmd = *pmdp; 392 int r = 1; 393 if (!pmd_young(pmd)) 394 r = 0; 395 else 396 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd)); 397 return r; 398 } 399 #else 400 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, 401 unsigned long address, 402 pmd_t *pmdp) 403 { 404 BUILD_BUG(); 405 return 0; 406 } 407 #endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG */ 408 #endif 409 410 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 411 int ptep_clear_flush_young(struct vm_area_struct *vma, 412 unsigned long address, pte_t *ptep); 413 #endif 414 415 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH 416 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 417 extern int pmdp_clear_flush_young(struct vm_area_struct *vma, 418 unsigned long address, pmd_t *pmdp); 419 #else 420 /* 421 * Despite relevant to THP only, this API is called from generic rmap code 422 * under PageTransHuge(), hence needs a dummy implementation for !THP 423 */ 424 static inline int pmdp_clear_flush_young(struct vm_area_struct *vma, 425 unsigned long address, pmd_t *pmdp) 426 { 427 BUILD_BUG(); 428 return 0; 429 } 430 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 431 #endif 432 433 #ifndef arch_has_hw_nonleaf_pmd_young 434 /* 435 * Return whether the accessed bit in non-leaf PMD entries is supported on the 436 * local CPU. 437 */ 438 static inline bool arch_has_hw_nonleaf_pmd_young(void) 439 { 440 return IS_ENABLED(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG); 441 } 442 #endif 443 444 #ifndef arch_has_hw_pte_young 445 /* 446 * Return whether the accessed bit is supported on the local CPU. 447 * 448 * This stub assumes accessing through an old PTE triggers a page fault. 449 * Architectures that automatically set the access bit should overwrite it. 450 */ 451 static inline bool arch_has_hw_pte_young(void) 452 { 453 return IS_ENABLED(CONFIG_ARCH_HAS_HW_PTE_YOUNG); 454 } 455 #endif 456 457 #ifndef arch_check_zapped_pte 458 static inline void arch_check_zapped_pte(struct vm_area_struct *vma, 459 pte_t pte) 460 { 461 } 462 #endif 463 464 #ifndef arch_check_zapped_pmd 465 static inline void arch_check_zapped_pmd(struct vm_area_struct *vma, 466 pmd_t pmd) 467 { 468 } 469 #endif 470 471 #ifndef arch_check_zapped_pud 472 static inline void arch_check_zapped_pud(struct vm_area_struct *vma, pud_t pud) 473 { 474 } 475 #endif 476 477 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR 478 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, 479 unsigned long address, 480 pte_t *ptep) 481 { 482 pte_t pte = ptep_get(ptep); 483 pte_clear(mm, address, ptep); 484 page_table_check_pte_clear(mm, pte); 485 return pte; 486 } 487 #endif 488 489 #ifndef clear_young_dirty_ptes 490 /** 491 * clear_young_dirty_ptes - Mark PTEs that map consecutive pages of the 492 * same folio as old/clean. 493 * @mm: Address space the pages are mapped into. 494 * @addr: Address the first page is mapped at. 495 * @ptep: Page table pointer for the first entry. 496 * @nr: Number of entries to mark old/clean. 497 * @flags: Flags to modify the PTE batch semantics. 498 * 499 * May be overridden by the architecture; otherwise, implemented by 500 * get_and_clear/modify/set for each pte in the range. 501 * 502 * Note that PTE bits in the PTE range besides the PFN can differ. For example, 503 * some PTEs might be write-protected. 504 * 505 * Context: The caller holds the page table lock. The PTEs map consecutive 506 * pages that belong to the same folio. The PTEs are all in the same PMD. 507 */ 508 static inline void clear_young_dirty_ptes(struct vm_area_struct *vma, 509 unsigned long addr, pte_t *ptep, 510 unsigned int nr, cydp_t flags) 511 { 512 pte_t pte; 513 514 for (;;) { 515 if (flags == CYDP_CLEAR_YOUNG) 516 ptep_test_and_clear_young(vma, addr, ptep); 517 else { 518 pte = ptep_get_and_clear(vma->vm_mm, addr, ptep); 519 if (flags & CYDP_CLEAR_YOUNG) 520 pte = pte_mkold(pte); 521 if (flags & CYDP_CLEAR_DIRTY) 522 pte = pte_mkclean(pte); 523 set_pte_at(vma->vm_mm, addr, ptep, pte); 524 } 525 if (--nr == 0) 526 break; 527 ptep++; 528 addr += PAGE_SIZE; 529 } 530 } 531 #endif 532 533 static inline void ptep_clear(struct mm_struct *mm, unsigned long addr, 534 pte_t *ptep) 535 { 536 pte_t pte = ptep_get(ptep); 537 538 pte_clear(mm, addr, ptep); 539 /* 540 * No need for ptep_get_and_clear(): page table check doesn't care about 541 * any bits that could have been set by HW concurrently. 542 */ 543 page_table_check_pte_clear(mm, pte); 544 } 545 546 #ifdef CONFIG_GUP_GET_PXX_LOW_HIGH 547 /* 548 * For walking the pagetables without holding any locks. Some architectures 549 * (eg x86-32 PAE) cannot load the entries atomically without using expensive 550 * instructions. We are guaranteed that a PTE will only either go from not 551 * present to present, or present to not present -- it will not switch to a 552 * completely different present page without a TLB flush inbetween; which we 553 * are blocking by holding interrupts off. 554 * 555 * Setting ptes from not present to present goes: 556 * 557 * ptep->pte_high = h; 558 * smp_wmb(); 559 * ptep->pte_low = l; 560 * 561 * And present to not present goes: 562 * 563 * ptep->pte_low = 0; 564 * smp_wmb(); 565 * ptep->pte_high = 0; 566 * 567 * We must ensure here that the load of pte_low sees 'l' IFF pte_high sees 'h'. 568 * We load pte_high *after* loading pte_low, which ensures we don't see an older 569 * value of pte_high. *Then* we recheck pte_low, which ensures that we haven't 570 * picked up a changed pte high. We might have gotten rubbish values from 571 * pte_low and pte_high, but we are guaranteed that pte_low will not have the 572 * present bit set *unless* it is 'l'. Because get_user_pages_fast() only 573 * operates on present ptes we're safe. 574 */ 575 static inline pte_t ptep_get_lockless(pte_t *ptep) 576 { 577 pte_t pte; 578 579 do { 580 pte.pte_low = ptep->pte_low; 581 smp_rmb(); 582 pte.pte_high = ptep->pte_high; 583 smp_rmb(); 584 } while (unlikely(pte.pte_low != ptep->pte_low)); 585 586 return pte; 587 } 588 #define ptep_get_lockless ptep_get_lockless 589 590 #if CONFIG_PGTABLE_LEVELS > 2 591 static inline pmd_t pmdp_get_lockless(pmd_t *pmdp) 592 { 593 pmd_t pmd; 594 595 do { 596 pmd.pmd_low = pmdp->pmd_low; 597 smp_rmb(); 598 pmd.pmd_high = pmdp->pmd_high; 599 smp_rmb(); 600 } while (unlikely(pmd.pmd_low != pmdp->pmd_low)); 601 602 return pmd; 603 } 604 #define pmdp_get_lockless pmdp_get_lockless 605 #define pmdp_get_lockless_sync() tlb_remove_table_sync_one() 606 #endif /* CONFIG_PGTABLE_LEVELS > 2 */ 607 #endif /* CONFIG_GUP_GET_PXX_LOW_HIGH */ 608 609 /* 610 * We require that the PTE can be read atomically. 611 */ 612 #ifndef ptep_get_lockless 613 static inline pte_t ptep_get_lockless(pte_t *ptep) 614 { 615 return ptep_get(ptep); 616 } 617 #endif 618 619 #ifndef pmdp_get_lockless 620 static inline pmd_t pmdp_get_lockless(pmd_t *pmdp) 621 { 622 return pmdp_get(pmdp); 623 } 624 static inline void pmdp_get_lockless_sync(void) 625 { 626 } 627 #endif 628 629 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 630 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR 631 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, 632 unsigned long address, 633 pmd_t *pmdp) 634 { 635 pmd_t pmd = *pmdp; 636 637 pmd_clear(pmdp); 638 page_table_check_pmd_clear(mm, pmd); 639 640 return pmd; 641 } 642 #endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */ 643 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR 644 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm, 645 unsigned long address, 646 pud_t *pudp) 647 { 648 pud_t pud = *pudp; 649 650 pud_clear(pudp); 651 page_table_check_pud_clear(mm, pud); 652 653 return pud; 654 } 655 #endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */ 656 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 657 658 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 659 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL 660 static inline pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma, 661 unsigned long address, pmd_t *pmdp, 662 int full) 663 { 664 return pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp); 665 } 666 #endif 667 668 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL 669 static inline pud_t pudp_huge_get_and_clear_full(struct vm_area_struct *vma, 670 unsigned long address, pud_t *pudp, 671 int full) 672 { 673 return pudp_huge_get_and_clear(vma->vm_mm, address, pudp); 674 } 675 #endif 676 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 677 678 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL 679 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, 680 unsigned long address, pte_t *ptep, 681 int full) 682 { 683 return ptep_get_and_clear(mm, address, ptep); 684 } 685 #endif 686 687 #ifndef get_and_clear_full_ptes 688 /** 689 * get_and_clear_full_ptes - Clear present PTEs that map consecutive pages of 690 * the same folio, collecting dirty/accessed bits. 691 * @mm: Address space the pages are mapped into. 692 * @addr: Address the first page is mapped at. 693 * @ptep: Page table pointer for the first entry. 694 * @nr: Number of entries to clear. 695 * @full: Whether we are clearing a full mm. 696 * 697 * May be overridden by the architecture; otherwise, implemented as a simple 698 * loop over ptep_get_and_clear_full(), merging dirty/accessed bits into the 699 * returned PTE. 700 * 701 * Note that PTE bits in the PTE range besides the PFN can differ. For example, 702 * some PTEs might be write-protected. 703 * 704 * Context: The caller holds the page table lock. The PTEs map consecutive 705 * pages that belong to the same folio. The PTEs are all in the same PMD. 706 */ 707 static inline pte_t get_and_clear_full_ptes(struct mm_struct *mm, 708 unsigned long addr, pte_t *ptep, unsigned int nr, int full) 709 { 710 pte_t pte, tmp_pte; 711 712 pte = ptep_get_and_clear_full(mm, addr, ptep, full); 713 while (--nr) { 714 ptep++; 715 addr += PAGE_SIZE; 716 tmp_pte = ptep_get_and_clear_full(mm, addr, ptep, full); 717 if (pte_dirty(tmp_pte)) 718 pte = pte_mkdirty(pte); 719 if (pte_young(tmp_pte)) 720 pte = pte_mkyoung(pte); 721 } 722 return pte; 723 } 724 #endif 725 726 #ifndef clear_full_ptes 727 /** 728 * clear_full_ptes - Clear present PTEs that map consecutive pages of the same 729 * folio. 730 * @mm: Address space the pages are mapped into. 731 * @addr: Address the first page is mapped at. 732 * @ptep: Page table pointer for the first entry. 733 * @nr: Number of entries to clear. 734 * @full: Whether we are clearing a full mm. 735 * 736 * May be overridden by the architecture; otherwise, implemented as a simple 737 * loop over ptep_get_and_clear_full(). 738 * 739 * Note that PTE bits in the PTE range besides the PFN can differ. For example, 740 * some PTEs might be write-protected. 741 * 742 * Context: The caller holds the page table lock. The PTEs map consecutive 743 * pages that belong to the same folio. The PTEs are all in the same PMD. 744 */ 745 static inline void clear_full_ptes(struct mm_struct *mm, unsigned long addr, 746 pte_t *ptep, unsigned int nr, int full) 747 { 748 for (;;) { 749 ptep_get_and_clear_full(mm, addr, ptep, full); 750 if (--nr == 0) 751 break; 752 ptep++; 753 addr += PAGE_SIZE; 754 } 755 } 756 #endif 757 758 /* 759 * If two threads concurrently fault at the same page, the thread that 760 * won the race updates the PTE and its local TLB/Cache. The other thread 761 * gives up, simply does nothing, and continues; on architectures where 762 * software can update TLB, local TLB can be updated here to avoid next page 763 * fault. This function updates TLB only, do nothing with cache or others. 764 * It is the difference with function update_mmu_cache. 765 */ 766 #ifndef update_mmu_tlb_range 767 static inline void update_mmu_tlb_range(struct vm_area_struct *vma, 768 unsigned long address, pte_t *ptep, unsigned int nr) 769 { 770 } 771 #endif 772 773 static inline void update_mmu_tlb(struct vm_area_struct *vma, 774 unsigned long address, pte_t *ptep) 775 { 776 update_mmu_tlb_range(vma, address, ptep, 1); 777 } 778 779 /* 780 * Some architectures may be able to avoid expensive synchronization 781 * primitives when modifications are made to PTE's which are already 782 * not present, or in the process of an address space destruction. 783 */ 784 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL 785 static inline void pte_clear_not_present_full(struct mm_struct *mm, 786 unsigned long address, 787 pte_t *ptep, 788 int full) 789 { 790 pte_clear(mm, address, ptep); 791 } 792 #endif 793 794 #ifndef clear_not_present_full_ptes 795 /** 796 * clear_not_present_full_ptes - Clear multiple not present PTEs which are 797 * consecutive in the pgtable. 798 * @mm: Address space the ptes represent. 799 * @addr: Address of the first pte. 800 * @ptep: Page table pointer for the first entry. 801 * @nr: Number of entries to clear. 802 * @full: Whether we are clearing a full mm. 803 * 804 * May be overridden by the architecture; otherwise, implemented as a simple 805 * loop over pte_clear_not_present_full(). 806 * 807 * Context: The caller holds the page table lock. The PTEs are all not present. 808 * The PTEs are all in the same PMD. 809 */ 810 static inline void clear_not_present_full_ptes(struct mm_struct *mm, 811 unsigned long addr, pte_t *ptep, unsigned int nr, int full) 812 { 813 for (;;) { 814 pte_clear_not_present_full(mm, addr, ptep, full); 815 if (--nr == 0) 816 break; 817 ptep++; 818 addr += PAGE_SIZE; 819 } 820 } 821 #endif 822 823 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH 824 extern pte_t ptep_clear_flush(struct vm_area_struct *vma, 825 unsigned long address, 826 pte_t *ptep); 827 #endif 828 829 #ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH 830 extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma, 831 unsigned long address, 832 pmd_t *pmdp); 833 extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma, 834 unsigned long address, 835 pud_t *pudp); 836 #endif 837 838 #ifndef pte_mkwrite 839 static inline pte_t pte_mkwrite(pte_t pte, struct vm_area_struct *vma) 840 { 841 return pte_mkwrite_novma(pte); 842 } 843 #endif 844 845 #if defined(CONFIG_ARCH_WANT_PMD_MKWRITE) && !defined(pmd_mkwrite) 846 static inline pmd_t pmd_mkwrite(pmd_t pmd, struct vm_area_struct *vma) 847 { 848 return pmd_mkwrite_novma(pmd); 849 } 850 #endif 851 852 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT 853 struct mm_struct; 854 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep) 855 { 856 pte_t old_pte = ptep_get(ptep); 857 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte)); 858 } 859 #endif 860 861 #ifndef wrprotect_ptes 862 /** 863 * wrprotect_ptes - Write-protect PTEs that map consecutive pages of the same 864 * folio. 865 * @mm: Address space the pages are mapped into. 866 * @addr: Address the first page is mapped at. 867 * @ptep: Page table pointer for the first entry. 868 * @nr: Number of entries to write-protect. 869 * 870 * May be overridden by the architecture; otherwise, implemented as a simple 871 * loop over ptep_set_wrprotect(). 872 * 873 * Note that PTE bits in the PTE range besides the PFN can differ. For example, 874 * some PTEs might be write-protected. 875 * 876 * Context: The caller holds the page table lock. The PTEs map consecutive 877 * pages that belong to the same folio. The PTEs are all in the same PMD. 878 */ 879 static inline void wrprotect_ptes(struct mm_struct *mm, unsigned long addr, 880 pte_t *ptep, unsigned int nr) 881 { 882 for (;;) { 883 ptep_set_wrprotect(mm, addr, ptep); 884 if (--nr == 0) 885 break; 886 ptep++; 887 addr += PAGE_SIZE; 888 } 889 } 890 #endif 891 892 /* 893 * On some architectures hardware does not set page access bit when accessing 894 * memory page, it is responsibility of software setting this bit. It brings 895 * out extra page fault penalty to track page access bit. For optimization page 896 * access bit can be set during all page fault flow on these arches. 897 * To be differentiate with macro pte_mkyoung, this macro is used on platforms 898 * where software maintains page access bit. 899 */ 900 #ifndef pte_sw_mkyoung 901 static inline pte_t pte_sw_mkyoung(pte_t pte) 902 { 903 return pte; 904 } 905 #define pte_sw_mkyoung pte_sw_mkyoung 906 #endif 907 908 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT 909 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 910 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 911 unsigned long address, pmd_t *pmdp) 912 { 913 pmd_t old_pmd = *pmdp; 914 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd)); 915 } 916 #else 917 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 918 unsigned long address, pmd_t *pmdp) 919 { 920 BUILD_BUG(); 921 } 922 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 923 #endif 924 #ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT 925 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 926 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 927 static inline void pudp_set_wrprotect(struct mm_struct *mm, 928 unsigned long address, pud_t *pudp) 929 { 930 pud_t old_pud = *pudp; 931 932 set_pud_at(mm, address, pudp, pud_wrprotect(old_pud)); 933 } 934 #else 935 static inline void pudp_set_wrprotect(struct mm_struct *mm, 936 unsigned long address, pud_t *pudp) 937 { 938 BUILD_BUG(); 939 } 940 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 941 #endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */ 942 #endif 943 944 #ifndef pmdp_collapse_flush 945 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 946 extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, 947 unsigned long address, pmd_t *pmdp); 948 #else 949 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, 950 unsigned long address, 951 pmd_t *pmdp) 952 { 953 BUILD_BUG(); 954 return *pmdp; 955 } 956 #define pmdp_collapse_flush pmdp_collapse_flush 957 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 958 #endif 959 960 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT 961 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp, 962 pgtable_t pgtable); 963 #endif 964 965 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW 966 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp); 967 #endif 968 969 #ifndef arch_needs_pgtable_deposit 970 #define arch_needs_pgtable_deposit() (false) 971 #endif 972 973 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 974 /* 975 * This is an implementation of pmdp_establish() that is only suitable for an 976 * architecture that doesn't have hardware dirty/accessed bits. In this case we 977 * can't race with CPU which sets these bits and non-atomic approach is fine. 978 */ 979 static inline pmd_t generic_pmdp_establish(struct vm_area_struct *vma, 980 unsigned long address, pmd_t *pmdp, pmd_t pmd) 981 { 982 pmd_t old_pmd = *pmdp; 983 set_pmd_at(vma->vm_mm, address, pmdp, pmd); 984 return old_pmd; 985 } 986 #endif 987 988 #ifndef __HAVE_ARCH_PMDP_INVALIDATE 989 extern pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address, 990 pmd_t *pmdp); 991 #endif 992 993 #ifndef __HAVE_ARCH_PMDP_INVALIDATE_AD 994 995 /* 996 * pmdp_invalidate_ad() invalidates the PMD while changing a transparent 997 * hugepage mapping in the page tables. This function is similar to 998 * pmdp_invalidate(), but should only be used if the access and dirty bits would 999 * not be cleared by the software in the new PMD value. The function ensures 1000 * that hardware changes of the access and dirty bits updates would not be lost. 1001 * 1002 * Doing so can allow in certain architectures to avoid a TLB flush in most 1003 * cases. Yet, another TLB flush might be necessary later if the PMD update 1004 * itself requires such flush (e.g., if protection was set to be stricter). Yet, 1005 * even when a TLB flush is needed because of the update, the caller may be able 1006 * to batch these TLB flushing operations, so fewer TLB flush operations are 1007 * needed. 1008 */ 1009 extern pmd_t pmdp_invalidate_ad(struct vm_area_struct *vma, 1010 unsigned long address, pmd_t *pmdp); 1011 #endif 1012 1013 #ifndef __HAVE_ARCH_PTE_SAME 1014 static inline int pte_same(pte_t pte_a, pte_t pte_b) 1015 { 1016 return pte_val(pte_a) == pte_val(pte_b); 1017 } 1018 #endif 1019 1020 #ifndef __HAVE_ARCH_PTE_UNUSED 1021 /* 1022 * Some architectures provide facilities to virtualization guests 1023 * so that they can flag allocated pages as unused. This allows the 1024 * host to transparently reclaim unused pages. This function returns 1025 * whether the pte's page is unused. 1026 */ 1027 static inline int pte_unused(pte_t pte) 1028 { 1029 return 0; 1030 } 1031 #endif 1032 1033 #ifndef pte_access_permitted 1034 #define pte_access_permitted(pte, write) \ 1035 (pte_present(pte) && (!(write) || pte_write(pte))) 1036 #endif 1037 1038 #ifndef pmd_access_permitted 1039 #define pmd_access_permitted(pmd, write) \ 1040 (pmd_present(pmd) && (!(write) || pmd_write(pmd))) 1041 #endif 1042 1043 #ifndef pud_access_permitted 1044 #define pud_access_permitted(pud, write) \ 1045 (pud_present(pud) && (!(write) || pud_write(pud))) 1046 #endif 1047 1048 #ifndef p4d_access_permitted 1049 #define p4d_access_permitted(p4d, write) \ 1050 (p4d_present(p4d) && (!(write) || p4d_write(p4d))) 1051 #endif 1052 1053 #ifndef pgd_access_permitted 1054 #define pgd_access_permitted(pgd, write) \ 1055 (pgd_present(pgd) && (!(write) || pgd_write(pgd))) 1056 #endif 1057 1058 #ifndef __HAVE_ARCH_PMD_SAME 1059 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b) 1060 { 1061 return pmd_val(pmd_a) == pmd_val(pmd_b); 1062 } 1063 #endif 1064 1065 #ifndef pud_same 1066 static inline int pud_same(pud_t pud_a, pud_t pud_b) 1067 { 1068 return pud_val(pud_a) == pud_val(pud_b); 1069 } 1070 #define pud_same pud_same 1071 #endif 1072 1073 #ifndef __HAVE_ARCH_P4D_SAME 1074 static inline int p4d_same(p4d_t p4d_a, p4d_t p4d_b) 1075 { 1076 return p4d_val(p4d_a) == p4d_val(p4d_b); 1077 } 1078 #endif 1079 1080 #ifndef __HAVE_ARCH_PGD_SAME 1081 static inline int pgd_same(pgd_t pgd_a, pgd_t pgd_b) 1082 { 1083 return pgd_val(pgd_a) == pgd_val(pgd_b); 1084 } 1085 #endif 1086 1087 #ifndef __HAVE_ARCH_DO_SWAP_PAGE 1088 static inline void arch_do_swap_page_nr(struct mm_struct *mm, 1089 struct vm_area_struct *vma, 1090 unsigned long addr, 1091 pte_t pte, pte_t oldpte, 1092 int nr) 1093 { 1094 1095 } 1096 #else 1097 /* 1098 * Some architectures support metadata associated with a page. When a 1099 * page is being swapped out, this metadata must be saved so it can be 1100 * restored when the page is swapped back in. SPARC M7 and newer 1101 * processors support an ADI (Application Data Integrity) tag for the 1102 * page as metadata for the page. arch_do_swap_page() can restore this 1103 * metadata when a page is swapped back in. 1104 */ 1105 static inline void arch_do_swap_page_nr(struct mm_struct *mm, 1106 struct vm_area_struct *vma, 1107 unsigned long addr, 1108 pte_t pte, pte_t oldpte, 1109 int nr) 1110 { 1111 for (int i = 0; i < nr; i++) { 1112 arch_do_swap_page(vma->vm_mm, vma, addr + i * PAGE_SIZE, 1113 pte_advance_pfn(pte, i), 1114 pte_advance_pfn(oldpte, i)); 1115 } 1116 } 1117 #endif 1118 1119 #ifndef __HAVE_ARCH_UNMAP_ONE 1120 /* 1121 * Some architectures support metadata associated with a page. When a 1122 * page is being swapped out, this metadata must be saved so it can be 1123 * restored when the page is swapped back in. SPARC M7 and newer 1124 * processors support an ADI (Application Data Integrity) tag for the 1125 * page as metadata for the page. arch_unmap_one() can save this 1126 * metadata on a swap-out of a page. 1127 */ 1128 static inline int arch_unmap_one(struct mm_struct *mm, 1129 struct vm_area_struct *vma, 1130 unsigned long addr, 1131 pte_t orig_pte) 1132 { 1133 return 0; 1134 } 1135 #endif 1136 1137 /* 1138 * Allow architectures to preserve additional metadata associated with 1139 * swapped-out pages. The corresponding __HAVE_ARCH_SWAP_* macros and function 1140 * prototypes must be defined in the arch-specific asm/pgtable.h file. 1141 */ 1142 #ifndef __HAVE_ARCH_PREPARE_TO_SWAP 1143 static inline int arch_prepare_to_swap(struct folio *folio) 1144 { 1145 return 0; 1146 } 1147 #endif 1148 1149 #ifndef __HAVE_ARCH_SWAP_INVALIDATE 1150 static inline void arch_swap_invalidate_page(int type, pgoff_t offset) 1151 { 1152 } 1153 1154 static inline void arch_swap_invalidate_area(int type) 1155 { 1156 } 1157 #endif 1158 1159 #ifndef __HAVE_ARCH_SWAP_RESTORE 1160 static inline void arch_swap_restore(swp_entry_t entry, struct folio *folio) 1161 { 1162 } 1163 #endif 1164 1165 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE 1166 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr) 1167 #endif 1168 1169 #ifndef __HAVE_ARCH_MOVE_PTE 1170 #define move_pte(pte, old_addr, new_addr) (pte) 1171 #endif 1172 1173 #ifndef pte_accessible 1174 # define pte_accessible(mm, pte) ((void)(pte), 1) 1175 #endif 1176 1177 #ifndef flush_tlb_fix_spurious_fault 1178 #define flush_tlb_fix_spurious_fault(vma, address, ptep) flush_tlb_page(vma, address) 1179 #endif 1180 1181 /* 1182 * When walking page tables, get the address of the next boundary, 1183 * or the end address of the range if that comes earlier. Although no 1184 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout. 1185 */ 1186 1187 #define pgd_addr_end(addr, end) \ 1188 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \ 1189 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 1190 }) 1191 1192 #ifndef p4d_addr_end 1193 #define p4d_addr_end(addr, end) \ 1194 ({ unsigned long __boundary = ((addr) + P4D_SIZE) & P4D_MASK; \ 1195 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 1196 }) 1197 #endif 1198 1199 #ifndef pud_addr_end 1200 #define pud_addr_end(addr, end) \ 1201 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \ 1202 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 1203 }) 1204 #endif 1205 1206 #ifndef pmd_addr_end 1207 #define pmd_addr_end(addr, end) \ 1208 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \ 1209 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 1210 }) 1211 #endif 1212 1213 /* 1214 * When walking page tables, we usually want to skip any p?d_none entries; 1215 * and any p?d_bad entries - reporting the error before resetting to none. 1216 * Do the tests inline, but report and clear the bad entry in mm/memory.c. 1217 */ 1218 void pgd_clear_bad(pgd_t *); 1219 1220 #ifndef __PAGETABLE_P4D_FOLDED 1221 void p4d_clear_bad(p4d_t *); 1222 #else 1223 #define p4d_clear_bad(p4d) do { } while (0) 1224 #endif 1225 1226 #ifndef __PAGETABLE_PUD_FOLDED 1227 void pud_clear_bad(pud_t *); 1228 #else 1229 #define pud_clear_bad(p4d) do { } while (0) 1230 #endif 1231 1232 void pmd_clear_bad(pmd_t *); 1233 1234 static inline int pgd_none_or_clear_bad(pgd_t *pgd) 1235 { 1236 if (pgd_none(*pgd)) 1237 return 1; 1238 if (unlikely(pgd_bad(*pgd))) { 1239 pgd_clear_bad(pgd); 1240 return 1; 1241 } 1242 return 0; 1243 } 1244 1245 static inline int p4d_none_or_clear_bad(p4d_t *p4d) 1246 { 1247 if (p4d_none(*p4d)) 1248 return 1; 1249 if (unlikely(p4d_bad(*p4d))) { 1250 p4d_clear_bad(p4d); 1251 return 1; 1252 } 1253 return 0; 1254 } 1255 1256 static inline int pud_none_or_clear_bad(pud_t *pud) 1257 { 1258 if (pud_none(*pud)) 1259 return 1; 1260 if (unlikely(pud_bad(*pud))) { 1261 pud_clear_bad(pud); 1262 return 1; 1263 } 1264 return 0; 1265 } 1266 1267 static inline int pmd_none_or_clear_bad(pmd_t *pmd) 1268 { 1269 if (pmd_none(*pmd)) 1270 return 1; 1271 if (unlikely(pmd_bad(*pmd))) { 1272 pmd_clear_bad(pmd); 1273 return 1; 1274 } 1275 return 0; 1276 } 1277 1278 static inline pte_t __ptep_modify_prot_start(struct vm_area_struct *vma, 1279 unsigned long addr, 1280 pte_t *ptep) 1281 { 1282 /* 1283 * Get the current pte state, but zero it out to make it 1284 * non-present, preventing the hardware from asynchronously 1285 * updating it. 1286 */ 1287 return ptep_get_and_clear(vma->vm_mm, addr, ptep); 1288 } 1289 1290 static inline void __ptep_modify_prot_commit(struct vm_area_struct *vma, 1291 unsigned long addr, 1292 pte_t *ptep, pte_t pte) 1293 { 1294 /* 1295 * The pte is non-present, so there's no hardware state to 1296 * preserve. 1297 */ 1298 set_pte_at(vma->vm_mm, addr, ptep, pte); 1299 } 1300 1301 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION 1302 /* 1303 * Start a pte protection read-modify-write transaction, which 1304 * protects against asynchronous hardware modifications to the pte. 1305 * The intention is not to prevent the hardware from making pte 1306 * updates, but to prevent any updates it may make from being lost. 1307 * 1308 * This does not protect against other software modifications of the 1309 * pte; the appropriate pte lock must be held over the transaction. 1310 * 1311 * Note that this interface is intended to be batchable, meaning that 1312 * ptep_modify_prot_commit may not actually update the pte, but merely 1313 * queue the update to be done at some later time. The update must be 1314 * actually committed before the pte lock is released, however. 1315 */ 1316 static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma, 1317 unsigned long addr, 1318 pte_t *ptep) 1319 { 1320 return __ptep_modify_prot_start(vma, addr, ptep); 1321 } 1322 1323 /* 1324 * Commit an update to a pte, leaving any hardware-controlled bits in 1325 * the PTE unmodified. 1326 */ 1327 static inline void ptep_modify_prot_commit(struct vm_area_struct *vma, 1328 unsigned long addr, 1329 pte_t *ptep, pte_t old_pte, pte_t pte) 1330 { 1331 __ptep_modify_prot_commit(vma, addr, ptep, pte); 1332 } 1333 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */ 1334 #endif /* CONFIG_MMU */ 1335 1336 /* 1337 * No-op macros that just return the current protection value. Defined here 1338 * because these macros can be used even if CONFIG_MMU is not defined. 1339 */ 1340 1341 #ifndef pgprot_nx 1342 #define pgprot_nx(prot) (prot) 1343 #endif 1344 1345 #ifndef pgprot_noncached 1346 #define pgprot_noncached(prot) (prot) 1347 #endif 1348 1349 #ifndef pgprot_writecombine 1350 #define pgprot_writecombine pgprot_noncached 1351 #endif 1352 1353 #ifndef pgprot_writethrough 1354 #define pgprot_writethrough pgprot_noncached 1355 #endif 1356 1357 #ifndef pgprot_device 1358 #define pgprot_device pgprot_noncached 1359 #endif 1360 1361 #ifndef pgprot_mhp 1362 #define pgprot_mhp(prot) (prot) 1363 #endif 1364 1365 #ifdef CONFIG_MMU 1366 #ifndef pgprot_modify 1367 #define pgprot_modify pgprot_modify 1368 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) 1369 { 1370 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot))) 1371 newprot = pgprot_noncached(newprot); 1372 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot))) 1373 newprot = pgprot_writecombine(newprot); 1374 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot))) 1375 newprot = pgprot_device(newprot); 1376 return newprot; 1377 } 1378 #endif 1379 #endif /* CONFIG_MMU */ 1380 1381 #ifndef pgprot_encrypted 1382 #define pgprot_encrypted(prot) (prot) 1383 #endif 1384 1385 #ifndef pgprot_decrypted 1386 #define pgprot_decrypted(prot) (prot) 1387 #endif 1388 1389 /* 1390 * A facility to provide batching of the reload of page tables and 1391 * other process state with the actual context switch code for 1392 * paravirtualized guests. By convention, only one of the batched 1393 * update (lazy) modes (CPU, MMU) should be active at any given time, 1394 * entry should never be nested, and entry and exits should always be 1395 * paired. This is for sanity of maintaining and reasoning about the 1396 * kernel code. In this case, the exit (end of the context switch) is 1397 * in architecture-specific code, and so doesn't need a generic 1398 * definition. 1399 */ 1400 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH 1401 #define arch_start_context_switch(prev) do {} while (0) 1402 #endif 1403 1404 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 1405 #ifndef CONFIG_ARCH_ENABLE_THP_MIGRATION 1406 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 1407 { 1408 return pmd; 1409 } 1410 1411 static inline int pmd_swp_soft_dirty(pmd_t pmd) 1412 { 1413 return 0; 1414 } 1415 1416 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 1417 { 1418 return pmd; 1419 } 1420 #endif 1421 #else /* !CONFIG_HAVE_ARCH_SOFT_DIRTY */ 1422 static inline int pte_soft_dirty(pte_t pte) 1423 { 1424 return 0; 1425 } 1426 1427 static inline int pmd_soft_dirty(pmd_t pmd) 1428 { 1429 return 0; 1430 } 1431 1432 static inline pte_t pte_mksoft_dirty(pte_t pte) 1433 { 1434 return pte; 1435 } 1436 1437 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) 1438 { 1439 return pmd; 1440 } 1441 1442 static inline pte_t pte_clear_soft_dirty(pte_t pte) 1443 { 1444 return pte; 1445 } 1446 1447 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) 1448 { 1449 return pmd; 1450 } 1451 1452 static inline pte_t pte_swp_mksoft_dirty(pte_t pte) 1453 { 1454 return pte; 1455 } 1456 1457 static inline int pte_swp_soft_dirty(pte_t pte) 1458 { 1459 return 0; 1460 } 1461 1462 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) 1463 { 1464 return pte; 1465 } 1466 1467 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 1468 { 1469 return pmd; 1470 } 1471 1472 static inline int pmd_swp_soft_dirty(pmd_t pmd) 1473 { 1474 return 0; 1475 } 1476 1477 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 1478 { 1479 return pmd; 1480 } 1481 #endif 1482 1483 #ifndef __HAVE_PFNMAP_TRACKING 1484 /* 1485 * Interfaces that can be used by architecture code to keep track of 1486 * memory type of pfn mappings specified by the remap_pfn_range, 1487 * vmf_insert_pfn. 1488 */ 1489 1490 /* 1491 * track_pfn_remap is called when a _new_ pfn mapping is being established 1492 * by remap_pfn_range() for physical range indicated by pfn and size. 1493 */ 1494 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot, 1495 unsigned long pfn, unsigned long addr, 1496 unsigned long size) 1497 { 1498 return 0; 1499 } 1500 1501 /* 1502 * track_pfn_insert is called when a _new_ single pfn is established 1503 * by vmf_insert_pfn(). 1504 */ 1505 static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, 1506 pfn_t pfn) 1507 { 1508 } 1509 1510 /* 1511 * track_pfn_copy is called when a VM_PFNMAP VMA is about to get the page 1512 * tables copied during copy_page_range(). On success, stores the pfn to be 1513 * passed to untrack_pfn_copy(). 1514 */ 1515 static inline int track_pfn_copy(struct vm_area_struct *dst_vma, 1516 struct vm_area_struct *src_vma, unsigned long *pfn) 1517 { 1518 return 0; 1519 } 1520 1521 /* 1522 * untrack_pfn_copy is called when a VM_PFNMAP VMA failed to copy during 1523 * copy_page_range(), but after track_pfn_copy() was already called. 1524 */ 1525 static inline void untrack_pfn_copy(struct vm_area_struct *dst_vma, 1526 unsigned long pfn) 1527 { 1528 } 1529 1530 /* 1531 * untrack_pfn is called while unmapping a pfnmap for a region. 1532 * untrack can be called for a specific region indicated by pfn and size or 1533 * can be for the entire vma (in which case pfn, size are zero). 1534 */ 1535 static inline void untrack_pfn(struct vm_area_struct *vma, 1536 unsigned long pfn, unsigned long size, 1537 bool mm_wr_locked) 1538 { 1539 } 1540 1541 /* 1542 * untrack_pfn_clear is called in the following cases on a VM_PFNMAP VMA: 1543 * 1544 * 1) During mremap() on the src VMA after the page tables were moved. 1545 * 2) During fork() on the dst VMA, immediately after duplicating the src VMA. 1546 */ 1547 static inline void untrack_pfn_clear(struct vm_area_struct *vma) 1548 { 1549 } 1550 #else 1551 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot, 1552 unsigned long pfn, unsigned long addr, 1553 unsigned long size); 1554 extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, 1555 pfn_t pfn); 1556 extern int track_pfn_copy(struct vm_area_struct *dst_vma, 1557 struct vm_area_struct *src_vma, unsigned long *pfn); 1558 extern void untrack_pfn_copy(struct vm_area_struct *dst_vma, 1559 unsigned long pfn); 1560 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn, 1561 unsigned long size, bool mm_wr_locked); 1562 extern void untrack_pfn_clear(struct vm_area_struct *vma); 1563 #endif 1564 1565 #ifdef CONFIG_MMU 1566 #ifdef __HAVE_COLOR_ZERO_PAGE 1567 static inline int is_zero_pfn(unsigned long pfn) 1568 { 1569 extern unsigned long zero_pfn; 1570 unsigned long offset_from_zero_pfn = pfn - zero_pfn; 1571 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT); 1572 } 1573 1574 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr)) 1575 1576 #else 1577 static inline int is_zero_pfn(unsigned long pfn) 1578 { 1579 extern unsigned long zero_pfn; 1580 return pfn == zero_pfn; 1581 } 1582 1583 static inline unsigned long my_zero_pfn(unsigned long addr) 1584 { 1585 extern unsigned long zero_pfn; 1586 return zero_pfn; 1587 } 1588 #endif 1589 #else 1590 static inline int is_zero_pfn(unsigned long pfn) 1591 { 1592 return 0; 1593 } 1594 1595 static inline unsigned long my_zero_pfn(unsigned long addr) 1596 { 1597 return 0; 1598 } 1599 #endif /* CONFIG_MMU */ 1600 1601 #ifdef CONFIG_MMU 1602 1603 #ifndef CONFIG_TRANSPARENT_HUGEPAGE 1604 static inline int pmd_trans_huge(pmd_t pmd) 1605 { 1606 return 0; 1607 } 1608 #ifndef pmd_write 1609 static inline int pmd_write(pmd_t pmd) 1610 { 1611 BUG(); 1612 return 0; 1613 } 1614 #endif /* pmd_write */ 1615 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 1616 1617 #ifndef pud_write 1618 static inline int pud_write(pud_t pud) 1619 { 1620 BUG(); 1621 return 0; 1622 } 1623 #endif /* pud_write */ 1624 1625 #if !defined(CONFIG_ARCH_HAS_PTE_DEVMAP) || !defined(CONFIG_TRANSPARENT_HUGEPAGE) 1626 static inline int pmd_devmap(pmd_t pmd) 1627 { 1628 return 0; 1629 } 1630 static inline int pud_devmap(pud_t pud) 1631 { 1632 return 0; 1633 } 1634 static inline int pgd_devmap(pgd_t pgd) 1635 { 1636 return 0; 1637 } 1638 #endif 1639 1640 #if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \ 1641 !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD) 1642 static inline int pud_trans_huge(pud_t pud) 1643 { 1644 return 0; 1645 } 1646 #endif 1647 1648 static inline int pud_trans_unstable(pud_t *pud) 1649 { 1650 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && \ 1651 defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD) 1652 pud_t pudval = READ_ONCE(*pud); 1653 1654 if (pud_none(pudval) || pud_trans_huge(pudval) || pud_devmap(pudval)) 1655 return 1; 1656 if (unlikely(pud_bad(pudval))) { 1657 pud_clear_bad(pud); 1658 return 1; 1659 } 1660 #endif 1661 return 0; 1662 } 1663 1664 #ifndef CONFIG_NUMA_BALANCING 1665 /* 1666 * In an inaccessible (PROT_NONE) VMA, pte_protnone() may indicate "yes". It is 1667 * perfectly valid to indicate "no" in that case, which is why our default 1668 * implementation defaults to "always no". 1669 * 1670 * In an accessible VMA, however, pte_protnone() reliably indicates PROT_NONE 1671 * page protection due to NUMA hinting. NUMA hinting faults only apply in 1672 * accessible VMAs. 1673 * 1674 * So, to reliably identify PROT_NONE PTEs that require a NUMA hinting fault, 1675 * looking at the VMA accessibility is sufficient. 1676 */ 1677 static inline int pte_protnone(pte_t pte) 1678 { 1679 return 0; 1680 } 1681 1682 static inline int pmd_protnone(pmd_t pmd) 1683 { 1684 return 0; 1685 } 1686 #endif /* CONFIG_NUMA_BALANCING */ 1687 1688 #endif /* CONFIG_MMU */ 1689 1690 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP 1691 1692 #ifndef __PAGETABLE_P4D_FOLDED 1693 int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot); 1694 void p4d_clear_huge(p4d_t *p4d); 1695 #else 1696 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot) 1697 { 1698 return 0; 1699 } 1700 static inline void p4d_clear_huge(p4d_t *p4d) { } 1701 #endif /* !__PAGETABLE_P4D_FOLDED */ 1702 1703 int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot); 1704 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot); 1705 int pud_clear_huge(pud_t *pud); 1706 int pmd_clear_huge(pmd_t *pmd); 1707 int p4d_free_pud_page(p4d_t *p4d, unsigned long addr); 1708 int pud_free_pmd_page(pud_t *pud, unsigned long addr); 1709 int pmd_free_pte_page(pmd_t *pmd, unsigned long addr); 1710 #else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */ 1711 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot) 1712 { 1713 return 0; 1714 } 1715 static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot) 1716 { 1717 return 0; 1718 } 1719 static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot) 1720 { 1721 return 0; 1722 } 1723 static inline void p4d_clear_huge(p4d_t *p4d) { } 1724 static inline int pud_clear_huge(pud_t *pud) 1725 { 1726 return 0; 1727 } 1728 static inline int pmd_clear_huge(pmd_t *pmd) 1729 { 1730 return 0; 1731 } 1732 static inline int p4d_free_pud_page(p4d_t *p4d, unsigned long addr) 1733 { 1734 return 0; 1735 } 1736 static inline int pud_free_pmd_page(pud_t *pud, unsigned long addr) 1737 { 1738 return 0; 1739 } 1740 static inline int pmd_free_pte_page(pmd_t *pmd, unsigned long addr) 1741 { 1742 return 0; 1743 } 1744 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */ 1745 1746 #ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE 1747 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 1748 /* 1749 * ARCHes with special requirements for evicting THP backing TLB entries can 1750 * implement this. Otherwise also, it can help optimize normal TLB flush in 1751 * THP regime. Stock flush_tlb_range() typically has optimization to nuke the 1752 * entire TLB if flush span is greater than a threshold, which will 1753 * likely be true for a single huge page. Thus a single THP flush will 1754 * invalidate the entire TLB which is not desirable. 1755 * e.g. see arch/arc: flush_pmd_tlb_range 1756 */ 1757 #define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end) 1758 #define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end) 1759 #else 1760 #define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG() 1761 #define flush_pud_tlb_range(vma, addr, end) BUILD_BUG() 1762 #endif 1763 #endif 1764 1765 struct file; 1766 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, 1767 unsigned long size, pgprot_t *vma_prot); 1768 1769 #ifndef CONFIG_X86_ESPFIX64 1770 static inline void init_espfix_bsp(void) { } 1771 #endif 1772 1773 extern void __init pgtable_cache_init(void); 1774 1775 #ifndef __HAVE_ARCH_PFN_MODIFY_ALLOWED 1776 static inline bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot) 1777 { 1778 return true; 1779 } 1780 1781 static inline bool arch_has_pfn_modify_check(void) 1782 { 1783 return false; 1784 } 1785 #endif /* !_HAVE_ARCH_PFN_MODIFY_ALLOWED */ 1786 1787 /* 1788 * Architecture PAGE_KERNEL_* fallbacks 1789 * 1790 * Some architectures don't define certain PAGE_KERNEL_* flags. This is either 1791 * because they really don't support them, or the port needs to be updated to 1792 * reflect the required functionality. Below are a set of relatively safe 1793 * fallbacks, as best effort, which we can count on in lieu of the architectures 1794 * not defining them on their own yet. 1795 */ 1796 1797 #ifndef PAGE_KERNEL_RO 1798 # define PAGE_KERNEL_RO PAGE_KERNEL 1799 #endif 1800 1801 #ifndef PAGE_KERNEL_EXEC 1802 # define PAGE_KERNEL_EXEC PAGE_KERNEL 1803 #endif 1804 1805 /* 1806 * Page Table Modification bits for pgtbl_mod_mask. 1807 * 1808 * These are used by the p?d_alloc_track*() set of functions an in the generic 1809 * vmalloc/ioremap code to track at which page-table levels entries have been 1810 * modified. Based on that the code can better decide when vmalloc and ioremap 1811 * mapping changes need to be synchronized to other page-tables in the system. 1812 */ 1813 #define __PGTBL_PGD_MODIFIED 0 1814 #define __PGTBL_P4D_MODIFIED 1 1815 #define __PGTBL_PUD_MODIFIED 2 1816 #define __PGTBL_PMD_MODIFIED 3 1817 #define __PGTBL_PTE_MODIFIED 4 1818 1819 #define PGTBL_PGD_MODIFIED BIT(__PGTBL_PGD_MODIFIED) 1820 #define PGTBL_P4D_MODIFIED BIT(__PGTBL_P4D_MODIFIED) 1821 #define PGTBL_PUD_MODIFIED BIT(__PGTBL_PUD_MODIFIED) 1822 #define PGTBL_PMD_MODIFIED BIT(__PGTBL_PMD_MODIFIED) 1823 #define PGTBL_PTE_MODIFIED BIT(__PGTBL_PTE_MODIFIED) 1824 1825 /* Page-Table Modification Mask */ 1826 typedef unsigned int pgtbl_mod_mask; 1827 1828 #endif /* !__ASSEMBLY__ */ 1829 1830 #if !defined(MAX_POSSIBLE_PHYSMEM_BITS) && !defined(CONFIG_64BIT) 1831 #ifdef CONFIG_PHYS_ADDR_T_64BIT 1832 /* 1833 * ZSMALLOC needs to know the highest PFN on 32-bit architectures 1834 * with physical address space extension, but falls back to 1835 * BITS_PER_LONG otherwise. 1836 */ 1837 #error Missing MAX_POSSIBLE_PHYSMEM_BITS definition 1838 #else 1839 #define MAX_POSSIBLE_PHYSMEM_BITS 32 1840 #endif 1841 #endif 1842 1843 #ifndef has_transparent_hugepage 1844 #define has_transparent_hugepage() IS_BUILTIN(CONFIG_TRANSPARENT_HUGEPAGE) 1845 #endif 1846 1847 #ifndef has_transparent_pud_hugepage 1848 #define has_transparent_pud_hugepage() IS_BUILTIN(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD) 1849 #endif 1850 /* 1851 * On some architectures it depends on the mm if the p4d/pud or pmd 1852 * layer of the page table hierarchy is folded or not. 1853 */ 1854 #ifndef mm_p4d_folded 1855 #define mm_p4d_folded(mm) __is_defined(__PAGETABLE_P4D_FOLDED) 1856 #endif 1857 1858 #ifndef mm_pud_folded 1859 #define mm_pud_folded(mm) __is_defined(__PAGETABLE_PUD_FOLDED) 1860 #endif 1861 1862 #ifndef mm_pmd_folded 1863 #define mm_pmd_folded(mm) __is_defined(__PAGETABLE_PMD_FOLDED) 1864 #endif 1865 1866 #ifndef p4d_offset_lockless 1867 #define p4d_offset_lockless(pgdp, pgd, address) p4d_offset(&(pgd), address) 1868 #endif 1869 #ifndef pud_offset_lockless 1870 #define pud_offset_lockless(p4dp, p4d, address) pud_offset(&(p4d), address) 1871 #endif 1872 #ifndef pmd_offset_lockless 1873 #define pmd_offset_lockless(pudp, pud, address) pmd_offset(&(pud), address) 1874 #endif 1875 1876 /* 1877 * pXd_leaf() is the API to check whether a pgtable entry is a huge page 1878 * mapping. It should work globally across all archs, without any 1879 * dependency on CONFIG_* options. For architectures that do not support 1880 * huge mappings on specific levels, below fallbacks will be used. 1881 * 1882 * A leaf pgtable entry should always imply the following: 1883 * 1884 * - It is a "present" entry. IOW, before using this API, please check it 1885 * with pXd_present() first. NOTE: it may not always mean the "present 1886 * bit" is set. For example, PROT_NONE entries are always "present". 1887 * 1888 * - It should _never_ be a swap entry of any type. Above "present" check 1889 * should have guarded this, but let's be crystal clear on this. 1890 * 1891 * - It should contain a huge PFN, which points to a huge page larger than 1892 * PAGE_SIZE of the platform. The PFN format isn't important here. 1893 * 1894 * - It should cover all kinds of huge mappings (e.g., pXd_trans_huge(), 1895 * pXd_devmap(), or hugetlb mappings). 1896 */ 1897 #ifndef pgd_leaf 1898 #define pgd_leaf(x) false 1899 #endif 1900 #ifndef p4d_leaf 1901 #define p4d_leaf(x) false 1902 #endif 1903 #ifndef pud_leaf 1904 #define pud_leaf(x) false 1905 #endif 1906 #ifndef pmd_leaf 1907 #define pmd_leaf(x) false 1908 #endif 1909 1910 #ifndef pgd_leaf_size 1911 #define pgd_leaf_size(x) (1ULL << PGDIR_SHIFT) 1912 #endif 1913 #ifndef p4d_leaf_size 1914 #define p4d_leaf_size(x) P4D_SIZE 1915 #endif 1916 #ifndef pud_leaf_size 1917 #define pud_leaf_size(x) PUD_SIZE 1918 #endif 1919 #ifndef pmd_leaf_size 1920 #define pmd_leaf_size(x) PMD_SIZE 1921 #endif 1922 #ifndef __pte_leaf_size 1923 #ifndef pte_leaf_size 1924 #define pte_leaf_size(x) PAGE_SIZE 1925 #endif 1926 #define __pte_leaf_size(x,y) pte_leaf_size(y) 1927 #endif 1928 1929 /* 1930 * We always define pmd_pfn for all archs as it's used in lots of generic 1931 * code. Now it happens too for pud_pfn (and can happen for larger 1932 * mappings too in the future; we're not there yet). Instead of defining 1933 * it for all archs (like pmd_pfn), provide a fallback. 1934 * 1935 * Note that returning 0 here means any arch that didn't define this can 1936 * get severely wrong when it hits a real pud leaf. It's arch's 1937 * responsibility to properly define it when a huge pud is possible. 1938 */ 1939 #ifndef pud_pfn 1940 #define pud_pfn(x) 0 1941 #endif 1942 1943 /* 1944 * Some architectures have MMUs that are configurable or selectable at boot 1945 * time. These lead to variable PTRS_PER_x. For statically allocated arrays it 1946 * helps to have a static maximum value. 1947 */ 1948 1949 #ifndef MAX_PTRS_PER_PTE 1950 #define MAX_PTRS_PER_PTE PTRS_PER_PTE 1951 #endif 1952 1953 #ifndef MAX_PTRS_PER_PMD 1954 #define MAX_PTRS_PER_PMD PTRS_PER_PMD 1955 #endif 1956 1957 #ifndef MAX_PTRS_PER_PUD 1958 #define MAX_PTRS_PER_PUD PTRS_PER_PUD 1959 #endif 1960 1961 #ifndef MAX_PTRS_PER_P4D 1962 #define MAX_PTRS_PER_P4D PTRS_PER_P4D 1963 #endif 1964 1965 #ifndef pte_pgprot 1966 #define pte_pgprot(x) ((pgprot_t) {0}) 1967 #endif 1968 1969 #ifndef pmd_pgprot 1970 #define pmd_pgprot(x) ((pgprot_t) {0}) 1971 #endif 1972 1973 #ifndef pud_pgprot 1974 #define pud_pgprot(x) ((pgprot_t) {0}) 1975 #endif 1976 1977 /* description of effects of mapping type and prot in current implementation. 1978 * this is due to the limited x86 page protection hardware. The expected 1979 * behavior is in parens: 1980 * 1981 * map_type prot 1982 * PROT_NONE PROT_READ PROT_WRITE PROT_EXEC 1983 * MAP_SHARED r: (no) no r: (yes) yes r: (no) yes r: (no) yes 1984 * w: (no) no w: (no) no w: (yes) yes w: (no) no 1985 * x: (no) no x: (no) yes x: (no) yes x: (yes) yes 1986 * 1987 * MAP_PRIVATE r: (no) no r: (yes) yes r: (no) yes r: (no) yes 1988 * w: (no) no w: (no) no w: (copy) copy w: (no) no 1989 * x: (no) no x: (no) yes x: (no) yes x: (yes) yes 1990 * 1991 * On arm64, PROT_EXEC has the following behaviour for both MAP_SHARED and 1992 * MAP_PRIVATE (with Enhanced PAN supported): 1993 * r: (no) no 1994 * w: (no) no 1995 * x: (yes) yes 1996 */ 1997 #define DECLARE_VM_GET_PAGE_PROT \ 1998 pgprot_t vm_get_page_prot(unsigned long vm_flags) \ 1999 { \ 2000 return protection_map[vm_flags & \ 2001 (VM_READ | VM_WRITE | VM_EXEC | VM_SHARED)]; \ 2002 } \ 2003 EXPORT_SYMBOL(vm_get_page_prot); 2004 2005 #endif /* _LINUX_PGTABLE_H */ 2006