1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _LINUX_PGTABLE_H 3 #define _LINUX_PGTABLE_H 4 5 #include <linux/pfn.h> 6 #include <asm/pgtable.h> 7 8 #ifndef __ASSEMBLY__ 9 #ifdef CONFIG_MMU 10 11 #include <linux/mm_types.h> 12 #include <linux/bug.h> 13 #include <linux/errno.h> 14 #include <asm-generic/pgtable_uffd.h> 15 #include <linux/page_table_check.h> 16 17 #if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \ 18 defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS 19 #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED 20 #endif 21 22 /* 23 * On almost all architectures and configurations, 0 can be used as the 24 * upper ceiling to free_pgtables(): on many architectures it has the same 25 * effect as using TASK_SIZE. However, there is one configuration which 26 * must impose a more careful limit, to avoid freeing kernel pgtables. 27 */ 28 #ifndef USER_PGTABLES_CEILING 29 #define USER_PGTABLES_CEILING 0UL 30 #endif 31 32 /* 33 * This defines the first usable user address. Platforms 34 * can override its value with custom FIRST_USER_ADDRESS 35 * defined in their respective <asm/pgtable.h>. 36 */ 37 #ifndef FIRST_USER_ADDRESS 38 #define FIRST_USER_ADDRESS 0UL 39 #endif 40 41 /* 42 * This defines the generic helper for accessing PMD page 43 * table page. Although platforms can still override this 44 * via their respective <asm/pgtable.h>. 45 */ 46 #ifndef pmd_pgtable 47 #define pmd_pgtable(pmd) pmd_page(pmd) 48 #endif 49 50 /* 51 * A page table page can be thought of an array like this: pXd_t[PTRS_PER_PxD] 52 * 53 * The pXx_index() functions return the index of the entry in the page 54 * table page which would control the given virtual address 55 * 56 * As these functions may be used by the same code for different levels of 57 * the page table folding, they are always available, regardless of 58 * CONFIG_PGTABLE_LEVELS value. For the folded levels they simply return 0 59 * because in such cases PTRS_PER_PxD equals 1. 60 */ 61 62 static inline unsigned long pte_index(unsigned long address) 63 { 64 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); 65 } 66 #define pte_index pte_index 67 68 #ifndef pmd_index 69 static inline unsigned long pmd_index(unsigned long address) 70 { 71 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1); 72 } 73 #define pmd_index pmd_index 74 #endif 75 76 #ifndef pud_index 77 static inline unsigned long pud_index(unsigned long address) 78 { 79 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1); 80 } 81 #define pud_index pud_index 82 #endif 83 84 #ifndef pgd_index 85 /* Must be a compile-time constant, so implement it as a macro */ 86 #define pgd_index(a) (((a) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) 87 #endif 88 89 #ifndef pte_offset_kernel 90 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address) 91 { 92 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address); 93 } 94 #define pte_offset_kernel pte_offset_kernel 95 #endif 96 97 #if defined(CONFIG_HIGHPTE) 98 #define pte_offset_map(dir, address) \ 99 ((pte_t *)kmap_atomic(pmd_page(*(dir))) + \ 100 pte_index((address))) 101 #define pte_unmap(pte) kunmap_atomic((pte)) 102 #else 103 #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address)) 104 #define pte_unmap(pte) ((void)(pte)) /* NOP */ 105 #endif 106 107 /* Find an entry in the second-level page table.. */ 108 #ifndef pmd_offset 109 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) 110 { 111 return pud_pgtable(*pud) + pmd_index(address); 112 } 113 #define pmd_offset pmd_offset 114 #endif 115 116 #ifndef pud_offset 117 static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address) 118 { 119 return p4d_pgtable(*p4d) + pud_index(address); 120 } 121 #define pud_offset pud_offset 122 #endif 123 124 static inline pgd_t *pgd_offset_pgd(pgd_t *pgd, unsigned long address) 125 { 126 return (pgd + pgd_index(address)); 127 }; 128 129 /* 130 * a shortcut to get a pgd_t in a given mm 131 */ 132 #ifndef pgd_offset 133 #define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address)) 134 #endif 135 136 /* 137 * a shortcut which implies the use of the kernel's pgd, instead 138 * of a process's 139 */ 140 #ifndef pgd_offset_k 141 #define pgd_offset_k(address) pgd_offset(&init_mm, (address)) 142 #endif 143 144 /* 145 * In many cases it is known that a virtual address is mapped at PMD or PTE 146 * level, so instead of traversing all the page table levels, we can get a 147 * pointer to the PMD entry in user or kernel page table or translate a virtual 148 * address to the pointer in the PTE in the kernel page tables with simple 149 * helpers. 150 */ 151 static inline pmd_t *pmd_off(struct mm_struct *mm, unsigned long va) 152 { 153 return pmd_offset(pud_offset(p4d_offset(pgd_offset(mm, va), va), va), va); 154 } 155 156 static inline pmd_t *pmd_off_k(unsigned long va) 157 { 158 return pmd_offset(pud_offset(p4d_offset(pgd_offset_k(va), va), va), va); 159 } 160 161 static inline pte_t *virt_to_kpte(unsigned long vaddr) 162 { 163 pmd_t *pmd = pmd_off_k(vaddr); 164 165 return pmd_none(*pmd) ? NULL : pte_offset_kernel(pmd, vaddr); 166 } 167 168 #ifndef pmd_young 169 static inline int pmd_young(pmd_t pmd) 170 { 171 return 0; 172 } 173 #endif 174 175 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 176 extern int ptep_set_access_flags(struct vm_area_struct *vma, 177 unsigned long address, pte_t *ptep, 178 pte_t entry, int dirty); 179 #endif 180 181 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS 182 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 183 extern int pmdp_set_access_flags(struct vm_area_struct *vma, 184 unsigned long address, pmd_t *pmdp, 185 pmd_t entry, int dirty); 186 extern int pudp_set_access_flags(struct vm_area_struct *vma, 187 unsigned long address, pud_t *pudp, 188 pud_t entry, int dirty); 189 #else 190 static inline int pmdp_set_access_flags(struct vm_area_struct *vma, 191 unsigned long address, pmd_t *pmdp, 192 pmd_t entry, int dirty) 193 { 194 BUILD_BUG(); 195 return 0; 196 } 197 static inline int pudp_set_access_flags(struct vm_area_struct *vma, 198 unsigned long address, pud_t *pudp, 199 pud_t entry, int dirty) 200 { 201 BUILD_BUG(); 202 return 0; 203 } 204 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 205 #endif 206 207 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 208 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, 209 unsigned long address, 210 pte_t *ptep) 211 { 212 pte_t pte = *ptep; 213 int r = 1; 214 if (!pte_young(pte)) 215 r = 0; 216 else 217 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte)); 218 return r; 219 } 220 #endif 221 222 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG 223 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG) 224 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, 225 unsigned long address, 226 pmd_t *pmdp) 227 { 228 pmd_t pmd = *pmdp; 229 int r = 1; 230 if (!pmd_young(pmd)) 231 r = 0; 232 else 233 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd)); 234 return r; 235 } 236 #else 237 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, 238 unsigned long address, 239 pmd_t *pmdp) 240 { 241 BUILD_BUG(); 242 return 0; 243 } 244 #endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG */ 245 #endif 246 247 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 248 int ptep_clear_flush_young(struct vm_area_struct *vma, 249 unsigned long address, pte_t *ptep); 250 #endif 251 252 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH 253 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 254 extern int pmdp_clear_flush_young(struct vm_area_struct *vma, 255 unsigned long address, pmd_t *pmdp); 256 #else 257 /* 258 * Despite relevant to THP only, this API is called from generic rmap code 259 * under PageTransHuge(), hence needs a dummy implementation for !THP 260 */ 261 static inline int pmdp_clear_flush_young(struct vm_area_struct *vma, 262 unsigned long address, pmd_t *pmdp) 263 { 264 BUILD_BUG(); 265 return 0; 266 } 267 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 268 #endif 269 270 #ifndef arch_has_hw_nonleaf_pmd_young 271 /* 272 * Return whether the accessed bit in non-leaf PMD entries is supported on the 273 * local CPU. 274 */ 275 static inline bool arch_has_hw_nonleaf_pmd_young(void) 276 { 277 return IS_ENABLED(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG); 278 } 279 #endif 280 281 #ifndef arch_has_hw_pte_young 282 /* 283 * Return whether the accessed bit is supported on the local CPU. 284 * 285 * This stub assumes accessing through an old PTE triggers a page fault. 286 * Architectures that automatically set the access bit should overwrite it. 287 */ 288 static inline bool arch_has_hw_pte_young(void) 289 { 290 return false; 291 } 292 #endif 293 294 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR 295 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, 296 unsigned long address, 297 pte_t *ptep) 298 { 299 pte_t pte = *ptep; 300 pte_clear(mm, address, ptep); 301 page_table_check_pte_clear(mm, address, pte); 302 return pte; 303 } 304 #endif 305 306 static inline void ptep_clear(struct mm_struct *mm, unsigned long addr, 307 pte_t *ptep) 308 { 309 ptep_get_and_clear(mm, addr, ptep); 310 } 311 312 #ifndef __HAVE_ARCH_PTEP_GET 313 static inline pte_t ptep_get(pte_t *ptep) 314 { 315 return READ_ONCE(*ptep); 316 } 317 #endif 318 319 #ifdef CONFIG_GUP_GET_PTE_LOW_HIGH 320 /* 321 * WARNING: only to be used in the get_user_pages_fast() implementation. 322 * 323 * With get_user_pages_fast(), we walk down the pagetables without taking any 324 * locks. For this we would like to load the pointers atomically, but sometimes 325 * that is not possible (e.g. without expensive cmpxchg8b on x86_32 PAE). What 326 * we do have is the guarantee that a PTE will only either go from not present 327 * to present, or present to not present or both -- it will not switch to a 328 * completely different present page without a TLB flush in between; something 329 * that we are blocking by holding interrupts off. 330 * 331 * Setting ptes from not present to present goes: 332 * 333 * ptep->pte_high = h; 334 * smp_wmb(); 335 * ptep->pte_low = l; 336 * 337 * And present to not present goes: 338 * 339 * ptep->pte_low = 0; 340 * smp_wmb(); 341 * ptep->pte_high = 0; 342 * 343 * We must ensure here that the load of pte_low sees 'l' IFF pte_high sees 'h'. 344 * We load pte_high *after* loading pte_low, which ensures we don't see an older 345 * value of pte_high. *Then* we recheck pte_low, which ensures that we haven't 346 * picked up a changed pte high. We might have gotten rubbish values from 347 * pte_low and pte_high, but we are guaranteed that pte_low will not have the 348 * present bit set *unless* it is 'l'. Because get_user_pages_fast() only 349 * operates on present ptes we're safe. 350 */ 351 static inline pte_t ptep_get_lockless(pte_t *ptep) 352 { 353 pte_t pte; 354 355 do { 356 pte.pte_low = ptep->pte_low; 357 smp_rmb(); 358 pte.pte_high = ptep->pte_high; 359 smp_rmb(); 360 } while (unlikely(pte.pte_low != ptep->pte_low)); 361 362 return pte; 363 } 364 #else /* CONFIG_GUP_GET_PTE_LOW_HIGH */ 365 /* 366 * We require that the PTE can be read atomically. 367 */ 368 static inline pte_t ptep_get_lockless(pte_t *ptep) 369 { 370 return ptep_get(ptep); 371 } 372 #endif /* CONFIG_GUP_GET_PTE_LOW_HIGH */ 373 374 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 375 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR 376 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, 377 unsigned long address, 378 pmd_t *pmdp) 379 { 380 pmd_t pmd = *pmdp; 381 382 pmd_clear(pmdp); 383 page_table_check_pmd_clear(mm, address, pmd); 384 385 return pmd; 386 } 387 #endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */ 388 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR 389 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm, 390 unsigned long address, 391 pud_t *pudp) 392 { 393 pud_t pud = *pudp; 394 395 pud_clear(pudp); 396 page_table_check_pud_clear(mm, address, pud); 397 398 return pud; 399 } 400 #endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */ 401 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 402 403 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 404 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL 405 static inline pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma, 406 unsigned long address, pmd_t *pmdp, 407 int full) 408 { 409 return pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp); 410 } 411 #endif 412 413 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL 414 static inline pud_t pudp_huge_get_and_clear_full(struct mm_struct *mm, 415 unsigned long address, pud_t *pudp, 416 int full) 417 { 418 return pudp_huge_get_and_clear(mm, address, pudp); 419 } 420 #endif 421 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 422 423 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL 424 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, 425 unsigned long address, pte_t *ptep, 426 int full) 427 { 428 pte_t pte; 429 pte = ptep_get_and_clear(mm, address, ptep); 430 return pte; 431 } 432 #endif 433 434 435 /* 436 * If two threads concurrently fault at the same page, the thread that 437 * won the race updates the PTE and its local TLB/Cache. The other thread 438 * gives up, simply does nothing, and continues; on architectures where 439 * software can update TLB, local TLB can be updated here to avoid next page 440 * fault. This function updates TLB only, do nothing with cache or others. 441 * It is the difference with function update_mmu_cache. 442 */ 443 #ifndef __HAVE_ARCH_UPDATE_MMU_TLB 444 static inline void update_mmu_tlb(struct vm_area_struct *vma, 445 unsigned long address, pte_t *ptep) 446 { 447 } 448 #define __HAVE_ARCH_UPDATE_MMU_TLB 449 #endif 450 451 /* 452 * Some architectures may be able to avoid expensive synchronization 453 * primitives when modifications are made to PTE's which are already 454 * not present, or in the process of an address space destruction. 455 */ 456 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL 457 static inline void pte_clear_not_present_full(struct mm_struct *mm, 458 unsigned long address, 459 pte_t *ptep, 460 int full) 461 { 462 pte_clear(mm, address, ptep); 463 } 464 #endif 465 466 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH 467 extern pte_t ptep_clear_flush(struct vm_area_struct *vma, 468 unsigned long address, 469 pte_t *ptep); 470 #endif 471 472 #ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH 473 extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma, 474 unsigned long address, 475 pmd_t *pmdp); 476 extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma, 477 unsigned long address, 478 pud_t *pudp); 479 #endif 480 481 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT 482 struct mm_struct; 483 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep) 484 { 485 pte_t old_pte = *ptep; 486 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte)); 487 } 488 #endif 489 490 /* 491 * On some architectures hardware does not set page access bit when accessing 492 * memory page, it is responsibility of software setting this bit. It brings 493 * out extra page fault penalty to track page access bit. For optimization page 494 * access bit can be set during all page fault flow on these arches. 495 * To be differentiate with macro pte_mkyoung, this macro is used on platforms 496 * where software maintains page access bit. 497 */ 498 #ifndef pte_sw_mkyoung 499 static inline pte_t pte_sw_mkyoung(pte_t pte) 500 { 501 return pte; 502 } 503 #define pte_sw_mkyoung pte_sw_mkyoung 504 #endif 505 506 #ifndef pte_savedwrite 507 #define pte_savedwrite pte_write 508 #endif 509 510 #ifndef pte_mk_savedwrite 511 #define pte_mk_savedwrite pte_mkwrite 512 #endif 513 514 #ifndef pte_clear_savedwrite 515 #define pte_clear_savedwrite pte_wrprotect 516 #endif 517 518 #ifndef pmd_savedwrite 519 #define pmd_savedwrite pmd_write 520 #endif 521 522 #ifndef pmd_mk_savedwrite 523 #define pmd_mk_savedwrite pmd_mkwrite 524 #endif 525 526 #ifndef pmd_clear_savedwrite 527 #define pmd_clear_savedwrite pmd_wrprotect 528 #endif 529 530 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT 531 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 532 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 533 unsigned long address, pmd_t *pmdp) 534 { 535 pmd_t old_pmd = *pmdp; 536 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd)); 537 } 538 #else 539 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 540 unsigned long address, pmd_t *pmdp) 541 { 542 BUILD_BUG(); 543 } 544 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 545 #endif 546 #ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT 547 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 548 static inline void pudp_set_wrprotect(struct mm_struct *mm, 549 unsigned long address, pud_t *pudp) 550 { 551 pud_t old_pud = *pudp; 552 553 set_pud_at(mm, address, pudp, pud_wrprotect(old_pud)); 554 } 555 #else 556 static inline void pudp_set_wrprotect(struct mm_struct *mm, 557 unsigned long address, pud_t *pudp) 558 { 559 BUILD_BUG(); 560 } 561 #endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */ 562 #endif 563 564 #ifndef pmdp_collapse_flush 565 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 566 extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, 567 unsigned long address, pmd_t *pmdp); 568 #else 569 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, 570 unsigned long address, 571 pmd_t *pmdp) 572 { 573 BUILD_BUG(); 574 return *pmdp; 575 } 576 #define pmdp_collapse_flush pmdp_collapse_flush 577 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 578 #endif 579 580 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT 581 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp, 582 pgtable_t pgtable); 583 #endif 584 585 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW 586 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp); 587 #endif 588 589 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 590 /* 591 * This is an implementation of pmdp_establish() that is only suitable for an 592 * architecture that doesn't have hardware dirty/accessed bits. In this case we 593 * can't race with CPU which sets these bits and non-atomic approach is fine. 594 */ 595 static inline pmd_t generic_pmdp_establish(struct vm_area_struct *vma, 596 unsigned long address, pmd_t *pmdp, pmd_t pmd) 597 { 598 pmd_t old_pmd = *pmdp; 599 set_pmd_at(vma->vm_mm, address, pmdp, pmd); 600 return old_pmd; 601 } 602 #endif 603 604 #ifndef __HAVE_ARCH_PMDP_INVALIDATE 605 extern pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address, 606 pmd_t *pmdp); 607 #endif 608 609 #ifndef __HAVE_ARCH_PMDP_INVALIDATE_AD 610 611 /* 612 * pmdp_invalidate_ad() invalidates the PMD while changing a transparent 613 * hugepage mapping in the page tables. This function is similar to 614 * pmdp_invalidate(), but should only be used if the access and dirty bits would 615 * not be cleared by the software in the new PMD value. The function ensures 616 * that hardware changes of the access and dirty bits updates would not be lost. 617 * 618 * Doing so can allow in certain architectures to avoid a TLB flush in most 619 * cases. Yet, another TLB flush might be necessary later if the PMD update 620 * itself requires such flush (e.g., if protection was set to be stricter). Yet, 621 * even when a TLB flush is needed because of the update, the caller may be able 622 * to batch these TLB flushing operations, so fewer TLB flush operations are 623 * needed. 624 */ 625 extern pmd_t pmdp_invalidate_ad(struct vm_area_struct *vma, 626 unsigned long address, pmd_t *pmdp); 627 #endif 628 629 #ifndef __HAVE_ARCH_PTE_SAME 630 static inline int pte_same(pte_t pte_a, pte_t pte_b) 631 { 632 return pte_val(pte_a) == pte_val(pte_b); 633 } 634 #endif 635 636 #ifndef __HAVE_ARCH_PTE_UNUSED 637 /* 638 * Some architectures provide facilities to virtualization guests 639 * so that they can flag allocated pages as unused. This allows the 640 * host to transparently reclaim unused pages. This function returns 641 * whether the pte's page is unused. 642 */ 643 static inline int pte_unused(pte_t pte) 644 { 645 return 0; 646 } 647 #endif 648 649 #ifndef pte_access_permitted 650 #define pte_access_permitted(pte, write) \ 651 (pte_present(pte) && (!(write) || pte_write(pte))) 652 #endif 653 654 #ifndef pmd_access_permitted 655 #define pmd_access_permitted(pmd, write) \ 656 (pmd_present(pmd) && (!(write) || pmd_write(pmd))) 657 #endif 658 659 #ifndef pud_access_permitted 660 #define pud_access_permitted(pud, write) \ 661 (pud_present(pud) && (!(write) || pud_write(pud))) 662 #endif 663 664 #ifndef p4d_access_permitted 665 #define p4d_access_permitted(p4d, write) \ 666 (p4d_present(p4d) && (!(write) || p4d_write(p4d))) 667 #endif 668 669 #ifndef pgd_access_permitted 670 #define pgd_access_permitted(pgd, write) \ 671 (pgd_present(pgd) && (!(write) || pgd_write(pgd))) 672 #endif 673 674 #ifndef __HAVE_ARCH_PMD_SAME 675 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b) 676 { 677 return pmd_val(pmd_a) == pmd_val(pmd_b); 678 } 679 680 static inline int pud_same(pud_t pud_a, pud_t pud_b) 681 { 682 return pud_val(pud_a) == pud_val(pud_b); 683 } 684 #endif 685 686 #ifndef __HAVE_ARCH_P4D_SAME 687 static inline int p4d_same(p4d_t p4d_a, p4d_t p4d_b) 688 { 689 return p4d_val(p4d_a) == p4d_val(p4d_b); 690 } 691 #endif 692 693 #ifndef __HAVE_ARCH_PGD_SAME 694 static inline int pgd_same(pgd_t pgd_a, pgd_t pgd_b) 695 { 696 return pgd_val(pgd_a) == pgd_val(pgd_b); 697 } 698 #endif 699 700 /* 701 * Use set_p*_safe(), and elide TLB flushing, when confident that *no* 702 * TLB flush will be required as a result of the "set". For example, use 703 * in scenarios where it is known ahead of time that the routine is 704 * setting non-present entries, or re-setting an existing entry to the 705 * same value. Otherwise, use the typical "set" helpers and flush the 706 * TLB. 707 */ 708 #define set_pte_safe(ptep, pte) \ 709 ({ \ 710 WARN_ON_ONCE(pte_present(*ptep) && !pte_same(*ptep, pte)); \ 711 set_pte(ptep, pte); \ 712 }) 713 714 #define set_pmd_safe(pmdp, pmd) \ 715 ({ \ 716 WARN_ON_ONCE(pmd_present(*pmdp) && !pmd_same(*pmdp, pmd)); \ 717 set_pmd(pmdp, pmd); \ 718 }) 719 720 #define set_pud_safe(pudp, pud) \ 721 ({ \ 722 WARN_ON_ONCE(pud_present(*pudp) && !pud_same(*pudp, pud)); \ 723 set_pud(pudp, pud); \ 724 }) 725 726 #define set_p4d_safe(p4dp, p4d) \ 727 ({ \ 728 WARN_ON_ONCE(p4d_present(*p4dp) && !p4d_same(*p4dp, p4d)); \ 729 set_p4d(p4dp, p4d); \ 730 }) 731 732 #define set_pgd_safe(pgdp, pgd) \ 733 ({ \ 734 WARN_ON_ONCE(pgd_present(*pgdp) && !pgd_same(*pgdp, pgd)); \ 735 set_pgd(pgdp, pgd); \ 736 }) 737 738 #ifndef __HAVE_ARCH_DO_SWAP_PAGE 739 /* 740 * Some architectures support metadata associated with a page. When a 741 * page is being swapped out, this metadata must be saved so it can be 742 * restored when the page is swapped back in. SPARC M7 and newer 743 * processors support an ADI (Application Data Integrity) tag for the 744 * page as metadata for the page. arch_do_swap_page() can restore this 745 * metadata when a page is swapped back in. 746 */ 747 static inline void arch_do_swap_page(struct mm_struct *mm, 748 struct vm_area_struct *vma, 749 unsigned long addr, 750 pte_t pte, pte_t oldpte) 751 { 752 753 } 754 #endif 755 756 #ifndef __HAVE_ARCH_UNMAP_ONE 757 /* 758 * Some architectures support metadata associated with a page. When a 759 * page is being swapped out, this metadata must be saved so it can be 760 * restored when the page is swapped back in. SPARC M7 and newer 761 * processors support an ADI (Application Data Integrity) tag for the 762 * page as metadata for the page. arch_unmap_one() can save this 763 * metadata on a swap-out of a page. 764 */ 765 static inline int arch_unmap_one(struct mm_struct *mm, 766 struct vm_area_struct *vma, 767 unsigned long addr, 768 pte_t orig_pte) 769 { 770 return 0; 771 } 772 #endif 773 774 /* 775 * Allow architectures to preserve additional metadata associated with 776 * swapped-out pages. The corresponding __HAVE_ARCH_SWAP_* macros and function 777 * prototypes must be defined in the arch-specific asm/pgtable.h file. 778 */ 779 #ifndef __HAVE_ARCH_PREPARE_TO_SWAP 780 static inline int arch_prepare_to_swap(struct page *page) 781 { 782 return 0; 783 } 784 #endif 785 786 #ifndef __HAVE_ARCH_SWAP_INVALIDATE 787 static inline void arch_swap_invalidate_page(int type, pgoff_t offset) 788 { 789 } 790 791 static inline void arch_swap_invalidate_area(int type) 792 { 793 } 794 #endif 795 796 #ifndef __HAVE_ARCH_SWAP_RESTORE 797 static inline void arch_swap_restore(swp_entry_t entry, struct folio *folio) 798 { 799 } 800 #endif 801 802 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE 803 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr) 804 #endif 805 806 #ifndef __HAVE_ARCH_MOVE_PTE 807 #define move_pte(pte, prot, old_addr, new_addr) (pte) 808 #endif 809 810 #ifndef pte_accessible 811 # define pte_accessible(mm, pte) ((void)(pte), 1) 812 #endif 813 814 #ifndef flush_tlb_fix_spurious_fault 815 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address) 816 #endif 817 818 /* 819 * When walking page tables, get the address of the next boundary, 820 * or the end address of the range if that comes earlier. Although no 821 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout. 822 */ 823 824 #define pgd_addr_end(addr, end) \ 825 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \ 826 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 827 }) 828 829 #ifndef p4d_addr_end 830 #define p4d_addr_end(addr, end) \ 831 ({ unsigned long __boundary = ((addr) + P4D_SIZE) & P4D_MASK; \ 832 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 833 }) 834 #endif 835 836 #ifndef pud_addr_end 837 #define pud_addr_end(addr, end) \ 838 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \ 839 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 840 }) 841 #endif 842 843 #ifndef pmd_addr_end 844 #define pmd_addr_end(addr, end) \ 845 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \ 846 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 847 }) 848 #endif 849 850 /* 851 * When walking page tables, we usually want to skip any p?d_none entries; 852 * and any p?d_bad entries - reporting the error before resetting to none. 853 * Do the tests inline, but report and clear the bad entry in mm/memory.c. 854 */ 855 void pgd_clear_bad(pgd_t *); 856 857 #ifndef __PAGETABLE_P4D_FOLDED 858 void p4d_clear_bad(p4d_t *); 859 #else 860 #define p4d_clear_bad(p4d) do { } while (0) 861 #endif 862 863 #ifndef __PAGETABLE_PUD_FOLDED 864 void pud_clear_bad(pud_t *); 865 #else 866 #define pud_clear_bad(p4d) do { } while (0) 867 #endif 868 869 void pmd_clear_bad(pmd_t *); 870 871 static inline int pgd_none_or_clear_bad(pgd_t *pgd) 872 { 873 if (pgd_none(*pgd)) 874 return 1; 875 if (unlikely(pgd_bad(*pgd))) { 876 pgd_clear_bad(pgd); 877 return 1; 878 } 879 return 0; 880 } 881 882 static inline int p4d_none_or_clear_bad(p4d_t *p4d) 883 { 884 if (p4d_none(*p4d)) 885 return 1; 886 if (unlikely(p4d_bad(*p4d))) { 887 p4d_clear_bad(p4d); 888 return 1; 889 } 890 return 0; 891 } 892 893 static inline int pud_none_or_clear_bad(pud_t *pud) 894 { 895 if (pud_none(*pud)) 896 return 1; 897 if (unlikely(pud_bad(*pud))) { 898 pud_clear_bad(pud); 899 return 1; 900 } 901 return 0; 902 } 903 904 static inline int pmd_none_or_clear_bad(pmd_t *pmd) 905 { 906 if (pmd_none(*pmd)) 907 return 1; 908 if (unlikely(pmd_bad(*pmd))) { 909 pmd_clear_bad(pmd); 910 return 1; 911 } 912 return 0; 913 } 914 915 static inline pte_t __ptep_modify_prot_start(struct vm_area_struct *vma, 916 unsigned long addr, 917 pte_t *ptep) 918 { 919 /* 920 * Get the current pte state, but zero it out to make it 921 * non-present, preventing the hardware from asynchronously 922 * updating it. 923 */ 924 return ptep_get_and_clear(vma->vm_mm, addr, ptep); 925 } 926 927 static inline void __ptep_modify_prot_commit(struct vm_area_struct *vma, 928 unsigned long addr, 929 pte_t *ptep, pte_t pte) 930 { 931 /* 932 * The pte is non-present, so there's no hardware state to 933 * preserve. 934 */ 935 set_pte_at(vma->vm_mm, addr, ptep, pte); 936 } 937 938 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION 939 /* 940 * Start a pte protection read-modify-write transaction, which 941 * protects against asynchronous hardware modifications to the pte. 942 * The intention is not to prevent the hardware from making pte 943 * updates, but to prevent any updates it may make from being lost. 944 * 945 * This does not protect against other software modifications of the 946 * pte; the appropriate pte lock must be held over the transaction. 947 * 948 * Note that this interface is intended to be batchable, meaning that 949 * ptep_modify_prot_commit may not actually update the pte, but merely 950 * queue the update to be done at some later time. The update must be 951 * actually committed before the pte lock is released, however. 952 */ 953 static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma, 954 unsigned long addr, 955 pte_t *ptep) 956 { 957 return __ptep_modify_prot_start(vma, addr, ptep); 958 } 959 960 /* 961 * Commit an update to a pte, leaving any hardware-controlled bits in 962 * the PTE unmodified. 963 */ 964 static inline void ptep_modify_prot_commit(struct vm_area_struct *vma, 965 unsigned long addr, 966 pte_t *ptep, pte_t old_pte, pte_t pte) 967 { 968 __ptep_modify_prot_commit(vma, addr, ptep, pte); 969 } 970 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */ 971 #endif /* CONFIG_MMU */ 972 973 /* 974 * No-op macros that just return the current protection value. Defined here 975 * because these macros can be used even if CONFIG_MMU is not defined. 976 */ 977 978 #ifndef pgprot_nx 979 #define pgprot_nx(prot) (prot) 980 #endif 981 982 #ifndef pgprot_noncached 983 #define pgprot_noncached(prot) (prot) 984 #endif 985 986 #ifndef pgprot_writecombine 987 #define pgprot_writecombine pgprot_noncached 988 #endif 989 990 #ifndef pgprot_writethrough 991 #define pgprot_writethrough pgprot_noncached 992 #endif 993 994 #ifndef pgprot_device 995 #define pgprot_device pgprot_noncached 996 #endif 997 998 #ifndef pgprot_mhp 999 #define pgprot_mhp(prot) (prot) 1000 #endif 1001 1002 #ifdef CONFIG_MMU 1003 #ifndef pgprot_modify 1004 #define pgprot_modify pgprot_modify 1005 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) 1006 { 1007 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot))) 1008 newprot = pgprot_noncached(newprot); 1009 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot))) 1010 newprot = pgprot_writecombine(newprot); 1011 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot))) 1012 newprot = pgprot_device(newprot); 1013 return newprot; 1014 } 1015 #endif 1016 #endif /* CONFIG_MMU */ 1017 1018 #ifndef pgprot_encrypted 1019 #define pgprot_encrypted(prot) (prot) 1020 #endif 1021 1022 #ifndef pgprot_decrypted 1023 #define pgprot_decrypted(prot) (prot) 1024 #endif 1025 1026 /* 1027 * A facility to provide lazy MMU batching. This allows PTE updates and 1028 * page invalidations to be delayed until a call to leave lazy MMU mode 1029 * is issued. Some architectures may benefit from doing this, and it is 1030 * beneficial for both shadow and direct mode hypervisors, which may batch 1031 * the PTE updates which happen during this window. Note that using this 1032 * interface requires that read hazards be removed from the code. A read 1033 * hazard could result in the direct mode hypervisor case, since the actual 1034 * write to the page tables may not yet have taken place, so reads though 1035 * a raw PTE pointer after it has been modified are not guaranteed to be 1036 * up to date. This mode can only be entered and left under the protection of 1037 * the page table locks for all page tables which may be modified. In the UP 1038 * case, this is required so that preemption is disabled, and in the SMP case, 1039 * it must synchronize the delayed page table writes properly on other CPUs. 1040 */ 1041 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE 1042 #define arch_enter_lazy_mmu_mode() do {} while (0) 1043 #define arch_leave_lazy_mmu_mode() do {} while (0) 1044 #define arch_flush_lazy_mmu_mode() do {} while (0) 1045 #endif 1046 1047 /* 1048 * A facility to provide batching of the reload of page tables and 1049 * other process state with the actual context switch code for 1050 * paravirtualized guests. By convention, only one of the batched 1051 * update (lazy) modes (CPU, MMU) should be active at any given time, 1052 * entry should never be nested, and entry and exits should always be 1053 * paired. This is for sanity of maintaining and reasoning about the 1054 * kernel code. In this case, the exit (end of the context switch) is 1055 * in architecture-specific code, and so doesn't need a generic 1056 * definition. 1057 */ 1058 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH 1059 #define arch_start_context_switch(prev) do {} while (0) 1060 #endif 1061 1062 /* 1063 * When replacing an anonymous page by a real (!non) swap entry, we clear 1064 * PG_anon_exclusive from the page and instead remember whether the flag was 1065 * set in the swp pte. During fork(), we have to mark the entry as !exclusive 1066 * (possibly shared). On swapin, we use that information to restore 1067 * PG_anon_exclusive, which is very helpful in cases where we might have 1068 * additional (e.g., FOLL_GET) references on a page and wouldn't be able to 1069 * detect exclusivity. 1070 * 1071 * These functions don't apply to non-swap entries (e.g., migration, hwpoison, 1072 * ...). 1073 */ 1074 #ifndef __HAVE_ARCH_PTE_SWP_EXCLUSIVE 1075 static inline pte_t pte_swp_mkexclusive(pte_t pte) 1076 { 1077 return pte; 1078 } 1079 1080 static inline int pte_swp_exclusive(pte_t pte) 1081 { 1082 return false; 1083 } 1084 1085 static inline pte_t pte_swp_clear_exclusive(pte_t pte) 1086 { 1087 return pte; 1088 } 1089 #endif 1090 1091 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 1092 #ifndef CONFIG_ARCH_ENABLE_THP_MIGRATION 1093 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 1094 { 1095 return pmd; 1096 } 1097 1098 static inline int pmd_swp_soft_dirty(pmd_t pmd) 1099 { 1100 return 0; 1101 } 1102 1103 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 1104 { 1105 return pmd; 1106 } 1107 #endif 1108 #else /* !CONFIG_HAVE_ARCH_SOFT_DIRTY */ 1109 static inline int pte_soft_dirty(pte_t pte) 1110 { 1111 return 0; 1112 } 1113 1114 static inline int pmd_soft_dirty(pmd_t pmd) 1115 { 1116 return 0; 1117 } 1118 1119 static inline pte_t pte_mksoft_dirty(pte_t pte) 1120 { 1121 return pte; 1122 } 1123 1124 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) 1125 { 1126 return pmd; 1127 } 1128 1129 static inline pte_t pte_clear_soft_dirty(pte_t pte) 1130 { 1131 return pte; 1132 } 1133 1134 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) 1135 { 1136 return pmd; 1137 } 1138 1139 static inline pte_t pte_swp_mksoft_dirty(pte_t pte) 1140 { 1141 return pte; 1142 } 1143 1144 static inline int pte_swp_soft_dirty(pte_t pte) 1145 { 1146 return 0; 1147 } 1148 1149 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) 1150 { 1151 return pte; 1152 } 1153 1154 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 1155 { 1156 return pmd; 1157 } 1158 1159 static inline int pmd_swp_soft_dirty(pmd_t pmd) 1160 { 1161 return 0; 1162 } 1163 1164 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 1165 { 1166 return pmd; 1167 } 1168 #endif 1169 1170 #ifndef __HAVE_PFNMAP_TRACKING 1171 /* 1172 * Interfaces that can be used by architecture code to keep track of 1173 * memory type of pfn mappings specified by the remap_pfn_range, 1174 * vmf_insert_pfn. 1175 */ 1176 1177 /* 1178 * track_pfn_remap is called when a _new_ pfn mapping is being established 1179 * by remap_pfn_range() for physical range indicated by pfn and size. 1180 */ 1181 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot, 1182 unsigned long pfn, unsigned long addr, 1183 unsigned long size) 1184 { 1185 return 0; 1186 } 1187 1188 /* 1189 * track_pfn_insert is called when a _new_ single pfn is established 1190 * by vmf_insert_pfn(). 1191 */ 1192 static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, 1193 pfn_t pfn) 1194 { 1195 } 1196 1197 /* 1198 * track_pfn_copy is called when vma that is covering the pfnmap gets 1199 * copied through copy_page_range(). 1200 */ 1201 static inline int track_pfn_copy(struct vm_area_struct *vma) 1202 { 1203 return 0; 1204 } 1205 1206 /* 1207 * untrack_pfn is called while unmapping a pfnmap for a region. 1208 * untrack can be called for a specific region indicated by pfn and size or 1209 * can be for the entire vma (in which case pfn, size are zero). 1210 */ 1211 static inline void untrack_pfn(struct vm_area_struct *vma, 1212 unsigned long pfn, unsigned long size) 1213 { 1214 } 1215 1216 /* 1217 * untrack_pfn_moved is called while mremapping a pfnmap for a new region. 1218 */ 1219 static inline void untrack_pfn_moved(struct vm_area_struct *vma) 1220 { 1221 } 1222 #else 1223 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot, 1224 unsigned long pfn, unsigned long addr, 1225 unsigned long size); 1226 extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, 1227 pfn_t pfn); 1228 extern int track_pfn_copy(struct vm_area_struct *vma); 1229 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn, 1230 unsigned long size); 1231 extern void untrack_pfn_moved(struct vm_area_struct *vma); 1232 #endif 1233 1234 #ifdef CONFIG_MMU 1235 #ifdef __HAVE_COLOR_ZERO_PAGE 1236 static inline int is_zero_pfn(unsigned long pfn) 1237 { 1238 extern unsigned long zero_pfn; 1239 unsigned long offset_from_zero_pfn = pfn - zero_pfn; 1240 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT); 1241 } 1242 1243 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr)) 1244 1245 #else 1246 static inline int is_zero_pfn(unsigned long pfn) 1247 { 1248 extern unsigned long zero_pfn; 1249 return pfn == zero_pfn; 1250 } 1251 1252 static inline unsigned long my_zero_pfn(unsigned long addr) 1253 { 1254 extern unsigned long zero_pfn; 1255 return zero_pfn; 1256 } 1257 #endif 1258 #else 1259 static inline int is_zero_pfn(unsigned long pfn) 1260 { 1261 return 0; 1262 } 1263 1264 static inline unsigned long my_zero_pfn(unsigned long addr) 1265 { 1266 return 0; 1267 } 1268 #endif /* CONFIG_MMU */ 1269 1270 #ifdef CONFIG_MMU 1271 1272 #ifndef CONFIG_TRANSPARENT_HUGEPAGE 1273 static inline int pmd_trans_huge(pmd_t pmd) 1274 { 1275 return 0; 1276 } 1277 #ifndef pmd_write 1278 static inline int pmd_write(pmd_t pmd) 1279 { 1280 BUG(); 1281 return 0; 1282 } 1283 #endif /* pmd_write */ 1284 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 1285 1286 #ifndef pud_write 1287 static inline int pud_write(pud_t pud) 1288 { 1289 BUG(); 1290 return 0; 1291 } 1292 #endif /* pud_write */ 1293 1294 #if !defined(CONFIG_ARCH_HAS_PTE_DEVMAP) || !defined(CONFIG_TRANSPARENT_HUGEPAGE) 1295 static inline int pmd_devmap(pmd_t pmd) 1296 { 1297 return 0; 1298 } 1299 static inline int pud_devmap(pud_t pud) 1300 { 1301 return 0; 1302 } 1303 static inline int pgd_devmap(pgd_t pgd) 1304 { 1305 return 0; 1306 } 1307 #endif 1308 1309 #if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \ 1310 !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD) 1311 static inline int pud_trans_huge(pud_t pud) 1312 { 1313 return 0; 1314 } 1315 #endif 1316 1317 /* See pmd_none_or_trans_huge_or_clear_bad for discussion. */ 1318 static inline int pud_none_or_trans_huge_or_dev_or_clear_bad(pud_t *pud) 1319 { 1320 pud_t pudval = READ_ONCE(*pud); 1321 1322 if (pud_none(pudval) || pud_trans_huge(pudval) || pud_devmap(pudval)) 1323 return 1; 1324 if (unlikely(pud_bad(pudval))) { 1325 pud_clear_bad(pud); 1326 return 1; 1327 } 1328 return 0; 1329 } 1330 1331 /* See pmd_trans_unstable for discussion. */ 1332 static inline int pud_trans_unstable(pud_t *pud) 1333 { 1334 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && \ 1335 defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD) 1336 return pud_none_or_trans_huge_or_dev_or_clear_bad(pud); 1337 #else 1338 return 0; 1339 #endif 1340 } 1341 1342 #ifndef pmd_read_atomic 1343 static inline pmd_t pmd_read_atomic(pmd_t *pmdp) 1344 { 1345 /* 1346 * Depend on compiler for an atomic pmd read. NOTE: this is 1347 * only going to work, if the pmdval_t isn't larger than 1348 * an unsigned long. 1349 */ 1350 return *pmdp; 1351 } 1352 #endif 1353 1354 #ifndef arch_needs_pgtable_deposit 1355 #define arch_needs_pgtable_deposit() (false) 1356 #endif 1357 /* 1358 * This function is meant to be used by sites walking pagetables with 1359 * the mmap_lock held in read mode to protect against MADV_DONTNEED and 1360 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd 1361 * into a null pmd and the transhuge page fault can convert a null pmd 1362 * into an hugepmd or into a regular pmd (if the hugepage allocation 1363 * fails). While holding the mmap_lock in read mode the pmd becomes 1364 * stable and stops changing under us only if it's not null and not a 1365 * transhuge pmd. When those races occurs and this function makes a 1366 * difference vs the standard pmd_none_or_clear_bad, the result is 1367 * undefined so behaving like if the pmd was none is safe (because it 1368 * can return none anyway). The compiler level barrier() is critically 1369 * important to compute the two checks atomically on the same pmdval. 1370 * 1371 * For 32bit kernels with a 64bit large pmd_t this automatically takes 1372 * care of reading the pmd atomically to avoid SMP race conditions 1373 * against pmd_populate() when the mmap_lock is hold for reading by the 1374 * caller (a special atomic read not done by "gcc" as in the generic 1375 * version above, is also needed when THP is disabled because the page 1376 * fault can populate the pmd from under us). 1377 */ 1378 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd) 1379 { 1380 pmd_t pmdval = pmd_read_atomic(pmd); 1381 /* 1382 * The barrier will stabilize the pmdval in a register or on 1383 * the stack so that it will stop changing under the code. 1384 * 1385 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE, 1386 * pmd_read_atomic is allowed to return a not atomic pmdval 1387 * (for example pointing to an hugepage that has never been 1388 * mapped in the pmd). The below checks will only care about 1389 * the low part of the pmd with 32bit PAE x86 anyway, with the 1390 * exception of pmd_none(). So the important thing is that if 1391 * the low part of the pmd is found null, the high part will 1392 * be also null or the pmd_none() check below would be 1393 * confused. 1394 */ 1395 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 1396 barrier(); 1397 #endif 1398 /* 1399 * !pmd_present() checks for pmd migration entries 1400 * 1401 * The complete check uses is_pmd_migration_entry() in linux/swapops.h 1402 * But using that requires moving current function and pmd_trans_unstable() 1403 * to linux/swapops.h to resolve dependency, which is too much code move. 1404 * 1405 * !pmd_present() is equivalent to is_pmd_migration_entry() currently, 1406 * because !pmd_present() pages can only be under migration not swapped 1407 * out. 1408 * 1409 * pmd_none() is preserved for future condition checks on pmd migration 1410 * entries and not confusing with this function name, although it is 1411 * redundant with !pmd_present(). 1412 */ 1413 if (pmd_none(pmdval) || pmd_trans_huge(pmdval) || 1414 (IS_ENABLED(CONFIG_ARCH_ENABLE_THP_MIGRATION) && !pmd_present(pmdval))) 1415 return 1; 1416 if (unlikely(pmd_bad(pmdval))) { 1417 pmd_clear_bad(pmd); 1418 return 1; 1419 } 1420 return 0; 1421 } 1422 1423 /* 1424 * This is a noop if Transparent Hugepage Support is not built into 1425 * the kernel. Otherwise it is equivalent to 1426 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in 1427 * places that already verified the pmd is not none and they want to 1428 * walk ptes while holding the mmap sem in read mode (write mode don't 1429 * need this). If THP is not enabled, the pmd can't go away under the 1430 * code even if MADV_DONTNEED runs, but if THP is enabled we need to 1431 * run a pmd_trans_unstable before walking the ptes after 1432 * split_huge_pmd returns (because it may have run when the pmd become 1433 * null, but then a page fault can map in a THP and not a regular page). 1434 */ 1435 static inline int pmd_trans_unstable(pmd_t *pmd) 1436 { 1437 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 1438 return pmd_none_or_trans_huge_or_clear_bad(pmd); 1439 #else 1440 return 0; 1441 #endif 1442 } 1443 1444 /* 1445 * the ordering of these checks is important for pmds with _page_devmap set. 1446 * if we check pmd_trans_unstable() first we will trip the bad_pmd() check 1447 * inside of pmd_none_or_trans_huge_or_clear_bad(). this will end up correctly 1448 * returning 1 but not before it spams dmesg with the pmd_clear_bad() output. 1449 */ 1450 static inline int pmd_devmap_trans_unstable(pmd_t *pmd) 1451 { 1452 return pmd_devmap(*pmd) || pmd_trans_unstable(pmd); 1453 } 1454 1455 #ifndef CONFIG_NUMA_BALANCING 1456 /* 1457 * Technically a PTE can be PROTNONE even when not doing NUMA balancing but 1458 * the only case the kernel cares is for NUMA balancing and is only ever set 1459 * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked 1460 * _PAGE_PROTNONE so by default, implement the helper as "always no". It 1461 * is the responsibility of the caller to distinguish between PROT_NONE 1462 * protections and NUMA hinting fault protections. 1463 */ 1464 static inline int pte_protnone(pte_t pte) 1465 { 1466 return 0; 1467 } 1468 1469 static inline int pmd_protnone(pmd_t pmd) 1470 { 1471 return 0; 1472 } 1473 #endif /* CONFIG_NUMA_BALANCING */ 1474 1475 #endif /* CONFIG_MMU */ 1476 1477 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP 1478 1479 #ifndef __PAGETABLE_P4D_FOLDED 1480 int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot); 1481 void p4d_clear_huge(p4d_t *p4d); 1482 #else 1483 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot) 1484 { 1485 return 0; 1486 } 1487 static inline void p4d_clear_huge(p4d_t *p4d) { } 1488 #endif /* !__PAGETABLE_P4D_FOLDED */ 1489 1490 int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot); 1491 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot); 1492 int pud_clear_huge(pud_t *pud); 1493 int pmd_clear_huge(pmd_t *pmd); 1494 int p4d_free_pud_page(p4d_t *p4d, unsigned long addr); 1495 int pud_free_pmd_page(pud_t *pud, unsigned long addr); 1496 int pmd_free_pte_page(pmd_t *pmd, unsigned long addr); 1497 #else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */ 1498 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot) 1499 { 1500 return 0; 1501 } 1502 static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot) 1503 { 1504 return 0; 1505 } 1506 static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot) 1507 { 1508 return 0; 1509 } 1510 static inline void p4d_clear_huge(p4d_t *p4d) { } 1511 static inline int pud_clear_huge(pud_t *pud) 1512 { 1513 return 0; 1514 } 1515 static inline int pmd_clear_huge(pmd_t *pmd) 1516 { 1517 return 0; 1518 } 1519 static inline int p4d_free_pud_page(p4d_t *p4d, unsigned long addr) 1520 { 1521 return 0; 1522 } 1523 static inline int pud_free_pmd_page(pud_t *pud, unsigned long addr) 1524 { 1525 return 0; 1526 } 1527 static inline int pmd_free_pte_page(pmd_t *pmd, unsigned long addr) 1528 { 1529 return 0; 1530 } 1531 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */ 1532 1533 #ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE 1534 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 1535 /* 1536 * ARCHes with special requirements for evicting THP backing TLB entries can 1537 * implement this. Otherwise also, it can help optimize normal TLB flush in 1538 * THP regime. Stock flush_tlb_range() typically has optimization to nuke the 1539 * entire TLB if flush span is greater than a threshold, which will 1540 * likely be true for a single huge page. Thus a single THP flush will 1541 * invalidate the entire TLB which is not desirable. 1542 * e.g. see arch/arc: flush_pmd_tlb_range 1543 */ 1544 #define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end) 1545 #define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end) 1546 #else 1547 #define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG() 1548 #define flush_pud_tlb_range(vma, addr, end) BUILD_BUG() 1549 #endif 1550 #endif 1551 1552 struct file; 1553 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, 1554 unsigned long size, pgprot_t *vma_prot); 1555 1556 #ifndef CONFIG_X86_ESPFIX64 1557 static inline void init_espfix_bsp(void) { } 1558 #endif 1559 1560 extern void __init pgtable_cache_init(void); 1561 1562 #ifndef __HAVE_ARCH_PFN_MODIFY_ALLOWED 1563 static inline bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot) 1564 { 1565 return true; 1566 } 1567 1568 static inline bool arch_has_pfn_modify_check(void) 1569 { 1570 return false; 1571 } 1572 #endif /* !_HAVE_ARCH_PFN_MODIFY_ALLOWED */ 1573 1574 /* 1575 * Architecture PAGE_KERNEL_* fallbacks 1576 * 1577 * Some architectures don't define certain PAGE_KERNEL_* flags. This is either 1578 * because they really don't support them, or the port needs to be updated to 1579 * reflect the required functionality. Below are a set of relatively safe 1580 * fallbacks, as best effort, which we can count on in lieu of the architectures 1581 * not defining them on their own yet. 1582 */ 1583 1584 #ifndef PAGE_KERNEL_RO 1585 # define PAGE_KERNEL_RO PAGE_KERNEL 1586 #endif 1587 1588 #ifndef PAGE_KERNEL_EXEC 1589 # define PAGE_KERNEL_EXEC PAGE_KERNEL 1590 #endif 1591 1592 /* 1593 * Page Table Modification bits for pgtbl_mod_mask. 1594 * 1595 * These are used by the p?d_alloc_track*() set of functions an in the generic 1596 * vmalloc/ioremap code to track at which page-table levels entries have been 1597 * modified. Based on that the code can better decide when vmalloc and ioremap 1598 * mapping changes need to be synchronized to other page-tables in the system. 1599 */ 1600 #define __PGTBL_PGD_MODIFIED 0 1601 #define __PGTBL_P4D_MODIFIED 1 1602 #define __PGTBL_PUD_MODIFIED 2 1603 #define __PGTBL_PMD_MODIFIED 3 1604 #define __PGTBL_PTE_MODIFIED 4 1605 1606 #define PGTBL_PGD_MODIFIED BIT(__PGTBL_PGD_MODIFIED) 1607 #define PGTBL_P4D_MODIFIED BIT(__PGTBL_P4D_MODIFIED) 1608 #define PGTBL_PUD_MODIFIED BIT(__PGTBL_PUD_MODIFIED) 1609 #define PGTBL_PMD_MODIFIED BIT(__PGTBL_PMD_MODIFIED) 1610 #define PGTBL_PTE_MODIFIED BIT(__PGTBL_PTE_MODIFIED) 1611 1612 /* Page-Table Modification Mask */ 1613 typedef unsigned int pgtbl_mod_mask; 1614 1615 #endif /* !__ASSEMBLY__ */ 1616 1617 #if !defined(MAX_POSSIBLE_PHYSMEM_BITS) && !defined(CONFIG_64BIT) 1618 #ifdef CONFIG_PHYS_ADDR_T_64BIT 1619 /* 1620 * ZSMALLOC needs to know the highest PFN on 32-bit architectures 1621 * with physical address space extension, but falls back to 1622 * BITS_PER_LONG otherwise. 1623 */ 1624 #error Missing MAX_POSSIBLE_PHYSMEM_BITS definition 1625 #else 1626 #define MAX_POSSIBLE_PHYSMEM_BITS 32 1627 #endif 1628 #endif 1629 1630 #ifndef has_transparent_hugepage 1631 #define has_transparent_hugepage() IS_BUILTIN(CONFIG_TRANSPARENT_HUGEPAGE) 1632 #endif 1633 1634 /* 1635 * On some architectures it depends on the mm if the p4d/pud or pmd 1636 * layer of the page table hierarchy is folded or not. 1637 */ 1638 #ifndef mm_p4d_folded 1639 #define mm_p4d_folded(mm) __is_defined(__PAGETABLE_P4D_FOLDED) 1640 #endif 1641 1642 #ifndef mm_pud_folded 1643 #define mm_pud_folded(mm) __is_defined(__PAGETABLE_PUD_FOLDED) 1644 #endif 1645 1646 #ifndef mm_pmd_folded 1647 #define mm_pmd_folded(mm) __is_defined(__PAGETABLE_PMD_FOLDED) 1648 #endif 1649 1650 #ifndef p4d_offset_lockless 1651 #define p4d_offset_lockless(pgdp, pgd, address) p4d_offset(&(pgd), address) 1652 #endif 1653 #ifndef pud_offset_lockless 1654 #define pud_offset_lockless(p4dp, p4d, address) pud_offset(&(p4d), address) 1655 #endif 1656 #ifndef pmd_offset_lockless 1657 #define pmd_offset_lockless(pudp, pud, address) pmd_offset(&(pud), address) 1658 #endif 1659 1660 /* 1661 * p?d_leaf() - true if this entry is a final mapping to a physical address. 1662 * This differs from p?d_huge() by the fact that they are always available (if 1663 * the architecture supports large pages at the appropriate level) even 1664 * if CONFIG_HUGETLB_PAGE is not defined. 1665 * Only meaningful when called on a valid entry. 1666 */ 1667 #ifndef pgd_leaf 1668 #define pgd_leaf(x) 0 1669 #endif 1670 #ifndef p4d_leaf 1671 #define p4d_leaf(x) 0 1672 #endif 1673 #ifndef pud_leaf 1674 #define pud_leaf(x) 0 1675 #endif 1676 #ifndef pmd_leaf 1677 #define pmd_leaf(x) 0 1678 #endif 1679 1680 #ifndef pgd_leaf_size 1681 #define pgd_leaf_size(x) (1ULL << PGDIR_SHIFT) 1682 #endif 1683 #ifndef p4d_leaf_size 1684 #define p4d_leaf_size(x) P4D_SIZE 1685 #endif 1686 #ifndef pud_leaf_size 1687 #define pud_leaf_size(x) PUD_SIZE 1688 #endif 1689 #ifndef pmd_leaf_size 1690 #define pmd_leaf_size(x) PMD_SIZE 1691 #endif 1692 #ifndef pte_leaf_size 1693 #define pte_leaf_size(x) PAGE_SIZE 1694 #endif 1695 1696 /* 1697 * Some architectures have MMUs that are configurable or selectable at boot 1698 * time. These lead to variable PTRS_PER_x. For statically allocated arrays it 1699 * helps to have a static maximum value. 1700 */ 1701 1702 #ifndef MAX_PTRS_PER_PTE 1703 #define MAX_PTRS_PER_PTE PTRS_PER_PTE 1704 #endif 1705 1706 #ifndef MAX_PTRS_PER_PMD 1707 #define MAX_PTRS_PER_PMD PTRS_PER_PMD 1708 #endif 1709 1710 #ifndef MAX_PTRS_PER_PUD 1711 #define MAX_PTRS_PER_PUD PTRS_PER_PUD 1712 #endif 1713 1714 #ifndef MAX_PTRS_PER_P4D 1715 #define MAX_PTRS_PER_P4D PTRS_PER_P4D 1716 #endif 1717 1718 /* description of effects of mapping type and prot in current implementation. 1719 * this is due to the limited x86 page protection hardware. The expected 1720 * behavior is in parens: 1721 * 1722 * map_type prot 1723 * PROT_NONE PROT_READ PROT_WRITE PROT_EXEC 1724 * MAP_SHARED r: (no) no r: (yes) yes r: (no) yes r: (no) yes 1725 * w: (no) no w: (no) no w: (yes) yes w: (no) no 1726 * x: (no) no x: (no) yes x: (no) yes x: (yes) yes 1727 * 1728 * MAP_PRIVATE r: (no) no r: (yes) yes r: (no) yes r: (no) yes 1729 * w: (no) no w: (no) no w: (copy) copy w: (no) no 1730 * x: (no) no x: (no) yes x: (no) yes x: (yes) yes 1731 * 1732 * On arm64, PROT_EXEC has the following behaviour for both MAP_SHARED and 1733 * MAP_PRIVATE (with Enhanced PAN supported): 1734 * r: (no) no 1735 * w: (no) no 1736 * x: (yes) yes 1737 */ 1738 #define DECLARE_VM_GET_PAGE_PROT \ 1739 pgprot_t vm_get_page_prot(unsigned long vm_flags) \ 1740 { \ 1741 return protection_map[vm_flags & \ 1742 (VM_READ | VM_WRITE | VM_EXEC | VM_SHARED)]; \ 1743 } \ 1744 EXPORT_SYMBOL(vm_get_page_prot); 1745 1746 #endif /* _LINUX_PGTABLE_H */ 1747