1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _LINUX_PGTABLE_H 3 #define _LINUX_PGTABLE_H 4 5 #include <linux/pfn.h> 6 #include <asm/pgtable.h> 7 8 #ifndef __ASSEMBLY__ 9 #ifdef CONFIG_MMU 10 11 #include <linux/mm_types.h> 12 #include <linux/bug.h> 13 #include <linux/errno.h> 14 #include <asm-generic/pgtable_uffd.h> 15 16 #if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \ 17 defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS 18 #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED 19 #endif 20 21 /* 22 * On almost all architectures and configurations, 0 can be used as the 23 * upper ceiling to free_pgtables(): on many architectures it has the same 24 * effect as using TASK_SIZE. However, there is one configuration which 25 * must impose a more careful limit, to avoid freeing kernel pgtables. 26 */ 27 #ifndef USER_PGTABLES_CEILING 28 #define USER_PGTABLES_CEILING 0UL 29 #endif 30 31 /* 32 * A page table page can be thought of an array like this: pXd_t[PTRS_PER_PxD] 33 * 34 * The pXx_index() functions return the index of the entry in the page 35 * table page which would control the given virtual address 36 * 37 * As these functions may be used by the same code for different levels of 38 * the page table folding, they are always available, regardless of 39 * CONFIG_PGTABLE_LEVELS value. For the folded levels they simply return 0 40 * because in such cases PTRS_PER_PxD equals 1. 41 */ 42 43 static inline unsigned long pte_index(unsigned long address) 44 { 45 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); 46 } 47 48 #ifndef pmd_index 49 static inline unsigned long pmd_index(unsigned long address) 50 { 51 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1); 52 } 53 #define pmd_index pmd_index 54 #endif 55 56 #ifndef pud_index 57 static inline unsigned long pud_index(unsigned long address) 58 { 59 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1); 60 } 61 #define pud_index pud_index 62 #endif 63 64 #ifndef pgd_index 65 /* Must be a compile-time constant, so implement it as a macro */ 66 #define pgd_index(a) (((a) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) 67 #endif 68 69 #ifndef pte_offset_kernel 70 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address) 71 { 72 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address); 73 } 74 #define pte_offset_kernel pte_offset_kernel 75 #endif 76 77 #if defined(CONFIG_HIGHPTE) 78 #define pte_offset_map(dir, address) \ 79 ((pte_t *)kmap_atomic(pmd_page(*(dir))) + \ 80 pte_index((address))) 81 #define pte_unmap(pte) kunmap_atomic((pte)) 82 #else 83 #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address)) 84 #define pte_unmap(pte) ((void)(pte)) /* NOP */ 85 #endif 86 87 /* Find an entry in the second-level page table.. */ 88 #ifndef pmd_offset 89 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) 90 { 91 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address); 92 } 93 #define pmd_offset pmd_offset 94 #endif 95 96 #ifndef pud_offset 97 static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address) 98 { 99 return (pud_t *)p4d_page_vaddr(*p4d) + pud_index(address); 100 } 101 #define pud_offset pud_offset 102 #endif 103 104 static inline pgd_t *pgd_offset_pgd(pgd_t *pgd, unsigned long address) 105 { 106 return (pgd + pgd_index(address)); 107 }; 108 109 /* 110 * a shortcut to get a pgd_t in a given mm 111 */ 112 #ifndef pgd_offset 113 #define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address)) 114 #endif 115 116 /* 117 * a shortcut which implies the use of the kernel's pgd, instead 118 * of a process's 119 */ 120 #ifndef pgd_offset_k 121 #define pgd_offset_k(address) pgd_offset(&init_mm, (address)) 122 #endif 123 124 /* 125 * In many cases it is known that a virtual address is mapped at PMD or PTE 126 * level, so instead of traversing all the page table levels, we can get a 127 * pointer to the PMD entry in user or kernel page table or translate a virtual 128 * address to the pointer in the PTE in the kernel page tables with simple 129 * helpers. 130 */ 131 static inline pmd_t *pmd_off(struct mm_struct *mm, unsigned long va) 132 { 133 return pmd_offset(pud_offset(p4d_offset(pgd_offset(mm, va), va), va), va); 134 } 135 136 static inline pmd_t *pmd_off_k(unsigned long va) 137 { 138 return pmd_offset(pud_offset(p4d_offset(pgd_offset_k(va), va), va), va); 139 } 140 141 static inline pte_t *virt_to_kpte(unsigned long vaddr) 142 { 143 pmd_t *pmd = pmd_off_k(vaddr); 144 145 return pmd_none(*pmd) ? NULL : pte_offset_kernel(pmd, vaddr); 146 } 147 148 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 149 extern int ptep_set_access_flags(struct vm_area_struct *vma, 150 unsigned long address, pte_t *ptep, 151 pte_t entry, int dirty); 152 #endif 153 154 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS 155 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 156 extern int pmdp_set_access_flags(struct vm_area_struct *vma, 157 unsigned long address, pmd_t *pmdp, 158 pmd_t entry, int dirty); 159 extern int pudp_set_access_flags(struct vm_area_struct *vma, 160 unsigned long address, pud_t *pudp, 161 pud_t entry, int dirty); 162 #else 163 static inline int pmdp_set_access_flags(struct vm_area_struct *vma, 164 unsigned long address, pmd_t *pmdp, 165 pmd_t entry, int dirty) 166 { 167 BUILD_BUG(); 168 return 0; 169 } 170 static inline int pudp_set_access_flags(struct vm_area_struct *vma, 171 unsigned long address, pud_t *pudp, 172 pud_t entry, int dirty) 173 { 174 BUILD_BUG(); 175 return 0; 176 } 177 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 178 #endif 179 180 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 181 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, 182 unsigned long address, 183 pte_t *ptep) 184 { 185 pte_t pte = *ptep; 186 int r = 1; 187 if (!pte_young(pte)) 188 r = 0; 189 else 190 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte)); 191 return r; 192 } 193 #endif 194 195 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG 196 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 197 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, 198 unsigned long address, 199 pmd_t *pmdp) 200 { 201 pmd_t pmd = *pmdp; 202 int r = 1; 203 if (!pmd_young(pmd)) 204 r = 0; 205 else 206 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd)); 207 return r; 208 } 209 #else 210 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, 211 unsigned long address, 212 pmd_t *pmdp) 213 { 214 BUILD_BUG(); 215 return 0; 216 } 217 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 218 #endif 219 220 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 221 int ptep_clear_flush_young(struct vm_area_struct *vma, 222 unsigned long address, pte_t *ptep); 223 #endif 224 225 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH 226 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 227 extern int pmdp_clear_flush_young(struct vm_area_struct *vma, 228 unsigned long address, pmd_t *pmdp); 229 #else 230 /* 231 * Despite relevant to THP only, this API is called from generic rmap code 232 * under PageTransHuge(), hence needs a dummy implementation for !THP 233 */ 234 static inline int pmdp_clear_flush_young(struct vm_area_struct *vma, 235 unsigned long address, pmd_t *pmdp) 236 { 237 BUILD_BUG(); 238 return 0; 239 } 240 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 241 #endif 242 243 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR 244 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, 245 unsigned long address, 246 pte_t *ptep) 247 { 248 pte_t pte = *ptep; 249 pte_clear(mm, address, ptep); 250 return pte; 251 } 252 #endif 253 254 #ifndef __HAVE_ARCH_PTEP_GET 255 static inline pte_t ptep_get(pte_t *ptep) 256 { 257 return READ_ONCE(*ptep); 258 } 259 #endif 260 261 #ifdef CONFIG_GUP_GET_PTE_LOW_HIGH 262 /* 263 * WARNING: only to be used in the get_user_pages_fast() implementation. 264 * 265 * With get_user_pages_fast(), we walk down the pagetables without taking any 266 * locks. For this we would like to load the pointers atomically, but sometimes 267 * that is not possible (e.g. without expensive cmpxchg8b on x86_32 PAE). What 268 * we do have is the guarantee that a PTE will only either go from not present 269 * to present, or present to not present or both -- it will not switch to a 270 * completely different present page without a TLB flush in between; something 271 * that we are blocking by holding interrupts off. 272 * 273 * Setting ptes from not present to present goes: 274 * 275 * ptep->pte_high = h; 276 * smp_wmb(); 277 * ptep->pte_low = l; 278 * 279 * And present to not present goes: 280 * 281 * ptep->pte_low = 0; 282 * smp_wmb(); 283 * ptep->pte_high = 0; 284 * 285 * We must ensure here that the load of pte_low sees 'l' IFF pte_high sees 'h'. 286 * We load pte_high *after* loading pte_low, which ensures we don't see an older 287 * value of pte_high. *Then* we recheck pte_low, which ensures that we haven't 288 * picked up a changed pte high. We might have gotten rubbish values from 289 * pte_low and pte_high, but we are guaranteed that pte_low will not have the 290 * present bit set *unless* it is 'l'. Because get_user_pages_fast() only 291 * operates on present ptes we're safe. 292 */ 293 static inline pte_t ptep_get_lockless(pte_t *ptep) 294 { 295 pte_t pte; 296 297 do { 298 pte.pte_low = ptep->pte_low; 299 smp_rmb(); 300 pte.pte_high = ptep->pte_high; 301 smp_rmb(); 302 } while (unlikely(pte.pte_low != ptep->pte_low)); 303 304 return pte; 305 } 306 #else /* CONFIG_GUP_GET_PTE_LOW_HIGH */ 307 /* 308 * We require that the PTE can be read atomically. 309 */ 310 static inline pte_t ptep_get_lockless(pte_t *ptep) 311 { 312 return ptep_get(ptep); 313 } 314 #endif /* CONFIG_GUP_GET_PTE_LOW_HIGH */ 315 316 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 317 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR 318 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, 319 unsigned long address, 320 pmd_t *pmdp) 321 { 322 pmd_t pmd = *pmdp; 323 pmd_clear(pmdp); 324 return pmd; 325 } 326 #endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */ 327 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR 328 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm, 329 unsigned long address, 330 pud_t *pudp) 331 { 332 pud_t pud = *pudp; 333 334 pud_clear(pudp); 335 return pud; 336 } 337 #endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */ 338 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 339 340 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 341 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL 342 static inline pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma, 343 unsigned long address, pmd_t *pmdp, 344 int full) 345 { 346 return pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp); 347 } 348 #endif 349 350 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL 351 static inline pud_t pudp_huge_get_and_clear_full(struct mm_struct *mm, 352 unsigned long address, pud_t *pudp, 353 int full) 354 { 355 return pudp_huge_get_and_clear(mm, address, pudp); 356 } 357 #endif 358 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 359 360 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL 361 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, 362 unsigned long address, pte_t *ptep, 363 int full) 364 { 365 pte_t pte; 366 pte = ptep_get_and_clear(mm, address, ptep); 367 return pte; 368 } 369 #endif 370 371 372 /* 373 * If two threads concurrently fault at the same page, the thread that 374 * won the race updates the PTE and its local TLB/Cache. The other thread 375 * gives up, simply does nothing, and continues; on architectures where 376 * software can update TLB, local TLB can be updated here to avoid next page 377 * fault. This function updates TLB only, do nothing with cache or others. 378 * It is the difference with function update_mmu_cache. 379 */ 380 #ifndef __HAVE_ARCH_UPDATE_MMU_TLB 381 static inline void update_mmu_tlb(struct vm_area_struct *vma, 382 unsigned long address, pte_t *ptep) 383 { 384 } 385 #define __HAVE_ARCH_UPDATE_MMU_TLB 386 #endif 387 388 /* 389 * Some architectures may be able to avoid expensive synchronization 390 * primitives when modifications are made to PTE's which are already 391 * not present, or in the process of an address space destruction. 392 */ 393 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL 394 static inline void pte_clear_not_present_full(struct mm_struct *mm, 395 unsigned long address, 396 pte_t *ptep, 397 int full) 398 { 399 pte_clear(mm, address, ptep); 400 } 401 #endif 402 403 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH 404 extern pte_t ptep_clear_flush(struct vm_area_struct *vma, 405 unsigned long address, 406 pte_t *ptep); 407 #endif 408 409 #ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH 410 extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma, 411 unsigned long address, 412 pmd_t *pmdp); 413 extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma, 414 unsigned long address, 415 pud_t *pudp); 416 #endif 417 418 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT 419 struct mm_struct; 420 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep) 421 { 422 pte_t old_pte = *ptep; 423 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte)); 424 } 425 #endif 426 427 /* 428 * On some architectures hardware does not set page access bit when accessing 429 * memory page, it is responsibility of software setting this bit. It brings 430 * out extra page fault penalty to track page access bit. For optimization page 431 * access bit can be set during all page fault flow on these arches. 432 * To be differentiate with macro pte_mkyoung, this macro is used on platforms 433 * where software maintains page access bit. 434 */ 435 #ifndef pte_sw_mkyoung 436 static inline pte_t pte_sw_mkyoung(pte_t pte) 437 { 438 return pte; 439 } 440 #define pte_sw_mkyoung pte_sw_mkyoung 441 #endif 442 443 #ifndef pte_savedwrite 444 #define pte_savedwrite pte_write 445 #endif 446 447 #ifndef pte_mk_savedwrite 448 #define pte_mk_savedwrite pte_mkwrite 449 #endif 450 451 #ifndef pte_clear_savedwrite 452 #define pte_clear_savedwrite pte_wrprotect 453 #endif 454 455 #ifndef pmd_savedwrite 456 #define pmd_savedwrite pmd_write 457 #endif 458 459 #ifndef pmd_mk_savedwrite 460 #define pmd_mk_savedwrite pmd_mkwrite 461 #endif 462 463 #ifndef pmd_clear_savedwrite 464 #define pmd_clear_savedwrite pmd_wrprotect 465 #endif 466 467 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT 468 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 469 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 470 unsigned long address, pmd_t *pmdp) 471 { 472 pmd_t old_pmd = *pmdp; 473 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd)); 474 } 475 #else 476 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 477 unsigned long address, pmd_t *pmdp) 478 { 479 BUILD_BUG(); 480 } 481 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 482 #endif 483 #ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT 484 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 485 static inline void pudp_set_wrprotect(struct mm_struct *mm, 486 unsigned long address, pud_t *pudp) 487 { 488 pud_t old_pud = *pudp; 489 490 set_pud_at(mm, address, pudp, pud_wrprotect(old_pud)); 491 } 492 #else 493 static inline void pudp_set_wrprotect(struct mm_struct *mm, 494 unsigned long address, pud_t *pudp) 495 { 496 BUILD_BUG(); 497 } 498 #endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */ 499 #endif 500 501 #ifndef pmdp_collapse_flush 502 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 503 extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, 504 unsigned long address, pmd_t *pmdp); 505 #else 506 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, 507 unsigned long address, 508 pmd_t *pmdp) 509 { 510 BUILD_BUG(); 511 return *pmdp; 512 } 513 #define pmdp_collapse_flush pmdp_collapse_flush 514 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 515 #endif 516 517 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT 518 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp, 519 pgtable_t pgtable); 520 #endif 521 522 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW 523 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp); 524 #endif 525 526 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 527 /* 528 * This is an implementation of pmdp_establish() that is only suitable for an 529 * architecture that doesn't have hardware dirty/accessed bits. In this case we 530 * can't race with CPU which sets these bits and non-atomic approach is fine. 531 */ 532 static inline pmd_t generic_pmdp_establish(struct vm_area_struct *vma, 533 unsigned long address, pmd_t *pmdp, pmd_t pmd) 534 { 535 pmd_t old_pmd = *pmdp; 536 set_pmd_at(vma->vm_mm, address, pmdp, pmd); 537 return old_pmd; 538 } 539 #endif 540 541 #ifndef __HAVE_ARCH_PMDP_INVALIDATE 542 extern pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address, 543 pmd_t *pmdp); 544 #endif 545 546 #ifndef __HAVE_ARCH_PTE_SAME 547 static inline int pte_same(pte_t pte_a, pte_t pte_b) 548 { 549 return pte_val(pte_a) == pte_val(pte_b); 550 } 551 #endif 552 553 #ifndef __HAVE_ARCH_PTE_UNUSED 554 /* 555 * Some architectures provide facilities to virtualization guests 556 * so that they can flag allocated pages as unused. This allows the 557 * host to transparently reclaim unused pages. This function returns 558 * whether the pte's page is unused. 559 */ 560 static inline int pte_unused(pte_t pte) 561 { 562 return 0; 563 } 564 #endif 565 566 #ifndef pte_access_permitted 567 #define pte_access_permitted(pte, write) \ 568 (pte_present(pte) && (!(write) || pte_write(pte))) 569 #endif 570 571 #ifndef pmd_access_permitted 572 #define pmd_access_permitted(pmd, write) \ 573 (pmd_present(pmd) && (!(write) || pmd_write(pmd))) 574 #endif 575 576 #ifndef pud_access_permitted 577 #define pud_access_permitted(pud, write) \ 578 (pud_present(pud) && (!(write) || pud_write(pud))) 579 #endif 580 581 #ifndef p4d_access_permitted 582 #define p4d_access_permitted(p4d, write) \ 583 (p4d_present(p4d) && (!(write) || p4d_write(p4d))) 584 #endif 585 586 #ifndef pgd_access_permitted 587 #define pgd_access_permitted(pgd, write) \ 588 (pgd_present(pgd) && (!(write) || pgd_write(pgd))) 589 #endif 590 591 #ifndef __HAVE_ARCH_PMD_SAME 592 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b) 593 { 594 return pmd_val(pmd_a) == pmd_val(pmd_b); 595 } 596 597 static inline int pud_same(pud_t pud_a, pud_t pud_b) 598 { 599 return pud_val(pud_a) == pud_val(pud_b); 600 } 601 #endif 602 603 #ifndef __HAVE_ARCH_P4D_SAME 604 static inline int p4d_same(p4d_t p4d_a, p4d_t p4d_b) 605 { 606 return p4d_val(p4d_a) == p4d_val(p4d_b); 607 } 608 #endif 609 610 #ifndef __HAVE_ARCH_PGD_SAME 611 static inline int pgd_same(pgd_t pgd_a, pgd_t pgd_b) 612 { 613 return pgd_val(pgd_a) == pgd_val(pgd_b); 614 } 615 #endif 616 617 /* 618 * Use set_p*_safe(), and elide TLB flushing, when confident that *no* 619 * TLB flush will be required as a result of the "set". For example, use 620 * in scenarios where it is known ahead of time that the routine is 621 * setting non-present entries, or re-setting an existing entry to the 622 * same value. Otherwise, use the typical "set" helpers and flush the 623 * TLB. 624 */ 625 #define set_pte_safe(ptep, pte) \ 626 ({ \ 627 WARN_ON_ONCE(pte_present(*ptep) && !pte_same(*ptep, pte)); \ 628 set_pte(ptep, pte); \ 629 }) 630 631 #define set_pmd_safe(pmdp, pmd) \ 632 ({ \ 633 WARN_ON_ONCE(pmd_present(*pmdp) && !pmd_same(*pmdp, pmd)); \ 634 set_pmd(pmdp, pmd); \ 635 }) 636 637 #define set_pud_safe(pudp, pud) \ 638 ({ \ 639 WARN_ON_ONCE(pud_present(*pudp) && !pud_same(*pudp, pud)); \ 640 set_pud(pudp, pud); \ 641 }) 642 643 #define set_p4d_safe(p4dp, p4d) \ 644 ({ \ 645 WARN_ON_ONCE(p4d_present(*p4dp) && !p4d_same(*p4dp, p4d)); \ 646 set_p4d(p4dp, p4d); \ 647 }) 648 649 #define set_pgd_safe(pgdp, pgd) \ 650 ({ \ 651 WARN_ON_ONCE(pgd_present(*pgdp) && !pgd_same(*pgdp, pgd)); \ 652 set_pgd(pgdp, pgd); \ 653 }) 654 655 #ifndef __HAVE_ARCH_DO_SWAP_PAGE 656 /* 657 * Some architectures support metadata associated with a page. When a 658 * page is being swapped out, this metadata must be saved so it can be 659 * restored when the page is swapped back in. SPARC M7 and newer 660 * processors support an ADI (Application Data Integrity) tag for the 661 * page as metadata for the page. arch_do_swap_page() can restore this 662 * metadata when a page is swapped back in. 663 */ 664 static inline void arch_do_swap_page(struct mm_struct *mm, 665 struct vm_area_struct *vma, 666 unsigned long addr, 667 pte_t pte, pte_t oldpte) 668 { 669 670 } 671 #endif 672 673 #ifndef __HAVE_ARCH_UNMAP_ONE 674 /* 675 * Some architectures support metadata associated with a page. When a 676 * page is being swapped out, this metadata must be saved so it can be 677 * restored when the page is swapped back in. SPARC M7 and newer 678 * processors support an ADI (Application Data Integrity) tag for the 679 * page as metadata for the page. arch_unmap_one() can save this 680 * metadata on a swap-out of a page. 681 */ 682 static inline int arch_unmap_one(struct mm_struct *mm, 683 struct vm_area_struct *vma, 684 unsigned long addr, 685 pte_t orig_pte) 686 { 687 return 0; 688 } 689 #endif 690 691 /* 692 * Allow architectures to preserve additional metadata associated with 693 * swapped-out pages. The corresponding __HAVE_ARCH_SWAP_* macros and function 694 * prototypes must be defined in the arch-specific asm/pgtable.h file. 695 */ 696 #ifndef __HAVE_ARCH_PREPARE_TO_SWAP 697 static inline int arch_prepare_to_swap(struct page *page) 698 { 699 return 0; 700 } 701 #endif 702 703 #ifndef __HAVE_ARCH_SWAP_INVALIDATE 704 static inline void arch_swap_invalidate_page(int type, pgoff_t offset) 705 { 706 } 707 708 static inline void arch_swap_invalidate_area(int type) 709 { 710 } 711 #endif 712 713 #ifndef __HAVE_ARCH_SWAP_RESTORE 714 static inline void arch_swap_restore(swp_entry_t entry, struct page *page) 715 { 716 } 717 #endif 718 719 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE 720 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr) 721 #endif 722 723 #ifndef __HAVE_ARCH_MOVE_PTE 724 #define move_pte(pte, prot, old_addr, new_addr) (pte) 725 #endif 726 727 #ifndef pte_accessible 728 # define pte_accessible(mm, pte) ((void)(pte), 1) 729 #endif 730 731 #ifndef flush_tlb_fix_spurious_fault 732 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address) 733 #endif 734 735 /* 736 * When walking page tables, get the address of the next boundary, 737 * or the end address of the range if that comes earlier. Although no 738 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout. 739 */ 740 741 #define pgd_addr_end(addr, end) \ 742 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \ 743 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 744 }) 745 746 #ifndef p4d_addr_end 747 #define p4d_addr_end(addr, end) \ 748 ({ unsigned long __boundary = ((addr) + P4D_SIZE) & P4D_MASK; \ 749 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 750 }) 751 #endif 752 753 #ifndef pud_addr_end 754 #define pud_addr_end(addr, end) \ 755 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \ 756 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 757 }) 758 #endif 759 760 #ifndef pmd_addr_end 761 #define pmd_addr_end(addr, end) \ 762 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \ 763 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 764 }) 765 #endif 766 767 /* 768 * When walking page tables, we usually want to skip any p?d_none entries; 769 * and any p?d_bad entries - reporting the error before resetting to none. 770 * Do the tests inline, but report and clear the bad entry in mm/memory.c. 771 */ 772 void pgd_clear_bad(pgd_t *); 773 774 #ifndef __PAGETABLE_P4D_FOLDED 775 void p4d_clear_bad(p4d_t *); 776 #else 777 #define p4d_clear_bad(p4d) do { } while (0) 778 #endif 779 780 #ifndef __PAGETABLE_PUD_FOLDED 781 void pud_clear_bad(pud_t *); 782 #else 783 #define pud_clear_bad(p4d) do { } while (0) 784 #endif 785 786 void pmd_clear_bad(pmd_t *); 787 788 static inline int pgd_none_or_clear_bad(pgd_t *pgd) 789 { 790 if (pgd_none(*pgd)) 791 return 1; 792 if (unlikely(pgd_bad(*pgd))) { 793 pgd_clear_bad(pgd); 794 return 1; 795 } 796 return 0; 797 } 798 799 static inline int p4d_none_or_clear_bad(p4d_t *p4d) 800 { 801 if (p4d_none(*p4d)) 802 return 1; 803 if (unlikely(p4d_bad(*p4d))) { 804 p4d_clear_bad(p4d); 805 return 1; 806 } 807 return 0; 808 } 809 810 static inline int pud_none_or_clear_bad(pud_t *pud) 811 { 812 if (pud_none(*pud)) 813 return 1; 814 if (unlikely(pud_bad(*pud))) { 815 pud_clear_bad(pud); 816 return 1; 817 } 818 return 0; 819 } 820 821 static inline int pmd_none_or_clear_bad(pmd_t *pmd) 822 { 823 if (pmd_none(*pmd)) 824 return 1; 825 if (unlikely(pmd_bad(*pmd))) { 826 pmd_clear_bad(pmd); 827 return 1; 828 } 829 return 0; 830 } 831 832 static inline pte_t __ptep_modify_prot_start(struct vm_area_struct *vma, 833 unsigned long addr, 834 pte_t *ptep) 835 { 836 /* 837 * Get the current pte state, but zero it out to make it 838 * non-present, preventing the hardware from asynchronously 839 * updating it. 840 */ 841 return ptep_get_and_clear(vma->vm_mm, addr, ptep); 842 } 843 844 static inline void __ptep_modify_prot_commit(struct vm_area_struct *vma, 845 unsigned long addr, 846 pte_t *ptep, pte_t pte) 847 { 848 /* 849 * The pte is non-present, so there's no hardware state to 850 * preserve. 851 */ 852 set_pte_at(vma->vm_mm, addr, ptep, pte); 853 } 854 855 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION 856 /* 857 * Start a pte protection read-modify-write transaction, which 858 * protects against asynchronous hardware modifications to the pte. 859 * The intention is not to prevent the hardware from making pte 860 * updates, but to prevent any updates it may make from being lost. 861 * 862 * This does not protect against other software modifications of the 863 * pte; the appropriate pte lock must be held over the transaction. 864 * 865 * Note that this interface is intended to be batchable, meaning that 866 * ptep_modify_prot_commit may not actually update the pte, but merely 867 * queue the update to be done at some later time. The update must be 868 * actually committed before the pte lock is released, however. 869 */ 870 static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma, 871 unsigned long addr, 872 pte_t *ptep) 873 { 874 return __ptep_modify_prot_start(vma, addr, ptep); 875 } 876 877 /* 878 * Commit an update to a pte, leaving any hardware-controlled bits in 879 * the PTE unmodified. 880 */ 881 static inline void ptep_modify_prot_commit(struct vm_area_struct *vma, 882 unsigned long addr, 883 pte_t *ptep, pte_t old_pte, pte_t pte) 884 { 885 __ptep_modify_prot_commit(vma, addr, ptep, pte); 886 } 887 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */ 888 #endif /* CONFIG_MMU */ 889 890 /* 891 * No-op macros that just return the current protection value. Defined here 892 * because these macros can be used even if CONFIG_MMU is not defined. 893 */ 894 895 #ifndef pgprot_nx 896 #define pgprot_nx(prot) (prot) 897 #endif 898 899 #ifndef pgprot_noncached 900 #define pgprot_noncached(prot) (prot) 901 #endif 902 903 #ifndef pgprot_writecombine 904 #define pgprot_writecombine pgprot_noncached 905 #endif 906 907 #ifndef pgprot_writethrough 908 #define pgprot_writethrough pgprot_noncached 909 #endif 910 911 #ifndef pgprot_device 912 #define pgprot_device pgprot_noncached 913 #endif 914 915 #ifndef pgprot_mhp 916 #define pgprot_mhp(prot) (prot) 917 #endif 918 919 #ifdef CONFIG_MMU 920 #ifndef pgprot_modify 921 #define pgprot_modify pgprot_modify 922 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) 923 { 924 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot))) 925 newprot = pgprot_noncached(newprot); 926 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot))) 927 newprot = pgprot_writecombine(newprot); 928 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot))) 929 newprot = pgprot_device(newprot); 930 return newprot; 931 } 932 #endif 933 #endif /* CONFIG_MMU */ 934 935 #ifndef pgprot_encrypted 936 #define pgprot_encrypted(prot) (prot) 937 #endif 938 939 #ifndef pgprot_decrypted 940 #define pgprot_decrypted(prot) (prot) 941 #endif 942 943 /* 944 * A facility to provide lazy MMU batching. This allows PTE updates and 945 * page invalidations to be delayed until a call to leave lazy MMU mode 946 * is issued. Some architectures may benefit from doing this, and it is 947 * beneficial for both shadow and direct mode hypervisors, which may batch 948 * the PTE updates which happen during this window. Note that using this 949 * interface requires that read hazards be removed from the code. A read 950 * hazard could result in the direct mode hypervisor case, since the actual 951 * write to the page tables may not yet have taken place, so reads though 952 * a raw PTE pointer after it has been modified are not guaranteed to be 953 * up to date. This mode can only be entered and left under the protection of 954 * the page table locks for all page tables which may be modified. In the UP 955 * case, this is required so that preemption is disabled, and in the SMP case, 956 * it must synchronize the delayed page table writes properly on other CPUs. 957 */ 958 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE 959 #define arch_enter_lazy_mmu_mode() do {} while (0) 960 #define arch_leave_lazy_mmu_mode() do {} while (0) 961 #define arch_flush_lazy_mmu_mode() do {} while (0) 962 #endif 963 964 /* 965 * A facility to provide batching of the reload of page tables and 966 * other process state with the actual context switch code for 967 * paravirtualized guests. By convention, only one of the batched 968 * update (lazy) modes (CPU, MMU) should be active at any given time, 969 * entry should never be nested, and entry and exits should always be 970 * paired. This is for sanity of maintaining and reasoning about the 971 * kernel code. In this case, the exit (end of the context switch) is 972 * in architecture-specific code, and so doesn't need a generic 973 * definition. 974 */ 975 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH 976 #define arch_start_context_switch(prev) do {} while (0) 977 #endif 978 979 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 980 #ifndef CONFIG_ARCH_ENABLE_THP_MIGRATION 981 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 982 { 983 return pmd; 984 } 985 986 static inline int pmd_swp_soft_dirty(pmd_t pmd) 987 { 988 return 0; 989 } 990 991 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 992 { 993 return pmd; 994 } 995 #endif 996 #else /* !CONFIG_HAVE_ARCH_SOFT_DIRTY */ 997 static inline int pte_soft_dirty(pte_t pte) 998 { 999 return 0; 1000 } 1001 1002 static inline int pmd_soft_dirty(pmd_t pmd) 1003 { 1004 return 0; 1005 } 1006 1007 static inline pte_t pte_mksoft_dirty(pte_t pte) 1008 { 1009 return pte; 1010 } 1011 1012 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) 1013 { 1014 return pmd; 1015 } 1016 1017 static inline pte_t pte_clear_soft_dirty(pte_t pte) 1018 { 1019 return pte; 1020 } 1021 1022 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) 1023 { 1024 return pmd; 1025 } 1026 1027 static inline pte_t pte_swp_mksoft_dirty(pte_t pte) 1028 { 1029 return pte; 1030 } 1031 1032 static inline int pte_swp_soft_dirty(pte_t pte) 1033 { 1034 return 0; 1035 } 1036 1037 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) 1038 { 1039 return pte; 1040 } 1041 1042 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 1043 { 1044 return pmd; 1045 } 1046 1047 static inline int pmd_swp_soft_dirty(pmd_t pmd) 1048 { 1049 return 0; 1050 } 1051 1052 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 1053 { 1054 return pmd; 1055 } 1056 #endif 1057 1058 #ifndef __HAVE_PFNMAP_TRACKING 1059 /* 1060 * Interfaces that can be used by architecture code to keep track of 1061 * memory type of pfn mappings specified by the remap_pfn_range, 1062 * vmf_insert_pfn. 1063 */ 1064 1065 /* 1066 * track_pfn_remap is called when a _new_ pfn mapping is being established 1067 * by remap_pfn_range() for physical range indicated by pfn and size. 1068 */ 1069 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot, 1070 unsigned long pfn, unsigned long addr, 1071 unsigned long size) 1072 { 1073 return 0; 1074 } 1075 1076 /* 1077 * track_pfn_insert is called when a _new_ single pfn is established 1078 * by vmf_insert_pfn(). 1079 */ 1080 static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, 1081 pfn_t pfn) 1082 { 1083 } 1084 1085 /* 1086 * track_pfn_copy is called when vma that is covering the pfnmap gets 1087 * copied through copy_page_range(). 1088 */ 1089 static inline int track_pfn_copy(struct vm_area_struct *vma) 1090 { 1091 return 0; 1092 } 1093 1094 /* 1095 * untrack_pfn is called while unmapping a pfnmap for a region. 1096 * untrack can be called for a specific region indicated by pfn and size or 1097 * can be for the entire vma (in which case pfn, size are zero). 1098 */ 1099 static inline void untrack_pfn(struct vm_area_struct *vma, 1100 unsigned long pfn, unsigned long size) 1101 { 1102 } 1103 1104 /* 1105 * untrack_pfn_moved is called while mremapping a pfnmap for a new region. 1106 */ 1107 static inline void untrack_pfn_moved(struct vm_area_struct *vma) 1108 { 1109 } 1110 #else 1111 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot, 1112 unsigned long pfn, unsigned long addr, 1113 unsigned long size); 1114 extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, 1115 pfn_t pfn); 1116 extern int track_pfn_copy(struct vm_area_struct *vma); 1117 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn, 1118 unsigned long size); 1119 extern void untrack_pfn_moved(struct vm_area_struct *vma); 1120 #endif 1121 1122 #ifdef CONFIG_MMU 1123 #ifdef __HAVE_COLOR_ZERO_PAGE 1124 static inline int is_zero_pfn(unsigned long pfn) 1125 { 1126 extern unsigned long zero_pfn; 1127 unsigned long offset_from_zero_pfn = pfn - zero_pfn; 1128 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT); 1129 } 1130 1131 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr)) 1132 1133 #else 1134 static inline int is_zero_pfn(unsigned long pfn) 1135 { 1136 extern unsigned long zero_pfn; 1137 return pfn == zero_pfn; 1138 } 1139 1140 static inline unsigned long my_zero_pfn(unsigned long addr) 1141 { 1142 extern unsigned long zero_pfn; 1143 return zero_pfn; 1144 } 1145 #endif 1146 #else 1147 static inline int is_zero_pfn(unsigned long pfn) 1148 { 1149 return 0; 1150 } 1151 1152 static inline unsigned long my_zero_pfn(unsigned long addr) 1153 { 1154 return 0; 1155 } 1156 #endif /* CONFIG_MMU */ 1157 1158 #ifdef CONFIG_MMU 1159 1160 #ifndef CONFIG_TRANSPARENT_HUGEPAGE 1161 static inline int pmd_trans_huge(pmd_t pmd) 1162 { 1163 return 0; 1164 } 1165 #ifndef pmd_write 1166 static inline int pmd_write(pmd_t pmd) 1167 { 1168 BUG(); 1169 return 0; 1170 } 1171 #endif /* pmd_write */ 1172 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 1173 1174 #ifndef pud_write 1175 static inline int pud_write(pud_t pud) 1176 { 1177 BUG(); 1178 return 0; 1179 } 1180 #endif /* pud_write */ 1181 1182 #if !defined(CONFIG_ARCH_HAS_PTE_DEVMAP) || !defined(CONFIG_TRANSPARENT_HUGEPAGE) 1183 static inline int pmd_devmap(pmd_t pmd) 1184 { 1185 return 0; 1186 } 1187 static inline int pud_devmap(pud_t pud) 1188 { 1189 return 0; 1190 } 1191 static inline int pgd_devmap(pgd_t pgd) 1192 { 1193 return 0; 1194 } 1195 #endif 1196 1197 #if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \ 1198 (defined(CONFIG_TRANSPARENT_HUGEPAGE) && \ 1199 !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD)) 1200 static inline int pud_trans_huge(pud_t pud) 1201 { 1202 return 0; 1203 } 1204 #endif 1205 1206 /* See pmd_none_or_trans_huge_or_clear_bad for discussion. */ 1207 static inline int pud_none_or_trans_huge_or_dev_or_clear_bad(pud_t *pud) 1208 { 1209 pud_t pudval = READ_ONCE(*pud); 1210 1211 if (pud_none(pudval) || pud_trans_huge(pudval) || pud_devmap(pudval)) 1212 return 1; 1213 if (unlikely(pud_bad(pudval))) { 1214 pud_clear_bad(pud); 1215 return 1; 1216 } 1217 return 0; 1218 } 1219 1220 /* See pmd_trans_unstable for discussion. */ 1221 static inline int pud_trans_unstable(pud_t *pud) 1222 { 1223 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && \ 1224 defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD) 1225 return pud_none_or_trans_huge_or_dev_or_clear_bad(pud); 1226 #else 1227 return 0; 1228 #endif 1229 } 1230 1231 #ifndef pmd_read_atomic 1232 static inline pmd_t pmd_read_atomic(pmd_t *pmdp) 1233 { 1234 /* 1235 * Depend on compiler for an atomic pmd read. NOTE: this is 1236 * only going to work, if the pmdval_t isn't larger than 1237 * an unsigned long. 1238 */ 1239 return *pmdp; 1240 } 1241 #endif 1242 1243 #ifndef arch_needs_pgtable_deposit 1244 #define arch_needs_pgtable_deposit() (false) 1245 #endif 1246 /* 1247 * This function is meant to be used by sites walking pagetables with 1248 * the mmap_lock held in read mode to protect against MADV_DONTNEED and 1249 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd 1250 * into a null pmd and the transhuge page fault can convert a null pmd 1251 * into an hugepmd or into a regular pmd (if the hugepage allocation 1252 * fails). While holding the mmap_lock in read mode the pmd becomes 1253 * stable and stops changing under us only if it's not null and not a 1254 * transhuge pmd. When those races occurs and this function makes a 1255 * difference vs the standard pmd_none_or_clear_bad, the result is 1256 * undefined so behaving like if the pmd was none is safe (because it 1257 * can return none anyway). The compiler level barrier() is critically 1258 * important to compute the two checks atomically on the same pmdval. 1259 * 1260 * For 32bit kernels with a 64bit large pmd_t this automatically takes 1261 * care of reading the pmd atomically to avoid SMP race conditions 1262 * against pmd_populate() when the mmap_lock is hold for reading by the 1263 * caller (a special atomic read not done by "gcc" as in the generic 1264 * version above, is also needed when THP is disabled because the page 1265 * fault can populate the pmd from under us). 1266 */ 1267 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd) 1268 { 1269 pmd_t pmdval = pmd_read_atomic(pmd); 1270 /* 1271 * The barrier will stabilize the pmdval in a register or on 1272 * the stack so that it will stop changing under the code. 1273 * 1274 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE, 1275 * pmd_read_atomic is allowed to return a not atomic pmdval 1276 * (for example pointing to an hugepage that has never been 1277 * mapped in the pmd). The below checks will only care about 1278 * the low part of the pmd with 32bit PAE x86 anyway, with the 1279 * exception of pmd_none(). So the important thing is that if 1280 * the low part of the pmd is found null, the high part will 1281 * be also null or the pmd_none() check below would be 1282 * confused. 1283 */ 1284 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 1285 barrier(); 1286 #endif 1287 /* 1288 * !pmd_present() checks for pmd migration entries 1289 * 1290 * The complete check uses is_pmd_migration_entry() in linux/swapops.h 1291 * But using that requires moving current function and pmd_trans_unstable() 1292 * to linux/swapops.h to resolve dependency, which is too much code move. 1293 * 1294 * !pmd_present() is equivalent to is_pmd_migration_entry() currently, 1295 * because !pmd_present() pages can only be under migration not swapped 1296 * out. 1297 * 1298 * pmd_none() is preserved for future condition checks on pmd migration 1299 * entries and not confusing with this function name, although it is 1300 * redundant with !pmd_present(). 1301 */ 1302 if (pmd_none(pmdval) || pmd_trans_huge(pmdval) || 1303 (IS_ENABLED(CONFIG_ARCH_ENABLE_THP_MIGRATION) && !pmd_present(pmdval))) 1304 return 1; 1305 if (unlikely(pmd_bad(pmdval))) { 1306 pmd_clear_bad(pmd); 1307 return 1; 1308 } 1309 return 0; 1310 } 1311 1312 /* 1313 * This is a noop if Transparent Hugepage Support is not built into 1314 * the kernel. Otherwise it is equivalent to 1315 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in 1316 * places that already verified the pmd is not none and they want to 1317 * walk ptes while holding the mmap sem in read mode (write mode don't 1318 * need this). If THP is not enabled, the pmd can't go away under the 1319 * code even if MADV_DONTNEED runs, but if THP is enabled we need to 1320 * run a pmd_trans_unstable before walking the ptes after 1321 * split_huge_pmd returns (because it may have run when the pmd become 1322 * null, but then a page fault can map in a THP and not a regular page). 1323 */ 1324 static inline int pmd_trans_unstable(pmd_t *pmd) 1325 { 1326 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 1327 return pmd_none_or_trans_huge_or_clear_bad(pmd); 1328 #else 1329 return 0; 1330 #endif 1331 } 1332 1333 /* 1334 * the ordering of these checks is important for pmds with _page_devmap set. 1335 * if we check pmd_trans_unstable() first we will trip the bad_pmd() check 1336 * inside of pmd_none_or_trans_huge_or_clear_bad(). this will end up correctly 1337 * returning 1 but not before it spams dmesg with the pmd_clear_bad() output. 1338 */ 1339 static inline int pmd_devmap_trans_unstable(pmd_t *pmd) 1340 { 1341 return pmd_devmap(*pmd) || pmd_trans_unstable(pmd); 1342 } 1343 1344 #ifndef CONFIG_NUMA_BALANCING 1345 /* 1346 * Technically a PTE can be PROTNONE even when not doing NUMA balancing but 1347 * the only case the kernel cares is for NUMA balancing and is only ever set 1348 * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked 1349 * _PAGE_PROTNONE so by default, implement the helper as "always no". It 1350 * is the responsibility of the caller to distinguish between PROT_NONE 1351 * protections and NUMA hinting fault protections. 1352 */ 1353 static inline int pte_protnone(pte_t pte) 1354 { 1355 return 0; 1356 } 1357 1358 static inline int pmd_protnone(pmd_t pmd) 1359 { 1360 return 0; 1361 } 1362 #endif /* CONFIG_NUMA_BALANCING */ 1363 1364 #endif /* CONFIG_MMU */ 1365 1366 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP 1367 1368 #ifndef __PAGETABLE_P4D_FOLDED 1369 int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot); 1370 int p4d_clear_huge(p4d_t *p4d); 1371 #else 1372 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot) 1373 { 1374 return 0; 1375 } 1376 static inline int p4d_clear_huge(p4d_t *p4d) 1377 { 1378 return 0; 1379 } 1380 #endif /* !__PAGETABLE_P4D_FOLDED */ 1381 1382 int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot); 1383 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot); 1384 int pud_clear_huge(pud_t *pud); 1385 int pmd_clear_huge(pmd_t *pmd); 1386 int p4d_free_pud_page(p4d_t *p4d, unsigned long addr); 1387 int pud_free_pmd_page(pud_t *pud, unsigned long addr); 1388 int pmd_free_pte_page(pmd_t *pmd, unsigned long addr); 1389 #else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */ 1390 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot) 1391 { 1392 return 0; 1393 } 1394 static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot) 1395 { 1396 return 0; 1397 } 1398 static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot) 1399 { 1400 return 0; 1401 } 1402 static inline int p4d_clear_huge(p4d_t *p4d) 1403 { 1404 return 0; 1405 } 1406 static inline int pud_clear_huge(pud_t *pud) 1407 { 1408 return 0; 1409 } 1410 static inline int pmd_clear_huge(pmd_t *pmd) 1411 { 1412 return 0; 1413 } 1414 static inline int p4d_free_pud_page(p4d_t *p4d, unsigned long addr) 1415 { 1416 return 0; 1417 } 1418 static inline int pud_free_pmd_page(pud_t *pud, unsigned long addr) 1419 { 1420 return 0; 1421 } 1422 static inline int pmd_free_pte_page(pmd_t *pmd, unsigned long addr) 1423 { 1424 return 0; 1425 } 1426 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */ 1427 1428 #ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE 1429 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 1430 /* 1431 * ARCHes with special requirements for evicting THP backing TLB entries can 1432 * implement this. Otherwise also, it can help optimize normal TLB flush in 1433 * THP regime. Stock flush_tlb_range() typically has optimization to nuke the 1434 * entire TLB if flush span is greater than a threshold, which will 1435 * likely be true for a single huge page. Thus a single THP flush will 1436 * invalidate the entire TLB which is not desirable. 1437 * e.g. see arch/arc: flush_pmd_tlb_range 1438 */ 1439 #define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end) 1440 #define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end) 1441 #else 1442 #define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG() 1443 #define flush_pud_tlb_range(vma, addr, end) BUILD_BUG() 1444 #endif 1445 #endif 1446 1447 struct file; 1448 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, 1449 unsigned long size, pgprot_t *vma_prot); 1450 1451 #ifndef CONFIG_X86_ESPFIX64 1452 static inline void init_espfix_bsp(void) { } 1453 #endif 1454 1455 extern void __init pgtable_cache_init(void); 1456 1457 #ifndef __HAVE_ARCH_PFN_MODIFY_ALLOWED 1458 static inline bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot) 1459 { 1460 return true; 1461 } 1462 1463 static inline bool arch_has_pfn_modify_check(void) 1464 { 1465 return false; 1466 } 1467 #endif /* !_HAVE_ARCH_PFN_MODIFY_ALLOWED */ 1468 1469 /* 1470 * Architecture PAGE_KERNEL_* fallbacks 1471 * 1472 * Some architectures don't define certain PAGE_KERNEL_* flags. This is either 1473 * because they really don't support them, or the port needs to be updated to 1474 * reflect the required functionality. Below are a set of relatively safe 1475 * fallbacks, as best effort, which we can count on in lieu of the architectures 1476 * not defining them on their own yet. 1477 */ 1478 1479 #ifndef PAGE_KERNEL_RO 1480 # define PAGE_KERNEL_RO PAGE_KERNEL 1481 #endif 1482 1483 #ifndef PAGE_KERNEL_EXEC 1484 # define PAGE_KERNEL_EXEC PAGE_KERNEL 1485 #endif 1486 1487 /* 1488 * Page Table Modification bits for pgtbl_mod_mask. 1489 * 1490 * These are used by the p?d_alloc_track*() set of functions an in the generic 1491 * vmalloc/ioremap code to track at which page-table levels entries have been 1492 * modified. Based on that the code can better decide when vmalloc and ioremap 1493 * mapping changes need to be synchronized to other page-tables in the system. 1494 */ 1495 #define __PGTBL_PGD_MODIFIED 0 1496 #define __PGTBL_P4D_MODIFIED 1 1497 #define __PGTBL_PUD_MODIFIED 2 1498 #define __PGTBL_PMD_MODIFIED 3 1499 #define __PGTBL_PTE_MODIFIED 4 1500 1501 #define PGTBL_PGD_MODIFIED BIT(__PGTBL_PGD_MODIFIED) 1502 #define PGTBL_P4D_MODIFIED BIT(__PGTBL_P4D_MODIFIED) 1503 #define PGTBL_PUD_MODIFIED BIT(__PGTBL_PUD_MODIFIED) 1504 #define PGTBL_PMD_MODIFIED BIT(__PGTBL_PMD_MODIFIED) 1505 #define PGTBL_PTE_MODIFIED BIT(__PGTBL_PTE_MODIFIED) 1506 1507 /* Page-Table Modification Mask */ 1508 typedef unsigned int pgtbl_mod_mask; 1509 1510 #endif /* !__ASSEMBLY__ */ 1511 1512 #if !defined(MAX_POSSIBLE_PHYSMEM_BITS) && !defined(CONFIG_64BIT) 1513 #ifdef CONFIG_PHYS_ADDR_T_64BIT 1514 /* 1515 * ZSMALLOC needs to know the highest PFN on 32-bit architectures 1516 * with physical address space extension, but falls back to 1517 * BITS_PER_LONG otherwise. 1518 */ 1519 #error Missing MAX_POSSIBLE_PHYSMEM_BITS definition 1520 #else 1521 #define MAX_POSSIBLE_PHYSMEM_BITS 32 1522 #endif 1523 #endif 1524 1525 #ifndef has_transparent_hugepage 1526 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 1527 #define has_transparent_hugepage() 1 1528 #else 1529 #define has_transparent_hugepage() 0 1530 #endif 1531 #endif 1532 1533 /* 1534 * On some architectures it depends on the mm if the p4d/pud or pmd 1535 * layer of the page table hierarchy is folded or not. 1536 */ 1537 #ifndef mm_p4d_folded 1538 #define mm_p4d_folded(mm) __is_defined(__PAGETABLE_P4D_FOLDED) 1539 #endif 1540 1541 #ifndef mm_pud_folded 1542 #define mm_pud_folded(mm) __is_defined(__PAGETABLE_PUD_FOLDED) 1543 #endif 1544 1545 #ifndef mm_pmd_folded 1546 #define mm_pmd_folded(mm) __is_defined(__PAGETABLE_PMD_FOLDED) 1547 #endif 1548 1549 #ifndef p4d_offset_lockless 1550 #define p4d_offset_lockless(pgdp, pgd, address) p4d_offset(&(pgd), address) 1551 #endif 1552 #ifndef pud_offset_lockless 1553 #define pud_offset_lockless(p4dp, p4d, address) pud_offset(&(p4d), address) 1554 #endif 1555 #ifndef pmd_offset_lockless 1556 #define pmd_offset_lockless(pudp, pud, address) pmd_offset(&(pud), address) 1557 #endif 1558 1559 /* 1560 * p?d_leaf() - true if this entry is a final mapping to a physical address. 1561 * This differs from p?d_huge() by the fact that they are always available (if 1562 * the architecture supports large pages at the appropriate level) even 1563 * if CONFIG_HUGETLB_PAGE is not defined. 1564 * Only meaningful when called on a valid entry. 1565 */ 1566 #ifndef pgd_leaf 1567 #define pgd_leaf(x) 0 1568 #endif 1569 #ifndef p4d_leaf 1570 #define p4d_leaf(x) 0 1571 #endif 1572 #ifndef pud_leaf 1573 #define pud_leaf(x) 0 1574 #endif 1575 #ifndef pmd_leaf 1576 #define pmd_leaf(x) 0 1577 #endif 1578 1579 #ifndef pgd_leaf_size 1580 #define pgd_leaf_size(x) (1ULL << PGDIR_SHIFT) 1581 #endif 1582 #ifndef p4d_leaf_size 1583 #define p4d_leaf_size(x) P4D_SIZE 1584 #endif 1585 #ifndef pud_leaf_size 1586 #define pud_leaf_size(x) PUD_SIZE 1587 #endif 1588 #ifndef pmd_leaf_size 1589 #define pmd_leaf_size(x) PMD_SIZE 1590 #endif 1591 #ifndef pte_leaf_size 1592 #define pte_leaf_size(x) PAGE_SIZE 1593 #endif 1594 1595 #endif /* _LINUX_PGTABLE_H */ 1596