193e1821cSIwona Winiarska /* SPDX-License-Identifier: GPL-2.0-only */ 293e1821cSIwona Winiarska /* Copyright (c) 2021 Intel Corporation */ 393e1821cSIwona Winiarska 493e1821cSIwona Winiarska #ifndef __LINUX_PECI_CPU_H 593e1821cSIwona Winiarska #define __LINUX_PECI_CPU_H 693e1821cSIwona Winiarska 793e1821cSIwona Winiarska #include <linux/types.h> 893e1821cSIwona Winiarska 9*a43b9ec0STony Luck /* Copied from x86 <asm/processor.h> */ 10*a43b9ec0STony Luck #define X86_VENDOR_INTEL 0 11*a43b9ec0STony Luck 12*a43b9ec0STony Luck /* Copied from x86 <asm/cpu_device_id.h> */ 13*a43b9ec0STony Luck #define VFM_MODEL_BIT 0 14*a43b9ec0STony Luck #define VFM_FAMILY_BIT 8 15*a43b9ec0STony Luck #define VFM_VENDOR_BIT 16 16*a43b9ec0STony Luck #define VFM_RSVD_BIT 24 17*a43b9ec0STony Luck 18*a43b9ec0STony Luck #define VFM_MODEL_MASK GENMASK(VFM_FAMILY_BIT - 1, VFM_MODEL_BIT) 19*a43b9ec0STony Luck #define VFM_FAMILY_MASK GENMASK(VFM_VENDOR_BIT - 1, VFM_FAMILY_BIT) 20*a43b9ec0STony Luck #define VFM_VENDOR_MASK GENMASK(VFM_RSVD_BIT - 1, VFM_VENDOR_BIT) 21*a43b9ec0STony Luck 22*a43b9ec0STony Luck #define VFM_MODEL(vfm) (((vfm) & VFM_MODEL_MASK) >> VFM_MODEL_BIT) 23*a43b9ec0STony Luck #define VFM_FAMILY(vfm) (((vfm) & VFM_FAMILY_MASK) >> VFM_FAMILY_BIT) 24*a43b9ec0STony Luck #define VFM_VENDOR(vfm) (((vfm) & VFM_VENDOR_MASK) >> VFM_VENDOR_BIT) 25*a43b9ec0STony Luck 26*a43b9ec0STony Luck #define VFM_MAKE(_vendor, _family, _model) ( \ 27*a43b9ec0STony Luck ((_model) << VFM_MODEL_BIT) | \ 28*a43b9ec0STony Luck ((_family) << VFM_FAMILY_BIT) | \ 29*a43b9ec0STony Luck ((_vendor) << VFM_VENDOR_BIT) \ 30*a43b9ec0STony Luck ) 31*a43b9ec0STony Luck /* End of copied code */ 32*a43b9ec0STony Luck 3393e1821cSIwona Winiarska #include "../../arch/x86/include/asm/intel-family.h" 3493e1821cSIwona Winiarska 3593e1821cSIwona Winiarska #define PECI_PCS_PKG_ID 0 /* Package Identifier Read */ 3693e1821cSIwona Winiarska #define PECI_PKG_ID_CPU_ID 0x0000 /* CPUID Info */ 3793e1821cSIwona Winiarska #define PECI_PKG_ID_PLATFORM_ID 0x0001 /* Platform ID */ 3893e1821cSIwona Winiarska #define PECI_PKG_ID_DEVICE_ID 0x0002 /* Uncore Device ID */ 3993e1821cSIwona Winiarska #define PECI_PKG_ID_MAX_THREAD_ID 0x0003 /* Max Thread ID */ 4093e1821cSIwona Winiarska #define PECI_PKG_ID_MICROCODE_REV 0x0004 /* CPU Microcode Update Revision */ 4193e1821cSIwona Winiarska #define PECI_PKG_ID_MCA_ERROR_LOG 0x0005 /* Machine Check Status */ 4293e1821cSIwona Winiarska #define PECI_PCS_MODULE_TEMP 9 /* Per Core DTS Temperature Read */ 4393e1821cSIwona Winiarska #define PECI_PCS_THERMAL_MARGIN 10 /* DTS thermal margin */ 4493e1821cSIwona Winiarska #define PECI_PCS_DDR_DIMM_TEMP 14 /* DDR DIMM Temperature */ 4593e1821cSIwona Winiarska #define PECI_PCS_TEMP_TARGET 16 /* Temperature Target Read */ 4693e1821cSIwona Winiarska #define PECI_PCS_TDP_UNITS 30 /* Units for power/energy registers */ 4793e1821cSIwona Winiarska 4893e1821cSIwona Winiarska struct peci_device; 4993e1821cSIwona Winiarska 5093e1821cSIwona Winiarska int peci_temp_read(struct peci_device *device, s16 *temp_raw); 5193e1821cSIwona Winiarska 5293e1821cSIwona Winiarska int peci_pcs_read(struct peci_device *device, u8 index, 5393e1821cSIwona Winiarska u16 param, u32 *data); 5493e1821cSIwona Winiarska 5593e1821cSIwona Winiarska int peci_pci_local_read(struct peci_device *device, u8 bus, u8 dev, 5693e1821cSIwona Winiarska u8 func, u16 reg, u32 *data); 5793e1821cSIwona Winiarska 5893e1821cSIwona Winiarska int peci_ep_pci_local_read(struct peci_device *device, u8 seg, 5993e1821cSIwona Winiarska u8 bus, u8 dev, u8 func, u16 reg, u32 *data); 6093e1821cSIwona Winiarska 6193e1821cSIwona Winiarska int peci_mmio_read(struct peci_device *device, u8 bar, u8 seg, 6293e1821cSIwona Winiarska u8 bus, u8 dev, u8 func, u64 address, u32 *data); 6393e1821cSIwona Winiarska 6493e1821cSIwona Winiarska #endif /* __LINUX_PECI_CPU_H */ 65