1 /* 2 * pci.h 3 * 4 * PCI defines and function prototypes 5 * Copyright 1994, Drew Eckhardt 6 * Copyright 1997--1999 Martin Mares <[email protected]> 7 * 8 * For more information, please consult the following manuals (look at 9 * http://www.pcisig.com/ for how to get them): 10 * 11 * PCI BIOS Specification 12 * PCI Local Bus Specification 13 * PCI to PCI Bridge Specification 14 * PCI System Design Guide 15 */ 16 17 #ifndef LINUX_PCI_H 18 #define LINUX_PCI_H 19 20 #include <linux/pci_regs.h> /* The pci register defines */ 21 22 /* 23 * The PCI interface treats multi-function devices as independent 24 * devices. The slot/function address of each device is encoded 25 * in a single byte as follows: 26 * 27 * 7:3 = slot 28 * 2:0 = function 29 */ 30 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) 31 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) 32 #define PCI_FUNC(devfn) ((devfn) & 0x07) 33 34 /* Ioctls for /proc/bus/pci/X/Y nodes. */ 35 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8) 36 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */ 37 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */ 38 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */ 39 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */ 40 41 #ifdef __KERNEL__ 42 43 #include <linux/mod_devicetable.h> 44 45 #include <linux/types.h> 46 #include <linux/init.h> 47 #include <linux/ioport.h> 48 #include <linux/list.h> 49 #include <linux/compiler.h> 50 #include <linux/errno.h> 51 #include <linux/kobject.h> 52 #include <asm/atomic.h> 53 #include <linux/device.h> 54 #include <linux/io.h> 55 56 /* Include the ID list */ 57 #include <linux/pci_ids.h> 58 59 /* pci_slot represents a physical slot */ 60 struct pci_slot { 61 struct pci_bus *bus; /* The bus this slot is on */ 62 struct list_head list; /* node in list of slots on this bus */ 63 struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */ 64 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */ 65 struct kobject kobj; 66 }; 67 68 static inline const char *pci_slot_name(const struct pci_slot *slot) 69 { 70 return kobject_name(&slot->kobj); 71 } 72 73 /* File state for mmap()s on /proc/bus/pci/X/Y */ 74 enum pci_mmap_state { 75 pci_mmap_io, 76 pci_mmap_mem 77 }; 78 79 /* This defines the direction arg to the DMA mapping routines. */ 80 #define PCI_DMA_BIDIRECTIONAL 0 81 #define PCI_DMA_TODEVICE 1 82 #define PCI_DMA_FROMDEVICE 2 83 #define PCI_DMA_NONE 3 84 85 #define DEVICE_COUNT_RESOURCE 12 86 87 typedef int __bitwise pci_power_t; 88 89 #define PCI_D0 ((pci_power_t __force) 0) 90 #define PCI_D1 ((pci_power_t __force) 1) 91 #define PCI_D2 ((pci_power_t __force) 2) 92 #define PCI_D3hot ((pci_power_t __force) 3) 93 #define PCI_D3cold ((pci_power_t __force) 4) 94 #define PCI_UNKNOWN ((pci_power_t __force) 5) 95 #define PCI_POWER_ERROR ((pci_power_t __force) -1) 96 97 /** The pci_channel state describes connectivity between the CPU and 98 * the pci device. If some PCI bus between here and the pci device 99 * has crashed or locked up, this info is reflected here. 100 */ 101 typedef unsigned int __bitwise pci_channel_state_t; 102 103 enum pci_channel_state { 104 /* I/O channel is in normal state */ 105 pci_channel_io_normal = (__force pci_channel_state_t) 1, 106 107 /* I/O to channel is blocked */ 108 pci_channel_io_frozen = (__force pci_channel_state_t) 2, 109 110 /* PCI card is dead */ 111 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3, 112 }; 113 114 typedef unsigned int __bitwise pcie_reset_state_t; 115 116 enum pcie_reset_state { 117 /* Reset is NOT asserted (Use to deassert reset) */ 118 pcie_deassert_reset = (__force pcie_reset_state_t) 1, 119 120 /* Use #PERST to reset PCI-E device */ 121 pcie_warm_reset = (__force pcie_reset_state_t) 2, 122 123 /* Use PCI-E Hot Reset to reset device */ 124 pcie_hot_reset = (__force pcie_reset_state_t) 3 125 }; 126 127 typedef unsigned short __bitwise pci_dev_flags_t; 128 enum pci_dev_flags { 129 /* INTX_DISABLE in PCI_COMMAND register disables MSI 130 * generation too. 131 */ 132 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1, 133 /* Device configuration is irrevocably lost if disabled into D3 */ 134 PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) 2, 135 }; 136 137 enum pci_irq_reroute_variant { 138 INTEL_IRQ_REROUTE_VARIANT = 1, 139 MAX_IRQ_REROUTE_VARIANTS = 3 140 }; 141 142 typedef unsigned short __bitwise pci_bus_flags_t; 143 enum pci_bus_flags { 144 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1, 145 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2, 146 }; 147 148 struct pci_cap_saved_state { 149 struct hlist_node next; 150 char cap_nr; 151 u32 data[0]; 152 }; 153 154 struct pcie_link_state; 155 struct pci_vpd; 156 157 /* 158 * The pci_dev structure is used to describe PCI devices. 159 */ 160 struct pci_dev { 161 struct list_head bus_list; /* node in per-bus list */ 162 struct pci_bus *bus; /* bus this device is on */ 163 struct pci_bus *subordinate; /* bus this device bridges to */ 164 165 void *sysdata; /* hook for sys-specific extension */ 166 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */ 167 struct pci_slot *slot; /* Physical slot this device is in */ 168 169 unsigned int devfn; /* encoded device & function index */ 170 unsigned short vendor; 171 unsigned short device; 172 unsigned short subsystem_vendor; 173 unsigned short subsystem_device; 174 unsigned int class; /* 3 bytes: (base,sub,prog-if) */ 175 u8 revision; /* PCI revision, low byte of class word */ 176 u8 hdr_type; /* PCI header type (`multi' flag masked out) */ 177 u8 pcie_type; /* PCI-E device/port type */ 178 u8 rom_base_reg; /* which config register controls the ROM */ 179 u8 pin; /* which interrupt pin this device uses */ 180 181 struct pci_driver *driver; /* which driver has allocated this device */ 182 u64 dma_mask; /* Mask of the bits of bus address this 183 device implements. Normally this is 184 0xffffffff. You only need to change 185 this if your device has broken DMA 186 or supports 64-bit transfers. */ 187 188 struct device_dma_parameters dma_parms; 189 190 pci_power_t current_state; /* Current operating state. In ACPI-speak, 191 this is D0-D3, D0 being fully functional, 192 and D3 being off. */ 193 int pm_cap; /* PM capability offset in the 194 configuration space */ 195 unsigned int pme_support:5; /* Bitmask of states from which PME# 196 can be generated */ 197 unsigned int d1_support:1; /* Low power state D1 is supported */ 198 unsigned int d2_support:1; /* Low power state D2 is supported */ 199 unsigned int no_d1d2:1; /* Only allow D0 and D3 */ 200 201 #ifdef CONFIG_PCIEASPM 202 struct pcie_link_state *link_state; /* ASPM link state. */ 203 #endif 204 205 pci_channel_state_t error_state; /* current connectivity state */ 206 struct device dev; /* Generic device interface */ 207 208 int cfg_size; /* Size of configuration space */ 209 210 /* 211 * Instead of touching interrupt line and base address registers 212 * directly, use the values stored here. They might be different! 213 */ 214 unsigned int irq; 215 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */ 216 217 /* These fields are used by common fixups */ 218 unsigned int transparent:1; /* Transparent PCI bridge */ 219 unsigned int multifunction:1;/* Part of multi-function device */ 220 /* keep track of device state */ 221 unsigned int is_added:1; 222 unsigned int is_busmaster:1; /* device is busmaster */ 223 unsigned int no_msi:1; /* device may not use msi */ 224 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */ 225 unsigned int broken_parity_status:1; /* Device generates false positive parity */ 226 unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */ 227 unsigned int msi_enabled:1; 228 unsigned int msix_enabled:1; 229 unsigned int ari_enabled:1; /* ARI forwarding */ 230 unsigned int is_managed:1; 231 unsigned int is_pcie:1; 232 pci_dev_flags_t dev_flags; 233 atomic_t enable_cnt; /* pci_enable_device has been called */ 234 235 u32 saved_config_space[16]; /* config space saved at suspend time */ 236 struct hlist_head saved_cap_space; 237 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */ 238 int rom_attr_enabled; /* has display of the rom attribute been enabled? */ 239 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */ 240 struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */ 241 #ifdef CONFIG_PCI_MSI 242 struct list_head msi_list; 243 #endif 244 struct pci_vpd *vpd; 245 }; 246 247 extern struct pci_dev *alloc_pci_dev(void); 248 249 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list) 250 #define to_pci_dev(n) container_of(n, struct pci_dev, dev) 251 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL) 252 253 static inline int pci_channel_offline(struct pci_dev *pdev) 254 { 255 return (pdev->error_state != pci_channel_io_normal); 256 } 257 258 static inline struct pci_cap_saved_state *pci_find_saved_cap( 259 struct pci_dev *pci_dev, char cap) 260 { 261 struct pci_cap_saved_state *tmp; 262 struct hlist_node *pos; 263 264 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) { 265 if (tmp->cap_nr == cap) 266 return tmp; 267 } 268 return NULL; 269 } 270 271 static inline void pci_add_saved_cap(struct pci_dev *pci_dev, 272 struct pci_cap_saved_state *new_cap) 273 { 274 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space); 275 } 276 277 /* 278 * For PCI devices, the region numbers are assigned this way: 279 * 280 * 0-5 standard PCI regions 281 * 6 expansion ROM 282 * 7-10 bridges: address space assigned to buses behind the bridge 283 */ 284 285 #define PCI_ROM_RESOURCE 6 286 #define PCI_BRIDGE_RESOURCES 7 287 #define PCI_NUM_RESOURCES 11 288 289 #ifndef PCI_BUS_NUM_RESOURCES 290 #define PCI_BUS_NUM_RESOURCES 16 291 #endif 292 293 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */ 294 295 struct pci_bus { 296 struct list_head node; /* node in list of buses */ 297 struct pci_bus *parent; /* parent bus this bridge is on */ 298 struct list_head children; /* list of child buses */ 299 struct list_head devices; /* list of devices on this bus */ 300 struct pci_dev *self; /* bridge device as seen by parent */ 301 struct list_head slots; /* list of slots on this bus */ 302 struct resource *resource[PCI_BUS_NUM_RESOURCES]; 303 /* address space routed to this bus */ 304 305 struct pci_ops *ops; /* configuration access functions */ 306 void *sysdata; /* hook for sys-specific extension */ 307 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */ 308 309 unsigned char number; /* bus number */ 310 unsigned char primary; /* number of primary bridge */ 311 unsigned char secondary; /* number of secondary bridge */ 312 unsigned char subordinate; /* max number of subordinate buses */ 313 314 char name[48]; 315 316 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */ 317 pci_bus_flags_t bus_flags; /* Inherited by child busses */ 318 struct device *bridge; 319 struct device dev; 320 struct bin_attribute *legacy_io; /* legacy I/O for this bus */ 321 struct bin_attribute *legacy_mem; /* legacy mem */ 322 unsigned int is_added:1; 323 }; 324 325 #define pci_bus_b(n) list_entry(n, struct pci_bus, node) 326 #define to_pci_bus(n) container_of(n, struct pci_bus, dev) 327 328 /* 329 * Error values that may be returned by PCI functions. 330 */ 331 #define PCIBIOS_SUCCESSFUL 0x00 332 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81 333 #define PCIBIOS_BAD_VENDOR_ID 0x83 334 #define PCIBIOS_DEVICE_NOT_FOUND 0x86 335 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87 336 #define PCIBIOS_SET_FAILED 0x88 337 #define PCIBIOS_BUFFER_TOO_SMALL 0x89 338 339 /* Low-level architecture-dependent routines */ 340 341 struct pci_ops { 342 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val); 343 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val); 344 }; 345 346 /* 347 * ACPI needs to be able to access PCI config space before we've done a 348 * PCI bus scan and created pci_bus structures. 349 */ 350 extern int raw_pci_read(unsigned int domain, unsigned int bus, 351 unsigned int devfn, int reg, int len, u32 *val); 352 extern int raw_pci_write(unsigned int domain, unsigned int bus, 353 unsigned int devfn, int reg, int len, u32 val); 354 355 struct pci_bus_region { 356 resource_size_t start; 357 resource_size_t end; 358 }; 359 360 struct pci_dynids { 361 spinlock_t lock; /* protects list, index */ 362 struct list_head list; /* for IDs added at runtime */ 363 }; 364 365 /* ---------------------------------------------------------------- */ 366 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides 367 * a set of callbacks in struct pci_error_handlers, then that device driver 368 * will be notified of PCI bus errors, and will be driven to recovery 369 * when an error occurs. 370 */ 371 372 typedef unsigned int __bitwise pci_ers_result_t; 373 374 enum pci_ers_result { 375 /* no result/none/not supported in device driver */ 376 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1, 377 378 /* Device driver can recover without slot reset */ 379 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2, 380 381 /* Device driver wants slot to be reset. */ 382 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3, 383 384 /* Device has completely failed, is unrecoverable */ 385 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4, 386 387 /* Device driver is fully recovered and operational */ 388 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5, 389 }; 390 391 /* PCI bus error event callbacks */ 392 struct pci_error_handlers { 393 /* PCI bus error detected on this device */ 394 pci_ers_result_t (*error_detected)(struct pci_dev *dev, 395 enum pci_channel_state error); 396 397 /* MMIO has been re-enabled, but not DMA */ 398 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev); 399 400 /* PCI Express link has been reset */ 401 pci_ers_result_t (*link_reset)(struct pci_dev *dev); 402 403 /* PCI slot has been reset */ 404 pci_ers_result_t (*slot_reset)(struct pci_dev *dev); 405 406 /* Device driver may resume normal operations */ 407 void (*resume)(struct pci_dev *dev); 408 }; 409 410 /* ---------------------------------------------------------------- */ 411 412 struct module; 413 struct pci_driver { 414 struct list_head node; 415 char *name; 416 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */ 417 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */ 418 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */ 419 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */ 420 int (*suspend_late) (struct pci_dev *dev, pm_message_t state); 421 int (*resume_early) (struct pci_dev *dev); 422 int (*resume) (struct pci_dev *dev); /* Device woken up */ 423 void (*shutdown) (struct pci_dev *dev); 424 struct pm_ext_ops *pm; 425 struct pci_error_handlers *err_handler; 426 struct device_driver driver; 427 struct pci_dynids dynids; 428 }; 429 430 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver) 431 432 /** 433 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table 434 * @_table: device table name 435 * 436 * This macro is used to create a struct pci_device_id array (a device table) 437 * in a generic manner. 438 */ 439 #define DEFINE_PCI_DEVICE_TABLE(_table) \ 440 const struct pci_device_id _table[] __devinitconst 441 442 /** 443 * PCI_DEVICE - macro used to describe a specific pci device 444 * @vend: the 16 bit PCI Vendor ID 445 * @dev: the 16 bit PCI Device ID 446 * 447 * This macro is used to create a struct pci_device_id that matches a 448 * specific device. The subvendor and subdevice fields will be set to 449 * PCI_ANY_ID. 450 */ 451 #define PCI_DEVICE(vend,dev) \ 452 .vendor = (vend), .device = (dev), \ 453 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID 454 455 /** 456 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class 457 * @dev_class: the class, subclass, prog-if triple for this device 458 * @dev_class_mask: the class mask for this device 459 * 460 * This macro is used to create a struct pci_device_id that matches a 461 * specific PCI class. The vendor, device, subvendor, and subdevice 462 * fields will be set to PCI_ANY_ID. 463 */ 464 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \ 465 .class = (dev_class), .class_mask = (dev_class_mask), \ 466 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \ 467 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID 468 469 /** 470 * PCI_VDEVICE - macro used to describe a specific pci device in short form 471 * @vendor: the vendor name 472 * @device: the 16 bit PCI Device ID 473 * 474 * This macro is used to create a struct pci_device_id that matches a 475 * specific PCI device. The subvendor, and subdevice fields will be set 476 * to PCI_ANY_ID. The macro allows the next field to follow as the device 477 * private data. 478 */ 479 480 #define PCI_VDEVICE(vendor, device) \ 481 PCI_VENDOR_ID_##vendor, (device), \ 482 PCI_ANY_ID, PCI_ANY_ID, 0, 0 483 484 /* these external functions are only available when PCI support is enabled */ 485 #ifdef CONFIG_PCI 486 487 extern struct bus_type pci_bus_type; 488 489 /* Do NOT directly access these two variables, unless you are arch specific pci 490 * code, or pci core code. */ 491 extern struct list_head pci_root_buses; /* list of all known PCI buses */ 492 /* Some device drivers need know if pci is initiated */ 493 extern int no_pci_devices(void); 494 495 void pcibios_fixup_bus(struct pci_bus *); 496 int __must_check pcibios_enable_device(struct pci_dev *, int mask); 497 char *pcibios_setup(char *str); 498 499 /* Used only when drivers/pci/setup.c is used */ 500 void pcibios_align_resource(void *, struct resource *, resource_size_t, 501 resource_size_t); 502 void pcibios_update_irq(struct pci_dev *, int irq); 503 504 /* Generic PCI functions used internally */ 505 506 extern struct pci_bus *pci_find_bus(int domain, int busnr); 507 void pci_bus_add_devices(struct pci_bus *bus); 508 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, 509 struct pci_ops *ops, void *sysdata); 510 static inline struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops, 511 void *sysdata) 512 { 513 struct pci_bus *root_bus; 514 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata); 515 if (root_bus) 516 pci_bus_add_devices(root_bus); 517 return root_bus; 518 } 519 struct pci_bus *pci_create_bus(struct device *parent, int bus, 520 struct pci_ops *ops, void *sysdata); 521 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, 522 int busnr); 523 struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr, 524 const char *name, 525 struct hotplug_slot *hotplug); 526 void pci_destroy_slot(struct pci_slot *slot); 527 void pci_renumber_slot(struct pci_slot *slot, int slot_nr); 528 int pci_scan_slot(struct pci_bus *bus, int devfn); 529 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn); 530 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus); 531 unsigned int pci_scan_child_bus(struct pci_bus *bus); 532 int __must_check pci_bus_add_device(struct pci_dev *dev); 533 void pci_read_bridge_bases(struct pci_bus *child); 534 struct resource *pci_find_parent_resource(const struct pci_dev *dev, 535 struct resource *res); 536 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge); 537 extern struct pci_dev *pci_dev_get(struct pci_dev *dev); 538 extern void pci_dev_put(struct pci_dev *dev); 539 extern void pci_remove_bus(struct pci_bus *b); 540 extern void pci_remove_bus_device(struct pci_dev *dev); 541 extern void pci_stop_bus_device(struct pci_dev *dev); 542 void pci_setup_cardbus(struct pci_bus *bus); 543 extern void pci_sort_breadthfirst(void); 544 545 /* Generic PCI functions exported to card drivers */ 546 547 #ifdef CONFIG_PCI_LEGACY 548 struct pci_dev __deprecated *pci_find_device(unsigned int vendor, 549 unsigned int device, 550 struct pci_dev *from); 551 struct pci_dev __deprecated *pci_find_slot(unsigned int bus, 552 unsigned int devfn); 553 #endif /* CONFIG_PCI_LEGACY */ 554 555 enum pci_lost_interrupt_reason { 556 PCI_LOST_IRQ_NO_INFORMATION = 0, 557 PCI_LOST_IRQ_DISABLE_MSI, 558 PCI_LOST_IRQ_DISABLE_MSIX, 559 PCI_LOST_IRQ_DISABLE_ACPI, 560 }; 561 enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev); 562 int pci_find_capability(struct pci_dev *dev, int cap); 563 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap); 564 int pci_find_ext_capability(struct pci_dev *dev, int cap); 565 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap); 566 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap); 567 struct pci_bus *pci_find_next_bus(const struct pci_bus *from); 568 569 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device, 570 struct pci_dev *from); 571 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device, 572 unsigned int ss_vendor, unsigned int ss_device, 573 struct pci_dev *from); 574 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn); 575 struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn); 576 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from); 577 int pci_dev_present(const struct pci_device_id *ids); 578 579 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn, 580 int where, u8 *val); 581 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn, 582 int where, u16 *val); 583 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn, 584 int where, u32 *val); 585 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn, 586 int where, u8 val); 587 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn, 588 int where, u16 val); 589 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn, 590 int where, u32 val); 591 592 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val) 593 { 594 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val); 595 } 596 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val) 597 { 598 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val); 599 } 600 static inline int pci_read_config_dword(struct pci_dev *dev, int where, 601 u32 *val) 602 { 603 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val); 604 } 605 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val) 606 { 607 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val); 608 } 609 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val) 610 { 611 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val); 612 } 613 static inline int pci_write_config_dword(struct pci_dev *dev, int where, 614 u32 val) 615 { 616 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val); 617 } 618 619 int __must_check pci_enable_device(struct pci_dev *dev); 620 int __must_check pci_enable_device_io(struct pci_dev *dev); 621 int __must_check pci_enable_device_mem(struct pci_dev *dev); 622 int __must_check pci_reenable_device(struct pci_dev *); 623 int __must_check pcim_enable_device(struct pci_dev *pdev); 624 void pcim_pin_device(struct pci_dev *pdev); 625 626 static inline int pci_is_managed(struct pci_dev *pdev) 627 { 628 return pdev->is_managed; 629 } 630 631 void pci_disable_device(struct pci_dev *dev); 632 void pci_set_master(struct pci_dev *dev); 633 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state); 634 #define HAVE_PCI_SET_MWI 635 int __must_check pci_set_mwi(struct pci_dev *dev); 636 int pci_try_set_mwi(struct pci_dev *dev); 637 void pci_clear_mwi(struct pci_dev *dev); 638 void pci_intx(struct pci_dev *dev, int enable); 639 void pci_msi_off(struct pci_dev *dev); 640 int pci_set_dma_mask(struct pci_dev *dev, u64 mask); 641 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask); 642 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size); 643 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask); 644 int pcix_get_max_mmrbc(struct pci_dev *dev); 645 int pcix_get_mmrbc(struct pci_dev *dev); 646 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc); 647 int pcie_get_readrq(struct pci_dev *dev); 648 int pcie_set_readrq(struct pci_dev *dev, int rq); 649 int pci_reset_function(struct pci_dev *dev); 650 int pci_execute_reset_function(struct pci_dev *dev); 651 void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno); 652 int __must_check pci_assign_resource(struct pci_dev *dev, int i); 653 int pci_select_bars(struct pci_dev *dev, unsigned long flags); 654 655 /* ROM control related routines */ 656 int pci_enable_rom(struct pci_dev *pdev); 657 void pci_disable_rom(struct pci_dev *pdev); 658 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size); 659 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom); 660 size_t pci_get_rom_size(void __iomem *rom, size_t size); 661 662 /* Power management related routines */ 663 int pci_save_state(struct pci_dev *dev); 664 int pci_restore_state(struct pci_dev *dev); 665 int pci_set_power_state(struct pci_dev *dev, pci_power_t state); 666 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state); 667 bool pci_pme_capable(struct pci_dev *dev, pci_power_t state); 668 void pci_pme_active(struct pci_dev *dev, bool enable); 669 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable); 670 int pci_wake_from_d3(struct pci_dev *dev, bool enable); 671 pci_power_t pci_target_state(struct pci_dev *dev); 672 int pci_prepare_to_sleep(struct pci_dev *dev); 673 int pci_back_from_sleep(struct pci_dev *dev); 674 675 /* Functions for PCI Hotplug drivers to use */ 676 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap); 677 678 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */ 679 void pci_bus_assign_resources(struct pci_bus *bus); 680 void pci_bus_size_bridges(struct pci_bus *bus); 681 int pci_claim_resource(struct pci_dev *, int); 682 void pci_assign_unassigned_resources(void); 683 void pdev_enable_device(struct pci_dev *); 684 void pdev_sort_resources(struct pci_dev *, struct resource_list *); 685 int pci_enable_resources(struct pci_dev *, int mask); 686 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *), 687 int (*)(struct pci_dev *, u8, u8)); 688 #define HAVE_PCI_REQ_REGIONS 2 689 int __must_check pci_request_regions(struct pci_dev *, const char *); 690 void pci_release_regions(struct pci_dev *); 691 int __must_check pci_request_region(struct pci_dev *, int, const char *); 692 void pci_release_region(struct pci_dev *, int); 693 int pci_request_selected_regions(struct pci_dev *, int, const char *); 694 void pci_release_selected_regions(struct pci_dev *, int); 695 696 /* drivers/pci/bus.c */ 697 int __must_check pci_bus_alloc_resource(struct pci_bus *bus, 698 struct resource *res, resource_size_t size, 699 resource_size_t align, resource_size_t min, 700 unsigned int type_mask, 701 void (*alignf)(void *, struct resource *, 702 resource_size_t, resource_size_t), 703 void *alignf_data); 704 void pci_enable_bridges(struct pci_bus *bus); 705 706 /* Proper probing supporting hot-pluggable devices */ 707 int __must_check __pci_register_driver(struct pci_driver *, struct module *, 708 const char *mod_name); 709 710 /* 711 * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded 712 */ 713 #define pci_register_driver(driver) \ 714 __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME) 715 716 void pci_unregister_driver(struct pci_driver *dev); 717 void pci_remove_behind_bridge(struct pci_dev *dev); 718 struct pci_driver *pci_dev_driver(const struct pci_dev *dev); 719 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, 720 struct pci_dev *dev); 721 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, 722 int pass); 723 724 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *), 725 void *userdata); 726 int pci_cfg_space_size_ext(struct pci_dev *dev); 727 int pci_cfg_space_size(struct pci_dev *dev); 728 unsigned char pci_bus_max_busnr(struct pci_bus *bus); 729 730 /* kmem_cache style wrapper around pci_alloc_consistent() */ 731 732 #include <linux/dmapool.h> 733 734 #define pci_pool dma_pool 735 #define pci_pool_create(name, pdev, size, align, allocation) \ 736 dma_pool_create(name, &pdev->dev, size, align, allocation) 737 #define pci_pool_destroy(pool) dma_pool_destroy(pool) 738 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle) 739 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr) 740 741 enum pci_dma_burst_strategy { 742 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible, 743 strategy_parameter is N/A */ 744 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter 745 byte boundaries */ 746 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of 747 strategy_parameter byte boundaries */ 748 }; 749 750 struct msix_entry { 751 u32 vector; /* kernel uses to write allocated vector */ 752 u16 entry; /* driver uses to specify entry, OS writes */ 753 }; 754 755 756 #ifndef CONFIG_PCI_MSI 757 static inline int pci_enable_msi(struct pci_dev *dev) 758 { 759 return -1; 760 } 761 762 static inline void pci_msi_shutdown(struct pci_dev *dev) 763 { } 764 static inline void pci_disable_msi(struct pci_dev *dev) 765 { } 766 767 static inline int pci_enable_msix(struct pci_dev *dev, 768 struct msix_entry *entries, int nvec) 769 { 770 return -1; 771 } 772 773 static inline void pci_msix_shutdown(struct pci_dev *dev) 774 { } 775 static inline void pci_disable_msix(struct pci_dev *dev) 776 { } 777 778 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) 779 { } 780 781 static inline void pci_restore_msi_state(struct pci_dev *dev) 782 { } 783 #else 784 extern int pci_enable_msi(struct pci_dev *dev); 785 extern void pci_msi_shutdown(struct pci_dev *dev); 786 extern void pci_disable_msi(struct pci_dev *dev); 787 extern int pci_enable_msix(struct pci_dev *dev, 788 struct msix_entry *entries, int nvec); 789 extern void pci_msix_shutdown(struct pci_dev *dev); 790 extern void pci_disable_msix(struct pci_dev *dev); 791 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev); 792 extern void pci_restore_msi_state(struct pci_dev *dev); 793 #endif 794 795 #ifdef CONFIG_HT_IRQ 796 /* The functions a driver should call */ 797 int ht_create_irq(struct pci_dev *dev, int idx); 798 void ht_destroy_irq(unsigned int irq); 799 #endif /* CONFIG_HT_IRQ */ 800 801 extern void pci_block_user_cfg_access(struct pci_dev *dev); 802 extern void pci_unblock_user_cfg_access(struct pci_dev *dev); 803 804 /* 805 * PCI domain support. Sometimes called PCI segment (eg by ACPI), 806 * a PCI domain is defined to be a set of PCI busses which share 807 * configuration space. 808 */ 809 #ifdef CONFIG_PCI_DOMAINS 810 extern int pci_domains_supported; 811 #else 812 enum { pci_domains_supported = 0 }; 813 static inline int pci_domain_nr(struct pci_bus *bus) 814 { 815 return 0; 816 } 817 818 static inline int pci_proc_domain(struct pci_bus *bus) 819 { 820 return 0; 821 } 822 #endif /* CONFIG_PCI_DOMAINS */ 823 824 #else /* CONFIG_PCI is not enabled */ 825 826 /* 827 * If the system does not have PCI, clearly these return errors. Define 828 * these as simple inline functions to avoid hair in drivers. 829 */ 830 831 #define _PCI_NOP(o, s, t) \ 832 static inline int pci_##o##_config_##s(struct pci_dev *dev, \ 833 int where, t val) \ 834 { return PCIBIOS_FUNC_NOT_SUPPORTED; } 835 836 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \ 837 _PCI_NOP(o, word, u16 x) \ 838 _PCI_NOP(o, dword, u32 x) 839 _PCI_NOP_ALL(read, *) 840 _PCI_NOP_ALL(write,) 841 842 static inline struct pci_dev *pci_find_device(unsigned int vendor, 843 unsigned int device, 844 struct pci_dev *from) 845 { 846 return NULL; 847 } 848 849 static inline struct pci_dev *pci_find_slot(unsigned int bus, 850 unsigned int devfn) 851 { 852 return NULL; 853 } 854 855 static inline struct pci_dev *pci_get_device(unsigned int vendor, 856 unsigned int device, 857 struct pci_dev *from) 858 { 859 return NULL; 860 } 861 862 static inline struct pci_dev *pci_get_subsys(unsigned int vendor, 863 unsigned int device, 864 unsigned int ss_vendor, 865 unsigned int ss_device, 866 struct pci_dev *from) 867 { 868 return NULL; 869 } 870 871 static inline struct pci_dev *pci_get_class(unsigned int class, 872 struct pci_dev *from) 873 { 874 return NULL; 875 } 876 877 #define pci_dev_present(ids) (0) 878 #define no_pci_devices() (1) 879 #define pci_dev_put(dev) do { } while (0) 880 881 static inline void pci_set_master(struct pci_dev *dev) 882 { } 883 884 static inline int pci_enable_device(struct pci_dev *dev) 885 { 886 return -EIO; 887 } 888 889 static inline void pci_disable_device(struct pci_dev *dev) 890 { } 891 892 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) 893 { 894 return -EIO; 895 } 896 897 static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask) 898 { 899 return -EIO; 900 } 901 902 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev, 903 unsigned int size) 904 { 905 return -EIO; 906 } 907 908 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev, 909 unsigned long mask) 910 { 911 return -EIO; 912 } 913 914 static inline int pci_assign_resource(struct pci_dev *dev, int i) 915 { 916 return -EBUSY; 917 } 918 919 static inline int __pci_register_driver(struct pci_driver *drv, 920 struct module *owner) 921 { 922 return 0; 923 } 924 925 static inline int pci_register_driver(struct pci_driver *drv) 926 { 927 return 0; 928 } 929 930 static inline void pci_unregister_driver(struct pci_driver *drv) 931 { } 932 933 static inline int pci_find_capability(struct pci_dev *dev, int cap) 934 { 935 return 0; 936 } 937 938 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post, 939 int cap) 940 { 941 return 0; 942 } 943 944 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap) 945 { 946 return 0; 947 } 948 949 /* Power management related routines */ 950 static inline int pci_save_state(struct pci_dev *dev) 951 { 952 return 0; 953 } 954 955 static inline int pci_restore_state(struct pci_dev *dev) 956 { 957 return 0; 958 } 959 960 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) 961 { 962 return 0; 963 } 964 965 static inline pci_power_t pci_choose_state(struct pci_dev *dev, 966 pm_message_t state) 967 { 968 return PCI_D0; 969 } 970 971 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, 972 int enable) 973 { 974 return 0; 975 } 976 977 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name) 978 { 979 return -EIO; 980 } 981 982 static inline void pci_release_regions(struct pci_dev *dev) 983 { } 984 985 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0) 986 987 static inline void pci_block_user_cfg_access(struct pci_dev *dev) 988 { } 989 990 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) 991 { } 992 993 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from) 994 { return NULL; } 995 996 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus, 997 unsigned int devfn) 998 { return NULL; } 999 1000 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus, 1001 unsigned int devfn) 1002 { return NULL; } 1003 1004 #endif /* CONFIG_PCI */ 1005 1006 /* Include architecture-dependent settings and functions */ 1007 1008 #include <asm/pci.h> 1009 1010 /* these helpers provide future and backwards compatibility 1011 * for accessing popular PCI BAR info */ 1012 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start) 1013 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end) 1014 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags) 1015 #define pci_resource_len(dev,bar) \ 1016 ((pci_resource_start((dev), (bar)) == 0 && \ 1017 pci_resource_end((dev), (bar)) == \ 1018 pci_resource_start((dev), (bar))) ? 0 : \ 1019 \ 1020 (pci_resource_end((dev), (bar)) - \ 1021 pci_resource_start((dev), (bar)) + 1)) 1022 1023 /* Similar to the helpers above, these manipulate per-pci_dev 1024 * driver-specific data. They are really just a wrapper around 1025 * the generic device structure functions of these calls. 1026 */ 1027 static inline void *pci_get_drvdata(struct pci_dev *pdev) 1028 { 1029 return dev_get_drvdata(&pdev->dev); 1030 } 1031 1032 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data) 1033 { 1034 dev_set_drvdata(&pdev->dev, data); 1035 } 1036 1037 /* If you want to know what to call your pci_dev, ask this function. 1038 * Again, it's a wrapper around the generic device. 1039 */ 1040 static inline const char *pci_name(struct pci_dev *pdev) 1041 { 1042 return dev_name(&pdev->dev); 1043 } 1044 1045 1046 /* Some archs don't want to expose struct resource to userland as-is 1047 * in sysfs and /proc 1048 */ 1049 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER 1050 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar, 1051 const struct resource *rsrc, resource_size_t *start, 1052 resource_size_t *end) 1053 { 1054 *start = rsrc->start; 1055 *end = rsrc->end; 1056 } 1057 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */ 1058 1059 1060 /* 1061 * The world is not perfect and supplies us with broken PCI devices. 1062 * For at least a part of these bugs we need a work-around, so both 1063 * generic (drivers/pci/quirks.c) and per-architecture code can define 1064 * fixup hooks to be called for particular buggy devices. 1065 */ 1066 1067 struct pci_fixup { 1068 u16 vendor, device; /* You can use PCI_ANY_ID here of course */ 1069 void (*hook)(struct pci_dev *dev); 1070 }; 1071 1072 enum pci_fixup_pass { 1073 pci_fixup_early, /* Before probing BARs */ 1074 pci_fixup_header, /* After reading configuration header */ 1075 pci_fixup_final, /* Final phase of device fixups */ 1076 pci_fixup_enable, /* pci_enable_device() time */ 1077 pci_fixup_resume, /* pci_device_resume() */ 1078 pci_fixup_suspend, /* pci_device_suspend */ 1079 pci_fixup_resume_early, /* pci_device_resume_early() */ 1080 }; 1081 1082 /* Anonymous variables would be nice... */ 1083 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \ 1084 static const struct pci_fixup __pci_fixup_##name __used \ 1085 __attribute__((__section__(#section))) = { vendor, device, hook }; 1086 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \ 1087 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \ 1088 vendor##device##hook, vendor, device, hook) 1089 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \ 1090 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \ 1091 vendor##device##hook, vendor, device, hook) 1092 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \ 1093 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \ 1094 vendor##device##hook, vendor, device, hook) 1095 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \ 1096 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \ 1097 vendor##device##hook, vendor, device, hook) 1098 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \ 1099 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \ 1100 resume##vendor##device##hook, vendor, device, hook) 1101 #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \ 1102 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \ 1103 resume_early##vendor##device##hook, vendor, device, hook) 1104 #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \ 1105 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \ 1106 suspend##vendor##device##hook, vendor, device, hook) 1107 1108 1109 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev); 1110 1111 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen); 1112 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr); 1113 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev); 1114 int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name); 1115 int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask, 1116 const char *name); 1117 void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask); 1118 1119 extern int pci_pci_problems; 1120 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */ 1121 #define PCIPCI_TRITON 2 1122 #define PCIPCI_NATOMA 4 1123 #define PCIPCI_VIAETBF 8 1124 #define PCIPCI_VSFX 16 1125 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */ 1126 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */ 1127 1128 extern unsigned long pci_cardbus_io_size; 1129 extern unsigned long pci_cardbus_mem_size; 1130 1131 int pcibios_add_platform_entries(struct pci_dev *dev); 1132 void pcibios_disable_device(struct pci_dev *dev); 1133 int pcibios_set_pcie_reset_state(struct pci_dev *dev, 1134 enum pcie_reset_state state); 1135 1136 #ifdef CONFIG_PCI_MMCONFIG 1137 extern void __init pci_mmcfg_early_init(void); 1138 extern void __init pci_mmcfg_late_init(void); 1139 #else 1140 static inline void pci_mmcfg_early_init(void) { } 1141 static inline void pci_mmcfg_late_init(void) { } 1142 #endif 1143 1144 #ifdef CONFIG_HAS_IOMEM 1145 static inline void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar) 1146 { 1147 /* 1148 * Make sure the BAR is actually a memory resource, not an IO resource 1149 */ 1150 if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) { 1151 WARN_ON(1); 1152 return NULL; 1153 } 1154 return ioremap_nocache(pci_resource_start(pdev, bar), 1155 pci_resource_len(pdev, bar)); 1156 } 1157 #endif 1158 1159 #endif /* __KERNEL__ */ 1160 #endif /* LINUX_PCI_H */ 1161