1 /* 2 * pci.h 3 * 4 * PCI defines and function prototypes 5 * Copyright 1994, Drew Eckhardt 6 * Copyright 1997--1999 Martin Mares <[email protected]> 7 * 8 * For more information, please consult the following manuals (look at 9 * http://www.pcisig.com/ for how to get them): 10 * 11 * PCI BIOS Specification 12 * PCI Local Bus Specification 13 * PCI to PCI Bridge Specification 14 * PCI System Design Guide 15 */ 16 17 #ifndef LINUX_PCI_H 18 #define LINUX_PCI_H 19 20 /* Include the pci register defines */ 21 #include <linux/pci_regs.h> 22 23 /* 24 * The PCI interface treats multi-function devices as independent 25 * devices. The slot/function address of each device is encoded 26 * in a single byte as follows: 27 * 28 * 7:3 = slot 29 * 2:0 = function 30 */ 31 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) 32 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) 33 #define PCI_FUNC(devfn) ((devfn) & 0x07) 34 35 /* Ioctls for /proc/bus/pci/X/Y nodes. */ 36 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8) 37 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */ 38 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */ 39 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */ 40 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */ 41 42 #ifdef __KERNEL__ 43 44 #include <linux/mod_devicetable.h> 45 46 #include <linux/types.h> 47 #include <linux/ioport.h> 48 #include <linux/list.h> 49 #include <linux/compiler.h> 50 #include <linux/errno.h> 51 #include <asm/atomic.h> 52 #include <linux/device.h> 53 54 /* Include the ID list */ 55 #include <linux/pci_ids.h> 56 57 /* File state for mmap()s on /proc/bus/pci/X/Y */ 58 enum pci_mmap_state { 59 pci_mmap_io, 60 pci_mmap_mem 61 }; 62 63 /* This defines the direction arg to the DMA mapping routines. */ 64 #define PCI_DMA_BIDIRECTIONAL 0 65 #define PCI_DMA_TODEVICE 1 66 #define PCI_DMA_FROMDEVICE 2 67 #define PCI_DMA_NONE 3 68 69 #define DEVICE_COUNT_RESOURCE 12 70 71 typedef int __bitwise pci_power_t; 72 73 #define PCI_D0 ((pci_power_t __force) 0) 74 #define PCI_D1 ((pci_power_t __force) 1) 75 #define PCI_D2 ((pci_power_t __force) 2) 76 #define PCI_D3hot ((pci_power_t __force) 3) 77 #define PCI_D3cold ((pci_power_t __force) 4) 78 #define PCI_UNKNOWN ((pci_power_t __force) 5) 79 #define PCI_POWER_ERROR ((pci_power_t __force) -1) 80 81 /** The pci_channel state describes connectivity between the CPU and 82 * the pci device. If some PCI bus between here and the pci device 83 * has crashed or locked up, this info is reflected here. 84 */ 85 typedef unsigned int __bitwise pci_channel_state_t; 86 87 enum pci_channel_state { 88 /* I/O channel is in normal state */ 89 pci_channel_io_normal = (__force pci_channel_state_t) 1, 90 91 /* I/O to channel is blocked */ 92 pci_channel_io_frozen = (__force pci_channel_state_t) 2, 93 94 /* PCI card is dead */ 95 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3, 96 }; 97 98 typedef unsigned int __bitwise pcie_reset_state_t; 99 100 enum pcie_reset_state { 101 /* Reset is NOT asserted (Use to deassert reset) */ 102 pcie_deassert_reset = (__force pcie_reset_state_t) 1, 103 104 /* Use #PERST to reset PCI-E device */ 105 pcie_warm_reset = (__force pcie_reset_state_t) 2, 106 107 /* Use PCI-E Hot Reset to reset device */ 108 pcie_hot_reset = (__force pcie_reset_state_t) 3 109 }; 110 111 typedef unsigned short __bitwise pci_dev_flags_t; 112 enum pci_dev_flags { 113 /* INTX_DISABLE in PCI_COMMAND register disables MSI 114 * generation too. 115 */ 116 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1, 117 }; 118 119 typedef unsigned short __bitwise pci_bus_flags_t; 120 enum pci_bus_flags { 121 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1, 122 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2, 123 }; 124 125 struct pci_cap_saved_state { 126 struct hlist_node next; 127 char cap_nr; 128 u32 data[0]; 129 }; 130 131 struct pcie_link_state; 132 /* 133 * The pci_dev structure is used to describe PCI devices. 134 */ 135 struct pci_dev { 136 struct list_head global_list; /* node in list of all PCI devices */ 137 struct list_head bus_list; /* node in per-bus list */ 138 struct pci_bus *bus; /* bus this device is on */ 139 struct pci_bus *subordinate; /* bus this device bridges to */ 140 141 void *sysdata; /* hook for sys-specific extension */ 142 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */ 143 144 unsigned int devfn; /* encoded device & function index */ 145 unsigned short vendor; 146 unsigned short device; 147 unsigned short subsystem_vendor; 148 unsigned short subsystem_device; 149 unsigned int class; /* 3 bytes: (base,sub,prog-if) */ 150 u8 revision; /* PCI revision, low byte of class word */ 151 u8 hdr_type; /* PCI header type (`multi' flag masked out) */ 152 u8 pcie_type; /* PCI-E device/port type */ 153 u8 rom_base_reg; /* which config register controls the ROM */ 154 u8 pin; /* which interrupt pin this device uses */ 155 156 struct pci_driver *driver; /* which driver has allocated this device */ 157 u64 dma_mask; /* Mask of the bits of bus address this 158 device implements. Normally this is 159 0xffffffff. You only need to change 160 this if your device has broken DMA 161 or supports 64-bit transfers. */ 162 163 pci_power_t current_state; /* Current operating state. In ACPI-speak, 164 this is D0-D3, D0 being fully functional, 165 and D3 being off. */ 166 167 #ifdef CONFIG_PCIEASPM 168 struct pcie_link_state *link_state; /* ASPM link state. */ 169 #endif 170 171 pci_channel_state_t error_state; /* current connectivity state */ 172 struct device dev; /* Generic device interface */ 173 174 int cfg_size; /* Size of configuration space */ 175 176 /* 177 * Instead of touching interrupt line and base address registers 178 * directly, use the values stored here. They might be different! 179 */ 180 unsigned int irq; 181 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */ 182 183 /* These fields are used by common fixups */ 184 unsigned int transparent:1; /* Transparent PCI bridge */ 185 unsigned int multifunction:1;/* Part of multi-function device */ 186 /* keep track of device state */ 187 unsigned int is_busmaster:1; /* device is busmaster */ 188 unsigned int no_msi:1; /* device may not use msi */ 189 unsigned int no_d1d2:1; /* only allow d0 or d3 */ 190 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */ 191 unsigned int broken_parity_status:1; /* Device generates false positive parity */ 192 unsigned int msi_enabled:1; 193 unsigned int msix_enabled:1; 194 unsigned int is_managed:1; 195 unsigned int is_pcie:1; 196 pci_dev_flags_t dev_flags; 197 atomic_t enable_cnt; /* pci_enable_device has been called */ 198 199 u32 saved_config_space[16]; /* config space saved at suspend time */ 200 struct hlist_head saved_cap_space; 201 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */ 202 int rom_attr_enabled; /* has display of the rom attribute been enabled? */ 203 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */ 204 #ifdef CONFIG_PCI_MSI 205 struct list_head msi_list; 206 #endif 207 }; 208 209 extern struct pci_dev *alloc_pci_dev(void); 210 211 #define pci_dev_g(n) list_entry(n, struct pci_dev, global_list) 212 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list) 213 #define to_pci_dev(n) container_of(n, struct pci_dev, dev) 214 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL) 215 216 static inline int pci_channel_offline(struct pci_dev *pdev) 217 { 218 return (pdev->error_state != pci_channel_io_normal); 219 } 220 221 static inline struct pci_cap_saved_state *pci_find_saved_cap( 222 struct pci_dev *pci_dev, char cap) 223 { 224 struct pci_cap_saved_state *tmp; 225 struct hlist_node *pos; 226 227 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) { 228 if (tmp->cap_nr == cap) 229 return tmp; 230 } 231 return NULL; 232 } 233 234 static inline void pci_add_saved_cap(struct pci_dev *pci_dev, 235 struct pci_cap_saved_state *new_cap) 236 { 237 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space); 238 } 239 240 /* 241 * For PCI devices, the region numbers are assigned this way: 242 * 243 * 0-5 standard PCI regions 244 * 6 expansion ROM 245 * 7-10 bridges: address space assigned to buses behind the bridge 246 */ 247 248 #define PCI_ROM_RESOURCE 6 249 #define PCI_BRIDGE_RESOURCES 7 250 #define PCI_NUM_RESOURCES 11 251 252 #ifndef PCI_BUS_NUM_RESOURCES 253 #define PCI_BUS_NUM_RESOURCES 8 254 #endif 255 256 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */ 257 258 struct pci_bus { 259 struct list_head node; /* node in list of buses */ 260 struct pci_bus *parent; /* parent bus this bridge is on */ 261 struct list_head children; /* list of child buses */ 262 struct list_head devices; /* list of devices on this bus */ 263 struct pci_dev *self; /* bridge device as seen by parent */ 264 struct resource *resource[PCI_BUS_NUM_RESOURCES]; 265 /* address space routed to this bus */ 266 267 struct pci_ops *ops; /* configuration access functions */ 268 void *sysdata; /* hook for sys-specific extension */ 269 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */ 270 271 unsigned char number; /* bus number */ 272 unsigned char primary; /* number of primary bridge */ 273 unsigned char secondary; /* number of secondary bridge */ 274 unsigned char subordinate; /* max number of subordinate buses */ 275 276 char name[48]; 277 278 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */ 279 pci_bus_flags_t bus_flags; /* Inherited by child busses */ 280 struct device *bridge; 281 struct device dev; 282 struct bin_attribute *legacy_io; /* legacy I/O for this bus */ 283 struct bin_attribute *legacy_mem; /* legacy mem */ 284 }; 285 286 #define pci_bus_b(n) list_entry(n, struct pci_bus, node) 287 #define to_pci_bus(n) container_of(n, struct pci_bus, dev) 288 289 /* 290 * Error values that may be returned by PCI functions. 291 */ 292 #define PCIBIOS_SUCCESSFUL 0x00 293 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81 294 #define PCIBIOS_BAD_VENDOR_ID 0x83 295 #define PCIBIOS_DEVICE_NOT_FOUND 0x86 296 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87 297 #define PCIBIOS_SET_FAILED 0x88 298 #define PCIBIOS_BUFFER_TOO_SMALL 0x89 299 300 /* Low-level architecture-dependent routines */ 301 302 struct pci_ops { 303 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val); 304 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val); 305 }; 306 307 struct pci_raw_ops { 308 int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn, 309 int reg, int len, u32 *val); 310 int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn, 311 int reg, int len, u32 val); 312 }; 313 314 extern struct pci_raw_ops *raw_pci_ops; 315 316 struct pci_bus_region { 317 resource_size_t start; 318 resource_size_t end; 319 }; 320 321 struct pci_dynids { 322 spinlock_t lock; /* protects list, index */ 323 struct list_head list; /* for IDs added at runtime */ 324 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */ 325 }; 326 327 /* ---------------------------------------------------------------- */ 328 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides 329 * a set of callbacks in struct pci_error_handlers, then that device driver 330 * will be notified of PCI bus errors, and will be driven to recovery 331 * when an error occurs. 332 */ 333 334 typedef unsigned int __bitwise pci_ers_result_t; 335 336 enum pci_ers_result { 337 /* no result/none/not supported in device driver */ 338 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1, 339 340 /* Device driver can recover without slot reset */ 341 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2, 342 343 /* Device driver wants slot to be reset. */ 344 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3, 345 346 /* Device has completely failed, is unrecoverable */ 347 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4, 348 349 /* Device driver is fully recovered and operational */ 350 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5, 351 }; 352 353 /* PCI bus error event callbacks */ 354 struct pci_error_handlers { 355 /* PCI bus error detected on this device */ 356 pci_ers_result_t (*error_detected)(struct pci_dev *dev, 357 enum pci_channel_state error); 358 359 /* MMIO has been re-enabled, but not DMA */ 360 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev); 361 362 /* PCI Express link has been reset */ 363 pci_ers_result_t (*link_reset)(struct pci_dev *dev); 364 365 /* PCI slot has been reset */ 366 pci_ers_result_t (*slot_reset)(struct pci_dev *dev); 367 368 /* Device driver may resume normal operations */ 369 void (*resume)(struct pci_dev *dev); 370 }; 371 372 /* ---------------------------------------------------------------- */ 373 374 struct module; 375 struct pci_driver { 376 struct list_head node; 377 char *name; 378 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */ 379 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */ 380 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */ 381 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */ 382 int (*suspend_late) (struct pci_dev *dev, pm_message_t state); 383 int (*resume_early) (struct pci_dev *dev); 384 int (*resume) (struct pci_dev *dev); /* Device woken up */ 385 void (*shutdown) (struct pci_dev *dev); 386 387 struct pci_error_handlers *err_handler; 388 struct device_driver driver; 389 struct pci_dynids dynids; 390 }; 391 392 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver) 393 394 /** 395 * PCI_DEVICE - macro used to describe a specific pci device 396 * @vend: the 16 bit PCI Vendor ID 397 * @dev: the 16 bit PCI Device ID 398 * 399 * This macro is used to create a struct pci_device_id that matches a 400 * specific device. The subvendor and subdevice fields will be set to 401 * PCI_ANY_ID. 402 */ 403 #define PCI_DEVICE(vend,dev) \ 404 .vendor = (vend), .device = (dev), \ 405 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID 406 407 /** 408 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class 409 * @dev_class: the class, subclass, prog-if triple for this device 410 * @dev_class_mask: the class mask for this device 411 * 412 * This macro is used to create a struct pci_device_id that matches a 413 * specific PCI class. The vendor, device, subvendor, and subdevice 414 * fields will be set to PCI_ANY_ID. 415 */ 416 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \ 417 .class = (dev_class), .class_mask = (dev_class_mask), \ 418 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \ 419 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID 420 421 /** 422 * PCI_VDEVICE - macro used to describe a specific pci device in short form 423 * @vend: the vendor name 424 * @dev: the 16 bit PCI Device ID 425 * 426 * This macro is used to create a struct pci_device_id that matches a 427 * specific PCI device. The subvendor, and subdevice fields will be set 428 * to PCI_ANY_ID. The macro allows the next field to follow as the device 429 * private data. 430 */ 431 432 #define PCI_VDEVICE(vendor, device) \ 433 PCI_VENDOR_ID_##vendor, (device), \ 434 PCI_ANY_ID, PCI_ANY_ID, 0, 0 435 436 /* these external functions are only available when PCI support is enabled */ 437 #ifdef CONFIG_PCI 438 439 extern struct bus_type pci_bus_type; 440 441 /* Do NOT directly access these two variables, unless you are arch specific pci 442 * code, or pci core code. */ 443 extern struct list_head pci_root_buses; /* list of all known PCI buses */ 444 extern struct list_head pci_devices; /* list of all devices */ 445 /* Some device drivers need know if pci is initiated */ 446 extern int no_pci_devices(void); 447 448 void pcibios_fixup_bus(struct pci_bus *); 449 int __must_check pcibios_enable_device(struct pci_dev *, int mask); 450 char *pcibios_setup(char *str); 451 452 /* Used only when drivers/pci/setup.c is used */ 453 void pcibios_align_resource(void *, struct resource *, resource_size_t, 454 resource_size_t); 455 void pcibios_update_irq(struct pci_dev *, int irq); 456 457 /* Generic PCI functions used internally */ 458 459 extern struct pci_bus *pci_find_bus(int domain, int busnr); 460 void pci_bus_add_devices(struct pci_bus *bus); 461 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, 462 struct pci_ops *ops, void *sysdata); 463 static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, 464 void *sysdata) 465 { 466 struct pci_bus *root_bus; 467 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata); 468 if (root_bus) 469 pci_bus_add_devices(root_bus); 470 return root_bus; 471 } 472 struct pci_bus *pci_create_bus(struct device *parent, int bus, 473 struct pci_ops *ops, void *sysdata); 474 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, 475 int busnr); 476 int pci_scan_slot(struct pci_bus *bus, int devfn); 477 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn); 478 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus); 479 unsigned int pci_scan_child_bus(struct pci_bus *bus); 480 int __must_check pci_bus_add_device(struct pci_dev *dev); 481 void pci_read_bridge_bases(struct pci_bus *child); 482 struct resource *pci_find_parent_resource(const struct pci_dev *dev, 483 struct resource *res); 484 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge); 485 extern struct pci_dev *pci_dev_get(struct pci_dev *dev); 486 extern void pci_dev_put(struct pci_dev *dev); 487 extern void pci_remove_bus(struct pci_bus *b); 488 extern void pci_remove_bus_device(struct pci_dev *dev); 489 extern void pci_stop_bus_device(struct pci_dev *dev); 490 void pci_setup_cardbus(struct pci_bus *bus); 491 extern void pci_sort_breadthfirst(void); 492 493 /* Generic PCI functions exported to card drivers */ 494 495 #ifdef CONFIG_PCI_LEGACY 496 struct pci_dev __deprecated *pci_find_device(unsigned int vendor, 497 unsigned int device, 498 const struct pci_dev *from); 499 struct pci_dev __deprecated *pci_find_slot(unsigned int bus, 500 unsigned int devfn); 501 #endif /* CONFIG_PCI_LEGACY */ 502 503 int pci_find_capability(struct pci_dev *dev, int cap); 504 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap); 505 int pci_find_ext_capability(struct pci_dev *dev, int cap); 506 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap); 507 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap); 508 void pcie_wait_pending_transaction(struct pci_dev *dev); 509 struct pci_bus *pci_find_next_bus(const struct pci_bus *from); 510 511 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device, 512 struct pci_dev *from); 513 struct pci_dev *pci_get_device_reverse(unsigned int vendor, unsigned int device, 514 struct pci_dev *from); 515 516 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device, 517 unsigned int ss_vendor, unsigned int ss_device, 518 struct pci_dev *from); 519 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn); 520 struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn); 521 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from); 522 int pci_dev_present(const struct pci_device_id *ids); 523 const struct pci_device_id *pci_find_present(const struct pci_device_id *ids); 524 525 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn, 526 int where, u8 *val); 527 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn, 528 int where, u16 *val); 529 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn, 530 int where, u32 *val); 531 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn, 532 int where, u8 val); 533 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn, 534 int where, u16 val); 535 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn, 536 int where, u32 val); 537 538 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val) 539 { 540 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val); 541 } 542 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val) 543 { 544 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val); 545 } 546 static inline int pci_read_config_dword(struct pci_dev *dev, int where, 547 u32 *val) 548 { 549 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val); 550 } 551 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val) 552 { 553 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val); 554 } 555 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val) 556 { 557 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val); 558 } 559 static inline int pci_write_config_dword(struct pci_dev *dev, int where, 560 u32 val) 561 { 562 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val); 563 } 564 565 int __must_check pci_enable_device(struct pci_dev *dev); 566 int __must_check pci_enable_device_io(struct pci_dev *dev); 567 int __must_check pci_enable_device_mem(struct pci_dev *dev); 568 int __must_check pci_reenable_device(struct pci_dev *); 569 int __must_check pcim_enable_device(struct pci_dev *pdev); 570 void pcim_pin_device(struct pci_dev *pdev); 571 572 static inline int pci_is_managed(struct pci_dev *pdev) 573 { 574 return pdev->is_managed; 575 } 576 577 void pci_disable_device(struct pci_dev *dev); 578 void pci_set_master(struct pci_dev *dev); 579 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state); 580 #define HAVE_PCI_SET_MWI 581 int __must_check pci_set_mwi(struct pci_dev *dev); 582 int pci_try_set_mwi(struct pci_dev *dev); 583 void pci_clear_mwi(struct pci_dev *dev); 584 void pci_intx(struct pci_dev *dev, int enable); 585 void pci_msi_off(struct pci_dev *dev); 586 int pci_set_dma_mask(struct pci_dev *dev, u64 mask); 587 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask); 588 int pcix_get_max_mmrbc(struct pci_dev *dev); 589 int pcix_get_mmrbc(struct pci_dev *dev); 590 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc); 591 int pcie_get_readrq(struct pci_dev *dev); 592 int pcie_set_readrq(struct pci_dev *dev, int rq); 593 void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno); 594 int __must_check pci_assign_resource(struct pci_dev *dev, int i); 595 int __must_check pci_assign_resource_fixed(struct pci_dev *dev, int i); 596 int pci_select_bars(struct pci_dev *dev, unsigned long flags); 597 598 /* ROM control related routines */ 599 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size); 600 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom); 601 size_t pci_get_rom_size(void __iomem *rom, size_t size); 602 603 /* Power management related routines */ 604 int pci_save_state(struct pci_dev *dev); 605 int pci_restore_state(struct pci_dev *dev); 606 int pci_set_power_state(struct pci_dev *dev, pci_power_t state); 607 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state); 608 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable); 609 610 /* Functions for PCI Hotplug drivers to use */ 611 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap); 612 613 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */ 614 void pci_bus_assign_resources(struct pci_bus *bus); 615 void pci_bus_size_bridges(struct pci_bus *bus); 616 int pci_claim_resource(struct pci_dev *, int); 617 void pci_assign_unassigned_resources(void); 618 void pdev_enable_device(struct pci_dev *); 619 void pdev_sort_resources(struct pci_dev *, struct resource_list *); 620 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *), 621 int (*)(struct pci_dev *, u8, u8)); 622 #define HAVE_PCI_REQ_REGIONS 2 623 int __must_check pci_request_regions(struct pci_dev *, const char *); 624 void pci_release_regions(struct pci_dev *); 625 int __must_check pci_request_region(struct pci_dev *, int, const char *); 626 void pci_release_region(struct pci_dev *, int); 627 int pci_request_selected_regions(struct pci_dev *, int, const char *); 628 void pci_release_selected_regions(struct pci_dev *, int); 629 630 /* drivers/pci/bus.c */ 631 int __must_check pci_bus_alloc_resource(struct pci_bus *bus, 632 struct resource *res, resource_size_t size, 633 resource_size_t align, resource_size_t min, 634 unsigned int type_mask, 635 void (*alignf)(void *, struct resource *, 636 resource_size_t, resource_size_t), 637 void *alignf_data); 638 void pci_enable_bridges(struct pci_bus *bus); 639 640 /* Proper probing supporting hot-pluggable devices */ 641 int __must_check __pci_register_driver(struct pci_driver *, struct module *, 642 const char *mod_name); 643 static inline int __must_check pci_register_driver(struct pci_driver *driver) 644 { 645 return __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME); 646 } 647 648 void pci_unregister_driver(struct pci_driver *dev); 649 void pci_remove_behind_bridge(struct pci_dev *dev); 650 struct pci_driver *pci_dev_driver(const struct pci_dev *dev); 651 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, 652 struct pci_dev *dev); 653 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, 654 int pass); 655 656 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *), 657 void *userdata); 658 int pci_cfg_space_size(struct pci_dev *dev); 659 unsigned char pci_bus_max_busnr(struct pci_bus *bus); 660 661 /* kmem_cache style wrapper around pci_alloc_consistent() */ 662 663 #include <linux/dmapool.h> 664 665 #define pci_pool dma_pool 666 #define pci_pool_create(name, pdev, size, align, allocation) \ 667 dma_pool_create(name, &pdev->dev, size, align, allocation) 668 #define pci_pool_destroy(pool) dma_pool_destroy(pool) 669 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle) 670 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr) 671 672 enum pci_dma_burst_strategy { 673 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible, 674 strategy_parameter is N/A */ 675 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter 676 byte boundaries */ 677 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of 678 strategy_parameter byte boundaries */ 679 }; 680 681 struct msix_entry { 682 u16 vector; /* kernel uses to write allocated vector */ 683 u16 entry; /* driver uses to specify entry, OS writes */ 684 }; 685 686 687 #ifndef CONFIG_PCI_MSI 688 static inline int pci_enable_msi(struct pci_dev *dev) 689 { 690 return -1; 691 } 692 693 static inline void pci_disable_msi(struct pci_dev *dev) 694 { } 695 696 static inline int pci_enable_msix(struct pci_dev *dev, 697 struct msix_entry *entries, int nvec) 698 { 699 return -1; 700 } 701 702 static inline void pci_disable_msix(struct pci_dev *dev) 703 { } 704 705 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) 706 { } 707 708 static inline void pci_restore_msi_state(struct pci_dev *dev) 709 { } 710 #else 711 extern int pci_enable_msi(struct pci_dev *dev); 712 extern void pci_disable_msi(struct pci_dev *dev); 713 extern int pci_enable_msix(struct pci_dev *dev, 714 struct msix_entry *entries, int nvec); 715 extern void pci_disable_msix(struct pci_dev *dev); 716 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev); 717 extern void pci_restore_msi_state(struct pci_dev *dev); 718 #endif 719 720 #ifdef CONFIG_HT_IRQ 721 /* The functions a driver should call */ 722 int ht_create_irq(struct pci_dev *dev, int idx); 723 void ht_destroy_irq(unsigned int irq); 724 #endif /* CONFIG_HT_IRQ */ 725 726 extern void pci_block_user_cfg_access(struct pci_dev *dev); 727 extern void pci_unblock_user_cfg_access(struct pci_dev *dev); 728 729 /* 730 * PCI domain support. Sometimes called PCI segment (eg by ACPI), 731 * a PCI domain is defined to be a set of PCI busses which share 732 * configuration space. 733 */ 734 #ifdef CONFIG_PCI_DOMAINS 735 extern int pci_domains_supported; 736 #else 737 enum { pci_domains_supported = 0 }; 738 static inline int pci_domain_nr(struct pci_bus *bus) 739 { 740 return 0; 741 } 742 743 static inline int pci_proc_domain(struct pci_bus *bus) 744 { 745 return 0; 746 } 747 #endif /* CONFIG_PCI_DOMAINS */ 748 749 #else /* CONFIG_PCI is not enabled */ 750 751 /* 752 * If the system does not have PCI, clearly these return errors. Define 753 * these as simple inline functions to avoid hair in drivers. 754 */ 755 756 #define _PCI_NOP(o, s, t) \ 757 static inline int pci_##o##_config_##s(struct pci_dev *dev, \ 758 int where, t val) \ 759 { return PCIBIOS_FUNC_NOT_SUPPORTED; } 760 761 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \ 762 _PCI_NOP(o, word, u16 x) \ 763 _PCI_NOP(o, dword, u32 x) 764 _PCI_NOP_ALL(read, *) 765 _PCI_NOP_ALL(write,) 766 767 static inline struct pci_dev *pci_find_device(unsigned int vendor, 768 unsigned int device, 769 const struct pci_dev *from) 770 { 771 return NULL; 772 } 773 774 static inline struct pci_dev *pci_find_slot(unsigned int bus, 775 unsigned int devfn) 776 { 777 return NULL; 778 } 779 780 static inline struct pci_dev *pci_get_device(unsigned int vendor, 781 unsigned int device, 782 struct pci_dev *from) 783 { 784 return NULL; 785 } 786 787 static inline struct pci_dev *pci_get_device_reverse(unsigned int vendor, 788 unsigned int device, 789 struct pci_dev *from) 790 { 791 return NULL; 792 } 793 794 static inline struct pci_dev *pci_get_subsys(unsigned int vendor, 795 unsigned int device, 796 unsigned int ss_vendor, 797 unsigned int ss_device, 798 struct pci_dev *from) 799 { 800 return NULL; 801 } 802 803 static inline struct pci_dev *pci_get_class(unsigned int class, 804 struct pci_dev *from) 805 { 806 return NULL; 807 } 808 809 #define pci_dev_present(ids) (0) 810 #define no_pci_devices() (1) 811 #define pci_find_present(ids) (NULL) 812 #define pci_dev_put(dev) do { } while (0) 813 814 static inline void pci_set_master(struct pci_dev *dev) 815 { } 816 817 static inline int pci_enable_device(struct pci_dev *dev) 818 { 819 return -EIO; 820 } 821 822 static inline void pci_disable_device(struct pci_dev *dev) 823 { } 824 825 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) 826 { 827 return -EIO; 828 } 829 830 static inline int pci_assign_resource(struct pci_dev *dev, int i) 831 { 832 return -EBUSY; 833 } 834 835 static inline int __pci_register_driver(struct pci_driver *drv, 836 struct module *owner) 837 { 838 return 0; 839 } 840 841 static inline int pci_register_driver(struct pci_driver *drv) 842 { 843 return 0; 844 } 845 846 static inline void pci_unregister_driver(struct pci_driver *drv) 847 { } 848 849 static inline int pci_find_capability(struct pci_dev *dev, int cap) 850 { 851 return 0; 852 } 853 854 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post, 855 int cap) 856 { 857 return 0; 858 } 859 860 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap) 861 { 862 return 0; 863 } 864 865 static inline void pcie_wait_pending_transaction(struct pci_dev *dev) 866 { } 867 868 /* Power management related routines */ 869 static inline int pci_save_state(struct pci_dev *dev) 870 { 871 return 0; 872 } 873 874 static inline int pci_restore_state(struct pci_dev *dev) 875 { 876 return 0; 877 } 878 879 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) 880 { 881 return 0; 882 } 883 884 static inline pci_power_t pci_choose_state(struct pci_dev *dev, 885 pm_message_t state) 886 { 887 return PCI_D0; 888 } 889 890 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, 891 int enable) 892 { 893 return 0; 894 } 895 896 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name) 897 { 898 return -EIO; 899 } 900 901 static inline void pci_release_regions(struct pci_dev *dev) 902 { } 903 904 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0) 905 906 static inline void pci_block_user_cfg_access(struct pci_dev *dev) 907 { } 908 909 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) 910 { } 911 912 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from) 913 { return NULL; } 914 915 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus, 916 unsigned int devfn) 917 { return NULL; } 918 919 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus, 920 unsigned int devfn) 921 { return NULL; } 922 923 #endif /* CONFIG_PCI */ 924 925 /* Include architecture-dependent settings and functions */ 926 927 #include <asm/pci.h> 928 929 /* these helpers provide future and backwards compatibility 930 * for accessing popular PCI BAR info */ 931 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start) 932 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end) 933 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags) 934 #define pci_resource_len(dev,bar) \ 935 ((pci_resource_start((dev), (bar)) == 0 && \ 936 pci_resource_end((dev), (bar)) == \ 937 pci_resource_start((dev), (bar))) ? 0 : \ 938 \ 939 (pci_resource_end((dev), (bar)) - \ 940 pci_resource_start((dev), (bar)) + 1)) 941 942 /* Similar to the helpers above, these manipulate per-pci_dev 943 * driver-specific data. They are really just a wrapper around 944 * the generic device structure functions of these calls. 945 */ 946 static inline void *pci_get_drvdata(struct pci_dev *pdev) 947 { 948 return dev_get_drvdata(&pdev->dev); 949 } 950 951 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data) 952 { 953 dev_set_drvdata(&pdev->dev, data); 954 } 955 956 /* If you want to know what to call your pci_dev, ask this function. 957 * Again, it's a wrapper around the generic device. 958 */ 959 static inline char *pci_name(struct pci_dev *pdev) 960 { 961 return pdev->dev.bus_id; 962 } 963 964 965 /* Some archs don't want to expose struct resource to userland as-is 966 * in sysfs and /proc 967 */ 968 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER 969 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar, 970 const struct resource *rsrc, resource_size_t *start, 971 resource_size_t *end) 972 { 973 *start = rsrc->start; 974 *end = rsrc->end; 975 } 976 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */ 977 978 979 /* 980 * The world is not perfect and supplies us with broken PCI devices. 981 * For at least a part of these bugs we need a work-around, so both 982 * generic (drivers/pci/quirks.c) and per-architecture code can define 983 * fixup hooks to be called for particular buggy devices. 984 */ 985 986 struct pci_fixup { 987 u16 vendor, device; /* You can use PCI_ANY_ID here of course */ 988 void (*hook)(struct pci_dev *dev); 989 }; 990 991 enum pci_fixup_pass { 992 pci_fixup_early, /* Before probing BARs */ 993 pci_fixup_header, /* After reading configuration header */ 994 pci_fixup_final, /* Final phase of device fixups */ 995 pci_fixup_enable, /* pci_enable_device() time */ 996 pci_fixup_resume, /* pci_enable_device() time */ 997 }; 998 999 /* Anonymous variables would be nice... */ 1000 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \ 1001 static const struct pci_fixup __pci_fixup_##name __used \ 1002 __attribute__((__section__(#section))) = { vendor, device, hook }; 1003 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \ 1004 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \ 1005 vendor##device##hook, vendor, device, hook) 1006 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \ 1007 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \ 1008 vendor##device##hook, vendor, device, hook) 1009 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \ 1010 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \ 1011 vendor##device##hook, vendor, device, hook) 1012 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \ 1013 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \ 1014 vendor##device##hook, vendor, device, hook) 1015 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \ 1016 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \ 1017 resume##vendor##device##hook, vendor, device, hook) 1018 1019 1020 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev); 1021 1022 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen); 1023 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr); 1024 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev); 1025 int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name); 1026 void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask); 1027 1028 extern int pci_pci_problems; 1029 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */ 1030 #define PCIPCI_TRITON 2 1031 #define PCIPCI_NATOMA 4 1032 #define PCIPCI_VIAETBF 8 1033 #define PCIPCI_VSFX 16 1034 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */ 1035 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */ 1036 1037 extern unsigned long pci_cardbus_io_size; 1038 extern unsigned long pci_cardbus_mem_size; 1039 1040 extern int pcibios_add_platform_entries(struct pci_dev *dev); 1041 1042 #endif /* __KERNEL__ */ 1043 #endif /* LINUX_PCI_H */ 1044