1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /** 3 * PCI Endpoint *Controller* (EPC) header file 4 * 5 * Copyright (C) 2017 Texas Instruments 6 * Author: Kishon Vijay Abraham I <[email protected]> 7 */ 8 9 #ifndef __LINUX_PCI_EPC_H 10 #define __LINUX_PCI_EPC_H 11 12 #include <linux/pci-epf.h> 13 14 struct pci_epc; 15 16 enum pci_epc_irq_type { 17 PCI_EPC_IRQ_UNKNOWN, 18 PCI_EPC_IRQ_LEGACY, 19 PCI_EPC_IRQ_MSI, 20 PCI_EPC_IRQ_MSIX, 21 }; 22 23 /** 24 * struct pci_epc_ops - set of function pointers for performing EPC operations 25 * @write_header: ops to populate configuration space header 26 * @set_bar: ops to configure the BAR 27 * @clear_bar: ops to reset the BAR 28 * @map_addr: ops to map CPU address to PCI address 29 * @unmap_addr: ops to unmap CPU address and PCI address 30 * @set_msi: ops to set the requested number of MSI interrupts in the MSI 31 * capability register 32 * @get_msi: ops to get the number of MSI interrupts allocated by the RC from 33 * the MSI capability register 34 * @set_msix: ops to set the requested number of MSI-X interrupts in the 35 * MSI-X capability register 36 * @get_msix: ops to get the number of MSI-X interrupts allocated by the RC 37 * from the MSI-X capability register 38 * @raise_irq: ops to raise a legacy, MSI or MSI-X interrupt 39 * @start: ops to start the PCI link 40 * @stop: ops to stop the PCI link 41 * @owner: the module owner containing the ops 42 */ 43 struct pci_epc_ops { 44 int (*write_header)(struct pci_epc *epc, u8 func_no, 45 struct pci_epf_header *hdr); 46 int (*set_bar)(struct pci_epc *epc, u8 func_no, 47 struct pci_epf_bar *epf_bar); 48 void (*clear_bar)(struct pci_epc *epc, u8 func_no, 49 struct pci_epf_bar *epf_bar); 50 int (*map_addr)(struct pci_epc *epc, u8 func_no, 51 phys_addr_t addr, u64 pci_addr, size_t size); 52 void (*unmap_addr)(struct pci_epc *epc, u8 func_no, 53 phys_addr_t addr); 54 int (*set_msi)(struct pci_epc *epc, u8 func_no, u8 interrupts); 55 int (*get_msi)(struct pci_epc *epc, u8 func_no); 56 int (*set_msix)(struct pci_epc *epc, u8 func_no, u16 interrupts); 57 int (*get_msix)(struct pci_epc *epc, u8 func_no); 58 int (*raise_irq)(struct pci_epc *epc, u8 func_no, 59 enum pci_epc_irq_type type, u16 interrupt_num); 60 int (*start)(struct pci_epc *epc); 61 void (*stop)(struct pci_epc *epc); 62 const struct pci_epc_features* (*get_features)(struct pci_epc *epc, 63 u8 func_no); 64 struct module *owner; 65 }; 66 67 /** 68 * struct pci_epc_mem - address space of the endpoint controller 69 * @phys_base: physical base address of the PCI address space 70 * @size: the size of the PCI address space 71 * @bitmap: bitmap to manage the PCI address space 72 * @pages: number of bits representing the address region 73 * @page_size: size of each page 74 */ 75 struct pci_epc_mem { 76 phys_addr_t phys_base; 77 size_t size; 78 unsigned long *bitmap; 79 size_t page_size; 80 int pages; 81 }; 82 83 /** 84 * struct pci_epc - represents the PCI EPC device 85 * @dev: PCI EPC device 86 * @pci_epf: list of endpoint functions present in this EPC device 87 * @ops: function pointers for performing endpoint operations 88 * @mem: address space of the endpoint controller 89 * @max_functions: max number of functions that can be configured in this EPC 90 * @group: configfs group representing the PCI EPC device 91 * @lock: spinlock to protect pci_epc ops 92 */ 93 struct pci_epc { 94 struct device dev; 95 struct list_head pci_epf; 96 const struct pci_epc_ops *ops; 97 struct pci_epc_mem *mem; 98 u8 max_functions; 99 struct config_group *group; 100 /* spinlock to protect against concurrent access of EP controller */ 101 spinlock_t lock; 102 }; 103 104 /** 105 * struct pci_epc_features - features supported by a EPC device per function 106 * @linkup_notifier: indicate if the EPC device can notify EPF driver on link up 107 * @msi_capable: indicate if the endpoint function has MSI capability 108 * @msix_capable: indicate if the endpoint function has MSI-X capability 109 * @reserved_bar: bitmap to indicate reserved BAR unavailable to function driver 110 * @bar_fixed_64bit: bitmap to indicate fixed 64bit BARs 111 * @bar_fixed_size: Array specifying the size supported by each BAR 112 * @align: alignment size required for BAR buffer allocation 113 */ 114 struct pci_epc_features { 115 unsigned int linkup_notifier : 1; 116 unsigned int msi_capable : 1; 117 unsigned int msix_capable : 1; 118 u8 reserved_bar; 119 u8 bar_fixed_64bit; 120 u64 bar_fixed_size[PCI_STD_NUM_BARS]; 121 size_t align; 122 }; 123 124 #define to_pci_epc(device) container_of((device), struct pci_epc, dev) 125 126 #define pci_epc_create(dev, ops) \ 127 __pci_epc_create((dev), (ops), THIS_MODULE) 128 #define devm_pci_epc_create(dev, ops) \ 129 __devm_pci_epc_create((dev), (ops), THIS_MODULE) 130 131 #define pci_epc_mem_init(epc, phys_addr, size) \ 132 __pci_epc_mem_init((epc), (phys_addr), (size), PAGE_SIZE) 133 134 static inline void epc_set_drvdata(struct pci_epc *epc, void *data) 135 { 136 dev_set_drvdata(&epc->dev, data); 137 } 138 139 static inline void *epc_get_drvdata(struct pci_epc *epc) 140 { 141 return dev_get_drvdata(&epc->dev); 142 } 143 144 struct pci_epc * 145 __devm_pci_epc_create(struct device *dev, const struct pci_epc_ops *ops, 146 struct module *owner); 147 struct pci_epc * 148 __pci_epc_create(struct device *dev, const struct pci_epc_ops *ops, 149 struct module *owner); 150 void devm_pci_epc_destroy(struct device *dev, struct pci_epc *epc); 151 void pci_epc_destroy(struct pci_epc *epc); 152 int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf); 153 void pci_epc_linkup(struct pci_epc *epc); 154 void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf); 155 int pci_epc_write_header(struct pci_epc *epc, u8 func_no, 156 struct pci_epf_header *hdr); 157 int pci_epc_set_bar(struct pci_epc *epc, u8 func_no, 158 struct pci_epf_bar *epf_bar); 159 void pci_epc_clear_bar(struct pci_epc *epc, u8 func_no, 160 struct pci_epf_bar *epf_bar); 161 int pci_epc_map_addr(struct pci_epc *epc, u8 func_no, 162 phys_addr_t phys_addr, 163 u64 pci_addr, size_t size); 164 void pci_epc_unmap_addr(struct pci_epc *epc, u8 func_no, 165 phys_addr_t phys_addr); 166 int pci_epc_set_msi(struct pci_epc *epc, u8 func_no, u8 interrupts); 167 int pci_epc_get_msi(struct pci_epc *epc, u8 func_no); 168 int pci_epc_set_msix(struct pci_epc *epc, u8 func_no, u16 interrupts); 169 int pci_epc_get_msix(struct pci_epc *epc, u8 func_no); 170 int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no, 171 enum pci_epc_irq_type type, u16 interrupt_num); 172 int pci_epc_start(struct pci_epc *epc); 173 void pci_epc_stop(struct pci_epc *epc); 174 const struct pci_epc_features *pci_epc_get_features(struct pci_epc *epc, 175 u8 func_no); 176 unsigned int pci_epc_get_first_free_bar(const struct pci_epc_features 177 *epc_features); 178 struct pci_epc *pci_epc_get(const char *epc_name); 179 void pci_epc_put(struct pci_epc *epc); 180 181 int __pci_epc_mem_init(struct pci_epc *epc, phys_addr_t phys_addr, size_t size, 182 size_t page_size); 183 void pci_epc_mem_exit(struct pci_epc *epc); 184 void __iomem *pci_epc_mem_alloc_addr(struct pci_epc *epc, 185 phys_addr_t *phys_addr, size_t size); 186 void pci_epc_mem_free_addr(struct pci_epc *epc, phys_addr_t phys_addr, 187 void __iomem *virt_addr, size_t size); 188 #endif /* __LINUX_PCI_EPC_H */ 189