1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /** 3 * PCI Endpoint *Controller* (EPC) header file 4 * 5 * Copyright (C) 2017 Texas Instruments 6 * Author: Kishon Vijay Abraham I <[email protected]> 7 */ 8 9 #ifndef __LINUX_PCI_EPC_H 10 #define __LINUX_PCI_EPC_H 11 12 #include <linux/pci-epf.h> 13 14 struct pci_epc; 15 16 enum pci_epc_irq_type { 17 PCI_EPC_IRQ_UNKNOWN, 18 PCI_EPC_IRQ_LEGACY, 19 PCI_EPC_IRQ_MSI, 20 }; 21 22 /** 23 * struct pci_epc_ops - set of function pointers for performing EPC operations 24 * @write_header: ops to populate configuration space header 25 * @set_bar: ops to configure the BAR 26 * @clear_bar: ops to reset the BAR 27 * @map_addr: ops to map CPU address to PCI address 28 * @unmap_addr: ops to unmap CPU address and PCI address 29 * @set_msi: ops to set the requested number of MSI interrupts in the MSI 30 * capability register 31 * @get_msi: ops to get the number of MSI interrupts allocated by the RC from 32 * the MSI capability register 33 * @raise_irq: ops to raise a legacy or MSI interrupt 34 * @start: ops to start the PCI link 35 * @stop: ops to stop the PCI link 36 * @owner: the module owner containing the ops 37 */ 38 struct pci_epc_ops { 39 int (*write_header)(struct pci_epc *epc, u8 func_no, 40 struct pci_epf_header *hdr); 41 int (*set_bar)(struct pci_epc *epc, u8 func_no, 42 struct pci_epf_bar *epf_bar); 43 void (*clear_bar)(struct pci_epc *epc, u8 func_no, 44 struct pci_epf_bar *epf_bar); 45 int (*map_addr)(struct pci_epc *epc, u8 func_no, 46 phys_addr_t addr, u64 pci_addr, size_t size); 47 void (*unmap_addr)(struct pci_epc *epc, u8 func_no, 48 phys_addr_t addr); 49 int (*set_msi)(struct pci_epc *epc, u8 func_no, u8 interrupts); 50 int (*get_msi)(struct pci_epc *epc, u8 func_no); 51 int (*raise_irq)(struct pci_epc *epc, u8 func_no, 52 enum pci_epc_irq_type type, u8 interrupt_num); 53 int (*start)(struct pci_epc *epc); 54 void (*stop)(struct pci_epc *epc); 55 struct module *owner; 56 }; 57 58 /** 59 * struct pci_epc_mem - address space of the endpoint controller 60 * @phys_base: physical base address of the PCI address space 61 * @size: the size of the PCI address space 62 * @bitmap: bitmap to manage the PCI address space 63 * @pages: number of bits representing the address region 64 * @page_size: size of each page 65 */ 66 struct pci_epc_mem { 67 phys_addr_t phys_base; 68 size_t size; 69 unsigned long *bitmap; 70 size_t page_size; 71 int pages; 72 }; 73 74 /** 75 * struct pci_epc - represents the PCI EPC device 76 * @dev: PCI EPC device 77 * @pci_epf: list of endpoint functions present in this EPC device 78 * @ops: function pointers for performing endpoint operations 79 * @mem: address space of the endpoint controller 80 * @max_functions: max number of functions that can be configured in this EPC 81 * @group: configfs group representing the PCI EPC device 82 * @lock: spinlock to protect pci_epc ops 83 */ 84 struct pci_epc { 85 struct device dev; 86 struct list_head pci_epf; 87 const struct pci_epc_ops *ops; 88 struct pci_epc_mem *mem; 89 u8 max_functions; 90 struct config_group *group; 91 /* spinlock to protect against concurrent access of EP controller */ 92 spinlock_t lock; 93 unsigned int features; 94 }; 95 96 #define EPC_FEATURE_NO_LINKUP_NOTIFIER BIT(0) 97 #define EPC_FEATURE_BAR_MASK (BIT(1) | BIT(2) | BIT(3)) 98 #define EPC_FEATURE_SET_BAR(features, bar) \ 99 (features |= (EPC_FEATURE_BAR_MASK & (bar << 1))) 100 #define EPC_FEATURE_GET_BAR(features) \ 101 ((features & EPC_FEATURE_BAR_MASK) >> 1) 102 103 #define to_pci_epc(device) container_of((device), struct pci_epc, dev) 104 105 #define pci_epc_create(dev, ops) \ 106 __pci_epc_create((dev), (ops), THIS_MODULE) 107 #define devm_pci_epc_create(dev, ops) \ 108 __devm_pci_epc_create((dev), (ops), THIS_MODULE) 109 110 #define pci_epc_mem_init(epc, phys_addr, size) \ 111 __pci_epc_mem_init((epc), (phys_addr), (size), PAGE_SIZE) 112 113 static inline void epc_set_drvdata(struct pci_epc *epc, void *data) 114 { 115 dev_set_drvdata(&epc->dev, data); 116 } 117 118 static inline void *epc_get_drvdata(struct pci_epc *epc) 119 { 120 return dev_get_drvdata(&epc->dev); 121 } 122 123 struct pci_epc * 124 __devm_pci_epc_create(struct device *dev, const struct pci_epc_ops *ops, 125 struct module *owner); 126 struct pci_epc * 127 __pci_epc_create(struct device *dev, const struct pci_epc_ops *ops, 128 struct module *owner); 129 void devm_pci_epc_destroy(struct device *dev, struct pci_epc *epc); 130 void pci_epc_destroy(struct pci_epc *epc); 131 int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf); 132 void pci_epc_linkup(struct pci_epc *epc); 133 void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf); 134 int pci_epc_write_header(struct pci_epc *epc, u8 func_no, 135 struct pci_epf_header *hdr); 136 int pci_epc_set_bar(struct pci_epc *epc, u8 func_no, 137 struct pci_epf_bar *epf_bar); 138 void pci_epc_clear_bar(struct pci_epc *epc, u8 func_no, 139 struct pci_epf_bar *epf_bar); 140 int pci_epc_map_addr(struct pci_epc *epc, u8 func_no, 141 phys_addr_t phys_addr, 142 u64 pci_addr, size_t size); 143 void pci_epc_unmap_addr(struct pci_epc *epc, u8 func_no, 144 phys_addr_t phys_addr); 145 int pci_epc_set_msi(struct pci_epc *epc, u8 func_no, u8 interrupts); 146 int pci_epc_get_msi(struct pci_epc *epc, u8 func_no); 147 int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no, 148 enum pci_epc_irq_type type, u8 interrupt_num); 149 int pci_epc_start(struct pci_epc *epc); 150 void pci_epc_stop(struct pci_epc *epc); 151 struct pci_epc *pci_epc_get(const char *epc_name); 152 void pci_epc_put(struct pci_epc *epc); 153 154 int __pci_epc_mem_init(struct pci_epc *epc, phys_addr_t phys_addr, size_t size, 155 size_t page_size); 156 void pci_epc_mem_exit(struct pci_epc *epc); 157 void __iomem *pci_epc_mem_alloc_addr(struct pci_epc *epc, 158 phys_addr_t *phys_addr, size_t size); 159 void pci_epc_mem_free_addr(struct pci_epc *epc, phys_addr_t phys_addr, 160 void __iomem *virt_addr, size_t size); 161 #endif /* __LINUX_PCI_EPC_H */ 162