xref: /linux-6.15/include/linux/msi.h (revision 9cc342f6)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef LINUX_MSI_H
3 #define LINUX_MSI_H
4 
5 #include <linux/kobject.h>
6 #include <linux/list.h>
7 
8 struct msi_msg {
9 	u32	address_lo;	/* low 32 bits of msi message address */
10 	u32	address_hi;	/* high 32 bits of msi message address */
11 	u32	data;		/* 16 bits of msi message data */
12 };
13 
14 extern int pci_msi_ignore_mask;
15 /* Helper functions */
16 struct irq_data;
17 struct msi_desc;
18 struct pci_dev;
19 struct platform_msi_priv_data;
20 void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
21 #ifdef CONFIG_GENERIC_MSI_IRQ
22 void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
23 #else
24 static inline void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
25 {
26 }
27 #endif
28 
29 typedef void (*irq_write_msi_msg_t)(struct msi_desc *desc,
30 				    struct msi_msg *msg);
31 
32 /**
33  * platform_msi_desc - Platform device specific msi descriptor data
34  * @msi_priv_data:	Pointer to platform private data
35  * @msi_index:		The index of the MSI descriptor for multi MSI
36  */
37 struct platform_msi_desc {
38 	struct platform_msi_priv_data	*msi_priv_data;
39 	u16				msi_index;
40 };
41 
42 /**
43  * fsl_mc_msi_desc - FSL-MC device specific msi descriptor data
44  * @msi_index:		The index of the MSI descriptor
45  */
46 struct fsl_mc_msi_desc {
47 	u16				msi_index;
48 };
49 
50 /**
51  * struct msi_desc - Descriptor structure for MSI based interrupts
52  * @list:	List head for management
53  * @irq:	The base interrupt number
54  * @nvec_used:	The number of vectors used
55  * @dev:	Pointer to the device which uses this descriptor
56  * @msg:	The last set MSI message cached for reuse
57  * @affinity:	Optional pointer to a cpu affinity mask for this descriptor
58  *
59  * @masked:	[PCI MSI/X] Mask bits
60  * @is_msix:	[PCI MSI/X] True if MSI-X
61  * @multiple:	[PCI MSI/X] log2 num of messages allocated
62  * @multi_cap:	[PCI MSI/X] log2 num of messages supported
63  * @maskbit:	[PCI MSI/X] Mask-Pending bit supported?
64  * @is_64:	[PCI MSI/X] Address size: 0=32bit 1=64bit
65  * @entry_nr:	[PCI MSI/X] Entry which is described by this descriptor
66  * @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
67  * @mask_pos:	[PCI MSI]   Mask register position
68  * @mask_base:	[PCI MSI-X] Mask register base address
69  * @platform:	[platform]  Platform device specific msi descriptor data
70  * @fsl_mc:	[fsl-mc]    FSL MC device specific msi descriptor data
71  */
72 struct msi_desc {
73 	/* Shared device/bus type independent data */
74 	struct list_head		list;
75 	unsigned int			irq;
76 	unsigned int			nvec_used;
77 	struct device			*dev;
78 	struct msi_msg			msg;
79 	struct irq_affinity_desc	*affinity;
80 
81 	union {
82 		/* PCI MSI/X specific data */
83 		struct {
84 			u32 masked;
85 			struct {
86 				u8	is_msix		: 1;
87 				u8	multiple	: 3;
88 				u8	multi_cap	: 3;
89 				u8	maskbit		: 1;
90 				u8	is_64		: 1;
91 				u16	entry_nr;
92 				unsigned default_irq;
93 			} msi_attrib;
94 			union {
95 				u8	mask_pos;
96 				void __iomem *mask_base;
97 			};
98 		};
99 
100 		/*
101 		 * Non PCI variants add their data structure here. New
102 		 * entries need to use a named structure. We want
103 		 * proper name spaces for this. The PCI part is
104 		 * anonymous for now as it would require an immediate
105 		 * tree wide cleanup.
106 		 */
107 		struct platform_msi_desc platform;
108 		struct fsl_mc_msi_desc fsl_mc;
109 	};
110 };
111 
112 /* Helpers to hide struct msi_desc implementation details */
113 #define msi_desc_to_dev(desc)		((desc)->dev)
114 #define dev_to_msi_list(dev)		(&(dev)->msi_list)
115 #define first_msi_entry(dev)		\
116 	list_first_entry(dev_to_msi_list((dev)), struct msi_desc, list)
117 #define for_each_msi_entry(desc, dev)	\
118 	list_for_each_entry((desc), dev_to_msi_list((dev)), list)
119 #define for_each_msi_entry_safe(desc, tmp, dev)	\
120 	list_for_each_entry_safe((desc), (tmp), dev_to_msi_list((dev)), list)
121 
122 #ifdef CONFIG_PCI_MSI
123 #define first_pci_msi_entry(pdev)	first_msi_entry(&(pdev)->dev)
124 #define for_each_pci_msi_entry(desc, pdev)	\
125 	for_each_msi_entry((desc), &(pdev)->dev)
126 
127 struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc);
128 void *msi_desc_to_pci_sysdata(struct msi_desc *desc);
129 void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg);
130 #else /* CONFIG_PCI_MSI */
131 static inline void *msi_desc_to_pci_sysdata(struct msi_desc *desc)
132 {
133 	return NULL;
134 }
135 static inline void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg)
136 {
137 }
138 #endif /* CONFIG_PCI_MSI */
139 
140 struct msi_desc *alloc_msi_entry(struct device *dev, int nvec,
141 				 const struct irq_affinity_desc *affinity);
142 void free_msi_entry(struct msi_desc *entry);
143 void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
144 void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
145 
146 u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag);
147 u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag);
148 void pci_msi_mask_irq(struct irq_data *data);
149 void pci_msi_unmask_irq(struct irq_data *data);
150 
151 /*
152  * The arch hooks to setup up msi irqs. Those functions are
153  * implemented as weak symbols so that they /can/ be overriden by
154  * architecture specific code if needed.
155  */
156 int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
157 void arch_teardown_msi_irq(unsigned int irq);
158 int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
159 void arch_teardown_msi_irqs(struct pci_dev *dev);
160 void arch_restore_msi_irqs(struct pci_dev *dev);
161 
162 void default_teardown_msi_irqs(struct pci_dev *dev);
163 void default_restore_msi_irqs(struct pci_dev *dev);
164 
165 struct msi_controller {
166 	struct module *owner;
167 	struct device *dev;
168 	struct device_node *of_node;
169 	struct list_head list;
170 
171 	int (*setup_irq)(struct msi_controller *chip, struct pci_dev *dev,
172 			 struct msi_desc *desc);
173 	int (*setup_irqs)(struct msi_controller *chip, struct pci_dev *dev,
174 			  int nvec, int type);
175 	void (*teardown_irq)(struct msi_controller *chip, unsigned int irq);
176 };
177 
178 #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
179 
180 #include <linux/irqhandler.h>
181 #include <asm/msi.h>
182 
183 struct irq_domain;
184 struct irq_domain_ops;
185 struct irq_chip;
186 struct device_node;
187 struct fwnode_handle;
188 struct msi_domain_info;
189 
190 /**
191  * struct msi_domain_ops - MSI interrupt domain callbacks
192  * @get_hwirq:		Retrieve the resulting hw irq number
193  * @msi_init:		Domain specific init function for MSI interrupts
194  * @msi_free:		Domain specific function to free a MSI interrupts
195  * @msi_check:		Callback for verification of the domain/info/dev data
196  * @msi_prepare:	Prepare the allocation of the interrupts in the domain
197  * @msi_finish:		Optional callback to finalize the allocation
198  * @set_desc:		Set the msi descriptor for an interrupt
199  * @handle_error:	Optional error handler if the allocation fails
200  *
201  * @get_hwirq, @msi_init and @msi_free are callbacks used by
202  * msi_create_irq_domain() and related interfaces
203  *
204  * @msi_check, @msi_prepare, @msi_finish, @set_desc and @handle_error
205  * are callbacks used by msi_domain_alloc_irqs() and related
206  * interfaces which are based on msi_desc.
207  */
208 struct msi_domain_ops {
209 	irq_hw_number_t	(*get_hwirq)(struct msi_domain_info *info,
210 				     msi_alloc_info_t *arg);
211 	int		(*msi_init)(struct irq_domain *domain,
212 				    struct msi_domain_info *info,
213 				    unsigned int virq, irq_hw_number_t hwirq,
214 				    msi_alloc_info_t *arg);
215 	void		(*msi_free)(struct irq_domain *domain,
216 				    struct msi_domain_info *info,
217 				    unsigned int virq);
218 	int		(*msi_check)(struct irq_domain *domain,
219 				     struct msi_domain_info *info,
220 				     struct device *dev);
221 	int		(*msi_prepare)(struct irq_domain *domain,
222 				       struct device *dev, int nvec,
223 				       msi_alloc_info_t *arg);
224 	void		(*msi_finish)(msi_alloc_info_t *arg, int retval);
225 	void		(*set_desc)(msi_alloc_info_t *arg,
226 				    struct msi_desc *desc);
227 	int		(*handle_error)(struct irq_domain *domain,
228 					struct msi_desc *desc, int error);
229 };
230 
231 /**
232  * struct msi_domain_info - MSI interrupt domain data
233  * @flags:		Flags to decribe features and capabilities
234  * @ops:		The callback data structure
235  * @chip:		Optional: associated interrupt chip
236  * @chip_data:		Optional: associated interrupt chip data
237  * @handler:		Optional: associated interrupt flow handler
238  * @handler_data:	Optional: associated interrupt flow handler data
239  * @handler_name:	Optional: associated interrupt flow handler name
240  * @data:		Optional: domain specific data
241  */
242 struct msi_domain_info {
243 	u32			flags;
244 	struct msi_domain_ops	*ops;
245 	struct irq_chip		*chip;
246 	void			*chip_data;
247 	irq_flow_handler_t	handler;
248 	void			*handler_data;
249 	const char		*handler_name;
250 	void			*data;
251 };
252 
253 /* Flags for msi_domain_info */
254 enum {
255 	/*
256 	 * Init non implemented ops callbacks with default MSI domain
257 	 * callbacks.
258 	 */
259 	MSI_FLAG_USE_DEF_DOM_OPS	= (1 << 0),
260 	/*
261 	 * Init non implemented chip callbacks with default MSI chip
262 	 * callbacks.
263 	 */
264 	MSI_FLAG_USE_DEF_CHIP_OPS	= (1 << 1),
265 	/* Support multiple PCI MSI interrupts */
266 	MSI_FLAG_MULTI_PCI_MSI		= (1 << 2),
267 	/* Support PCI MSIX interrupts */
268 	MSI_FLAG_PCI_MSIX		= (1 << 3),
269 	/* Needs early activate, required for PCI */
270 	MSI_FLAG_ACTIVATE_EARLY		= (1 << 4),
271 	/*
272 	 * Must reactivate when irq is started even when
273 	 * MSI_FLAG_ACTIVATE_EARLY has been set.
274 	 */
275 	MSI_FLAG_MUST_REACTIVATE	= (1 << 5),
276 	/* Is level-triggered capable, using two messages */
277 	MSI_FLAG_LEVEL_CAPABLE		= (1 << 6),
278 };
279 
280 int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask,
281 			    bool force);
282 
283 struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode,
284 					 struct msi_domain_info *info,
285 					 struct irq_domain *parent);
286 int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
287 			  int nvec);
288 void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
289 struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain);
290 
291 struct irq_domain *platform_msi_create_irq_domain(struct fwnode_handle *fwnode,
292 						  struct msi_domain_info *info,
293 						  struct irq_domain *parent);
294 int platform_msi_domain_alloc_irqs(struct device *dev, unsigned int nvec,
295 				   irq_write_msi_msg_t write_msi_msg);
296 void platform_msi_domain_free_irqs(struct device *dev);
297 
298 /* When an MSI domain is used as an intermediate domain */
299 int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
300 			    int nvec, msi_alloc_info_t *args);
301 int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev,
302 			     int virq, int nvec, msi_alloc_info_t *args);
303 struct irq_domain *
304 __platform_msi_create_device_domain(struct device *dev,
305 				    unsigned int nvec,
306 				    bool is_tree,
307 				    irq_write_msi_msg_t write_msi_msg,
308 				    const struct irq_domain_ops *ops,
309 				    void *host_data);
310 
311 #define platform_msi_create_device_domain(dev, nvec, write, ops, data)	\
312 	__platform_msi_create_device_domain(dev, nvec, false, write, ops, data)
313 #define platform_msi_create_device_tree_domain(dev, nvec, write, ops, data) \
314 	__platform_msi_create_device_domain(dev, nvec, true, write, ops, data)
315 
316 int platform_msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
317 			      unsigned int nr_irqs);
318 void platform_msi_domain_free(struct irq_domain *domain, unsigned int virq,
319 			      unsigned int nvec);
320 void *platform_msi_get_host_data(struct irq_domain *domain);
321 #endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
322 
323 #ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
324 void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg);
325 struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
326 					     struct msi_domain_info *info,
327 					     struct irq_domain *parent);
328 irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev,
329 					  struct msi_desc *desc);
330 int pci_msi_domain_check_cap(struct irq_domain *domain,
331 			     struct msi_domain_info *info, struct device *dev);
332 u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev);
333 struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev);
334 #else
335 static inline struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev)
336 {
337 	return NULL;
338 }
339 #endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */
340 
341 #endif /* LINUX_MSI_H */
342