1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * linux/include/linux/mmc/host.h 4 * 5 * Host driver specific definitions. 6 */ 7 #ifndef LINUX_MMC_HOST_H 8 #define LINUX_MMC_HOST_H 9 10 #include <linux/sched.h> 11 #include <linux/device.h> 12 #include <linux/fault-inject.h> 13 #include <linux/debugfs.h> 14 15 #include <linux/mmc/core.h> 16 #include <linux/mmc/card.h> 17 #include <linux/mmc/pm.h> 18 #include <linux/dma-direction.h> 19 #include <linux/blk-crypto-profile.h> 20 21 struct mmc_ios { 22 unsigned int clock; /* clock rate */ 23 unsigned short vdd; 24 unsigned int power_delay_ms; /* waiting for stable power */ 25 26 /* vdd stores the bit number of the selected voltage range from below. */ 27 28 unsigned char bus_mode; /* command output mode */ 29 30 #define MMC_BUSMODE_OPENDRAIN 1 31 #define MMC_BUSMODE_PUSHPULL 2 32 33 unsigned char chip_select; /* SPI chip select */ 34 35 #define MMC_CS_DONTCARE 0 36 #define MMC_CS_HIGH 1 37 #define MMC_CS_LOW 2 38 39 unsigned char power_mode; /* power supply mode */ 40 41 #define MMC_POWER_OFF 0 42 #define MMC_POWER_UP 1 43 #define MMC_POWER_ON 2 44 #define MMC_POWER_UNDEFINED 3 45 46 unsigned char bus_width; /* data bus width */ 47 48 #define MMC_BUS_WIDTH_1 0 49 #define MMC_BUS_WIDTH_4 2 50 #define MMC_BUS_WIDTH_8 3 51 52 unsigned char timing; /* timing specification used */ 53 54 #define MMC_TIMING_LEGACY 0 55 #define MMC_TIMING_MMC_HS 1 56 #define MMC_TIMING_SD_HS 2 57 #define MMC_TIMING_UHS_SDR12 3 58 #define MMC_TIMING_UHS_SDR25 4 59 #define MMC_TIMING_UHS_SDR50 5 60 #define MMC_TIMING_UHS_SDR104 6 61 #define MMC_TIMING_UHS_DDR50 7 62 #define MMC_TIMING_MMC_DDR52 8 63 #define MMC_TIMING_MMC_HS200 9 64 #define MMC_TIMING_MMC_HS400 10 65 #define MMC_TIMING_SD_EXP 11 66 #define MMC_TIMING_SD_EXP_1_2V 12 67 #define MMC_TIMING_UHS2_SPEED_A 13 68 #define MMC_TIMING_UHS2_SPEED_A_HD 14 69 #define MMC_TIMING_UHS2_SPEED_B 15 70 #define MMC_TIMING_UHS2_SPEED_B_HD 16 71 72 unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */ 73 74 #define MMC_SIGNAL_VOLTAGE_330 0 75 #define MMC_SIGNAL_VOLTAGE_180 1 76 #define MMC_SIGNAL_VOLTAGE_120 2 77 78 unsigned char drv_type; /* driver type (A, B, C, D) */ 79 80 #define MMC_SET_DRIVER_TYPE_B 0 81 #define MMC_SET_DRIVER_TYPE_A 1 82 #define MMC_SET_DRIVER_TYPE_C 2 83 #define MMC_SET_DRIVER_TYPE_D 3 84 85 bool enhanced_strobe; /* hs400es selection */ 86 }; 87 88 struct mmc_clk_phase { 89 bool valid; 90 u16 in_deg; 91 u16 out_deg; 92 }; 93 94 #define MMC_NUM_CLK_PHASES (MMC_TIMING_MMC_HS400 + 1) 95 struct mmc_clk_phase_map { 96 struct mmc_clk_phase phase[MMC_NUM_CLK_PHASES]; 97 }; 98 99 struct sd_uhs2_caps { 100 /* TODO: Add UHS-II capabilities for the host. */ 101 }; 102 103 enum sd_uhs2_operation { 104 UHS2_SET_IOS, 105 }; 106 107 struct mmc_host; 108 109 enum mmc_err_stat { 110 MMC_ERR_CMD_TIMEOUT, 111 MMC_ERR_CMD_CRC, 112 MMC_ERR_DAT_TIMEOUT, 113 MMC_ERR_DAT_CRC, 114 MMC_ERR_AUTO_CMD, 115 MMC_ERR_ADMA, 116 MMC_ERR_TUNING, 117 MMC_ERR_CMDQ_RED, 118 MMC_ERR_CMDQ_GCE, 119 MMC_ERR_CMDQ_ICCE, 120 MMC_ERR_REQ_TIMEOUT, 121 MMC_ERR_CMDQ_REQ_TIMEOUT, 122 MMC_ERR_ICE_CFG, 123 MMC_ERR_CTRL_TIMEOUT, 124 MMC_ERR_UNEXPECTED_IRQ, 125 MMC_ERR_MAX, 126 }; 127 128 struct mmc_host_ops { 129 /* 130 * It is optional for the host to implement pre_req and post_req in 131 * order to support double buffering of requests (prepare one 132 * request while another request is active). 133 * pre_req() must always be followed by a post_req(). 134 * To undo a call made to pre_req(), call post_req() with 135 * a nonzero err condition. 136 */ 137 void (*post_req)(struct mmc_host *host, struct mmc_request *req, 138 int err); 139 void (*pre_req)(struct mmc_host *host, struct mmc_request *req); 140 void (*request)(struct mmc_host *host, struct mmc_request *req); 141 /* Submit one request to host in atomic context. */ 142 int (*request_atomic)(struct mmc_host *host, 143 struct mmc_request *req); 144 145 /* 146 * Avoid calling the next three functions too often or in a "fast 147 * path", since underlaying controller might implement them in an 148 * expensive and/or slow way. Also note that these functions might 149 * sleep, so don't call them in the atomic contexts! 150 */ 151 152 /* 153 * Notes to the set_ios callback: 154 * ios->clock might be 0. For some controllers, setting 0Hz 155 * as any other frequency works. However, some controllers 156 * explicitly need to disable the clock. Otherwise e.g. voltage 157 * switching might fail because the SDCLK is not really quiet. 158 */ 159 void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios); 160 161 /* 162 * Return values for the get_ro callback should be: 163 * 0 for a read/write card 164 * 1 for a read-only card 165 * -ENOSYS when not supported (equal to NULL callback) 166 * or a negative errno value when something bad happened 167 */ 168 int (*get_ro)(struct mmc_host *host); 169 170 /* 171 * Return values for the get_cd callback should be: 172 * 0 for a absent card 173 * 1 for a present card 174 * -ENOSYS when not supported (equal to NULL callback) 175 * or a negative errno value when something bad happened 176 */ 177 int (*get_cd)(struct mmc_host *host); 178 179 void (*enable_sdio_irq)(struct mmc_host *host, int enable); 180 /* Mandatory callback when using MMC_CAP2_SDIO_IRQ_NOTHREAD. */ 181 void (*ack_sdio_irq)(struct mmc_host *host); 182 183 /* optional callback for HC quirks */ 184 void (*init_card)(struct mmc_host *host, struct mmc_card *card); 185 186 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios); 187 188 /* Check if the card is pulling dat[0] low */ 189 int (*card_busy)(struct mmc_host *host); 190 191 /* The tuning command opcode value is different for SD and eMMC cards */ 192 int (*execute_tuning)(struct mmc_host *host, u32 opcode); 193 194 /* Prepare HS400 target operating frequency depending host driver */ 195 int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios); 196 197 /* Execute HS400 tuning depending host driver */ 198 int (*execute_hs400_tuning)(struct mmc_host *host, struct mmc_card *card); 199 200 /* Optional callback to prepare for SD high-speed tuning */ 201 int (*prepare_sd_hs_tuning)(struct mmc_host *host, struct mmc_card *card); 202 203 /* Optional callback to execute SD high-speed tuning */ 204 int (*execute_sd_hs_tuning)(struct mmc_host *host, struct mmc_card *card); 205 206 /* Prepare switch to DDR during the HS400 init sequence */ 207 int (*hs400_prepare_ddr)(struct mmc_host *host); 208 209 /* Prepare for switching from HS400 to HS200 */ 210 void (*hs400_downgrade)(struct mmc_host *host); 211 212 /* Complete selection of HS400 */ 213 void (*hs400_complete)(struct mmc_host *host); 214 215 /* Prepare enhanced strobe depending host driver */ 216 void (*hs400_enhanced_strobe)(struct mmc_host *host, 217 struct mmc_ios *ios); 218 int (*select_drive_strength)(struct mmc_card *card, 219 unsigned int max_dtr, int host_drv, 220 int card_drv, int *drv_type); 221 /* Reset the eMMC card via RST_n */ 222 void (*card_hw_reset)(struct mmc_host *host); 223 void (*card_event)(struct mmc_host *host); 224 225 /* 226 * Optional callback to support controllers with HW issues for multiple 227 * I/O. Returns the number of supported blocks for the request. 228 */ 229 int (*multi_io_quirk)(struct mmc_card *card, 230 unsigned int direction, int blk_size); 231 232 /* Initialize an SD express card, mandatory for MMC_CAP2_SD_EXP. */ 233 int (*init_sd_express)(struct mmc_host *host, struct mmc_ios *ios); 234 235 /* 236 * The uhs2_control callback is used to execute SD UHS-II specific 237 * operations. It's mandatory to implement for hosts that supports the 238 * SD UHS-II interface (MMC_CAP2_SD_UHS2). Expected return values are a 239 * negative errno in case of a failure or zero for success. 240 */ 241 int (*uhs2_control)(struct mmc_host *host, enum sd_uhs2_operation op); 242 }; 243 244 struct mmc_cqe_ops { 245 /* Allocate resources, and make the CQE operational */ 246 int (*cqe_enable)(struct mmc_host *host, struct mmc_card *card); 247 /* Free resources, and make the CQE non-operational */ 248 void (*cqe_disable)(struct mmc_host *host); 249 /* 250 * Issue a read, write or DCMD request to the CQE. Also deal with the 251 * effect of ->cqe_off(). 252 */ 253 int (*cqe_request)(struct mmc_host *host, struct mmc_request *mrq); 254 /* Free resources (e.g. DMA mapping) associated with the request */ 255 void (*cqe_post_req)(struct mmc_host *host, struct mmc_request *mrq); 256 /* 257 * Prepare the CQE and host controller to accept non-CQ commands. There 258 * is no corresponding ->cqe_on(), instead ->cqe_request() is required 259 * to deal with that. 260 */ 261 void (*cqe_off)(struct mmc_host *host); 262 /* 263 * Wait for all CQE tasks to complete. Return an error if recovery 264 * becomes necessary. 265 */ 266 int (*cqe_wait_for_idle)(struct mmc_host *host); 267 /* 268 * Notify CQE that a request has timed out. Return false if the request 269 * completed or true if a timeout happened in which case indicate if 270 * recovery is needed. 271 */ 272 bool (*cqe_timeout)(struct mmc_host *host, struct mmc_request *mrq, 273 bool *recovery_needed); 274 /* 275 * Stop all CQE activity and prepare the CQE and host controller to 276 * accept recovery commands. 277 */ 278 void (*cqe_recovery_start)(struct mmc_host *host); 279 /* 280 * Clear the queue and call mmc_cqe_request_done() on all requests. 281 * Requests that errored will have the error set on the mmc_request 282 * (data->error or cmd->error for DCMD). Requests that did not error 283 * will have zero data bytes transferred. 284 */ 285 void (*cqe_recovery_finish)(struct mmc_host *host); 286 }; 287 288 /** 289 * struct mmc_slot - MMC slot functions 290 * 291 * @cd_irq: MMC/SD-card slot hotplug detection IRQ or -EINVAL 292 * @handler_priv: MMC/SD-card slot context 293 * 294 * Some MMC/SD host controllers implement slot-functions like card and 295 * write-protect detection natively. However, a large number of controllers 296 * leave these functions to the CPU. This struct provides a hook to attach 297 * such slot-function drivers. 298 */ 299 struct mmc_slot { 300 int cd_irq; 301 bool cd_wake_enabled; 302 void *handler_priv; 303 }; 304 305 struct regulator; 306 struct mmc_pwrseq; 307 308 struct mmc_supply { 309 struct regulator *vmmc; /* Card power supply */ 310 struct regulator *vqmmc; /* Optional Vccq supply */ 311 }; 312 313 struct mmc_ctx { 314 struct task_struct *task; 315 }; 316 317 struct mmc_host { 318 struct device *parent; 319 struct device class_dev; 320 int index; 321 const struct mmc_host_ops *ops; 322 struct mmc_pwrseq *pwrseq; 323 unsigned int f_min; 324 unsigned int f_max; 325 unsigned int f_init; 326 u32 ocr_avail; 327 u32 ocr_avail_sdio; /* SDIO-specific OCR */ 328 u32 ocr_avail_sd; /* SD-specific OCR */ 329 u32 ocr_avail_mmc; /* MMC-specific OCR */ 330 struct wakeup_source *ws; /* Enable consume of uevents */ 331 u32 max_current_330; 332 u32 max_current_300; 333 u32 max_current_180; 334 335 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ 336 #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ 337 #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ 338 #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */ 339 #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */ 340 #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */ 341 #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */ 342 #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */ 343 #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */ 344 #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */ 345 #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */ 346 #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */ 347 #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */ 348 #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */ 349 #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */ 350 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ 351 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ 352 353 u32 caps; /* Host capabilities */ 354 355 #define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */ 356 #define MMC_CAP_MMC_HIGHSPEED (1 << 1) /* Can do MMC high-speed timing */ 357 #define MMC_CAP_SD_HIGHSPEED (1 << 2) /* Can do SD high-speed timing */ 358 #define MMC_CAP_SDIO_IRQ (1 << 3) /* Can signal pending SDIO IRQs */ 359 #define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */ 360 #define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */ 361 #define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */ 362 #define MMC_CAP_AGGRESSIVE_PM (1 << 7) /* Suspend (e)MMC/SD at idle */ 363 #define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */ 364 #define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */ 365 #define MMC_CAP_3_3V_DDR (1 << 11) /* Host supports eMMC DDR 3.3V */ 366 #define MMC_CAP_1_8V_DDR (1 << 12) /* Host supports eMMC DDR 1.8V */ 367 #define MMC_CAP_1_2V_DDR (1 << 13) /* Host supports eMMC DDR 1.2V */ 368 #define MMC_CAP_DDR (MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR | \ 369 MMC_CAP_1_2V_DDR) 370 #define MMC_CAP_POWER_OFF_CARD (1 << 14) /* Can power off after boot */ 371 #define MMC_CAP_BUS_WIDTH_TEST (1 << 15) /* CMD14/CMD19 bus width ok */ 372 #define MMC_CAP_UHS_SDR12 (1 << 16) /* Host supports UHS SDR12 mode */ 373 #define MMC_CAP_UHS_SDR25 (1 << 17) /* Host supports UHS SDR25 mode */ 374 #define MMC_CAP_UHS_SDR50 (1 << 18) /* Host supports UHS SDR50 mode */ 375 #define MMC_CAP_UHS_SDR104 (1 << 19) /* Host supports UHS SDR104 mode */ 376 #define MMC_CAP_UHS_DDR50 (1 << 20) /* Host supports UHS DDR50 mode */ 377 #define MMC_CAP_UHS (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \ 378 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \ 379 MMC_CAP_UHS_DDR50) 380 #define MMC_CAP_SYNC_RUNTIME_PM (1 << 21) /* Synced runtime PM suspends. */ 381 #define MMC_CAP_NEED_RSP_BUSY (1 << 22) /* Commands with R1B can't use R1. */ 382 #define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */ 383 #define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */ 384 #define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */ 385 #define MMC_CAP_DONE_COMPLETE (1 << 27) /* RW reqs can be completed within mmc_request_done() */ 386 #define MMC_CAP_CD_WAKE (1 << 28) /* Enable card detect wake */ 387 #define MMC_CAP_CMD_DURING_TFR (1 << 29) /* Commands during data transfer */ 388 #define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */ 389 #define MMC_CAP_HW_RESET (1 << 31) /* Reset the eMMC card via RST_n */ 390 391 u32 caps2; /* More host capabilities */ 392 393 #define MMC_CAP2_BOOTPART_NOACC (1 << 0) /* Boot partition no access */ 394 #define MMC_CAP2_FULL_PWR_CYCLE (1 << 2) /* Can do full power cycle */ 395 #define MMC_CAP2_FULL_PWR_CYCLE_IN_SUSPEND (1 << 3) /* Can do full power cycle in suspend */ 396 #define MMC_CAP2_HS200_1_8V_SDR (1 << 5) /* can support */ 397 #define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */ 398 #define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \ 399 MMC_CAP2_HS200_1_2V_SDR) 400 #define MMC_CAP2_SD_EXP (1 << 7) /* SD express via PCIe */ 401 #define MMC_CAP2_SD_EXP_1_2V (1 << 8) /* SD express 1.2V */ 402 #define MMC_CAP2_SD_UHS2 (1 << 9) /* SD UHS-II support */ 403 #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */ 404 #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */ 405 #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) /* Don't power up before scan */ 406 #define MMC_CAP2_HS400_1_8V (1 << 15) /* Can support HS400 1.8V */ 407 #define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */ 408 #define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \ 409 MMC_CAP2_HS400_1_2V) 410 #define MMC_CAP2_HSX00_1_8V (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V) 411 #define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V) 412 #define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17) 413 #define MMC_CAP2_NO_WRITE_PROTECT (1 << 18) /* No physical write protect pin, assume that card is always read-write */ 414 #define MMC_CAP2_NO_SDIO (1 << 19) /* Do not send SDIO commands during initialization */ 415 #define MMC_CAP2_HS400_ES (1 << 20) /* Host supports enhanced strobe */ 416 #define MMC_CAP2_NO_SD (1 << 21) /* Do not send SD commands during initialization */ 417 #define MMC_CAP2_NO_MMC (1 << 22) /* Do not send (e)MMC commands during initialization */ 418 #define MMC_CAP2_CQE (1 << 23) /* Has eMMC command queue engine */ 419 #define MMC_CAP2_CQE_DCMD (1 << 24) /* CQE can issue a direct command */ 420 #define MMC_CAP2_AVOID_3_3V (1 << 25) /* Host must negotiate down from 3.3V */ 421 #define MMC_CAP2_MERGE_CAPABLE (1 << 26) /* Host can merge a segment over the segment size */ 422 #ifdef CONFIG_MMC_CRYPTO 423 #define MMC_CAP2_CRYPTO (1 << 27) /* Host supports inline encryption */ 424 #else 425 #define MMC_CAP2_CRYPTO 0 426 #endif 427 #define MMC_CAP2_ALT_GPT_TEGRA (1 << 28) /* Host with eMMC that has GPT entry at a non-standard location */ 428 429 struct sd_uhs2_caps uhs2_caps; /* Host UHS-II capabilities */ 430 431 int fixed_drv_type; /* fixed driver type for non-removable media */ 432 433 mmc_pm_flag_t pm_caps; /* supported pm features */ 434 435 /* host specific block data */ 436 unsigned int max_seg_size; /* lim->max_segment_size */ 437 unsigned short max_segs; /* lim->max_segments */ 438 unsigned short unused; 439 unsigned int max_req_size; /* maximum number of bytes in one req */ 440 unsigned int max_blk_size; /* maximum size of one mmc block */ 441 unsigned int max_blk_count; /* maximum number of blocks in one req */ 442 unsigned int max_busy_timeout; /* max busy timeout in ms */ 443 444 /* private data */ 445 spinlock_t lock; /* lock for claim and bus ops */ 446 447 struct mmc_ios ios; /* current io bus settings */ 448 449 /* group bitfields together to minimize padding */ 450 unsigned int use_spi_crc:1; 451 unsigned int claimed:1; /* host exclusively claimed */ 452 unsigned int doing_init_tune:1; /* initial tuning in progress */ 453 unsigned int can_retune:1; /* re-tuning can be used */ 454 unsigned int doing_retune:1; /* re-tuning in progress */ 455 unsigned int retune_now:1; /* do re-tuning at next req */ 456 unsigned int retune_paused:1; /* re-tuning is temporarily disabled */ 457 unsigned int retune_crc_disable:1; /* don't trigger retune upon crc */ 458 unsigned int can_dma_map_merge:1; /* merging can be used */ 459 unsigned int vqmmc_enabled:1; /* vqmmc regulator is enabled */ 460 461 int rescan_disable; /* disable card detection */ 462 int rescan_entered; /* used with nonremovable devices */ 463 464 int need_retune; /* re-tuning is needed */ 465 int hold_retune; /* hold off re-tuning */ 466 unsigned int retune_period; /* re-tuning period in secs */ 467 struct timer_list retune_timer; /* for periodic re-tuning */ 468 469 bool trigger_card_event; /* card_event necessary */ 470 471 struct mmc_card *card; /* device attached to this host */ 472 473 wait_queue_head_t wq; 474 struct mmc_ctx *claimer; /* context that has host claimed */ 475 int claim_cnt; /* "claim" nesting count */ 476 struct mmc_ctx default_ctx; /* default context */ 477 478 struct delayed_work detect; 479 int detect_change; /* card detect flag */ 480 struct mmc_slot slot; 481 482 const struct mmc_bus_ops *bus_ops; /* current bus driver */ 483 484 unsigned int sdio_irqs; 485 struct task_struct *sdio_irq_thread; 486 struct work_struct sdio_irq_work; 487 bool sdio_irq_pending; 488 atomic_t sdio_irq_thread_abort; 489 490 mmc_pm_flag_t pm_flags; /* requested pm features */ 491 492 struct led_trigger *led; /* activity led */ 493 494 #ifdef CONFIG_REGULATOR 495 bool regulator_enabled; /* regulator state */ 496 #endif 497 struct mmc_supply supply; 498 499 struct dentry *debugfs_root; 500 501 /* Ongoing data transfer that allows commands during transfer */ 502 struct mmc_request *ongoing_mrq; 503 504 #ifdef CONFIG_FAIL_MMC_REQUEST 505 struct fault_attr fail_mmc_request; 506 #endif 507 508 unsigned int actual_clock; /* Actual HC clock rate */ 509 510 unsigned int slotno; /* used for sdio acpi binding */ 511 512 int dsr_req; /* DSR value is valid */ 513 u32 dsr; /* optional driver stage (DSR) value */ 514 515 /* Command Queue Engine (CQE) support */ 516 const struct mmc_cqe_ops *cqe_ops; 517 void *cqe_private; 518 int cqe_qdepth; 519 bool cqe_enabled; 520 bool cqe_on; 521 522 /* Inline encryption support */ 523 #ifdef CONFIG_MMC_CRYPTO 524 struct blk_crypto_profile crypto_profile; 525 #endif 526 527 /* Host Software Queue support */ 528 bool hsq_enabled; 529 int hsq_depth; 530 531 u32 err_stats[MMC_ERR_MAX]; 532 unsigned long private[] ____cacheline_aligned; 533 }; 534 535 struct device_node; 536 537 struct mmc_host *mmc_alloc_host(int extra, struct device *); 538 struct mmc_host *devm_mmc_alloc_host(struct device *dev, int extra); 539 int mmc_add_host(struct mmc_host *); 540 void mmc_remove_host(struct mmc_host *); 541 void mmc_free_host(struct mmc_host *); 542 void mmc_of_parse_clk_phase(struct device *dev, 543 struct mmc_clk_phase_map *map); 544 int mmc_of_parse(struct mmc_host *host); 545 int mmc_of_parse_voltage(struct mmc_host *host, u32 *mask); 546 547 static inline void *mmc_priv(struct mmc_host *host) 548 { 549 return (void *)host->private; 550 } 551 552 static inline struct mmc_host *mmc_from_priv(void *priv) 553 { 554 return container_of(priv, struct mmc_host, private); 555 } 556 557 #define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI) 558 559 #define mmc_dev(x) ((x)->parent) 560 #define mmc_classdev(x) (&(x)->class_dev) 561 #define mmc_hostname(x) (dev_name(&(x)->class_dev)) 562 563 void mmc_detect_change(struct mmc_host *, unsigned long delay); 564 void mmc_request_done(struct mmc_host *, struct mmc_request *); 565 void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq); 566 567 void mmc_cqe_request_done(struct mmc_host *host, struct mmc_request *mrq); 568 569 /* 570 * May be called from host driver's system/runtime suspend/resume callbacks, 571 * to know if SDIO IRQs has been claimed. 572 */ 573 static inline bool sdio_irq_claimed(struct mmc_host *host) 574 { 575 return host->sdio_irqs > 0; 576 } 577 578 static inline void mmc_signal_sdio_irq(struct mmc_host *host) 579 { 580 host->ops->enable_sdio_irq(host, 0); 581 host->sdio_irq_pending = true; 582 if (host->sdio_irq_thread) 583 wake_up_process(host->sdio_irq_thread); 584 } 585 586 void sdio_signal_irq(struct mmc_host *host); 587 588 #ifdef CONFIG_REGULATOR 589 int mmc_regulator_set_ocr(struct mmc_host *mmc, 590 struct regulator *supply, 591 unsigned short vdd_bit); 592 int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios); 593 #else 594 static inline int mmc_regulator_set_ocr(struct mmc_host *mmc, 595 struct regulator *supply, 596 unsigned short vdd_bit) 597 { 598 return 0; 599 } 600 601 static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc, 602 struct mmc_ios *ios) 603 { 604 return -EINVAL; 605 } 606 #endif 607 608 int mmc_regulator_get_supply(struct mmc_host *mmc); 609 int mmc_regulator_enable_vqmmc(struct mmc_host *mmc); 610 void mmc_regulator_disable_vqmmc(struct mmc_host *mmc); 611 612 static inline int mmc_card_is_removable(struct mmc_host *host) 613 { 614 return !(host->caps & MMC_CAP_NONREMOVABLE); 615 } 616 617 static inline int mmc_card_keep_power(struct mmc_host *host) 618 { 619 return host->pm_flags & MMC_PM_KEEP_POWER; 620 } 621 622 static inline int mmc_card_wake_sdio_irq(struct mmc_host *host) 623 { 624 return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ; 625 } 626 627 /* TODO: Move to private header */ 628 static inline int mmc_card_hs(struct mmc_card *card) 629 { 630 return card->host->ios.timing == MMC_TIMING_SD_HS || 631 card->host->ios.timing == MMC_TIMING_MMC_HS; 632 } 633 634 /* TODO: Move to private header */ 635 static inline int mmc_card_uhs(struct mmc_card *card) 636 { 637 return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 && 638 card->host->ios.timing <= MMC_TIMING_UHS_DDR50; 639 } 640 641 void mmc_retune_timer_stop(struct mmc_host *host); 642 643 static inline void mmc_retune_needed(struct mmc_host *host) 644 { 645 if (host->can_retune) 646 host->need_retune = 1; 647 } 648 649 static inline bool mmc_can_retune(struct mmc_host *host) 650 { 651 return host->can_retune == 1; 652 } 653 654 static inline bool mmc_doing_retune(struct mmc_host *host) 655 { 656 return host->doing_retune == 1; 657 } 658 659 static inline bool mmc_doing_tune(struct mmc_host *host) 660 { 661 return host->doing_retune == 1 || host->doing_init_tune == 1; 662 } 663 664 static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data) 665 { 666 return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE; 667 } 668 669 static inline void mmc_debugfs_err_stats_inc(struct mmc_host *host, 670 enum mmc_err_stat stat) 671 { 672 host->err_stats[stat] += 1; 673 } 674 675 int mmc_sd_switch(struct mmc_card *card, bool mode, int group, 676 u8 value, u8 *resp); 677 int mmc_send_status(struct mmc_card *card, u32 *status); 678 int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error); 679 int mmc_send_abort_tuning(struct mmc_host *host, u32 opcode); 680 int mmc_get_ext_csd(struct mmc_card *card, u8 **new_ext_csd); 681 682 #endif /* LINUX_MMC_HOST_H */ 683