1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. 4 * 5 */ 6 #ifndef _MHI_H_ 7 #define _MHI_H_ 8 9 #include <linux/device.h> 10 #include <linux/dma-direction.h> 11 #include <linux/mutex.h> 12 #include <linux/skbuff.h> 13 #include <linux/slab.h> 14 #include <linux/spinlock.h> 15 #include <linux/wait.h> 16 #include <linux/workqueue.h> 17 18 #define MHI_MAX_OEM_PK_HASH_SEGMENTS 16 19 20 struct mhi_chan; 21 struct mhi_event; 22 struct mhi_ctxt; 23 struct mhi_cmd; 24 struct mhi_buf_info; 25 26 /** 27 * enum mhi_callback - MHI callback 28 * @MHI_CB_IDLE: MHI entered idle state 29 * @MHI_CB_PENDING_DATA: New data available for client to process 30 * @MHI_CB_LPM_ENTER: MHI host entered low power mode 31 * @MHI_CB_LPM_EXIT: MHI host about to exit low power mode 32 * @MHI_CB_EE_RDDM: MHI device entered RDDM exec env 33 * @MHI_CB_EE_MISSION_MODE: MHI device entered Mission Mode exec env 34 * @MHI_CB_SYS_ERROR: MHI device entered error state (may recover) 35 * @MHI_CB_FATAL_ERROR: MHI device entered fatal error state 36 * @MHI_CB_BW_REQ: Received a bandwidth switch request from device 37 */ 38 enum mhi_callback { 39 MHI_CB_IDLE, 40 MHI_CB_PENDING_DATA, 41 MHI_CB_LPM_ENTER, 42 MHI_CB_LPM_EXIT, 43 MHI_CB_EE_RDDM, 44 MHI_CB_EE_MISSION_MODE, 45 MHI_CB_SYS_ERROR, 46 MHI_CB_FATAL_ERROR, 47 MHI_CB_BW_REQ, 48 }; 49 50 /** 51 * enum mhi_flags - Transfer flags 52 * @MHI_EOB: End of buffer for bulk transfer 53 * @MHI_EOT: End of transfer 54 * @MHI_CHAIN: Linked transfer 55 */ 56 enum mhi_flags { 57 MHI_EOB = BIT(0), 58 MHI_EOT = BIT(1), 59 MHI_CHAIN = BIT(2), 60 }; 61 62 /** 63 * enum mhi_device_type - Device types 64 * @MHI_DEVICE_XFER: Handles data transfer 65 * @MHI_DEVICE_CONTROLLER: Control device 66 */ 67 enum mhi_device_type { 68 MHI_DEVICE_XFER, 69 MHI_DEVICE_CONTROLLER, 70 }; 71 72 /** 73 * enum mhi_ch_type - Channel types 74 * @MHI_CH_TYPE_INVALID: Invalid channel type 75 * @MHI_CH_TYPE_OUTBOUND: Outbound channel to the device 76 * @MHI_CH_TYPE_INBOUND: Inbound channel from the device 77 * @MHI_CH_TYPE_INBOUND_COALESCED: Coalesced channel for the device to combine 78 * multiple packets and send them as a single 79 * large packet to reduce CPU consumption 80 */ 81 enum mhi_ch_type { 82 MHI_CH_TYPE_INVALID = 0, 83 MHI_CH_TYPE_OUTBOUND = DMA_TO_DEVICE, 84 MHI_CH_TYPE_INBOUND = DMA_FROM_DEVICE, 85 MHI_CH_TYPE_INBOUND_COALESCED = 3, 86 }; 87 88 /** 89 * struct image_info - Firmware and RDDM table 90 * @mhi_buf: Buffer for firmware and RDDM table 91 * @entries: # of entries in table 92 */ 93 struct image_info { 94 struct mhi_buf *mhi_buf; 95 /* private: from internal.h */ 96 struct bhi_vec_entry *bhi_vec; 97 /* public: */ 98 u32 entries; 99 }; 100 101 /** 102 * struct mhi_link_info - BW requirement 103 * target_link_speed - Link speed as defined by TLS bits in LinkControl reg 104 * target_link_width - Link width as defined by NLW bits in LinkStatus reg 105 */ 106 struct mhi_link_info { 107 unsigned int target_link_speed; 108 unsigned int target_link_width; 109 }; 110 111 /** 112 * enum mhi_ee_type - Execution environment types 113 * @MHI_EE_PBL: Primary Bootloader 114 * @MHI_EE_SBL: Secondary Bootloader 115 * @MHI_EE_AMSS: Modem, aka the primary runtime EE 116 * @MHI_EE_RDDM: Ram dump download mode 117 * @MHI_EE_WFW: WLAN firmware mode 118 * @MHI_EE_PTHRU: Passthrough 119 * @MHI_EE_EDL: Embedded downloader 120 * @MHI_EE_FP: Flash Programmer Environment 121 */ 122 enum mhi_ee_type { 123 MHI_EE_PBL, 124 MHI_EE_SBL, 125 MHI_EE_AMSS, 126 MHI_EE_RDDM, 127 MHI_EE_WFW, 128 MHI_EE_PTHRU, 129 MHI_EE_EDL, 130 MHI_EE_FP, 131 MHI_EE_MAX_SUPPORTED = MHI_EE_FP, 132 MHI_EE_DISABLE_TRANSITION, /* local EE, not related to mhi spec */ 133 MHI_EE_NOT_SUPPORTED, 134 MHI_EE_MAX, 135 }; 136 137 /** 138 * enum mhi_state - MHI states 139 * @MHI_STATE_RESET: Reset state 140 * @MHI_STATE_READY: Ready state 141 * @MHI_STATE_M0: M0 state 142 * @MHI_STATE_M1: M1 state 143 * @MHI_STATE_M2: M2 state 144 * @MHI_STATE_M3: M3 state 145 * @MHI_STATE_M3_FAST: M3 Fast state 146 * @MHI_STATE_BHI: BHI state 147 * @MHI_STATE_SYS_ERR: System Error state 148 */ 149 enum mhi_state { 150 MHI_STATE_RESET = 0x0, 151 MHI_STATE_READY = 0x1, 152 MHI_STATE_M0 = 0x2, 153 MHI_STATE_M1 = 0x3, 154 MHI_STATE_M2 = 0x4, 155 MHI_STATE_M3 = 0x5, 156 MHI_STATE_M3_FAST = 0x6, 157 MHI_STATE_BHI = 0x7, 158 MHI_STATE_SYS_ERR = 0xFF, 159 MHI_STATE_MAX, 160 }; 161 162 /** 163 * enum mhi_ch_ee_mask - Execution environment mask for channel 164 * @MHI_CH_EE_PBL: Allow channel to be used in PBL EE 165 * @MHI_CH_EE_SBL: Allow channel to be used in SBL EE 166 * @MHI_CH_EE_AMSS: Allow channel to be used in AMSS EE 167 * @MHI_CH_EE_RDDM: Allow channel to be used in RDDM EE 168 * @MHI_CH_EE_PTHRU: Allow channel to be used in PTHRU EE 169 * @MHI_CH_EE_WFW: Allow channel to be used in WFW EE 170 * @MHI_CH_EE_EDL: Allow channel to be used in EDL EE 171 */ 172 enum mhi_ch_ee_mask { 173 MHI_CH_EE_PBL = BIT(MHI_EE_PBL), 174 MHI_CH_EE_SBL = BIT(MHI_EE_SBL), 175 MHI_CH_EE_AMSS = BIT(MHI_EE_AMSS), 176 MHI_CH_EE_RDDM = BIT(MHI_EE_RDDM), 177 MHI_CH_EE_PTHRU = BIT(MHI_EE_PTHRU), 178 MHI_CH_EE_WFW = BIT(MHI_EE_WFW), 179 MHI_CH_EE_EDL = BIT(MHI_EE_EDL), 180 }; 181 182 /** 183 * enum mhi_er_data_type - Event ring data types 184 * @MHI_ER_DATA: Only client data over this ring 185 * @MHI_ER_CTRL: MHI control data and client data 186 */ 187 enum mhi_er_data_type { 188 MHI_ER_DATA, 189 MHI_ER_CTRL, 190 }; 191 192 /** 193 * enum mhi_db_brst_mode - Doorbell mode 194 * @MHI_DB_BRST_DISABLE: Burst mode disable 195 * @MHI_DB_BRST_ENABLE: Burst mode enable 196 */ 197 enum mhi_db_brst_mode { 198 MHI_DB_BRST_DISABLE = 0x2, 199 MHI_DB_BRST_ENABLE = 0x3, 200 }; 201 202 /** 203 * struct mhi_channel_config - Channel configuration structure for controller 204 * @name: The name of this channel 205 * @num: The number assigned to this channel 206 * @num_elements: The number of elements that can be queued to this channel 207 * @local_elements: The local ring length of the channel 208 * @event_ring: The event ring index that services this channel 209 * @dir: Direction that data may flow on this channel 210 * @type: Channel type 211 * @ee_mask: Execution Environment mask for this channel 212 * @pollcfg: Polling configuration for burst mode. 0 is default. milliseconds 213 for UL channels, multiple of 8 ring elements for DL channels 214 * @doorbell: Doorbell mode 215 * @lpm_notify: The channel master requires low power mode notifications 216 * @offload_channel: The client manages the channel completely 217 * @doorbell_mode_switch: Channel switches to doorbell mode on M0 transition 218 * @auto_queue: Framework will automatically queue buffers for DL traffic 219 * @wake-capable: Channel capable of waking up the system 220 */ 221 struct mhi_channel_config { 222 char *name; 223 u32 num; 224 u32 num_elements; 225 u32 local_elements; 226 u32 event_ring; 227 enum dma_data_direction dir; 228 enum mhi_ch_type type; 229 u32 ee_mask; 230 u32 pollcfg; 231 enum mhi_db_brst_mode doorbell; 232 bool lpm_notify; 233 bool offload_channel; 234 bool doorbell_mode_switch; 235 bool auto_queue; 236 bool wake_capable; 237 }; 238 239 /** 240 * struct mhi_event_config - Event ring configuration structure for controller 241 * @num_elements: The number of elements that can be queued to this ring 242 * @irq_moderation_ms: Delay irq for additional events to be aggregated 243 * @irq: IRQ associated with this ring 244 * @channel: Dedicated channel number. U32_MAX indicates a non-dedicated ring 245 * @priority: Priority of this ring. Use 1 for now 246 * @mode: Doorbell mode 247 * @data_type: Type of data this ring will process 248 * @hardware_event: This ring is associated with hardware channels 249 * @client_managed: This ring is client managed 250 * @offload_channel: This ring is associated with an offloaded channel 251 */ 252 struct mhi_event_config { 253 u32 num_elements; 254 u32 irq_moderation_ms; 255 u32 irq; 256 u32 channel; 257 u32 priority; 258 enum mhi_db_brst_mode mode; 259 enum mhi_er_data_type data_type; 260 bool hardware_event; 261 bool client_managed; 262 bool offload_channel; 263 }; 264 265 /** 266 * struct mhi_controller_config - Root MHI controller configuration 267 * @max_channels: Maximum number of channels supported 268 * @timeout_ms: Timeout value for operations. 0 means use default 269 * @ready_timeout_ms: Timeout value for waiting device to be ready (optional) 270 * @buf_len: Size of automatically allocated buffers. 0 means use default 271 * @num_channels: Number of channels defined in @ch_cfg 272 * @ch_cfg: Array of defined channels 273 * @num_events: Number of event rings defined in @event_cfg 274 * @event_cfg: Array of defined event rings 275 * @use_bounce_buf: Use a bounce buffer pool due to limited DDR access 276 * @m2_no_db: Host is not allowed to ring DB in M2 state 277 */ 278 struct mhi_controller_config { 279 u32 max_channels; 280 u32 timeout_ms; 281 u32 ready_timeout_ms; 282 u32 buf_len; 283 u32 num_channels; 284 const struct mhi_channel_config *ch_cfg; 285 u32 num_events; 286 struct mhi_event_config *event_cfg; 287 bool use_bounce_buf; 288 bool m2_no_db; 289 }; 290 291 /** 292 * struct mhi_controller - Master MHI controller structure 293 * @cntrl_dev: Pointer to the struct device of physical bus acting as the MHI 294 * controller (required) 295 * @mhi_dev: MHI device instance for the controller 296 * @debugfs_dentry: MHI controller debugfs directory 297 * @regs: Base address of MHI MMIO register space (required) 298 * @bhi: Points to base of MHI BHI register space 299 * @bhie: Points to base of MHI BHIe register space 300 * @wake_db: MHI WAKE doorbell register address 301 * @iova_start: IOMMU starting address for data (required) 302 * @iova_stop: IOMMU stop address for data (required) 303 * @fw_image: Firmware image name for normal booting (optional) 304 * @fw_data: Firmware image data content for normal booting, used only 305 * if fw_image is NULL and fbc_download is true (optional) 306 * @fw_sz: Firmware image data size for normal booting, used only if fw_image 307 * is NULL and fbc_download is true (optional) 308 * @edl_image: Firmware image name for emergency download mode (optional) 309 * @rddm_size: RAM dump size that host should allocate for debugging purpose 310 * @sbl_size: SBL image size downloaded through BHIe (optional) 311 * @seg_len: BHIe vector size (optional) 312 * @reg_len: Length of the MHI MMIO region (required) 313 * @fbc_image: Points to firmware image buffer 314 * @rddm_image: Points to RAM dump buffer 315 * @mhi_chan: Points to the channel configuration table 316 * @lpm_chans: List of channels that require LPM notifications 317 * @irq: base irq # to request (required) 318 * @max_chan: Maximum number of channels the controller supports 319 * @total_ev_rings: Total # of event rings allocated 320 * @hw_ev_rings: Number of hardware event rings 321 * @sw_ev_rings: Number of software event rings 322 * @nr_irqs: Number of IRQ allocated by bus master (required) 323 * @serial_number: MHI controller serial number obtained from BHI 324 * @mhi_event: MHI event ring configurations table 325 * @mhi_cmd: MHI command ring configurations table 326 * @mhi_ctxt: MHI device context, shared memory between host and device 327 * @pm_mutex: Mutex for suspend/resume operation 328 * @pm_lock: Lock for protecting MHI power management state 329 * @timeout_ms: Timeout in ms for state transitions 330 * @ready_timeout_ms: Timeout in ms for waiting device to be ready (optional) 331 * @pm_state: MHI power management state 332 * @db_access: DB access states 333 * @ee: MHI device execution environment 334 * @dev_state: MHI device state 335 * @dev_wake: Device wakeup count 336 * @pending_pkts: Pending packets for the controller 337 * @M0, M2, M3: Counters to track number of device MHI state changes 338 * @transition_list: List of MHI state transitions 339 * @transition_lock: Lock for protecting MHI state transition list 340 * @wlock: Lock for protecting device wakeup 341 * @mhi_link_info: Device bandwidth info 342 * @st_worker: State transition worker 343 * @hiprio_wq: High priority workqueue for MHI work such as state transitions 344 * @state_event: State change event 345 * @status_cb: CB function to notify power states of the device (required) 346 * @wake_get: CB function to assert device wake (optional) 347 * @wake_put: CB function to de-assert device wake (optional) 348 * @wake_toggle: CB function to assert and de-assert device wake (optional) 349 * @runtime_get: CB function to controller runtime resume (required) 350 * @runtime_put: CB function to decrement pm usage (required) 351 * @map_single: CB function to create TRE buffer 352 * @unmap_single: CB function to destroy TRE buffer 353 * @read_reg: Read a MHI register via the physical link (required) 354 * @write_reg: Write a MHI register via the physical link (required) 355 * @reset: Controller specific reset function (optional) 356 * @buffer_len: Bounce buffer length 357 * @index: Index of the MHI controller instance 358 * @bounce_buf: Use of bounce buffer 359 * @fbc_download: MHI host needs to do complete image transfer (optional) 360 * @wake_set: Device wakeup set flag 361 * @irq_flags: irq flags passed to request_irq (optional) 362 * @mru: the default MRU for the MHI device 363 * 364 * Fields marked as (required) need to be populated by the controller driver 365 * before calling mhi_register_controller(). For the fields marked as (optional) 366 * they can be populated depending on the usecase. 367 */ 368 struct mhi_controller { 369 struct device *cntrl_dev; 370 struct mhi_device *mhi_dev; 371 struct dentry *debugfs_dentry; 372 void __iomem *regs; 373 void __iomem *bhi; 374 void __iomem *bhie; 375 void __iomem *wake_db; 376 377 dma_addr_t iova_start; 378 dma_addr_t iova_stop; 379 const char *fw_image; 380 const u8 *fw_data; 381 size_t fw_sz; 382 const char *edl_image; 383 size_t rddm_size; 384 size_t sbl_size; 385 size_t seg_len; 386 size_t reg_len; 387 struct image_info *fbc_image; 388 struct image_info *rddm_image; 389 struct mhi_chan *mhi_chan; 390 struct list_head lpm_chans; 391 int *irq; 392 u32 max_chan; 393 u32 total_ev_rings; 394 u32 hw_ev_rings; 395 u32 sw_ev_rings; 396 u32 nr_irqs; 397 u32 serial_number; 398 399 struct mhi_event *mhi_event; 400 struct mhi_cmd *mhi_cmd; 401 struct mhi_ctxt *mhi_ctxt; 402 403 struct mutex pm_mutex; 404 rwlock_t pm_lock; 405 u32 timeout_ms; 406 u32 ready_timeout_ms; 407 u32 pm_state; 408 u32 db_access; 409 enum mhi_ee_type ee; 410 enum mhi_state dev_state; 411 atomic_t dev_wake; 412 atomic_t pending_pkts; 413 u32 M0, M2, M3; 414 struct list_head transition_list; 415 spinlock_t transition_lock; 416 spinlock_t wlock; 417 struct mhi_link_info mhi_link_info; 418 struct work_struct st_worker; 419 struct workqueue_struct *hiprio_wq; 420 wait_queue_head_t state_event; 421 422 void (*status_cb)(struct mhi_controller *mhi_cntrl, 423 enum mhi_callback cb); 424 void (*wake_get)(struct mhi_controller *mhi_cntrl, bool override); 425 void (*wake_put)(struct mhi_controller *mhi_cntrl, bool override); 426 void (*wake_toggle)(struct mhi_controller *mhi_cntrl); 427 int (*runtime_get)(struct mhi_controller *mhi_cntrl); 428 void (*runtime_put)(struct mhi_controller *mhi_cntrl); 429 int (*map_single)(struct mhi_controller *mhi_cntrl, 430 struct mhi_buf_info *buf); 431 void (*unmap_single)(struct mhi_controller *mhi_cntrl, 432 struct mhi_buf_info *buf); 433 int (*read_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr, 434 u32 *out); 435 void (*write_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr, 436 u32 val); 437 void (*reset)(struct mhi_controller *mhi_cntrl); 438 439 size_t buffer_len; 440 int index; 441 bool bounce_buf; 442 bool fbc_download; 443 bool wake_set; 444 unsigned long irq_flags; 445 u32 mru; 446 }; 447 448 /** 449 * struct mhi_device - Structure representing an MHI device which binds 450 * to channels or is associated with controllers 451 * @id: Pointer to MHI device ID struct 452 * @name: Name of the associated MHI device 453 * @mhi_cntrl: Controller the device belongs to 454 * @ul_chan: UL channel for the device 455 * @dl_chan: DL channel for the device 456 * @dev: Driver model device node for the MHI device 457 * @dev_type: MHI device type 458 * @ul_chan_id: MHI channel id for UL transfer 459 * @dl_chan_id: MHI channel id for DL transfer 460 * @dev_wake: Device wakeup counter 461 */ 462 struct mhi_device { 463 const struct mhi_device_id *id; 464 const char *name; 465 struct mhi_controller *mhi_cntrl; 466 struct mhi_chan *ul_chan; 467 struct mhi_chan *dl_chan; 468 struct device dev; 469 enum mhi_device_type dev_type; 470 int ul_chan_id; 471 int dl_chan_id; 472 u32 dev_wake; 473 }; 474 475 /** 476 * struct mhi_result - Completed buffer information 477 * @buf_addr: Address of data buffer 478 * @bytes_xferd: # of bytes transferred 479 * @dir: Channel direction 480 * @transaction_status: Status of last transaction 481 */ 482 struct mhi_result { 483 void *buf_addr; 484 size_t bytes_xferd; 485 enum dma_data_direction dir; 486 int transaction_status; 487 }; 488 489 /** 490 * struct mhi_buf - MHI Buffer description 491 * @buf: Virtual address of the buffer 492 * @name: Buffer label. For offload channel, configurations name must be: 493 * ECA - Event context array data 494 * CCA - Channel context array data 495 * @dma_addr: IOMMU address of the buffer 496 * @len: # of bytes 497 */ 498 struct mhi_buf { 499 void *buf; 500 const char *name; 501 dma_addr_t dma_addr; 502 size_t len; 503 }; 504 505 /** 506 * struct mhi_driver - Structure representing a MHI client driver 507 * @probe: CB function for client driver probe function 508 * @remove: CB function for client driver remove function 509 * @ul_xfer_cb: CB function for UL data transfer 510 * @dl_xfer_cb: CB function for DL data transfer 511 * @status_cb: CB functions for asynchronous status 512 * @driver: Device driver model driver 513 */ 514 struct mhi_driver { 515 const struct mhi_device_id *id_table; 516 int (*probe)(struct mhi_device *mhi_dev, 517 const struct mhi_device_id *id); 518 void (*remove)(struct mhi_device *mhi_dev); 519 void (*ul_xfer_cb)(struct mhi_device *mhi_dev, 520 struct mhi_result *result); 521 void (*dl_xfer_cb)(struct mhi_device *mhi_dev, 522 struct mhi_result *result); 523 void (*status_cb)(struct mhi_device *mhi_dev, enum mhi_callback mhi_cb); 524 struct device_driver driver; 525 }; 526 527 #define to_mhi_driver(drv) container_of(drv, struct mhi_driver, driver) 528 #define to_mhi_device(dev) container_of(dev, struct mhi_device, dev) 529 530 /** 531 * mhi_alloc_controller - Allocate the MHI Controller structure 532 * Allocate the mhi_controller structure using zero initialized memory 533 */ 534 struct mhi_controller *mhi_alloc_controller(void); 535 536 /** 537 * mhi_free_controller - Free the MHI Controller structure 538 * Free the mhi_controller structure which was previously allocated 539 */ 540 void mhi_free_controller(struct mhi_controller *mhi_cntrl); 541 542 /** 543 * mhi_register_controller - Register MHI controller 544 * @mhi_cntrl: MHI controller to register 545 * @config: Configuration to use for the controller 546 */ 547 int mhi_register_controller(struct mhi_controller *mhi_cntrl, 548 const struct mhi_controller_config *config); 549 550 /** 551 * mhi_unregister_controller - Unregister MHI controller 552 * @mhi_cntrl: MHI controller to unregister 553 */ 554 void mhi_unregister_controller(struct mhi_controller *mhi_cntrl); 555 556 /* 557 * module_mhi_driver() - Helper macro for drivers that don't do 558 * anything special other than using default mhi_driver_register() and 559 * mhi_driver_unregister(). This eliminates a lot of boilerplate. 560 * Each module may only use this macro once. 561 */ 562 #define module_mhi_driver(mhi_drv) \ 563 module_driver(mhi_drv, mhi_driver_register, \ 564 mhi_driver_unregister) 565 566 /* 567 * Macro to avoid include chaining to get THIS_MODULE 568 */ 569 #define mhi_driver_register(mhi_drv) \ 570 __mhi_driver_register(mhi_drv, THIS_MODULE) 571 572 /** 573 * __mhi_driver_register - Register driver with MHI framework 574 * @mhi_drv: Driver associated with the device 575 * @owner: The module owner 576 */ 577 int __mhi_driver_register(struct mhi_driver *mhi_drv, struct module *owner); 578 579 /** 580 * mhi_driver_unregister - Unregister a driver for mhi_devices 581 * @mhi_drv: Driver associated with the device 582 */ 583 void mhi_driver_unregister(struct mhi_driver *mhi_drv); 584 585 /** 586 * mhi_set_mhi_state - Set MHI device state 587 * @mhi_cntrl: MHI controller 588 * @state: State to set 589 */ 590 void mhi_set_mhi_state(struct mhi_controller *mhi_cntrl, 591 enum mhi_state state); 592 593 /** 594 * mhi_notify - Notify the MHI client driver about client device status 595 * @mhi_dev: MHI device instance 596 * @cb_reason: MHI callback reason 597 */ 598 void mhi_notify(struct mhi_device *mhi_dev, enum mhi_callback cb_reason); 599 600 /** 601 * mhi_get_free_desc_count - Get transfer ring length 602 * Get # of TD available to queue buffers 603 * @mhi_dev: Device associated with the channels 604 * @dir: Direction of the channel 605 */ 606 int mhi_get_free_desc_count(struct mhi_device *mhi_dev, 607 enum dma_data_direction dir); 608 609 /** 610 * mhi_prepare_for_power_up - Do pre-initialization before power up. 611 * This is optional, call this before power up if 612 * the controller does not want bus framework to 613 * automatically free any allocated memory during 614 * shutdown process. 615 * @mhi_cntrl: MHI controller 616 */ 617 int mhi_prepare_for_power_up(struct mhi_controller *mhi_cntrl); 618 619 /** 620 * mhi_async_power_up - Start MHI power up sequence 621 * @mhi_cntrl: MHI controller 622 */ 623 int mhi_async_power_up(struct mhi_controller *mhi_cntrl); 624 625 /** 626 * mhi_sync_power_up - Start MHI power up sequence and wait till the device 627 * enters valid EE state 628 * @mhi_cntrl: MHI controller 629 */ 630 int mhi_sync_power_up(struct mhi_controller *mhi_cntrl); 631 632 /** 633 * mhi_power_down - Start MHI power down sequence 634 * @mhi_cntrl: MHI controller 635 * @graceful: Link is still accessible, so do a graceful shutdown process 636 */ 637 void mhi_power_down(struct mhi_controller *mhi_cntrl, bool graceful); 638 639 /** 640 * mhi_unprepare_after_power_down - Free any allocated memory after power down 641 * @mhi_cntrl: MHI controller 642 */ 643 void mhi_unprepare_after_power_down(struct mhi_controller *mhi_cntrl); 644 645 /** 646 * mhi_pm_suspend - Move MHI into a suspended state 647 * @mhi_cntrl: MHI controller 648 */ 649 int mhi_pm_suspend(struct mhi_controller *mhi_cntrl); 650 651 /** 652 * mhi_pm_resume - Resume MHI from suspended state 653 * @mhi_cntrl: MHI controller 654 */ 655 int mhi_pm_resume(struct mhi_controller *mhi_cntrl); 656 657 /** 658 * mhi_pm_resume_force - Force resume MHI from suspended state 659 * @mhi_cntrl: MHI controller 660 * 661 * Resume the device irrespective of its MHI state. As per the MHI spec, devices 662 * has to be in M3 state during resume. But some devices seem to be in a 663 * different MHI state other than M3 but they continue working fine if allowed. 664 * This API is intented to be used for such devices. 665 * 666 * Return: 0 if the resume succeeds, a negative error code otherwise 667 */ 668 int mhi_pm_resume_force(struct mhi_controller *mhi_cntrl); 669 670 /** 671 * mhi_download_rddm_image - Download ramdump image from device for 672 * debugging purpose. 673 * @mhi_cntrl: MHI controller 674 * @in_panic: Download rddm image during kernel panic 675 */ 676 int mhi_download_rddm_image(struct mhi_controller *mhi_cntrl, bool in_panic); 677 678 /** 679 * mhi_force_rddm_mode - Force device into rddm mode 680 * @mhi_cntrl: MHI controller 681 */ 682 int mhi_force_rddm_mode(struct mhi_controller *mhi_cntrl); 683 684 /** 685 * mhi_get_exec_env - Get BHI execution environment of the device 686 * @mhi_cntrl: MHI controller 687 */ 688 enum mhi_ee_type mhi_get_exec_env(struct mhi_controller *mhi_cntrl); 689 690 /** 691 * mhi_get_mhi_state - Get MHI state of the device 692 * @mhi_cntrl: MHI controller 693 */ 694 enum mhi_state mhi_get_mhi_state(struct mhi_controller *mhi_cntrl); 695 696 /** 697 * mhi_soc_reset - Trigger a device reset. This can be used as a last resort 698 * to reset and recover a device. 699 * @mhi_cntrl: MHI controller 700 */ 701 void mhi_soc_reset(struct mhi_controller *mhi_cntrl); 702 703 /** 704 * mhi_device_get - Disable device low power mode 705 * @mhi_dev: Device associated with the channel 706 */ 707 void mhi_device_get(struct mhi_device *mhi_dev); 708 709 /** 710 * mhi_device_get_sync - Disable device low power mode. Synchronously 711 * take the controller out of suspended state 712 * @mhi_dev: Device associated with the channel 713 */ 714 int mhi_device_get_sync(struct mhi_device *mhi_dev); 715 716 /** 717 * mhi_device_put - Re-enable device low power mode 718 * @mhi_dev: Device associated with the channel 719 */ 720 void mhi_device_put(struct mhi_device *mhi_dev); 721 722 /** 723 * mhi_prepare_for_transfer - Setup UL and DL channels for data transfer. 724 * @mhi_dev: Device associated with the channels 725 * 726 * Allocate and initialize the channel context and also issue the START channel 727 * command to both channels. Channels can be started only if both host and 728 * device execution environments match and channels are in a DISABLED state. 729 */ 730 int mhi_prepare_for_transfer(struct mhi_device *mhi_dev); 731 732 /** 733 * mhi_prepare_for_transfer_autoqueue - Setup UL and DL channels with auto queue 734 * buffers for DL traffic 735 * @mhi_dev: Device associated with the channels 736 * 737 * Allocate and initialize the channel context and also issue the START channel 738 * command to both channels. Channels can be started only if both host and 739 * device execution environments match and channels are in a DISABLED state. 740 * The MHI core will automatically allocate and queue buffers for the DL traffic. 741 */ 742 int mhi_prepare_for_transfer_autoqueue(struct mhi_device *mhi_dev); 743 744 /** 745 * mhi_unprepare_from_transfer - Reset UL and DL channels for data transfer. 746 * Issue the RESET channel command and let the 747 * device clean-up the context so no incoming 748 * transfers are seen on the host. Free memory 749 * associated with the context on host. If device 750 * is unresponsive, only perform a host side 751 * clean-up. Channels can be reset only if both 752 * host and device execution environments match 753 * and channels are in an ENABLED, STOPPED or 754 * SUSPENDED state. 755 * @mhi_dev: Device associated with the channels 756 */ 757 void mhi_unprepare_from_transfer(struct mhi_device *mhi_dev); 758 759 /** 760 * mhi_queue_dma - Send or receive DMA mapped buffers from client device 761 * over MHI channel 762 * @mhi_dev: Device associated with the channels 763 * @dir: DMA direction for the channel 764 * @mhi_buf: Buffer for holding the DMA mapped data 765 * @len: Buffer length 766 * @mflags: MHI transfer flags used for the transfer 767 */ 768 int mhi_queue_dma(struct mhi_device *mhi_dev, enum dma_data_direction dir, 769 struct mhi_buf *mhi_buf, size_t len, enum mhi_flags mflags); 770 771 /** 772 * mhi_queue_buf - Send or receive raw buffers from client device over MHI 773 * channel 774 * @mhi_dev: Device associated with the channels 775 * @dir: DMA direction for the channel 776 * @buf: Buffer for holding the data 777 * @len: Buffer length 778 * @mflags: MHI transfer flags used for the transfer 779 */ 780 int mhi_queue_buf(struct mhi_device *mhi_dev, enum dma_data_direction dir, 781 void *buf, size_t len, enum mhi_flags mflags); 782 783 /** 784 * mhi_queue_skb - Send or receive SKBs from client device over MHI channel 785 * @mhi_dev: Device associated with the channels 786 * @dir: DMA direction for the channel 787 * @skb: Buffer for holding SKBs 788 * @len: Buffer length 789 * @mflags: MHI transfer flags used for the transfer 790 */ 791 int mhi_queue_skb(struct mhi_device *mhi_dev, enum dma_data_direction dir, 792 struct sk_buff *skb, size_t len, enum mhi_flags mflags); 793 794 /** 795 * mhi_queue_is_full - Determine whether queueing new elements is possible 796 * @mhi_dev: Device associated with the channels 797 * @dir: DMA direction for the channel 798 */ 799 bool mhi_queue_is_full(struct mhi_device *mhi_dev, enum dma_data_direction dir); 800 801 #endif /* _MHI_H_ */ 802