10cbf2608SManivannan Sadhasivam /* SPDX-License-Identifier: GPL-2.0 */ 20cbf2608SManivannan Sadhasivam /* 30cbf2608SManivannan Sadhasivam * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. 40cbf2608SManivannan Sadhasivam * 50cbf2608SManivannan Sadhasivam */ 60cbf2608SManivannan Sadhasivam #ifndef _MHI_H_ 70cbf2608SManivannan Sadhasivam #define _MHI_H_ 80cbf2608SManivannan Sadhasivam 90cbf2608SManivannan Sadhasivam #include <linux/device.h> 100cbf2608SManivannan Sadhasivam #include <linux/dma-direction.h> 110cbf2608SManivannan Sadhasivam #include <linux/mutex.h> 120cbf2608SManivannan Sadhasivam #include <linux/rwlock_types.h> 130cbf2608SManivannan Sadhasivam #include <linux/slab.h> 140cbf2608SManivannan Sadhasivam #include <linux/spinlock_types.h> 150cbf2608SManivannan Sadhasivam #include <linux/wait.h> 160cbf2608SManivannan Sadhasivam #include <linux/workqueue.h> 170cbf2608SManivannan Sadhasivam 180cbf2608SManivannan Sadhasivam struct mhi_chan; 190cbf2608SManivannan Sadhasivam struct mhi_event; 200cbf2608SManivannan Sadhasivam struct mhi_ctxt; 210cbf2608SManivannan Sadhasivam struct mhi_cmd; 220cbf2608SManivannan Sadhasivam struct mhi_buf_info; 230cbf2608SManivannan Sadhasivam 240cbf2608SManivannan Sadhasivam /** 250cbf2608SManivannan Sadhasivam * enum mhi_callback - MHI callback 260cbf2608SManivannan Sadhasivam * @MHI_CB_IDLE: MHI entered idle state 270cbf2608SManivannan Sadhasivam * @MHI_CB_PENDING_DATA: New data available for client to process 280cbf2608SManivannan Sadhasivam * @MHI_CB_LPM_ENTER: MHI host entered low power mode 290cbf2608SManivannan Sadhasivam * @MHI_CB_LPM_EXIT: MHI host about to exit low power mode 300cbf2608SManivannan Sadhasivam * @MHI_CB_EE_RDDM: MHI device entered RDDM exec env 310cbf2608SManivannan Sadhasivam * @MHI_CB_EE_MISSION_MODE: MHI device entered Mission Mode exec env 320cbf2608SManivannan Sadhasivam * @MHI_CB_SYS_ERROR: MHI device entered error state (may recover) 330cbf2608SManivannan Sadhasivam * @MHI_CB_FATAL_ERROR: MHI device entered fatal error state 340cbf2608SManivannan Sadhasivam */ 350cbf2608SManivannan Sadhasivam enum mhi_callback { 360cbf2608SManivannan Sadhasivam MHI_CB_IDLE, 370cbf2608SManivannan Sadhasivam MHI_CB_PENDING_DATA, 380cbf2608SManivannan Sadhasivam MHI_CB_LPM_ENTER, 390cbf2608SManivannan Sadhasivam MHI_CB_LPM_EXIT, 400cbf2608SManivannan Sadhasivam MHI_CB_EE_RDDM, 410cbf2608SManivannan Sadhasivam MHI_CB_EE_MISSION_MODE, 420cbf2608SManivannan Sadhasivam MHI_CB_SYS_ERROR, 430cbf2608SManivannan Sadhasivam MHI_CB_FATAL_ERROR, 440cbf2608SManivannan Sadhasivam }; 450cbf2608SManivannan Sadhasivam 460cbf2608SManivannan Sadhasivam /** 470cbf2608SManivannan Sadhasivam * enum mhi_flags - Transfer flags 480cbf2608SManivannan Sadhasivam * @MHI_EOB: End of buffer for bulk transfer 490cbf2608SManivannan Sadhasivam * @MHI_EOT: End of transfer 500cbf2608SManivannan Sadhasivam * @MHI_CHAIN: Linked transfer 510cbf2608SManivannan Sadhasivam */ 520cbf2608SManivannan Sadhasivam enum mhi_flags { 530cbf2608SManivannan Sadhasivam MHI_EOB, 540cbf2608SManivannan Sadhasivam MHI_EOT, 550cbf2608SManivannan Sadhasivam MHI_CHAIN, 560cbf2608SManivannan Sadhasivam }; 570cbf2608SManivannan Sadhasivam 580cbf2608SManivannan Sadhasivam /** 590cbf2608SManivannan Sadhasivam * enum mhi_device_type - Device types 600cbf2608SManivannan Sadhasivam * @MHI_DEVICE_XFER: Handles data transfer 610cbf2608SManivannan Sadhasivam * @MHI_DEVICE_CONTROLLER: Control device 620cbf2608SManivannan Sadhasivam */ 630cbf2608SManivannan Sadhasivam enum mhi_device_type { 640cbf2608SManivannan Sadhasivam MHI_DEVICE_XFER, 650cbf2608SManivannan Sadhasivam MHI_DEVICE_CONTROLLER, 660cbf2608SManivannan Sadhasivam }; 670cbf2608SManivannan Sadhasivam 680cbf2608SManivannan Sadhasivam /** 690cbf2608SManivannan Sadhasivam * enum mhi_ch_type - Channel types 700cbf2608SManivannan Sadhasivam * @MHI_CH_TYPE_INVALID: Invalid channel type 710cbf2608SManivannan Sadhasivam * @MHI_CH_TYPE_OUTBOUND: Outbound channel to the device 720cbf2608SManivannan Sadhasivam * @MHI_CH_TYPE_INBOUND: Inbound channel from the device 730cbf2608SManivannan Sadhasivam * @MHI_CH_TYPE_INBOUND_COALESCED: Coalesced channel for the device to combine 740cbf2608SManivannan Sadhasivam * multiple packets and send them as a single 750cbf2608SManivannan Sadhasivam * large packet to reduce CPU consumption 760cbf2608SManivannan Sadhasivam */ 770cbf2608SManivannan Sadhasivam enum mhi_ch_type { 780cbf2608SManivannan Sadhasivam MHI_CH_TYPE_INVALID = 0, 790cbf2608SManivannan Sadhasivam MHI_CH_TYPE_OUTBOUND = DMA_TO_DEVICE, 800cbf2608SManivannan Sadhasivam MHI_CH_TYPE_INBOUND = DMA_FROM_DEVICE, 810cbf2608SManivannan Sadhasivam MHI_CH_TYPE_INBOUND_COALESCED = 3, 820cbf2608SManivannan Sadhasivam }; 830cbf2608SManivannan Sadhasivam 840cbf2608SManivannan Sadhasivam /** 850cbf2608SManivannan Sadhasivam * enum mhi_ee_type - Execution environment types 860cbf2608SManivannan Sadhasivam * @MHI_EE_PBL: Primary Bootloader 870cbf2608SManivannan Sadhasivam * @MHI_EE_SBL: Secondary Bootloader 880cbf2608SManivannan Sadhasivam * @MHI_EE_AMSS: Modem, aka the primary runtime EE 890cbf2608SManivannan Sadhasivam * @MHI_EE_RDDM: Ram dump download mode 900cbf2608SManivannan Sadhasivam * @MHI_EE_WFW: WLAN firmware mode 910cbf2608SManivannan Sadhasivam * @MHI_EE_PTHRU: Passthrough 920cbf2608SManivannan Sadhasivam * @MHI_EE_EDL: Embedded downloader 930cbf2608SManivannan Sadhasivam */ 940cbf2608SManivannan Sadhasivam enum mhi_ee_type { 950cbf2608SManivannan Sadhasivam MHI_EE_PBL, 960cbf2608SManivannan Sadhasivam MHI_EE_SBL, 970cbf2608SManivannan Sadhasivam MHI_EE_AMSS, 980cbf2608SManivannan Sadhasivam MHI_EE_RDDM, 990cbf2608SManivannan Sadhasivam MHI_EE_WFW, 1000cbf2608SManivannan Sadhasivam MHI_EE_PTHRU, 1010cbf2608SManivannan Sadhasivam MHI_EE_EDL, 1020cbf2608SManivannan Sadhasivam MHI_EE_MAX_SUPPORTED = MHI_EE_EDL, 1030cbf2608SManivannan Sadhasivam MHI_EE_DISABLE_TRANSITION, /* local EE, not related to mhi spec */ 1040cbf2608SManivannan Sadhasivam MHI_EE_NOT_SUPPORTED, 1050cbf2608SManivannan Sadhasivam MHI_EE_MAX, 1060cbf2608SManivannan Sadhasivam }; 1070cbf2608SManivannan Sadhasivam 1080cbf2608SManivannan Sadhasivam /** 1090cbf2608SManivannan Sadhasivam * enum mhi_ch_ee_mask - Execution environment mask for channel 1100cbf2608SManivannan Sadhasivam * @MHI_CH_EE_PBL: Allow channel to be used in PBL EE 1110cbf2608SManivannan Sadhasivam * @MHI_CH_EE_SBL: Allow channel to be used in SBL EE 1120cbf2608SManivannan Sadhasivam * @MHI_CH_EE_AMSS: Allow channel to be used in AMSS EE 1130cbf2608SManivannan Sadhasivam * @MHI_CH_EE_RDDM: Allow channel to be used in RDDM EE 1140cbf2608SManivannan Sadhasivam * @MHI_CH_EE_PTHRU: Allow channel to be used in PTHRU EE 1150cbf2608SManivannan Sadhasivam * @MHI_CH_EE_WFW: Allow channel to be used in WFW EE 1160cbf2608SManivannan Sadhasivam * @MHI_CH_EE_EDL: Allow channel to be used in EDL EE 1170cbf2608SManivannan Sadhasivam */ 1180cbf2608SManivannan Sadhasivam enum mhi_ch_ee_mask { 1190cbf2608SManivannan Sadhasivam MHI_CH_EE_PBL = BIT(MHI_EE_PBL), 1200cbf2608SManivannan Sadhasivam MHI_CH_EE_SBL = BIT(MHI_EE_SBL), 1210cbf2608SManivannan Sadhasivam MHI_CH_EE_AMSS = BIT(MHI_EE_AMSS), 1220cbf2608SManivannan Sadhasivam MHI_CH_EE_RDDM = BIT(MHI_EE_RDDM), 1230cbf2608SManivannan Sadhasivam MHI_CH_EE_PTHRU = BIT(MHI_EE_PTHRU), 1240cbf2608SManivannan Sadhasivam MHI_CH_EE_WFW = BIT(MHI_EE_WFW), 1250cbf2608SManivannan Sadhasivam MHI_CH_EE_EDL = BIT(MHI_EE_EDL), 1260cbf2608SManivannan Sadhasivam }; 1270cbf2608SManivannan Sadhasivam 1280cbf2608SManivannan Sadhasivam /** 1290cbf2608SManivannan Sadhasivam * enum mhi_er_data_type - Event ring data types 1300cbf2608SManivannan Sadhasivam * @MHI_ER_DATA: Only client data over this ring 1310cbf2608SManivannan Sadhasivam * @MHI_ER_CTRL: MHI control data and client data 1320cbf2608SManivannan Sadhasivam */ 1330cbf2608SManivannan Sadhasivam enum mhi_er_data_type { 1340cbf2608SManivannan Sadhasivam MHI_ER_DATA, 1350cbf2608SManivannan Sadhasivam MHI_ER_CTRL, 1360cbf2608SManivannan Sadhasivam }; 1370cbf2608SManivannan Sadhasivam 1380cbf2608SManivannan Sadhasivam /** 1390cbf2608SManivannan Sadhasivam * enum mhi_db_brst_mode - Doorbell mode 1400cbf2608SManivannan Sadhasivam * @MHI_DB_BRST_DISABLE: Burst mode disable 1410cbf2608SManivannan Sadhasivam * @MHI_DB_BRST_ENABLE: Burst mode enable 1420cbf2608SManivannan Sadhasivam */ 1430cbf2608SManivannan Sadhasivam enum mhi_db_brst_mode { 1440cbf2608SManivannan Sadhasivam MHI_DB_BRST_DISABLE = 0x2, 1450cbf2608SManivannan Sadhasivam MHI_DB_BRST_ENABLE = 0x3, 1460cbf2608SManivannan Sadhasivam }; 1470cbf2608SManivannan Sadhasivam 1480cbf2608SManivannan Sadhasivam /** 1490cbf2608SManivannan Sadhasivam * struct mhi_channel_config - Channel configuration structure for controller 1500cbf2608SManivannan Sadhasivam * @name: The name of this channel 1510cbf2608SManivannan Sadhasivam * @num: The number assigned to this channel 1520cbf2608SManivannan Sadhasivam * @num_elements: The number of elements that can be queued to this channel 1530cbf2608SManivannan Sadhasivam * @local_elements: The local ring length of the channel 1540cbf2608SManivannan Sadhasivam * @event_ring: The event rung index that services this channel 1550cbf2608SManivannan Sadhasivam * @dir: Direction that data may flow on this channel 1560cbf2608SManivannan Sadhasivam * @type: Channel type 1570cbf2608SManivannan Sadhasivam * @ee_mask: Execution Environment mask for this channel 1580cbf2608SManivannan Sadhasivam * @pollcfg: Polling configuration for burst mode. 0 is default. milliseconds 1590cbf2608SManivannan Sadhasivam for UL channels, multiple of 8 ring elements for DL channels 1600cbf2608SManivannan Sadhasivam * @doorbell: Doorbell mode 1610cbf2608SManivannan Sadhasivam * @lpm_notify: The channel master requires low power mode notifications 1620cbf2608SManivannan Sadhasivam * @offload_channel: The client manages the channel completely 1630cbf2608SManivannan Sadhasivam * @doorbell_mode_switch: Channel switches to doorbell mode on M0 transition 1640cbf2608SManivannan Sadhasivam * @auto_queue: Framework will automatically queue buffers for DL traffic 1650cbf2608SManivannan Sadhasivam * @auto_start: Automatically start (open) this channel 166*da1c4f85SManivannan Sadhasivam * @wake-capable: Channel capable of waking up the system 1670cbf2608SManivannan Sadhasivam */ 1680cbf2608SManivannan Sadhasivam struct mhi_channel_config { 1690cbf2608SManivannan Sadhasivam char *name; 1700cbf2608SManivannan Sadhasivam u32 num; 1710cbf2608SManivannan Sadhasivam u32 num_elements; 1720cbf2608SManivannan Sadhasivam u32 local_elements; 1730cbf2608SManivannan Sadhasivam u32 event_ring; 1740cbf2608SManivannan Sadhasivam enum dma_data_direction dir; 1750cbf2608SManivannan Sadhasivam enum mhi_ch_type type; 1760cbf2608SManivannan Sadhasivam u32 ee_mask; 1770cbf2608SManivannan Sadhasivam u32 pollcfg; 1780cbf2608SManivannan Sadhasivam enum mhi_db_brst_mode doorbell; 1790cbf2608SManivannan Sadhasivam bool lpm_notify; 1800cbf2608SManivannan Sadhasivam bool offload_channel; 1810cbf2608SManivannan Sadhasivam bool doorbell_mode_switch; 1820cbf2608SManivannan Sadhasivam bool auto_queue; 1830cbf2608SManivannan Sadhasivam bool auto_start; 184*da1c4f85SManivannan Sadhasivam bool wake_capable; 1850cbf2608SManivannan Sadhasivam }; 1860cbf2608SManivannan Sadhasivam 1870cbf2608SManivannan Sadhasivam /** 1880cbf2608SManivannan Sadhasivam * struct mhi_event_config - Event ring configuration structure for controller 1890cbf2608SManivannan Sadhasivam * @num_elements: The number of elements that can be queued to this ring 1900cbf2608SManivannan Sadhasivam * @irq_moderation_ms: Delay irq for additional events to be aggregated 1910cbf2608SManivannan Sadhasivam * @irq: IRQ associated with this ring 1920cbf2608SManivannan Sadhasivam * @channel: Dedicated channel number. U32_MAX indicates a non-dedicated ring 1930cbf2608SManivannan Sadhasivam * @priority: Priority of this ring. Use 1 for now 1940cbf2608SManivannan Sadhasivam * @mode: Doorbell mode 1950cbf2608SManivannan Sadhasivam * @data_type: Type of data this ring will process 1960cbf2608SManivannan Sadhasivam * @hardware_event: This ring is associated with hardware channels 1970cbf2608SManivannan Sadhasivam * @client_managed: This ring is client managed 1980cbf2608SManivannan Sadhasivam * @offload_channel: This ring is associated with an offloaded channel 1990cbf2608SManivannan Sadhasivam */ 2000cbf2608SManivannan Sadhasivam struct mhi_event_config { 2010cbf2608SManivannan Sadhasivam u32 num_elements; 2020cbf2608SManivannan Sadhasivam u32 irq_moderation_ms; 2030cbf2608SManivannan Sadhasivam u32 irq; 2040cbf2608SManivannan Sadhasivam u32 channel; 2050cbf2608SManivannan Sadhasivam u32 priority; 2060cbf2608SManivannan Sadhasivam enum mhi_db_brst_mode mode; 2070cbf2608SManivannan Sadhasivam enum mhi_er_data_type data_type; 2080cbf2608SManivannan Sadhasivam bool hardware_event; 2090cbf2608SManivannan Sadhasivam bool client_managed; 2100cbf2608SManivannan Sadhasivam bool offload_channel; 2110cbf2608SManivannan Sadhasivam }; 2120cbf2608SManivannan Sadhasivam 2130cbf2608SManivannan Sadhasivam /** 2140cbf2608SManivannan Sadhasivam * struct mhi_controller_config - Root MHI controller configuration 2150cbf2608SManivannan Sadhasivam * @max_channels: Maximum number of channels supported 2160cbf2608SManivannan Sadhasivam * @timeout_ms: Timeout value for operations. 0 means use default 2170cbf2608SManivannan Sadhasivam * @buf_len: Size of automatically allocated buffers. 0 means use default 2180cbf2608SManivannan Sadhasivam * @num_channels: Number of channels defined in @ch_cfg 2190cbf2608SManivannan Sadhasivam * @ch_cfg: Array of defined channels 2200cbf2608SManivannan Sadhasivam * @num_events: Number of event rings defined in @event_cfg 2210cbf2608SManivannan Sadhasivam * @event_cfg: Array of defined event rings 2220cbf2608SManivannan Sadhasivam * @use_bounce_buf: Use a bounce buffer pool due to limited DDR access 2230cbf2608SManivannan Sadhasivam * @m2_no_db: Host is not allowed to ring DB in M2 state 2240cbf2608SManivannan Sadhasivam */ 2250cbf2608SManivannan Sadhasivam struct mhi_controller_config { 2260cbf2608SManivannan Sadhasivam u32 max_channels; 2270cbf2608SManivannan Sadhasivam u32 timeout_ms; 2280cbf2608SManivannan Sadhasivam u32 buf_len; 2290cbf2608SManivannan Sadhasivam u32 num_channels; 2300cbf2608SManivannan Sadhasivam struct mhi_channel_config *ch_cfg; 2310cbf2608SManivannan Sadhasivam u32 num_events; 2320cbf2608SManivannan Sadhasivam struct mhi_event_config *event_cfg; 2330cbf2608SManivannan Sadhasivam bool use_bounce_buf; 2340cbf2608SManivannan Sadhasivam bool m2_no_db; 2350cbf2608SManivannan Sadhasivam }; 2360cbf2608SManivannan Sadhasivam 2370cbf2608SManivannan Sadhasivam /** 2380cbf2608SManivannan Sadhasivam * struct mhi_controller - Master MHI controller structure 2390cbf2608SManivannan Sadhasivam * @cntrl_dev: Pointer to the struct device of physical bus acting as the MHI 2400cbf2608SManivannan Sadhasivam * controller (required) 2410cbf2608SManivannan Sadhasivam * @mhi_dev: MHI device instance for the controller 2420cbf2608SManivannan Sadhasivam * @regs: Base address of MHI MMIO register space (required) 2430cbf2608SManivannan Sadhasivam * @iova_start: IOMMU starting address for data (required) 2440cbf2608SManivannan Sadhasivam * @iova_stop: IOMMU stop address for data (required) 2450cbf2608SManivannan Sadhasivam * @fw_image: Firmware image name for normal booting (required) 2460cbf2608SManivannan Sadhasivam * @edl_image: Firmware image name for emergency download mode (optional) 2470cbf2608SManivannan Sadhasivam * @sbl_size: SBL image size downloaded through BHIe (optional) 2480cbf2608SManivannan Sadhasivam * @seg_len: BHIe vector size (optional) 2490cbf2608SManivannan Sadhasivam * @mhi_chan: Points to the channel configuration table 2500cbf2608SManivannan Sadhasivam * @lpm_chans: List of channels that require LPM notifications 2510cbf2608SManivannan Sadhasivam * @irq: base irq # to request (required) 2520cbf2608SManivannan Sadhasivam * @max_chan: Maximum number of channels the controller supports 2530cbf2608SManivannan Sadhasivam * @total_ev_rings: Total # of event rings allocated 2540cbf2608SManivannan Sadhasivam * @hw_ev_rings: Number of hardware event rings 2550cbf2608SManivannan Sadhasivam * @sw_ev_rings: Number of software event rings 2560cbf2608SManivannan Sadhasivam * @nr_irqs_req: Number of IRQs required to operate (optional) 2570cbf2608SManivannan Sadhasivam * @nr_irqs: Number of IRQ allocated by bus master (required) 2580cbf2608SManivannan Sadhasivam * @mhi_event: MHI event ring configurations table 2590cbf2608SManivannan Sadhasivam * @mhi_cmd: MHI command ring configurations table 2600cbf2608SManivannan Sadhasivam * @mhi_ctxt: MHI device context, shared memory between host and device 2610cbf2608SManivannan Sadhasivam * @pm_mutex: Mutex for suspend/resume operation 2620cbf2608SManivannan Sadhasivam * @pm_lock: Lock for protecting MHI power management state 2630cbf2608SManivannan Sadhasivam * @timeout_ms: Timeout in ms for state transitions 2640cbf2608SManivannan Sadhasivam * @pm_state: MHI power management state 2650cbf2608SManivannan Sadhasivam * @db_access: DB access states 2660cbf2608SManivannan Sadhasivam * @ee: MHI device execution environment 2670cbf2608SManivannan Sadhasivam * @dev_wake: Device wakeup count 2680cbf2608SManivannan Sadhasivam * @pending_pkts: Pending packets for the controller 2690cbf2608SManivannan Sadhasivam * @transition_list: List of MHI state transitions 2700cbf2608SManivannan Sadhasivam * @transition_lock: Lock for protecting MHI state transition list 2710cbf2608SManivannan Sadhasivam * @wlock: Lock for protecting device wakeup 2720cbf2608SManivannan Sadhasivam * @st_worker: State transition worker 2730cbf2608SManivannan Sadhasivam * @fw_worker: Firmware download worker 2740cbf2608SManivannan Sadhasivam * @syserr_worker: System error worker 2750cbf2608SManivannan Sadhasivam * @state_event: State change event 2760cbf2608SManivannan Sadhasivam * @status_cb: CB function to notify power states of the device (required) 2770cbf2608SManivannan Sadhasivam * @link_status: CB function to query link status of the device (required) 2780cbf2608SManivannan Sadhasivam * @wake_get: CB function to assert device wake (optional) 2790cbf2608SManivannan Sadhasivam * @wake_put: CB function to de-assert device wake (optional) 2800cbf2608SManivannan Sadhasivam * @wake_toggle: CB function to assert and de-assert device wake (optional) 2810cbf2608SManivannan Sadhasivam * @runtime_get: CB function to controller runtime resume (required) 2820cbf2608SManivannan Sadhasivam * @runtimet_put: CB function to decrement pm usage (required) 2830cbf2608SManivannan Sadhasivam * @buffer_len: Bounce buffer length 2840cbf2608SManivannan Sadhasivam * @bounce_buf: Use of bounce buffer 2850cbf2608SManivannan Sadhasivam * @fbc_download: MHI host needs to do complete image transfer (optional) 2860cbf2608SManivannan Sadhasivam * @pre_init: MHI host needs to do pre-initialization before power up 2870cbf2608SManivannan Sadhasivam * @wake_set: Device wakeup set flag 2880cbf2608SManivannan Sadhasivam * 2890cbf2608SManivannan Sadhasivam * Fields marked as (required) need to be populated by the controller driver 2900cbf2608SManivannan Sadhasivam * before calling mhi_register_controller(). For the fields marked as (optional) 2910cbf2608SManivannan Sadhasivam * they can be populated depending on the usecase. 2920cbf2608SManivannan Sadhasivam */ 2930cbf2608SManivannan Sadhasivam struct mhi_controller { 2940cbf2608SManivannan Sadhasivam struct device *cntrl_dev; 2950cbf2608SManivannan Sadhasivam struct mhi_device *mhi_dev; 2960cbf2608SManivannan Sadhasivam void __iomem *regs; 2970cbf2608SManivannan Sadhasivam dma_addr_t iova_start; 2980cbf2608SManivannan Sadhasivam dma_addr_t iova_stop; 2990cbf2608SManivannan Sadhasivam const char *fw_image; 3000cbf2608SManivannan Sadhasivam const char *edl_image; 3010cbf2608SManivannan Sadhasivam size_t sbl_size; 3020cbf2608SManivannan Sadhasivam size_t seg_len; 3030cbf2608SManivannan Sadhasivam struct mhi_chan *mhi_chan; 3040cbf2608SManivannan Sadhasivam struct list_head lpm_chans; 3050cbf2608SManivannan Sadhasivam int *irq; 3060cbf2608SManivannan Sadhasivam u32 max_chan; 3070cbf2608SManivannan Sadhasivam u32 total_ev_rings; 3080cbf2608SManivannan Sadhasivam u32 hw_ev_rings; 3090cbf2608SManivannan Sadhasivam u32 sw_ev_rings; 3100cbf2608SManivannan Sadhasivam u32 nr_irqs_req; 3110cbf2608SManivannan Sadhasivam u32 nr_irqs; 3120cbf2608SManivannan Sadhasivam 3130cbf2608SManivannan Sadhasivam struct mhi_event *mhi_event; 3140cbf2608SManivannan Sadhasivam struct mhi_cmd *mhi_cmd; 3150cbf2608SManivannan Sadhasivam struct mhi_ctxt *mhi_ctxt; 3160cbf2608SManivannan Sadhasivam 3170cbf2608SManivannan Sadhasivam struct mutex pm_mutex; 3180cbf2608SManivannan Sadhasivam rwlock_t pm_lock; 3190cbf2608SManivannan Sadhasivam u32 timeout_ms; 3200cbf2608SManivannan Sadhasivam u32 pm_state; 3210cbf2608SManivannan Sadhasivam u32 db_access; 3220cbf2608SManivannan Sadhasivam enum mhi_ee_type ee; 3230cbf2608SManivannan Sadhasivam atomic_t dev_wake; 3240cbf2608SManivannan Sadhasivam atomic_t pending_pkts; 3250cbf2608SManivannan Sadhasivam struct list_head transition_list; 3260cbf2608SManivannan Sadhasivam spinlock_t transition_lock; 3270cbf2608SManivannan Sadhasivam spinlock_t wlock; 3280cbf2608SManivannan Sadhasivam struct work_struct st_worker; 3290cbf2608SManivannan Sadhasivam struct work_struct fw_worker; 3300cbf2608SManivannan Sadhasivam struct work_struct syserr_worker; 3310cbf2608SManivannan Sadhasivam wait_queue_head_t state_event; 3320cbf2608SManivannan Sadhasivam 3330cbf2608SManivannan Sadhasivam void (*status_cb)(struct mhi_controller *mhi_cntrl, 3340cbf2608SManivannan Sadhasivam enum mhi_callback cb); 3350cbf2608SManivannan Sadhasivam int (*link_status)(struct mhi_controller *mhi_cntrl); 3360cbf2608SManivannan Sadhasivam void (*wake_get)(struct mhi_controller *mhi_cntrl, bool override); 3370cbf2608SManivannan Sadhasivam void (*wake_put)(struct mhi_controller *mhi_cntrl, bool override); 3380cbf2608SManivannan Sadhasivam void (*wake_toggle)(struct mhi_controller *mhi_cntrl); 3390cbf2608SManivannan Sadhasivam int (*runtime_get)(struct mhi_controller *mhi_cntrl); 3400cbf2608SManivannan Sadhasivam void (*runtime_put)(struct mhi_controller *mhi_cntrl); 3410cbf2608SManivannan Sadhasivam 3420cbf2608SManivannan Sadhasivam size_t buffer_len; 3430cbf2608SManivannan Sadhasivam bool bounce_buf; 3440cbf2608SManivannan Sadhasivam bool fbc_download; 3450cbf2608SManivannan Sadhasivam bool pre_init; 3460cbf2608SManivannan Sadhasivam bool wake_set; 3470cbf2608SManivannan Sadhasivam }; 3480cbf2608SManivannan Sadhasivam 3490cbf2608SManivannan Sadhasivam /** 3500cbf2608SManivannan Sadhasivam * struct mhi_device - Structure representing a MHI device which binds 3510cbf2608SManivannan Sadhasivam * to channels 3520cbf2608SManivannan Sadhasivam * @id: Pointer to MHI device ID struct 3530cbf2608SManivannan Sadhasivam * @chan_name: Name of the channel to which the device binds 3540cbf2608SManivannan Sadhasivam * @mhi_cntrl: Controller the device belongs to 3550cbf2608SManivannan Sadhasivam * @ul_chan: UL channel for the device 3560cbf2608SManivannan Sadhasivam * @dl_chan: DL channel for the device 3570cbf2608SManivannan Sadhasivam * @dev: Driver model device node for the MHI device 3580cbf2608SManivannan Sadhasivam * @dev_type: MHI device type 359e755cadbSManivannan Sadhasivam * @ul_chan_id: MHI channel id for UL transfer 360e755cadbSManivannan Sadhasivam * @dl_chan_id: MHI channel id for DL transfer 3610cbf2608SManivannan Sadhasivam * @dev_wake: Device wakeup counter 3620cbf2608SManivannan Sadhasivam */ 3630cbf2608SManivannan Sadhasivam struct mhi_device { 3640cbf2608SManivannan Sadhasivam const struct mhi_device_id *id; 3650cbf2608SManivannan Sadhasivam const char *chan_name; 3660cbf2608SManivannan Sadhasivam struct mhi_controller *mhi_cntrl; 3670cbf2608SManivannan Sadhasivam struct mhi_chan *ul_chan; 3680cbf2608SManivannan Sadhasivam struct mhi_chan *dl_chan; 3690cbf2608SManivannan Sadhasivam struct device dev; 3700cbf2608SManivannan Sadhasivam enum mhi_device_type dev_type; 371e755cadbSManivannan Sadhasivam int ul_chan_id; 372e755cadbSManivannan Sadhasivam int dl_chan_id; 3730cbf2608SManivannan Sadhasivam u32 dev_wake; 3740cbf2608SManivannan Sadhasivam }; 3750cbf2608SManivannan Sadhasivam 3760cbf2608SManivannan Sadhasivam /** 3770cbf2608SManivannan Sadhasivam * struct mhi_result - Completed buffer information 3780cbf2608SManivannan Sadhasivam * @buf_addr: Address of data buffer 3790cbf2608SManivannan Sadhasivam * @bytes_xferd: # of bytes transferred 3800cbf2608SManivannan Sadhasivam * @dir: Channel direction 3810cbf2608SManivannan Sadhasivam * @transaction_status: Status of last transaction 3820cbf2608SManivannan Sadhasivam */ 3830cbf2608SManivannan Sadhasivam struct mhi_result { 3840cbf2608SManivannan Sadhasivam void *buf_addr; 3850cbf2608SManivannan Sadhasivam size_t bytes_xferd; 3860cbf2608SManivannan Sadhasivam enum dma_data_direction dir; 3870cbf2608SManivannan Sadhasivam int transaction_status; 3880cbf2608SManivannan Sadhasivam }; 3890cbf2608SManivannan Sadhasivam 390e755cadbSManivannan Sadhasivam /** 391e755cadbSManivannan Sadhasivam * struct mhi_driver - Structure representing a MHI client driver 392e755cadbSManivannan Sadhasivam * @probe: CB function for client driver probe function 393e755cadbSManivannan Sadhasivam * @remove: CB function for client driver remove function 394e755cadbSManivannan Sadhasivam * @ul_xfer_cb: CB function for UL data transfer 395e755cadbSManivannan Sadhasivam * @dl_xfer_cb: CB function for DL data transfer 396e755cadbSManivannan Sadhasivam * @status_cb: CB functions for asynchronous status 397e755cadbSManivannan Sadhasivam * @driver: Device driver model driver 398e755cadbSManivannan Sadhasivam */ 399e755cadbSManivannan Sadhasivam struct mhi_driver { 400e755cadbSManivannan Sadhasivam const struct mhi_device_id *id_table; 401e755cadbSManivannan Sadhasivam int (*probe)(struct mhi_device *mhi_dev, 402e755cadbSManivannan Sadhasivam const struct mhi_device_id *id); 403e755cadbSManivannan Sadhasivam void (*remove)(struct mhi_device *mhi_dev); 404e755cadbSManivannan Sadhasivam void (*ul_xfer_cb)(struct mhi_device *mhi_dev, 405e755cadbSManivannan Sadhasivam struct mhi_result *result); 406e755cadbSManivannan Sadhasivam void (*dl_xfer_cb)(struct mhi_device *mhi_dev, 407e755cadbSManivannan Sadhasivam struct mhi_result *result); 408e755cadbSManivannan Sadhasivam void (*status_cb)(struct mhi_device *mhi_dev, enum mhi_callback mhi_cb); 409e755cadbSManivannan Sadhasivam struct device_driver driver; 410e755cadbSManivannan Sadhasivam }; 411e755cadbSManivannan Sadhasivam 412e755cadbSManivannan Sadhasivam #define to_mhi_driver(drv) container_of(drv, struct mhi_driver, driver) 4130cbf2608SManivannan Sadhasivam #define to_mhi_device(dev) container_of(dev, struct mhi_device, dev) 4140cbf2608SManivannan Sadhasivam 4150cbf2608SManivannan Sadhasivam /** 4160cbf2608SManivannan Sadhasivam * mhi_register_controller - Register MHI controller 4170cbf2608SManivannan Sadhasivam * @mhi_cntrl: MHI controller to register 4180cbf2608SManivannan Sadhasivam * @config: Configuration to use for the controller 4190cbf2608SManivannan Sadhasivam */ 4200cbf2608SManivannan Sadhasivam int mhi_register_controller(struct mhi_controller *mhi_cntrl, 4210cbf2608SManivannan Sadhasivam struct mhi_controller_config *config); 4220cbf2608SManivannan Sadhasivam 4230cbf2608SManivannan Sadhasivam /** 4240cbf2608SManivannan Sadhasivam * mhi_unregister_controller - Unregister MHI controller 4250cbf2608SManivannan Sadhasivam * @mhi_cntrl: MHI controller to unregister 4260cbf2608SManivannan Sadhasivam */ 4270cbf2608SManivannan Sadhasivam void mhi_unregister_controller(struct mhi_controller *mhi_cntrl); 4280cbf2608SManivannan Sadhasivam 429e755cadbSManivannan Sadhasivam /** 430e755cadbSManivannan Sadhasivam * mhi_driver_register - Register driver with MHI framework 431e755cadbSManivannan Sadhasivam * @mhi_drv: Driver associated with the device 432e755cadbSManivannan Sadhasivam */ 433e755cadbSManivannan Sadhasivam int mhi_driver_register(struct mhi_driver *mhi_drv); 434e755cadbSManivannan Sadhasivam 435e755cadbSManivannan Sadhasivam /** 436e755cadbSManivannan Sadhasivam * mhi_driver_unregister - Unregister a driver for mhi_devices 437e755cadbSManivannan Sadhasivam * @mhi_drv: Driver associated with the device 438e755cadbSManivannan Sadhasivam */ 439e755cadbSManivannan Sadhasivam void mhi_driver_unregister(struct mhi_driver *mhi_drv); 440e755cadbSManivannan Sadhasivam 4410cbf2608SManivannan Sadhasivam #endif /* _MHI_H_ */ 442