10cbf2608SManivannan Sadhasivam /* SPDX-License-Identifier: GPL-2.0 */ 20cbf2608SManivannan Sadhasivam /* 30cbf2608SManivannan Sadhasivam * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. 40cbf2608SManivannan Sadhasivam * 50cbf2608SManivannan Sadhasivam */ 60cbf2608SManivannan Sadhasivam #ifndef _MHI_H_ 70cbf2608SManivannan Sadhasivam #define _MHI_H_ 80cbf2608SManivannan Sadhasivam 90cbf2608SManivannan Sadhasivam #include <linux/device.h> 100cbf2608SManivannan Sadhasivam #include <linux/dma-direction.h> 110cbf2608SManivannan Sadhasivam #include <linux/mutex.h> 120cbf2608SManivannan Sadhasivam #include <linux/rwlock_types.h> 13189ff97cSManivannan Sadhasivam #include <linux/skbuff.h> 140cbf2608SManivannan Sadhasivam #include <linux/slab.h> 150cbf2608SManivannan Sadhasivam #include <linux/spinlock_types.h> 160cbf2608SManivannan Sadhasivam #include <linux/wait.h> 170cbf2608SManivannan Sadhasivam #include <linux/workqueue.h> 180cbf2608SManivannan Sadhasivam 190cbf2608SManivannan Sadhasivam struct mhi_chan; 200cbf2608SManivannan Sadhasivam struct mhi_event; 210cbf2608SManivannan Sadhasivam struct mhi_ctxt; 220cbf2608SManivannan Sadhasivam struct mhi_cmd; 230cbf2608SManivannan Sadhasivam struct mhi_buf_info; 240cbf2608SManivannan Sadhasivam 250cbf2608SManivannan Sadhasivam /** 260cbf2608SManivannan Sadhasivam * enum mhi_callback - MHI callback 270cbf2608SManivannan Sadhasivam * @MHI_CB_IDLE: MHI entered idle state 280cbf2608SManivannan Sadhasivam * @MHI_CB_PENDING_DATA: New data available for client to process 290cbf2608SManivannan Sadhasivam * @MHI_CB_LPM_ENTER: MHI host entered low power mode 300cbf2608SManivannan Sadhasivam * @MHI_CB_LPM_EXIT: MHI host about to exit low power mode 310cbf2608SManivannan Sadhasivam * @MHI_CB_EE_RDDM: MHI device entered RDDM exec env 320cbf2608SManivannan Sadhasivam * @MHI_CB_EE_MISSION_MODE: MHI device entered Mission Mode exec env 330cbf2608SManivannan Sadhasivam * @MHI_CB_SYS_ERROR: MHI device entered error state (may recover) 340cbf2608SManivannan Sadhasivam * @MHI_CB_FATAL_ERROR: MHI device entered fatal error state 351d3173a3SManivannan Sadhasivam * @MHI_CB_BW_REQ: Received a bandwidth switch request from device 360cbf2608SManivannan Sadhasivam */ 370cbf2608SManivannan Sadhasivam enum mhi_callback { 380cbf2608SManivannan Sadhasivam MHI_CB_IDLE, 390cbf2608SManivannan Sadhasivam MHI_CB_PENDING_DATA, 400cbf2608SManivannan Sadhasivam MHI_CB_LPM_ENTER, 410cbf2608SManivannan Sadhasivam MHI_CB_LPM_EXIT, 420cbf2608SManivannan Sadhasivam MHI_CB_EE_RDDM, 430cbf2608SManivannan Sadhasivam MHI_CB_EE_MISSION_MODE, 440cbf2608SManivannan Sadhasivam MHI_CB_SYS_ERROR, 450cbf2608SManivannan Sadhasivam MHI_CB_FATAL_ERROR, 461d3173a3SManivannan Sadhasivam MHI_CB_BW_REQ, 470cbf2608SManivannan Sadhasivam }; 480cbf2608SManivannan Sadhasivam 490cbf2608SManivannan Sadhasivam /** 500cbf2608SManivannan Sadhasivam * enum mhi_flags - Transfer flags 510cbf2608SManivannan Sadhasivam * @MHI_EOB: End of buffer for bulk transfer 520cbf2608SManivannan Sadhasivam * @MHI_EOT: End of transfer 530cbf2608SManivannan Sadhasivam * @MHI_CHAIN: Linked transfer 540cbf2608SManivannan Sadhasivam */ 550cbf2608SManivannan Sadhasivam enum mhi_flags { 56115f3251SManivannan Sadhasivam MHI_EOB = BIT(0), 57115f3251SManivannan Sadhasivam MHI_EOT = BIT(1), 58115f3251SManivannan Sadhasivam MHI_CHAIN = BIT(2), 590cbf2608SManivannan Sadhasivam }; 600cbf2608SManivannan Sadhasivam 610cbf2608SManivannan Sadhasivam /** 620cbf2608SManivannan Sadhasivam * enum mhi_device_type - Device types 630cbf2608SManivannan Sadhasivam * @MHI_DEVICE_XFER: Handles data transfer 640cbf2608SManivannan Sadhasivam * @MHI_DEVICE_CONTROLLER: Control device 650cbf2608SManivannan Sadhasivam */ 660cbf2608SManivannan Sadhasivam enum mhi_device_type { 670cbf2608SManivannan Sadhasivam MHI_DEVICE_XFER, 680cbf2608SManivannan Sadhasivam MHI_DEVICE_CONTROLLER, 690cbf2608SManivannan Sadhasivam }; 700cbf2608SManivannan Sadhasivam 710cbf2608SManivannan Sadhasivam /** 720cbf2608SManivannan Sadhasivam * enum mhi_ch_type - Channel types 730cbf2608SManivannan Sadhasivam * @MHI_CH_TYPE_INVALID: Invalid channel type 740cbf2608SManivannan Sadhasivam * @MHI_CH_TYPE_OUTBOUND: Outbound channel to the device 750cbf2608SManivannan Sadhasivam * @MHI_CH_TYPE_INBOUND: Inbound channel from the device 760cbf2608SManivannan Sadhasivam * @MHI_CH_TYPE_INBOUND_COALESCED: Coalesced channel for the device to combine 770cbf2608SManivannan Sadhasivam * multiple packets and send them as a single 780cbf2608SManivannan Sadhasivam * large packet to reduce CPU consumption 790cbf2608SManivannan Sadhasivam */ 800cbf2608SManivannan Sadhasivam enum mhi_ch_type { 810cbf2608SManivannan Sadhasivam MHI_CH_TYPE_INVALID = 0, 820cbf2608SManivannan Sadhasivam MHI_CH_TYPE_OUTBOUND = DMA_TO_DEVICE, 830cbf2608SManivannan Sadhasivam MHI_CH_TYPE_INBOUND = DMA_FROM_DEVICE, 840cbf2608SManivannan Sadhasivam MHI_CH_TYPE_INBOUND_COALESCED = 3, 850cbf2608SManivannan Sadhasivam }; 860cbf2608SManivannan Sadhasivam 870cbf2608SManivannan Sadhasivam /** 884d12a897SRandy Dunlap * struct image_info - Firmware and RDDM table 894d12a897SRandy Dunlap * @mhi_buf: Buffer for firmware and RDDM table 904d12a897SRandy Dunlap * @entries: # of entries in table 913000f85bSManivannan Sadhasivam */ 923000f85bSManivannan Sadhasivam struct image_info { 933000f85bSManivannan Sadhasivam struct mhi_buf *mhi_buf; 944d12a897SRandy Dunlap /* private: from internal.h */ 953000f85bSManivannan Sadhasivam struct bhi_vec_entry *bhi_vec; 964d12a897SRandy Dunlap /* public: */ 973000f85bSManivannan Sadhasivam u32 entries; 983000f85bSManivannan Sadhasivam }; 993000f85bSManivannan Sadhasivam 1003000f85bSManivannan Sadhasivam /** 1011d3173a3SManivannan Sadhasivam * struct mhi_link_info - BW requirement 1021d3173a3SManivannan Sadhasivam * target_link_speed - Link speed as defined by TLS bits in LinkControl reg 1031d3173a3SManivannan Sadhasivam * target_link_width - Link width as defined by NLW bits in LinkStatus reg 1041d3173a3SManivannan Sadhasivam */ 1051d3173a3SManivannan Sadhasivam struct mhi_link_info { 1061d3173a3SManivannan Sadhasivam unsigned int target_link_speed; 1071d3173a3SManivannan Sadhasivam unsigned int target_link_width; 1081d3173a3SManivannan Sadhasivam }; 1091d3173a3SManivannan Sadhasivam 1101d3173a3SManivannan Sadhasivam /** 1110cbf2608SManivannan Sadhasivam * enum mhi_ee_type - Execution environment types 1120cbf2608SManivannan Sadhasivam * @MHI_EE_PBL: Primary Bootloader 1130cbf2608SManivannan Sadhasivam * @MHI_EE_SBL: Secondary Bootloader 1140cbf2608SManivannan Sadhasivam * @MHI_EE_AMSS: Modem, aka the primary runtime EE 1150cbf2608SManivannan Sadhasivam * @MHI_EE_RDDM: Ram dump download mode 1160cbf2608SManivannan Sadhasivam * @MHI_EE_WFW: WLAN firmware mode 1170cbf2608SManivannan Sadhasivam * @MHI_EE_PTHRU: Passthrough 1180cbf2608SManivannan Sadhasivam * @MHI_EE_EDL: Embedded downloader 1190cbf2608SManivannan Sadhasivam */ 1200cbf2608SManivannan Sadhasivam enum mhi_ee_type { 1210cbf2608SManivannan Sadhasivam MHI_EE_PBL, 1220cbf2608SManivannan Sadhasivam MHI_EE_SBL, 1230cbf2608SManivannan Sadhasivam MHI_EE_AMSS, 1240cbf2608SManivannan Sadhasivam MHI_EE_RDDM, 1250cbf2608SManivannan Sadhasivam MHI_EE_WFW, 1260cbf2608SManivannan Sadhasivam MHI_EE_PTHRU, 1270cbf2608SManivannan Sadhasivam MHI_EE_EDL, 1280cbf2608SManivannan Sadhasivam MHI_EE_MAX_SUPPORTED = MHI_EE_EDL, 1290cbf2608SManivannan Sadhasivam MHI_EE_DISABLE_TRANSITION, /* local EE, not related to mhi spec */ 1300cbf2608SManivannan Sadhasivam MHI_EE_NOT_SUPPORTED, 1310cbf2608SManivannan Sadhasivam MHI_EE_MAX, 1320cbf2608SManivannan Sadhasivam }; 1330cbf2608SManivannan Sadhasivam 1340cbf2608SManivannan Sadhasivam /** 135a6e2e352SManivannan Sadhasivam * enum mhi_state - MHI states 136a6e2e352SManivannan Sadhasivam * @MHI_STATE_RESET: Reset state 137a6e2e352SManivannan Sadhasivam * @MHI_STATE_READY: Ready state 138a6e2e352SManivannan Sadhasivam * @MHI_STATE_M0: M0 state 139a6e2e352SManivannan Sadhasivam * @MHI_STATE_M1: M1 state 140a6e2e352SManivannan Sadhasivam * @MHI_STATE_M2: M2 state 141a6e2e352SManivannan Sadhasivam * @MHI_STATE_M3: M3 state 142a6e2e352SManivannan Sadhasivam * @MHI_STATE_M3_FAST: M3 Fast state 143a6e2e352SManivannan Sadhasivam * @MHI_STATE_BHI: BHI state 144a6e2e352SManivannan Sadhasivam * @MHI_STATE_SYS_ERR: System Error state 145a6e2e352SManivannan Sadhasivam */ 146a6e2e352SManivannan Sadhasivam enum mhi_state { 147a6e2e352SManivannan Sadhasivam MHI_STATE_RESET = 0x0, 148a6e2e352SManivannan Sadhasivam MHI_STATE_READY = 0x1, 149a6e2e352SManivannan Sadhasivam MHI_STATE_M0 = 0x2, 150a6e2e352SManivannan Sadhasivam MHI_STATE_M1 = 0x3, 151a6e2e352SManivannan Sadhasivam MHI_STATE_M2 = 0x4, 152a6e2e352SManivannan Sadhasivam MHI_STATE_M3 = 0x5, 153a6e2e352SManivannan Sadhasivam MHI_STATE_M3_FAST = 0x6, 154a6e2e352SManivannan Sadhasivam MHI_STATE_BHI = 0x7, 155a6e2e352SManivannan Sadhasivam MHI_STATE_SYS_ERR = 0xFF, 156a6e2e352SManivannan Sadhasivam MHI_STATE_MAX, 157a6e2e352SManivannan Sadhasivam }; 158a6e2e352SManivannan Sadhasivam 159a6e2e352SManivannan Sadhasivam /** 1600cbf2608SManivannan Sadhasivam * enum mhi_ch_ee_mask - Execution environment mask for channel 1610cbf2608SManivannan Sadhasivam * @MHI_CH_EE_PBL: Allow channel to be used in PBL EE 1620cbf2608SManivannan Sadhasivam * @MHI_CH_EE_SBL: Allow channel to be used in SBL EE 1630cbf2608SManivannan Sadhasivam * @MHI_CH_EE_AMSS: Allow channel to be used in AMSS EE 1640cbf2608SManivannan Sadhasivam * @MHI_CH_EE_RDDM: Allow channel to be used in RDDM EE 1650cbf2608SManivannan Sadhasivam * @MHI_CH_EE_PTHRU: Allow channel to be used in PTHRU EE 1660cbf2608SManivannan Sadhasivam * @MHI_CH_EE_WFW: Allow channel to be used in WFW EE 1670cbf2608SManivannan Sadhasivam * @MHI_CH_EE_EDL: Allow channel to be used in EDL EE 1680cbf2608SManivannan Sadhasivam */ 1690cbf2608SManivannan Sadhasivam enum mhi_ch_ee_mask { 1700cbf2608SManivannan Sadhasivam MHI_CH_EE_PBL = BIT(MHI_EE_PBL), 1710cbf2608SManivannan Sadhasivam MHI_CH_EE_SBL = BIT(MHI_EE_SBL), 1720cbf2608SManivannan Sadhasivam MHI_CH_EE_AMSS = BIT(MHI_EE_AMSS), 1730cbf2608SManivannan Sadhasivam MHI_CH_EE_RDDM = BIT(MHI_EE_RDDM), 1740cbf2608SManivannan Sadhasivam MHI_CH_EE_PTHRU = BIT(MHI_EE_PTHRU), 1750cbf2608SManivannan Sadhasivam MHI_CH_EE_WFW = BIT(MHI_EE_WFW), 1760cbf2608SManivannan Sadhasivam MHI_CH_EE_EDL = BIT(MHI_EE_EDL), 1770cbf2608SManivannan Sadhasivam }; 1780cbf2608SManivannan Sadhasivam 1790cbf2608SManivannan Sadhasivam /** 1800cbf2608SManivannan Sadhasivam * enum mhi_er_data_type - Event ring data types 1810cbf2608SManivannan Sadhasivam * @MHI_ER_DATA: Only client data over this ring 1820cbf2608SManivannan Sadhasivam * @MHI_ER_CTRL: MHI control data and client data 1830cbf2608SManivannan Sadhasivam */ 1840cbf2608SManivannan Sadhasivam enum mhi_er_data_type { 1850cbf2608SManivannan Sadhasivam MHI_ER_DATA, 1860cbf2608SManivannan Sadhasivam MHI_ER_CTRL, 1870cbf2608SManivannan Sadhasivam }; 1880cbf2608SManivannan Sadhasivam 1890cbf2608SManivannan Sadhasivam /** 1900cbf2608SManivannan Sadhasivam * enum mhi_db_brst_mode - Doorbell mode 1910cbf2608SManivannan Sadhasivam * @MHI_DB_BRST_DISABLE: Burst mode disable 1920cbf2608SManivannan Sadhasivam * @MHI_DB_BRST_ENABLE: Burst mode enable 1930cbf2608SManivannan Sadhasivam */ 1940cbf2608SManivannan Sadhasivam enum mhi_db_brst_mode { 1950cbf2608SManivannan Sadhasivam MHI_DB_BRST_DISABLE = 0x2, 1960cbf2608SManivannan Sadhasivam MHI_DB_BRST_ENABLE = 0x3, 1970cbf2608SManivannan Sadhasivam }; 1980cbf2608SManivannan Sadhasivam 1990cbf2608SManivannan Sadhasivam /** 2000cbf2608SManivannan Sadhasivam * struct mhi_channel_config - Channel configuration structure for controller 2010cbf2608SManivannan Sadhasivam * @name: The name of this channel 2020cbf2608SManivannan Sadhasivam * @num: The number assigned to this channel 2030cbf2608SManivannan Sadhasivam * @num_elements: The number of elements that can be queued to this channel 2040cbf2608SManivannan Sadhasivam * @local_elements: The local ring length of the channel 2050cbf2608SManivannan Sadhasivam * @event_ring: The event rung index that services this channel 2060cbf2608SManivannan Sadhasivam * @dir: Direction that data may flow on this channel 2070cbf2608SManivannan Sadhasivam * @type: Channel type 2080cbf2608SManivannan Sadhasivam * @ee_mask: Execution Environment mask for this channel 2090cbf2608SManivannan Sadhasivam * @pollcfg: Polling configuration for burst mode. 0 is default. milliseconds 2100cbf2608SManivannan Sadhasivam for UL channels, multiple of 8 ring elements for DL channels 2110cbf2608SManivannan Sadhasivam * @doorbell: Doorbell mode 2120cbf2608SManivannan Sadhasivam * @lpm_notify: The channel master requires low power mode notifications 2130cbf2608SManivannan Sadhasivam * @offload_channel: The client manages the channel completely 2140cbf2608SManivannan Sadhasivam * @doorbell_mode_switch: Channel switches to doorbell mode on M0 transition 2150cbf2608SManivannan Sadhasivam * @auto_queue: Framework will automatically queue buffers for DL traffic 2160cbf2608SManivannan Sadhasivam * @auto_start: Automatically start (open) this channel 217da1c4f85SManivannan Sadhasivam * @wake-capable: Channel capable of waking up the system 2180cbf2608SManivannan Sadhasivam */ 2190cbf2608SManivannan Sadhasivam struct mhi_channel_config { 2200cbf2608SManivannan Sadhasivam char *name; 2210cbf2608SManivannan Sadhasivam u32 num; 2220cbf2608SManivannan Sadhasivam u32 num_elements; 2230cbf2608SManivannan Sadhasivam u32 local_elements; 2240cbf2608SManivannan Sadhasivam u32 event_ring; 2250cbf2608SManivannan Sadhasivam enum dma_data_direction dir; 2260cbf2608SManivannan Sadhasivam enum mhi_ch_type type; 2270cbf2608SManivannan Sadhasivam u32 ee_mask; 2280cbf2608SManivannan Sadhasivam u32 pollcfg; 2290cbf2608SManivannan Sadhasivam enum mhi_db_brst_mode doorbell; 2300cbf2608SManivannan Sadhasivam bool lpm_notify; 2310cbf2608SManivannan Sadhasivam bool offload_channel; 2320cbf2608SManivannan Sadhasivam bool doorbell_mode_switch; 2330cbf2608SManivannan Sadhasivam bool auto_queue; 2340cbf2608SManivannan Sadhasivam bool auto_start; 235da1c4f85SManivannan Sadhasivam bool wake_capable; 2360cbf2608SManivannan Sadhasivam }; 2370cbf2608SManivannan Sadhasivam 2380cbf2608SManivannan Sadhasivam /** 2390cbf2608SManivannan Sadhasivam * struct mhi_event_config - Event ring configuration structure for controller 2400cbf2608SManivannan Sadhasivam * @num_elements: The number of elements that can be queued to this ring 2410cbf2608SManivannan Sadhasivam * @irq_moderation_ms: Delay irq for additional events to be aggregated 2420cbf2608SManivannan Sadhasivam * @irq: IRQ associated with this ring 2430cbf2608SManivannan Sadhasivam * @channel: Dedicated channel number. U32_MAX indicates a non-dedicated ring 2440cbf2608SManivannan Sadhasivam * @priority: Priority of this ring. Use 1 for now 2450cbf2608SManivannan Sadhasivam * @mode: Doorbell mode 2460cbf2608SManivannan Sadhasivam * @data_type: Type of data this ring will process 2470cbf2608SManivannan Sadhasivam * @hardware_event: This ring is associated with hardware channels 2480cbf2608SManivannan Sadhasivam * @client_managed: This ring is client managed 2490cbf2608SManivannan Sadhasivam * @offload_channel: This ring is associated with an offloaded channel 2500cbf2608SManivannan Sadhasivam */ 2510cbf2608SManivannan Sadhasivam struct mhi_event_config { 2520cbf2608SManivannan Sadhasivam u32 num_elements; 2530cbf2608SManivannan Sadhasivam u32 irq_moderation_ms; 2540cbf2608SManivannan Sadhasivam u32 irq; 2550cbf2608SManivannan Sadhasivam u32 channel; 2560cbf2608SManivannan Sadhasivam u32 priority; 2570cbf2608SManivannan Sadhasivam enum mhi_db_brst_mode mode; 2580cbf2608SManivannan Sadhasivam enum mhi_er_data_type data_type; 2590cbf2608SManivannan Sadhasivam bool hardware_event; 2600cbf2608SManivannan Sadhasivam bool client_managed; 2610cbf2608SManivannan Sadhasivam bool offload_channel; 2620cbf2608SManivannan Sadhasivam }; 2630cbf2608SManivannan Sadhasivam 2640cbf2608SManivannan Sadhasivam /** 2650cbf2608SManivannan Sadhasivam * struct mhi_controller_config - Root MHI controller configuration 2660cbf2608SManivannan Sadhasivam * @max_channels: Maximum number of channels supported 2670cbf2608SManivannan Sadhasivam * @timeout_ms: Timeout value for operations. 0 means use default 2680cbf2608SManivannan Sadhasivam * @buf_len: Size of automatically allocated buffers. 0 means use default 2690cbf2608SManivannan Sadhasivam * @num_channels: Number of channels defined in @ch_cfg 2700cbf2608SManivannan Sadhasivam * @ch_cfg: Array of defined channels 2710cbf2608SManivannan Sadhasivam * @num_events: Number of event rings defined in @event_cfg 2720cbf2608SManivannan Sadhasivam * @event_cfg: Array of defined event rings 2730cbf2608SManivannan Sadhasivam * @use_bounce_buf: Use a bounce buffer pool due to limited DDR access 2740cbf2608SManivannan Sadhasivam * @m2_no_db: Host is not allowed to ring DB in M2 state 2750cbf2608SManivannan Sadhasivam */ 2760cbf2608SManivannan Sadhasivam struct mhi_controller_config { 2770cbf2608SManivannan Sadhasivam u32 max_channels; 2780cbf2608SManivannan Sadhasivam u32 timeout_ms; 2790cbf2608SManivannan Sadhasivam u32 buf_len; 2800cbf2608SManivannan Sadhasivam u32 num_channels; 2810cbf2608SManivannan Sadhasivam struct mhi_channel_config *ch_cfg; 2820cbf2608SManivannan Sadhasivam u32 num_events; 2830cbf2608SManivannan Sadhasivam struct mhi_event_config *event_cfg; 2840cbf2608SManivannan Sadhasivam bool use_bounce_buf; 2850cbf2608SManivannan Sadhasivam bool m2_no_db; 2860cbf2608SManivannan Sadhasivam }; 2870cbf2608SManivannan Sadhasivam 2880cbf2608SManivannan Sadhasivam /** 2890cbf2608SManivannan Sadhasivam * struct mhi_controller - Master MHI controller structure 2900cbf2608SManivannan Sadhasivam * @cntrl_dev: Pointer to the struct device of physical bus acting as the MHI 2910cbf2608SManivannan Sadhasivam * controller (required) 2920cbf2608SManivannan Sadhasivam * @mhi_dev: MHI device instance for the controller 2930cbf2608SManivannan Sadhasivam * @regs: Base address of MHI MMIO register space (required) 2946cd330aeSManivannan Sadhasivam * @bhi: Points to base of MHI BHI register space 2953000f85bSManivannan Sadhasivam * @bhie: Points to base of MHI BHIe register space 2966cd330aeSManivannan Sadhasivam * @wake_db: MHI WAKE doorbell register address 2970cbf2608SManivannan Sadhasivam * @iova_start: IOMMU starting address for data (required) 2980cbf2608SManivannan Sadhasivam * @iova_stop: IOMMU stop address for data (required) 2990cbf2608SManivannan Sadhasivam * @fw_image: Firmware image name for normal booting (required) 3000cbf2608SManivannan Sadhasivam * @edl_image: Firmware image name for emergency download mode (optional) 3016fdfdd27SManivannan Sadhasivam * @rddm_size: RAM dump size that host should allocate for debugging purpose 3020cbf2608SManivannan Sadhasivam * @sbl_size: SBL image size downloaded through BHIe (optional) 3030cbf2608SManivannan Sadhasivam * @seg_len: BHIe vector size (optional) 3043000f85bSManivannan Sadhasivam * @fbc_image: Points to firmware image buffer 3056fdfdd27SManivannan Sadhasivam * @rddm_image: Points to RAM dump buffer 3060cbf2608SManivannan Sadhasivam * @mhi_chan: Points to the channel configuration table 3070cbf2608SManivannan Sadhasivam * @lpm_chans: List of channels that require LPM notifications 3080cbf2608SManivannan Sadhasivam * @irq: base irq # to request (required) 3090cbf2608SManivannan Sadhasivam * @max_chan: Maximum number of channels the controller supports 3100cbf2608SManivannan Sadhasivam * @total_ev_rings: Total # of event rings allocated 3110cbf2608SManivannan Sadhasivam * @hw_ev_rings: Number of hardware event rings 3120cbf2608SManivannan Sadhasivam * @sw_ev_rings: Number of software event rings 3130cbf2608SManivannan Sadhasivam * @nr_irqs_req: Number of IRQs required to operate (optional) 3140cbf2608SManivannan Sadhasivam * @nr_irqs: Number of IRQ allocated by bus master (required) 3153316ab2bSManivannan Sadhasivam * @family_number: MHI controller family number 3163316ab2bSManivannan Sadhasivam * @device_number: MHI controller device number 3173316ab2bSManivannan Sadhasivam * @major_version: MHI controller major revision number 3183316ab2bSManivannan Sadhasivam * @minor_version: MHI controller minor revision number 3190cbf2608SManivannan Sadhasivam * @mhi_event: MHI event ring configurations table 3200cbf2608SManivannan Sadhasivam * @mhi_cmd: MHI command ring configurations table 3210cbf2608SManivannan Sadhasivam * @mhi_ctxt: MHI device context, shared memory between host and device 3220cbf2608SManivannan Sadhasivam * @pm_mutex: Mutex for suspend/resume operation 3230cbf2608SManivannan Sadhasivam * @pm_lock: Lock for protecting MHI power management state 3240cbf2608SManivannan Sadhasivam * @timeout_ms: Timeout in ms for state transitions 3250cbf2608SManivannan Sadhasivam * @pm_state: MHI power management state 3260cbf2608SManivannan Sadhasivam * @db_access: DB access states 3270cbf2608SManivannan Sadhasivam * @ee: MHI device execution environment 328a6e2e352SManivannan Sadhasivam * @dev_state: MHI device state 3290cbf2608SManivannan Sadhasivam * @dev_wake: Device wakeup count 3300cbf2608SManivannan Sadhasivam * @pending_pkts: Pending packets for the controller 3310cbf2608SManivannan Sadhasivam * @transition_list: List of MHI state transitions 3320cbf2608SManivannan Sadhasivam * @transition_lock: Lock for protecting MHI state transition list 3330cbf2608SManivannan Sadhasivam * @wlock: Lock for protecting device wakeup 3341d3173a3SManivannan Sadhasivam * @mhi_link_info: Device bandwidth info 3350cbf2608SManivannan Sadhasivam * @st_worker: State transition worker 3360cbf2608SManivannan Sadhasivam * @state_event: State change event 3370cbf2608SManivannan Sadhasivam * @status_cb: CB function to notify power states of the device (required) 3380cbf2608SManivannan Sadhasivam * @wake_get: CB function to assert device wake (optional) 3390cbf2608SManivannan Sadhasivam * @wake_put: CB function to de-assert device wake (optional) 3400cbf2608SManivannan Sadhasivam * @wake_toggle: CB function to assert and de-assert device wake (optional) 3410cbf2608SManivannan Sadhasivam * @runtime_get: CB function to controller runtime resume (required) 342af2e5881SJeffrey Hugo * @runtime_put: CB function to decrement pm usage (required) 343189ff97cSManivannan Sadhasivam * @map_single: CB function to create TRE buffer 344189ff97cSManivannan Sadhasivam * @unmap_single: CB function to destroy TRE buffer 34545723a44SJeffrey Hugo * @read_reg: Read a MHI register via the physical link (required) 34645723a44SJeffrey Hugo * @write_reg: Write a MHI register via the physical link (required) 3470cbf2608SManivannan Sadhasivam * @buffer_len: Bounce buffer length 3480cbf2608SManivannan Sadhasivam * @bounce_buf: Use of bounce buffer 3490cbf2608SManivannan Sadhasivam * @fbc_download: MHI host needs to do complete image transfer (optional) 3500cbf2608SManivannan Sadhasivam * @pre_init: MHI host needs to do pre-initialization before power up 3510cbf2608SManivannan Sadhasivam * @wake_set: Device wakeup set flag 3520cbf2608SManivannan Sadhasivam * 3530cbf2608SManivannan Sadhasivam * Fields marked as (required) need to be populated by the controller driver 3540cbf2608SManivannan Sadhasivam * before calling mhi_register_controller(). For the fields marked as (optional) 3550cbf2608SManivannan Sadhasivam * they can be populated depending on the usecase. 3563316ab2bSManivannan Sadhasivam * 3573316ab2bSManivannan Sadhasivam * The following fields are present for the purpose of implementing any device 3583316ab2bSManivannan Sadhasivam * specific quirks or customizations for specific MHI revisions used in device 3593316ab2bSManivannan Sadhasivam * by the controller drivers. The MHI stack will just populate these fields 3603316ab2bSManivannan Sadhasivam * during mhi_register_controller(): 3613316ab2bSManivannan Sadhasivam * family_number 3623316ab2bSManivannan Sadhasivam * device_number 3633316ab2bSManivannan Sadhasivam * major_version 3643316ab2bSManivannan Sadhasivam * minor_version 3650cbf2608SManivannan Sadhasivam */ 3660cbf2608SManivannan Sadhasivam struct mhi_controller { 3670cbf2608SManivannan Sadhasivam struct device *cntrl_dev; 3680cbf2608SManivannan Sadhasivam struct mhi_device *mhi_dev; 3690cbf2608SManivannan Sadhasivam void __iomem *regs; 3706cd330aeSManivannan Sadhasivam void __iomem *bhi; 3713000f85bSManivannan Sadhasivam void __iomem *bhie; 3726cd330aeSManivannan Sadhasivam void __iomem *wake_db; 373a6e2e352SManivannan Sadhasivam 3740cbf2608SManivannan Sadhasivam dma_addr_t iova_start; 3750cbf2608SManivannan Sadhasivam dma_addr_t iova_stop; 3760cbf2608SManivannan Sadhasivam const char *fw_image; 3770cbf2608SManivannan Sadhasivam const char *edl_image; 3786fdfdd27SManivannan Sadhasivam size_t rddm_size; 3790cbf2608SManivannan Sadhasivam size_t sbl_size; 3800cbf2608SManivannan Sadhasivam size_t seg_len; 3813000f85bSManivannan Sadhasivam struct image_info *fbc_image; 3826fdfdd27SManivannan Sadhasivam struct image_info *rddm_image; 3830cbf2608SManivannan Sadhasivam struct mhi_chan *mhi_chan; 3840cbf2608SManivannan Sadhasivam struct list_head lpm_chans; 3850cbf2608SManivannan Sadhasivam int *irq; 3860cbf2608SManivannan Sadhasivam u32 max_chan; 3870cbf2608SManivannan Sadhasivam u32 total_ev_rings; 3880cbf2608SManivannan Sadhasivam u32 hw_ev_rings; 3890cbf2608SManivannan Sadhasivam u32 sw_ev_rings; 3900cbf2608SManivannan Sadhasivam u32 nr_irqs_req; 3910cbf2608SManivannan Sadhasivam u32 nr_irqs; 3923316ab2bSManivannan Sadhasivam u32 family_number; 3933316ab2bSManivannan Sadhasivam u32 device_number; 3943316ab2bSManivannan Sadhasivam u32 major_version; 3953316ab2bSManivannan Sadhasivam u32 minor_version; 3960cbf2608SManivannan Sadhasivam 3970cbf2608SManivannan Sadhasivam struct mhi_event *mhi_event; 3980cbf2608SManivannan Sadhasivam struct mhi_cmd *mhi_cmd; 3990cbf2608SManivannan Sadhasivam struct mhi_ctxt *mhi_ctxt; 4000cbf2608SManivannan Sadhasivam 4010cbf2608SManivannan Sadhasivam struct mutex pm_mutex; 4020cbf2608SManivannan Sadhasivam rwlock_t pm_lock; 4030cbf2608SManivannan Sadhasivam u32 timeout_ms; 4040cbf2608SManivannan Sadhasivam u32 pm_state; 4050cbf2608SManivannan Sadhasivam u32 db_access; 4060cbf2608SManivannan Sadhasivam enum mhi_ee_type ee; 407a6e2e352SManivannan Sadhasivam enum mhi_state dev_state; 4080cbf2608SManivannan Sadhasivam atomic_t dev_wake; 4090cbf2608SManivannan Sadhasivam atomic_t pending_pkts; 4100cbf2608SManivannan Sadhasivam struct list_head transition_list; 4110cbf2608SManivannan Sadhasivam spinlock_t transition_lock; 4120cbf2608SManivannan Sadhasivam spinlock_t wlock; 4131d3173a3SManivannan Sadhasivam struct mhi_link_info mhi_link_info; 4140cbf2608SManivannan Sadhasivam struct work_struct st_worker; 4150cbf2608SManivannan Sadhasivam wait_queue_head_t state_event; 4160cbf2608SManivannan Sadhasivam 4170cbf2608SManivannan Sadhasivam void (*status_cb)(struct mhi_controller *mhi_cntrl, 4180cbf2608SManivannan Sadhasivam enum mhi_callback cb); 4190cbf2608SManivannan Sadhasivam void (*wake_get)(struct mhi_controller *mhi_cntrl, bool override); 4200cbf2608SManivannan Sadhasivam void (*wake_put)(struct mhi_controller *mhi_cntrl, bool override); 4210cbf2608SManivannan Sadhasivam void (*wake_toggle)(struct mhi_controller *mhi_cntrl); 4220cbf2608SManivannan Sadhasivam int (*runtime_get)(struct mhi_controller *mhi_cntrl); 4230cbf2608SManivannan Sadhasivam void (*runtime_put)(struct mhi_controller *mhi_cntrl); 424189ff97cSManivannan Sadhasivam int (*map_single)(struct mhi_controller *mhi_cntrl, 425189ff97cSManivannan Sadhasivam struct mhi_buf_info *buf); 426189ff97cSManivannan Sadhasivam void (*unmap_single)(struct mhi_controller *mhi_cntrl, 427189ff97cSManivannan Sadhasivam struct mhi_buf_info *buf); 42845723a44SJeffrey Hugo int (*read_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr, 42945723a44SJeffrey Hugo u32 *out); 43045723a44SJeffrey Hugo void (*write_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr, 43145723a44SJeffrey Hugo u32 val); 4320cbf2608SManivannan Sadhasivam 4330cbf2608SManivannan Sadhasivam size_t buffer_len; 4340cbf2608SManivannan Sadhasivam bool bounce_buf; 4350cbf2608SManivannan Sadhasivam bool fbc_download; 4360cbf2608SManivannan Sadhasivam bool pre_init; 4370cbf2608SManivannan Sadhasivam bool wake_set; 4380cbf2608SManivannan Sadhasivam }; 4390cbf2608SManivannan Sadhasivam 4400cbf2608SManivannan Sadhasivam /** 441*5aa93f05SBhaumik Bhatt * struct mhi_device - Structure representing an MHI device which binds 442*5aa93f05SBhaumik Bhatt * to channels or is associated with controllers 4430cbf2608SManivannan Sadhasivam * @id: Pointer to MHI device ID struct 444*5aa93f05SBhaumik Bhatt * @name: Name of the associated MHI device 4450cbf2608SManivannan Sadhasivam * @mhi_cntrl: Controller the device belongs to 4460cbf2608SManivannan Sadhasivam * @ul_chan: UL channel for the device 4470cbf2608SManivannan Sadhasivam * @dl_chan: DL channel for the device 4480cbf2608SManivannan Sadhasivam * @dev: Driver model device node for the MHI device 4490cbf2608SManivannan Sadhasivam * @dev_type: MHI device type 450e755cadbSManivannan Sadhasivam * @ul_chan_id: MHI channel id for UL transfer 451e755cadbSManivannan Sadhasivam * @dl_chan_id: MHI channel id for DL transfer 4520cbf2608SManivannan Sadhasivam * @dev_wake: Device wakeup counter 4530cbf2608SManivannan Sadhasivam */ 4540cbf2608SManivannan Sadhasivam struct mhi_device { 4550cbf2608SManivannan Sadhasivam const struct mhi_device_id *id; 456*5aa93f05SBhaumik Bhatt const char *name; 4570cbf2608SManivannan Sadhasivam struct mhi_controller *mhi_cntrl; 4580cbf2608SManivannan Sadhasivam struct mhi_chan *ul_chan; 4590cbf2608SManivannan Sadhasivam struct mhi_chan *dl_chan; 4600cbf2608SManivannan Sadhasivam struct device dev; 4610cbf2608SManivannan Sadhasivam enum mhi_device_type dev_type; 462e755cadbSManivannan Sadhasivam int ul_chan_id; 463e755cadbSManivannan Sadhasivam int dl_chan_id; 4640cbf2608SManivannan Sadhasivam u32 dev_wake; 4650cbf2608SManivannan Sadhasivam }; 4660cbf2608SManivannan Sadhasivam 4670cbf2608SManivannan Sadhasivam /** 4680cbf2608SManivannan Sadhasivam * struct mhi_result - Completed buffer information 4690cbf2608SManivannan Sadhasivam * @buf_addr: Address of data buffer 4700cbf2608SManivannan Sadhasivam * @bytes_xferd: # of bytes transferred 4710cbf2608SManivannan Sadhasivam * @dir: Channel direction 4720cbf2608SManivannan Sadhasivam * @transaction_status: Status of last transaction 4730cbf2608SManivannan Sadhasivam */ 4740cbf2608SManivannan Sadhasivam struct mhi_result { 4750cbf2608SManivannan Sadhasivam void *buf_addr; 4760cbf2608SManivannan Sadhasivam size_t bytes_xferd; 4770cbf2608SManivannan Sadhasivam enum dma_data_direction dir; 4780cbf2608SManivannan Sadhasivam int transaction_status; 4790cbf2608SManivannan Sadhasivam }; 4800cbf2608SManivannan Sadhasivam 481e755cadbSManivannan Sadhasivam /** 482a6e2e352SManivannan Sadhasivam * struct mhi_buf - MHI Buffer description 483a6e2e352SManivannan Sadhasivam * @buf: Virtual address of the buffer 484a6e2e352SManivannan Sadhasivam * @name: Buffer label. For offload channel, configurations name must be: 485a6e2e352SManivannan Sadhasivam * ECA - Event context array data 486a6e2e352SManivannan Sadhasivam * CCA - Channel context array data 487a6e2e352SManivannan Sadhasivam * @dma_addr: IOMMU address of the buffer 488a6e2e352SManivannan Sadhasivam * @len: # of bytes 489a6e2e352SManivannan Sadhasivam */ 490a6e2e352SManivannan Sadhasivam struct mhi_buf { 491a6e2e352SManivannan Sadhasivam void *buf; 492a6e2e352SManivannan Sadhasivam const char *name; 493a6e2e352SManivannan Sadhasivam dma_addr_t dma_addr; 494a6e2e352SManivannan Sadhasivam size_t len; 495a6e2e352SManivannan Sadhasivam }; 496a6e2e352SManivannan Sadhasivam 497a6e2e352SManivannan Sadhasivam /** 498e755cadbSManivannan Sadhasivam * struct mhi_driver - Structure representing a MHI client driver 499e755cadbSManivannan Sadhasivam * @probe: CB function for client driver probe function 500e755cadbSManivannan Sadhasivam * @remove: CB function for client driver remove function 501e755cadbSManivannan Sadhasivam * @ul_xfer_cb: CB function for UL data transfer 502e755cadbSManivannan Sadhasivam * @dl_xfer_cb: CB function for DL data transfer 503e755cadbSManivannan Sadhasivam * @status_cb: CB functions for asynchronous status 504e755cadbSManivannan Sadhasivam * @driver: Device driver model driver 505e755cadbSManivannan Sadhasivam */ 506e755cadbSManivannan Sadhasivam struct mhi_driver { 507e755cadbSManivannan Sadhasivam const struct mhi_device_id *id_table; 508e755cadbSManivannan Sadhasivam int (*probe)(struct mhi_device *mhi_dev, 509e755cadbSManivannan Sadhasivam const struct mhi_device_id *id); 510e755cadbSManivannan Sadhasivam void (*remove)(struct mhi_device *mhi_dev); 511e755cadbSManivannan Sadhasivam void (*ul_xfer_cb)(struct mhi_device *mhi_dev, 512e755cadbSManivannan Sadhasivam struct mhi_result *result); 513e755cadbSManivannan Sadhasivam void (*dl_xfer_cb)(struct mhi_device *mhi_dev, 514e755cadbSManivannan Sadhasivam struct mhi_result *result); 515e755cadbSManivannan Sadhasivam void (*status_cb)(struct mhi_device *mhi_dev, enum mhi_callback mhi_cb); 516e755cadbSManivannan Sadhasivam struct device_driver driver; 517e755cadbSManivannan Sadhasivam }; 518e755cadbSManivannan Sadhasivam 519e755cadbSManivannan Sadhasivam #define to_mhi_driver(drv) container_of(drv, struct mhi_driver, driver) 5200cbf2608SManivannan Sadhasivam #define to_mhi_device(dev) container_of(dev, struct mhi_device, dev) 5210cbf2608SManivannan Sadhasivam 5220cbf2608SManivannan Sadhasivam /** 5230cbf2608SManivannan Sadhasivam * mhi_register_controller - Register MHI controller 5240cbf2608SManivannan Sadhasivam * @mhi_cntrl: MHI controller to register 5250cbf2608SManivannan Sadhasivam * @config: Configuration to use for the controller 5260cbf2608SManivannan Sadhasivam */ 5270cbf2608SManivannan Sadhasivam int mhi_register_controller(struct mhi_controller *mhi_cntrl, 5280cbf2608SManivannan Sadhasivam struct mhi_controller_config *config); 5290cbf2608SManivannan Sadhasivam 5300cbf2608SManivannan Sadhasivam /** 5310cbf2608SManivannan Sadhasivam * mhi_unregister_controller - Unregister MHI controller 5320cbf2608SManivannan Sadhasivam * @mhi_cntrl: MHI controller to unregister 5330cbf2608SManivannan Sadhasivam */ 5340cbf2608SManivannan Sadhasivam void mhi_unregister_controller(struct mhi_controller *mhi_cntrl); 5350cbf2608SManivannan Sadhasivam 53682174738SManivannan Sadhasivam /* 53782174738SManivannan Sadhasivam * module_mhi_driver() - Helper macro for drivers that don't do 53882174738SManivannan Sadhasivam * anything special other than using default mhi_driver_register() and 53982174738SManivannan Sadhasivam * mhi_driver_unregister(). This eliminates a lot of boilerplate. 54082174738SManivannan Sadhasivam * Each module may only use this macro once. 541e755cadbSManivannan Sadhasivam */ 54282174738SManivannan Sadhasivam #define module_mhi_driver(mhi_drv) \ 54382174738SManivannan Sadhasivam module_driver(mhi_drv, mhi_driver_register, \ 54482174738SManivannan Sadhasivam mhi_driver_unregister) 54582174738SManivannan Sadhasivam 54682174738SManivannan Sadhasivam /* 54782174738SManivannan Sadhasivam * Macro to avoid include chaining to get THIS_MODULE 54882174738SManivannan Sadhasivam */ 54982174738SManivannan Sadhasivam #define mhi_driver_register(mhi_drv) \ 55082174738SManivannan Sadhasivam __mhi_driver_register(mhi_drv, THIS_MODULE) 55182174738SManivannan Sadhasivam 55282174738SManivannan Sadhasivam /** 55382174738SManivannan Sadhasivam * __mhi_driver_register - Register driver with MHI framework 55482174738SManivannan Sadhasivam * @mhi_drv: Driver associated with the device 55582174738SManivannan Sadhasivam * @owner: The module owner 55682174738SManivannan Sadhasivam */ 55782174738SManivannan Sadhasivam int __mhi_driver_register(struct mhi_driver *mhi_drv, struct module *owner); 558e755cadbSManivannan Sadhasivam 559e755cadbSManivannan Sadhasivam /** 560e755cadbSManivannan Sadhasivam * mhi_driver_unregister - Unregister a driver for mhi_devices 561e755cadbSManivannan Sadhasivam * @mhi_drv: Driver associated with the device 562e755cadbSManivannan Sadhasivam */ 563e755cadbSManivannan Sadhasivam void mhi_driver_unregister(struct mhi_driver *mhi_drv); 564e755cadbSManivannan Sadhasivam 565a6e2e352SManivannan Sadhasivam /** 566a6e2e352SManivannan Sadhasivam * mhi_set_mhi_state - Set MHI device state 567a6e2e352SManivannan Sadhasivam * @mhi_cntrl: MHI controller 568a6e2e352SManivannan Sadhasivam * @state: State to set 569a6e2e352SManivannan Sadhasivam */ 570a6e2e352SManivannan Sadhasivam void mhi_set_mhi_state(struct mhi_controller *mhi_cntrl, 571a6e2e352SManivannan Sadhasivam enum mhi_state state); 572a6e2e352SManivannan Sadhasivam 5733000f85bSManivannan Sadhasivam /** 5740c6b20a1SManivannan Sadhasivam * mhi_notify - Notify the MHI client driver about client device status 5750c6b20a1SManivannan Sadhasivam * @mhi_dev: MHI device instance 5760c6b20a1SManivannan Sadhasivam * @cb_reason: MHI callback reason 5770c6b20a1SManivannan Sadhasivam */ 5780c6b20a1SManivannan Sadhasivam void mhi_notify(struct mhi_device *mhi_dev, enum mhi_callback cb_reason); 5790c6b20a1SManivannan Sadhasivam 5800c6b20a1SManivannan Sadhasivam /** 5813000f85bSManivannan Sadhasivam * mhi_prepare_for_power_up - Do pre-initialization before power up. 5823000f85bSManivannan Sadhasivam * This is optional, call this before power up if 5833000f85bSManivannan Sadhasivam * the controller does not want bus framework to 5843000f85bSManivannan Sadhasivam * automatically free any allocated memory during 5853000f85bSManivannan Sadhasivam * shutdown process. 5863000f85bSManivannan Sadhasivam * @mhi_cntrl: MHI controller 5873000f85bSManivannan Sadhasivam */ 5883000f85bSManivannan Sadhasivam int mhi_prepare_for_power_up(struct mhi_controller *mhi_cntrl); 5893000f85bSManivannan Sadhasivam 5903000f85bSManivannan Sadhasivam /** 5913000f85bSManivannan Sadhasivam * mhi_async_power_up - Start MHI power up sequence 5923000f85bSManivannan Sadhasivam * @mhi_cntrl: MHI controller 5933000f85bSManivannan Sadhasivam */ 5943000f85bSManivannan Sadhasivam int mhi_async_power_up(struct mhi_controller *mhi_cntrl); 5953000f85bSManivannan Sadhasivam 5963000f85bSManivannan Sadhasivam /** 5973000f85bSManivannan Sadhasivam * mhi_sync_power_up - Start MHI power up sequence and wait till the device 5984d12a897SRandy Dunlap * enters valid EE state 5993000f85bSManivannan Sadhasivam * @mhi_cntrl: MHI controller 6003000f85bSManivannan Sadhasivam */ 6013000f85bSManivannan Sadhasivam int mhi_sync_power_up(struct mhi_controller *mhi_cntrl); 6023000f85bSManivannan Sadhasivam 6033000f85bSManivannan Sadhasivam /** 6043000f85bSManivannan Sadhasivam * mhi_power_down - Start MHI power down sequence 6053000f85bSManivannan Sadhasivam * @mhi_cntrl: MHI controller 6063000f85bSManivannan Sadhasivam * @graceful: Link is still accessible, so do a graceful shutdown process 6073000f85bSManivannan Sadhasivam */ 6083000f85bSManivannan Sadhasivam void mhi_power_down(struct mhi_controller *mhi_cntrl, bool graceful); 6093000f85bSManivannan Sadhasivam 6103000f85bSManivannan Sadhasivam /** 6113000f85bSManivannan Sadhasivam * mhi_unprepare_after_power_down - Free any allocated memory after power down 6123000f85bSManivannan Sadhasivam * @mhi_cntrl: MHI controller 6133000f85bSManivannan Sadhasivam */ 6143000f85bSManivannan Sadhasivam void mhi_unprepare_after_power_down(struct mhi_controller *mhi_cntrl); 6153000f85bSManivannan Sadhasivam 6166fdfdd27SManivannan Sadhasivam /** 6170c6b20a1SManivannan Sadhasivam * mhi_pm_suspend - Move MHI into a suspended state 6180c6b20a1SManivannan Sadhasivam * @mhi_cntrl: MHI controller 6190c6b20a1SManivannan Sadhasivam */ 6200c6b20a1SManivannan Sadhasivam int mhi_pm_suspend(struct mhi_controller *mhi_cntrl); 6210c6b20a1SManivannan Sadhasivam 6220c6b20a1SManivannan Sadhasivam /** 6230c6b20a1SManivannan Sadhasivam * mhi_pm_resume - Resume MHI from suspended state 6240c6b20a1SManivannan Sadhasivam * @mhi_cntrl: MHI controller 6250c6b20a1SManivannan Sadhasivam */ 6260c6b20a1SManivannan Sadhasivam int mhi_pm_resume(struct mhi_controller *mhi_cntrl); 6270c6b20a1SManivannan Sadhasivam 6280c6b20a1SManivannan Sadhasivam /** 6296fdfdd27SManivannan Sadhasivam * mhi_download_rddm_img - Download ramdump image from device for 6306fdfdd27SManivannan Sadhasivam * debugging purpose. 6316fdfdd27SManivannan Sadhasivam * @mhi_cntrl: MHI controller 6326fdfdd27SManivannan Sadhasivam * @in_panic: Download rddm image during kernel panic 6336fdfdd27SManivannan Sadhasivam */ 6346fdfdd27SManivannan Sadhasivam int mhi_download_rddm_img(struct mhi_controller *mhi_cntrl, bool in_panic); 6356fdfdd27SManivannan Sadhasivam 6366fdfdd27SManivannan Sadhasivam /** 6376fdfdd27SManivannan Sadhasivam * mhi_force_rddm_mode - Force device into rddm mode 6386fdfdd27SManivannan Sadhasivam * @mhi_cntrl: MHI controller 6396fdfdd27SManivannan Sadhasivam */ 6406fdfdd27SManivannan Sadhasivam int mhi_force_rddm_mode(struct mhi_controller *mhi_cntrl); 6416fdfdd27SManivannan Sadhasivam 6426fdfdd27SManivannan Sadhasivam /** 6436fdfdd27SManivannan Sadhasivam * mhi_get_mhi_state - Get MHI state of the device 6446fdfdd27SManivannan Sadhasivam * @mhi_cntrl: MHI controller 6456fdfdd27SManivannan Sadhasivam */ 6466fdfdd27SManivannan Sadhasivam enum mhi_state mhi_get_mhi_state(struct mhi_controller *mhi_cntrl); 6476fdfdd27SManivannan Sadhasivam 648189ff97cSManivannan Sadhasivam /** 649189ff97cSManivannan Sadhasivam * mhi_device_get - Disable device low power mode 650189ff97cSManivannan Sadhasivam * @mhi_dev: Device associated with the channel 651189ff97cSManivannan Sadhasivam */ 652189ff97cSManivannan Sadhasivam void mhi_device_get(struct mhi_device *mhi_dev); 653189ff97cSManivannan Sadhasivam 654189ff97cSManivannan Sadhasivam /** 655189ff97cSManivannan Sadhasivam * mhi_device_get_sync - Disable device low power mode. Synchronously 656189ff97cSManivannan Sadhasivam * take the controller out of suspended state 657189ff97cSManivannan Sadhasivam * @mhi_dev: Device associated with the channel 658189ff97cSManivannan Sadhasivam */ 659189ff97cSManivannan Sadhasivam int mhi_device_get_sync(struct mhi_device *mhi_dev); 660189ff97cSManivannan Sadhasivam 661189ff97cSManivannan Sadhasivam /** 662189ff97cSManivannan Sadhasivam * mhi_device_put - Re-enable device low power mode 663189ff97cSManivannan Sadhasivam * @mhi_dev: Device associated with the channel 664189ff97cSManivannan Sadhasivam */ 665189ff97cSManivannan Sadhasivam void mhi_device_put(struct mhi_device *mhi_dev); 666189ff97cSManivannan Sadhasivam 667189ff97cSManivannan Sadhasivam /** 668189ff97cSManivannan Sadhasivam * mhi_prepare_for_transfer - Setup channel for data transfer 669189ff97cSManivannan Sadhasivam * @mhi_dev: Device associated with the channels 670189ff97cSManivannan Sadhasivam */ 671189ff97cSManivannan Sadhasivam int mhi_prepare_for_transfer(struct mhi_device *mhi_dev); 672189ff97cSManivannan Sadhasivam 673189ff97cSManivannan Sadhasivam /** 674189ff97cSManivannan Sadhasivam * mhi_unprepare_from_transfer - Unprepare the channels 675189ff97cSManivannan Sadhasivam * @mhi_dev: Device associated with the channels 676189ff97cSManivannan Sadhasivam */ 677189ff97cSManivannan Sadhasivam void mhi_unprepare_from_transfer(struct mhi_device *mhi_dev); 678189ff97cSManivannan Sadhasivam 679189ff97cSManivannan Sadhasivam /** 680189ff97cSManivannan Sadhasivam * mhi_poll - Poll for any available data in DL direction 681189ff97cSManivannan Sadhasivam * @mhi_dev: Device associated with the channels 682189ff97cSManivannan Sadhasivam * @budget: # of events to process 683189ff97cSManivannan Sadhasivam */ 684189ff97cSManivannan Sadhasivam int mhi_poll(struct mhi_device *mhi_dev, u32 budget); 685189ff97cSManivannan Sadhasivam 686189ff97cSManivannan Sadhasivam /** 687189ff97cSManivannan Sadhasivam * mhi_queue_dma - Send or receive DMA mapped buffers from client device 688189ff97cSManivannan Sadhasivam * over MHI channel 689189ff97cSManivannan Sadhasivam * @mhi_dev: Device associated with the channels 690189ff97cSManivannan Sadhasivam * @dir: DMA direction for the channel 691189ff97cSManivannan Sadhasivam * @mhi_buf: Buffer for holding the DMA mapped data 692189ff97cSManivannan Sadhasivam * @len: Buffer length 693189ff97cSManivannan Sadhasivam * @mflags: MHI transfer flags used for the transfer 694189ff97cSManivannan Sadhasivam */ 695189ff97cSManivannan Sadhasivam int mhi_queue_dma(struct mhi_device *mhi_dev, enum dma_data_direction dir, 696189ff97cSManivannan Sadhasivam struct mhi_buf *mhi_buf, size_t len, enum mhi_flags mflags); 697189ff97cSManivannan Sadhasivam 698189ff97cSManivannan Sadhasivam /** 699189ff97cSManivannan Sadhasivam * mhi_queue_buf - Send or receive raw buffers from client device over MHI 700189ff97cSManivannan Sadhasivam * channel 701189ff97cSManivannan Sadhasivam * @mhi_dev: Device associated with the channels 702189ff97cSManivannan Sadhasivam * @dir: DMA direction for the channel 703189ff97cSManivannan Sadhasivam * @buf: Buffer for holding the data 704189ff97cSManivannan Sadhasivam * @len: Buffer length 705189ff97cSManivannan Sadhasivam * @mflags: MHI transfer flags used for the transfer 706189ff97cSManivannan Sadhasivam */ 707189ff97cSManivannan Sadhasivam int mhi_queue_buf(struct mhi_device *mhi_dev, enum dma_data_direction dir, 708189ff97cSManivannan Sadhasivam void *buf, size_t len, enum mhi_flags mflags); 709189ff97cSManivannan Sadhasivam 710189ff97cSManivannan Sadhasivam /** 711189ff97cSManivannan Sadhasivam * mhi_queue_skb - Send or receive SKBs from client device over MHI channel 712189ff97cSManivannan Sadhasivam * @mhi_dev: Device associated with the channels 713189ff97cSManivannan Sadhasivam * @dir: DMA direction for the channel 714189ff97cSManivannan Sadhasivam * @skb: Buffer for holding SKBs 715189ff97cSManivannan Sadhasivam * @len: Buffer length 716189ff97cSManivannan Sadhasivam * @mflags: MHI transfer flags used for the transfer 717189ff97cSManivannan Sadhasivam */ 718189ff97cSManivannan Sadhasivam int mhi_queue_skb(struct mhi_device *mhi_dev, enum dma_data_direction dir, 719189ff97cSManivannan Sadhasivam struct sk_buff *skb, size_t len, enum mhi_flags mflags); 720189ff97cSManivannan Sadhasivam 7210cbf2608SManivannan Sadhasivam #endif /* _MHI_H_ */ 722