xref: /linux-6.15/include/linux/mhi.h (revision 189ff97c)
10cbf2608SManivannan Sadhasivam /* SPDX-License-Identifier: GPL-2.0 */
20cbf2608SManivannan Sadhasivam /*
30cbf2608SManivannan Sadhasivam  * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
40cbf2608SManivannan Sadhasivam  *
50cbf2608SManivannan Sadhasivam  */
60cbf2608SManivannan Sadhasivam #ifndef _MHI_H_
70cbf2608SManivannan Sadhasivam #define _MHI_H_
80cbf2608SManivannan Sadhasivam 
90cbf2608SManivannan Sadhasivam #include <linux/device.h>
100cbf2608SManivannan Sadhasivam #include <linux/dma-direction.h>
110cbf2608SManivannan Sadhasivam #include <linux/mutex.h>
120cbf2608SManivannan Sadhasivam #include <linux/rwlock_types.h>
13*189ff97cSManivannan Sadhasivam #include <linux/skbuff.h>
140cbf2608SManivannan Sadhasivam #include <linux/slab.h>
150cbf2608SManivannan Sadhasivam #include <linux/spinlock_types.h>
160cbf2608SManivannan Sadhasivam #include <linux/wait.h>
170cbf2608SManivannan Sadhasivam #include <linux/workqueue.h>
180cbf2608SManivannan Sadhasivam 
190cbf2608SManivannan Sadhasivam struct mhi_chan;
200cbf2608SManivannan Sadhasivam struct mhi_event;
210cbf2608SManivannan Sadhasivam struct mhi_ctxt;
220cbf2608SManivannan Sadhasivam struct mhi_cmd;
230cbf2608SManivannan Sadhasivam struct mhi_buf_info;
240cbf2608SManivannan Sadhasivam 
250cbf2608SManivannan Sadhasivam /**
260cbf2608SManivannan Sadhasivam  * enum mhi_callback - MHI callback
270cbf2608SManivannan Sadhasivam  * @MHI_CB_IDLE: MHI entered idle state
280cbf2608SManivannan Sadhasivam  * @MHI_CB_PENDING_DATA: New data available for client to process
290cbf2608SManivannan Sadhasivam  * @MHI_CB_LPM_ENTER: MHI host entered low power mode
300cbf2608SManivannan Sadhasivam  * @MHI_CB_LPM_EXIT: MHI host about to exit low power mode
310cbf2608SManivannan Sadhasivam  * @MHI_CB_EE_RDDM: MHI device entered RDDM exec env
320cbf2608SManivannan Sadhasivam  * @MHI_CB_EE_MISSION_MODE: MHI device entered Mission Mode exec env
330cbf2608SManivannan Sadhasivam  * @MHI_CB_SYS_ERROR: MHI device entered error state (may recover)
340cbf2608SManivannan Sadhasivam  * @MHI_CB_FATAL_ERROR: MHI device entered fatal error state
351d3173a3SManivannan Sadhasivam  * @MHI_CB_BW_REQ: Received a bandwidth switch request from device
360cbf2608SManivannan Sadhasivam  */
370cbf2608SManivannan Sadhasivam enum mhi_callback {
380cbf2608SManivannan Sadhasivam 	MHI_CB_IDLE,
390cbf2608SManivannan Sadhasivam 	MHI_CB_PENDING_DATA,
400cbf2608SManivannan Sadhasivam 	MHI_CB_LPM_ENTER,
410cbf2608SManivannan Sadhasivam 	MHI_CB_LPM_EXIT,
420cbf2608SManivannan Sadhasivam 	MHI_CB_EE_RDDM,
430cbf2608SManivannan Sadhasivam 	MHI_CB_EE_MISSION_MODE,
440cbf2608SManivannan Sadhasivam 	MHI_CB_SYS_ERROR,
450cbf2608SManivannan Sadhasivam 	MHI_CB_FATAL_ERROR,
461d3173a3SManivannan Sadhasivam 	MHI_CB_BW_REQ,
470cbf2608SManivannan Sadhasivam };
480cbf2608SManivannan Sadhasivam 
490cbf2608SManivannan Sadhasivam /**
500cbf2608SManivannan Sadhasivam  * enum mhi_flags - Transfer flags
510cbf2608SManivannan Sadhasivam  * @MHI_EOB: End of buffer for bulk transfer
520cbf2608SManivannan Sadhasivam  * @MHI_EOT: End of transfer
530cbf2608SManivannan Sadhasivam  * @MHI_CHAIN: Linked transfer
540cbf2608SManivannan Sadhasivam  */
550cbf2608SManivannan Sadhasivam enum mhi_flags {
560cbf2608SManivannan Sadhasivam 	MHI_EOB,
570cbf2608SManivannan Sadhasivam 	MHI_EOT,
580cbf2608SManivannan Sadhasivam 	MHI_CHAIN,
590cbf2608SManivannan Sadhasivam };
600cbf2608SManivannan Sadhasivam 
610cbf2608SManivannan Sadhasivam /**
620cbf2608SManivannan Sadhasivam  * enum mhi_device_type - Device types
630cbf2608SManivannan Sadhasivam  * @MHI_DEVICE_XFER: Handles data transfer
640cbf2608SManivannan Sadhasivam  * @MHI_DEVICE_CONTROLLER: Control device
650cbf2608SManivannan Sadhasivam  */
660cbf2608SManivannan Sadhasivam enum mhi_device_type {
670cbf2608SManivannan Sadhasivam 	MHI_DEVICE_XFER,
680cbf2608SManivannan Sadhasivam 	MHI_DEVICE_CONTROLLER,
690cbf2608SManivannan Sadhasivam };
700cbf2608SManivannan Sadhasivam 
710cbf2608SManivannan Sadhasivam /**
720cbf2608SManivannan Sadhasivam  * enum mhi_ch_type - Channel types
730cbf2608SManivannan Sadhasivam  * @MHI_CH_TYPE_INVALID: Invalid channel type
740cbf2608SManivannan Sadhasivam  * @MHI_CH_TYPE_OUTBOUND: Outbound channel to the device
750cbf2608SManivannan Sadhasivam  * @MHI_CH_TYPE_INBOUND: Inbound channel from the device
760cbf2608SManivannan Sadhasivam  * @MHI_CH_TYPE_INBOUND_COALESCED: Coalesced channel for the device to combine
770cbf2608SManivannan Sadhasivam  *				   multiple packets and send them as a single
780cbf2608SManivannan Sadhasivam  *				   large packet to reduce CPU consumption
790cbf2608SManivannan Sadhasivam  */
800cbf2608SManivannan Sadhasivam enum mhi_ch_type {
810cbf2608SManivannan Sadhasivam 	MHI_CH_TYPE_INVALID = 0,
820cbf2608SManivannan Sadhasivam 	MHI_CH_TYPE_OUTBOUND = DMA_TO_DEVICE,
830cbf2608SManivannan Sadhasivam 	MHI_CH_TYPE_INBOUND = DMA_FROM_DEVICE,
840cbf2608SManivannan Sadhasivam 	MHI_CH_TYPE_INBOUND_COALESCED = 3,
850cbf2608SManivannan Sadhasivam };
860cbf2608SManivannan Sadhasivam 
870cbf2608SManivannan Sadhasivam /**
883000f85bSManivannan Sadhasivam  * struct image_info - Firmware and RDDM table table
893000f85bSManivannan Sadhasivam  * @mhi_buf - Buffer for firmware and RDDM table
903000f85bSManivannan Sadhasivam  * @entries - # of entries in table
913000f85bSManivannan Sadhasivam  */
923000f85bSManivannan Sadhasivam struct image_info {
933000f85bSManivannan Sadhasivam 	struct mhi_buf *mhi_buf;
943000f85bSManivannan Sadhasivam 	struct bhi_vec_entry *bhi_vec;
953000f85bSManivannan Sadhasivam 	u32 entries;
963000f85bSManivannan Sadhasivam };
973000f85bSManivannan Sadhasivam 
983000f85bSManivannan Sadhasivam /**
991d3173a3SManivannan Sadhasivam  * struct mhi_link_info - BW requirement
1001d3173a3SManivannan Sadhasivam  * target_link_speed - Link speed as defined by TLS bits in LinkControl reg
1011d3173a3SManivannan Sadhasivam  * target_link_width - Link width as defined by NLW bits in LinkStatus reg
1021d3173a3SManivannan Sadhasivam  */
1031d3173a3SManivannan Sadhasivam struct mhi_link_info {
1041d3173a3SManivannan Sadhasivam 	unsigned int target_link_speed;
1051d3173a3SManivannan Sadhasivam 	unsigned int target_link_width;
1061d3173a3SManivannan Sadhasivam };
1071d3173a3SManivannan Sadhasivam 
1081d3173a3SManivannan Sadhasivam /**
1090cbf2608SManivannan Sadhasivam  * enum mhi_ee_type - Execution environment types
1100cbf2608SManivannan Sadhasivam  * @MHI_EE_PBL: Primary Bootloader
1110cbf2608SManivannan Sadhasivam  * @MHI_EE_SBL: Secondary Bootloader
1120cbf2608SManivannan Sadhasivam  * @MHI_EE_AMSS: Modem, aka the primary runtime EE
1130cbf2608SManivannan Sadhasivam  * @MHI_EE_RDDM: Ram dump download mode
1140cbf2608SManivannan Sadhasivam  * @MHI_EE_WFW: WLAN firmware mode
1150cbf2608SManivannan Sadhasivam  * @MHI_EE_PTHRU: Passthrough
1160cbf2608SManivannan Sadhasivam  * @MHI_EE_EDL: Embedded downloader
1170cbf2608SManivannan Sadhasivam  */
1180cbf2608SManivannan Sadhasivam enum mhi_ee_type {
1190cbf2608SManivannan Sadhasivam 	MHI_EE_PBL,
1200cbf2608SManivannan Sadhasivam 	MHI_EE_SBL,
1210cbf2608SManivannan Sadhasivam 	MHI_EE_AMSS,
1220cbf2608SManivannan Sadhasivam 	MHI_EE_RDDM,
1230cbf2608SManivannan Sadhasivam 	MHI_EE_WFW,
1240cbf2608SManivannan Sadhasivam 	MHI_EE_PTHRU,
1250cbf2608SManivannan Sadhasivam 	MHI_EE_EDL,
1260cbf2608SManivannan Sadhasivam 	MHI_EE_MAX_SUPPORTED = MHI_EE_EDL,
1270cbf2608SManivannan Sadhasivam 	MHI_EE_DISABLE_TRANSITION, /* local EE, not related to mhi spec */
1280cbf2608SManivannan Sadhasivam 	MHI_EE_NOT_SUPPORTED,
1290cbf2608SManivannan Sadhasivam 	MHI_EE_MAX,
1300cbf2608SManivannan Sadhasivam };
1310cbf2608SManivannan Sadhasivam 
1320cbf2608SManivannan Sadhasivam /**
133a6e2e352SManivannan Sadhasivam  * enum mhi_state - MHI states
134a6e2e352SManivannan Sadhasivam  * @MHI_STATE_RESET: Reset state
135a6e2e352SManivannan Sadhasivam  * @MHI_STATE_READY: Ready state
136a6e2e352SManivannan Sadhasivam  * @MHI_STATE_M0: M0 state
137a6e2e352SManivannan Sadhasivam  * @MHI_STATE_M1: M1 state
138a6e2e352SManivannan Sadhasivam  * @MHI_STATE_M2: M2 state
139a6e2e352SManivannan Sadhasivam  * @MHI_STATE_M3: M3 state
140a6e2e352SManivannan Sadhasivam  * @MHI_STATE_M3_FAST: M3 Fast state
141a6e2e352SManivannan Sadhasivam  * @MHI_STATE_BHI: BHI state
142a6e2e352SManivannan Sadhasivam  * @MHI_STATE_SYS_ERR: System Error state
143a6e2e352SManivannan Sadhasivam  */
144a6e2e352SManivannan Sadhasivam enum mhi_state {
145a6e2e352SManivannan Sadhasivam 	MHI_STATE_RESET = 0x0,
146a6e2e352SManivannan Sadhasivam 	MHI_STATE_READY = 0x1,
147a6e2e352SManivannan Sadhasivam 	MHI_STATE_M0 = 0x2,
148a6e2e352SManivannan Sadhasivam 	MHI_STATE_M1 = 0x3,
149a6e2e352SManivannan Sadhasivam 	MHI_STATE_M2 = 0x4,
150a6e2e352SManivannan Sadhasivam 	MHI_STATE_M3 = 0x5,
151a6e2e352SManivannan Sadhasivam 	MHI_STATE_M3_FAST = 0x6,
152a6e2e352SManivannan Sadhasivam 	MHI_STATE_BHI = 0x7,
153a6e2e352SManivannan Sadhasivam 	MHI_STATE_SYS_ERR = 0xFF,
154a6e2e352SManivannan Sadhasivam 	MHI_STATE_MAX,
155a6e2e352SManivannan Sadhasivam };
156a6e2e352SManivannan Sadhasivam 
157a6e2e352SManivannan Sadhasivam /**
1580cbf2608SManivannan Sadhasivam  * enum mhi_ch_ee_mask - Execution environment mask for channel
1590cbf2608SManivannan Sadhasivam  * @MHI_CH_EE_PBL: Allow channel to be used in PBL EE
1600cbf2608SManivannan Sadhasivam  * @MHI_CH_EE_SBL: Allow channel to be used in SBL EE
1610cbf2608SManivannan Sadhasivam  * @MHI_CH_EE_AMSS: Allow channel to be used in AMSS EE
1620cbf2608SManivannan Sadhasivam  * @MHI_CH_EE_RDDM: Allow channel to be used in RDDM EE
1630cbf2608SManivannan Sadhasivam  * @MHI_CH_EE_PTHRU: Allow channel to be used in PTHRU EE
1640cbf2608SManivannan Sadhasivam  * @MHI_CH_EE_WFW: Allow channel to be used in WFW EE
1650cbf2608SManivannan Sadhasivam  * @MHI_CH_EE_EDL: Allow channel to be used in EDL EE
1660cbf2608SManivannan Sadhasivam  */
1670cbf2608SManivannan Sadhasivam enum mhi_ch_ee_mask {
1680cbf2608SManivannan Sadhasivam 	MHI_CH_EE_PBL = BIT(MHI_EE_PBL),
1690cbf2608SManivannan Sadhasivam 	MHI_CH_EE_SBL = BIT(MHI_EE_SBL),
1700cbf2608SManivannan Sadhasivam 	MHI_CH_EE_AMSS = BIT(MHI_EE_AMSS),
1710cbf2608SManivannan Sadhasivam 	MHI_CH_EE_RDDM = BIT(MHI_EE_RDDM),
1720cbf2608SManivannan Sadhasivam 	MHI_CH_EE_PTHRU = BIT(MHI_EE_PTHRU),
1730cbf2608SManivannan Sadhasivam 	MHI_CH_EE_WFW = BIT(MHI_EE_WFW),
1740cbf2608SManivannan Sadhasivam 	MHI_CH_EE_EDL = BIT(MHI_EE_EDL),
1750cbf2608SManivannan Sadhasivam };
1760cbf2608SManivannan Sadhasivam 
1770cbf2608SManivannan Sadhasivam /**
1780cbf2608SManivannan Sadhasivam  * enum mhi_er_data_type - Event ring data types
1790cbf2608SManivannan Sadhasivam  * @MHI_ER_DATA: Only client data over this ring
1800cbf2608SManivannan Sadhasivam  * @MHI_ER_CTRL: MHI control data and client data
1810cbf2608SManivannan Sadhasivam  */
1820cbf2608SManivannan Sadhasivam enum mhi_er_data_type {
1830cbf2608SManivannan Sadhasivam 	MHI_ER_DATA,
1840cbf2608SManivannan Sadhasivam 	MHI_ER_CTRL,
1850cbf2608SManivannan Sadhasivam };
1860cbf2608SManivannan Sadhasivam 
1870cbf2608SManivannan Sadhasivam /**
1880cbf2608SManivannan Sadhasivam  * enum mhi_db_brst_mode - Doorbell mode
1890cbf2608SManivannan Sadhasivam  * @MHI_DB_BRST_DISABLE: Burst mode disable
1900cbf2608SManivannan Sadhasivam  * @MHI_DB_BRST_ENABLE: Burst mode enable
1910cbf2608SManivannan Sadhasivam  */
1920cbf2608SManivannan Sadhasivam enum mhi_db_brst_mode {
1930cbf2608SManivannan Sadhasivam 	MHI_DB_BRST_DISABLE = 0x2,
1940cbf2608SManivannan Sadhasivam 	MHI_DB_BRST_ENABLE = 0x3,
1950cbf2608SManivannan Sadhasivam };
1960cbf2608SManivannan Sadhasivam 
1970cbf2608SManivannan Sadhasivam /**
1980cbf2608SManivannan Sadhasivam  * struct mhi_channel_config - Channel configuration structure for controller
1990cbf2608SManivannan Sadhasivam  * @name: The name of this channel
2000cbf2608SManivannan Sadhasivam  * @num: The number assigned to this channel
2010cbf2608SManivannan Sadhasivam  * @num_elements: The number of elements that can be queued to this channel
2020cbf2608SManivannan Sadhasivam  * @local_elements: The local ring length of the channel
2030cbf2608SManivannan Sadhasivam  * @event_ring: The event rung index that services this channel
2040cbf2608SManivannan Sadhasivam  * @dir: Direction that data may flow on this channel
2050cbf2608SManivannan Sadhasivam  * @type: Channel type
2060cbf2608SManivannan Sadhasivam  * @ee_mask: Execution Environment mask for this channel
2070cbf2608SManivannan Sadhasivam  * @pollcfg: Polling configuration for burst mode.  0 is default.  milliseconds
2080cbf2608SManivannan Sadhasivam 	     for UL channels, multiple of 8 ring elements for DL channels
2090cbf2608SManivannan Sadhasivam  * @doorbell: Doorbell mode
2100cbf2608SManivannan Sadhasivam  * @lpm_notify: The channel master requires low power mode notifications
2110cbf2608SManivannan Sadhasivam  * @offload_channel: The client manages the channel completely
2120cbf2608SManivannan Sadhasivam  * @doorbell_mode_switch: Channel switches to doorbell mode on M0 transition
2130cbf2608SManivannan Sadhasivam  * @auto_queue: Framework will automatically queue buffers for DL traffic
2140cbf2608SManivannan Sadhasivam  * @auto_start: Automatically start (open) this channel
215da1c4f85SManivannan Sadhasivam  * @wake-capable: Channel capable of waking up the system
2160cbf2608SManivannan Sadhasivam  */
2170cbf2608SManivannan Sadhasivam struct mhi_channel_config {
2180cbf2608SManivannan Sadhasivam 	char *name;
2190cbf2608SManivannan Sadhasivam 	u32 num;
2200cbf2608SManivannan Sadhasivam 	u32 num_elements;
2210cbf2608SManivannan Sadhasivam 	u32 local_elements;
2220cbf2608SManivannan Sadhasivam 	u32 event_ring;
2230cbf2608SManivannan Sadhasivam 	enum dma_data_direction dir;
2240cbf2608SManivannan Sadhasivam 	enum mhi_ch_type type;
2250cbf2608SManivannan Sadhasivam 	u32 ee_mask;
2260cbf2608SManivannan Sadhasivam 	u32 pollcfg;
2270cbf2608SManivannan Sadhasivam 	enum mhi_db_brst_mode doorbell;
2280cbf2608SManivannan Sadhasivam 	bool lpm_notify;
2290cbf2608SManivannan Sadhasivam 	bool offload_channel;
2300cbf2608SManivannan Sadhasivam 	bool doorbell_mode_switch;
2310cbf2608SManivannan Sadhasivam 	bool auto_queue;
2320cbf2608SManivannan Sadhasivam 	bool auto_start;
233da1c4f85SManivannan Sadhasivam 	bool wake_capable;
2340cbf2608SManivannan Sadhasivam };
2350cbf2608SManivannan Sadhasivam 
2360cbf2608SManivannan Sadhasivam /**
2370cbf2608SManivannan Sadhasivam  * struct mhi_event_config - Event ring configuration structure for controller
2380cbf2608SManivannan Sadhasivam  * @num_elements: The number of elements that can be queued to this ring
2390cbf2608SManivannan Sadhasivam  * @irq_moderation_ms: Delay irq for additional events to be aggregated
2400cbf2608SManivannan Sadhasivam  * @irq: IRQ associated with this ring
2410cbf2608SManivannan Sadhasivam  * @channel: Dedicated channel number. U32_MAX indicates a non-dedicated ring
2420cbf2608SManivannan Sadhasivam  * @priority: Priority of this ring. Use 1 for now
2430cbf2608SManivannan Sadhasivam  * @mode: Doorbell mode
2440cbf2608SManivannan Sadhasivam  * @data_type: Type of data this ring will process
2450cbf2608SManivannan Sadhasivam  * @hardware_event: This ring is associated with hardware channels
2460cbf2608SManivannan Sadhasivam  * @client_managed: This ring is client managed
2470cbf2608SManivannan Sadhasivam  * @offload_channel: This ring is associated with an offloaded channel
2480cbf2608SManivannan Sadhasivam  */
2490cbf2608SManivannan Sadhasivam struct mhi_event_config {
2500cbf2608SManivannan Sadhasivam 	u32 num_elements;
2510cbf2608SManivannan Sadhasivam 	u32 irq_moderation_ms;
2520cbf2608SManivannan Sadhasivam 	u32 irq;
2530cbf2608SManivannan Sadhasivam 	u32 channel;
2540cbf2608SManivannan Sadhasivam 	u32 priority;
2550cbf2608SManivannan Sadhasivam 	enum mhi_db_brst_mode mode;
2560cbf2608SManivannan Sadhasivam 	enum mhi_er_data_type data_type;
2570cbf2608SManivannan Sadhasivam 	bool hardware_event;
2580cbf2608SManivannan Sadhasivam 	bool client_managed;
2590cbf2608SManivannan Sadhasivam 	bool offload_channel;
2600cbf2608SManivannan Sadhasivam };
2610cbf2608SManivannan Sadhasivam 
2620cbf2608SManivannan Sadhasivam /**
2630cbf2608SManivannan Sadhasivam  * struct mhi_controller_config - Root MHI controller configuration
2640cbf2608SManivannan Sadhasivam  * @max_channels: Maximum number of channels supported
2650cbf2608SManivannan Sadhasivam  * @timeout_ms: Timeout value for operations. 0 means use default
2660cbf2608SManivannan Sadhasivam  * @buf_len: Size of automatically allocated buffers. 0 means use default
2670cbf2608SManivannan Sadhasivam  * @num_channels: Number of channels defined in @ch_cfg
2680cbf2608SManivannan Sadhasivam  * @ch_cfg: Array of defined channels
2690cbf2608SManivannan Sadhasivam  * @num_events: Number of event rings defined in @event_cfg
2700cbf2608SManivannan Sadhasivam  * @event_cfg: Array of defined event rings
2710cbf2608SManivannan Sadhasivam  * @use_bounce_buf: Use a bounce buffer pool due to limited DDR access
2720cbf2608SManivannan Sadhasivam  * @m2_no_db: Host is not allowed to ring DB in M2 state
2730cbf2608SManivannan Sadhasivam  */
2740cbf2608SManivannan Sadhasivam struct mhi_controller_config {
2750cbf2608SManivannan Sadhasivam 	u32 max_channels;
2760cbf2608SManivannan Sadhasivam 	u32 timeout_ms;
2770cbf2608SManivannan Sadhasivam 	u32 buf_len;
2780cbf2608SManivannan Sadhasivam 	u32 num_channels;
2790cbf2608SManivannan Sadhasivam 	struct mhi_channel_config *ch_cfg;
2800cbf2608SManivannan Sadhasivam 	u32 num_events;
2810cbf2608SManivannan Sadhasivam 	struct mhi_event_config *event_cfg;
2820cbf2608SManivannan Sadhasivam 	bool use_bounce_buf;
2830cbf2608SManivannan Sadhasivam 	bool m2_no_db;
2840cbf2608SManivannan Sadhasivam };
2850cbf2608SManivannan Sadhasivam 
2860cbf2608SManivannan Sadhasivam /**
2870cbf2608SManivannan Sadhasivam  * struct mhi_controller - Master MHI controller structure
2880cbf2608SManivannan Sadhasivam  * @cntrl_dev: Pointer to the struct device of physical bus acting as the MHI
2890cbf2608SManivannan Sadhasivam  *            controller (required)
2900cbf2608SManivannan Sadhasivam  * @mhi_dev: MHI device instance for the controller
2910cbf2608SManivannan Sadhasivam  * @regs: Base address of MHI MMIO register space (required)
2926cd330aeSManivannan Sadhasivam  * @bhi: Points to base of MHI BHI register space
2933000f85bSManivannan Sadhasivam  * @bhie: Points to base of MHI BHIe register space
2946cd330aeSManivannan Sadhasivam  * @wake_db: MHI WAKE doorbell register address
2950cbf2608SManivannan Sadhasivam  * @iova_start: IOMMU starting address for data (required)
2960cbf2608SManivannan Sadhasivam  * @iova_stop: IOMMU stop address for data (required)
2970cbf2608SManivannan Sadhasivam  * @fw_image: Firmware image name for normal booting (required)
2980cbf2608SManivannan Sadhasivam  * @edl_image: Firmware image name for emergency download mode (optional)
2996fdfdd27SManivannan Sadhasivam  * @rddm_size: RAM dump size that host should allocate for debugging purpose
3000cbf2608SManivannan Sadhasivam  * @sbl_size: SBL image size downloaded through BHIe (optional)
3010cbf2608SManivannan Sadhasivam  * @seg_len: BHIe vector size (optional)
3023000f85bSManivannan Sadhasivam  * @fbc_image: Points to firmware image buffer
3036fdfdd27SManivannan Sadhasivam  * @rddm_image: Points to RAM dump buffer
3040cbf2608SManivannan Sadhasivam  * @mhi_chan: Points to the channel configuration table
3050cbf2608SManivannan Sadhasivam  * @lpm_chans: List of channels that require LPM notifications
3060cbf2608SManivannan Sadhasivam  * @irq: base irq # to request (required)
3070cbf2608SManivannan Sadhasivam  * @max_chan: Maximum number of channels the controller supports
3080cbf2608SManivannan Sadhasivam  * @total_ev_rings: Total # of event rings allocated
3090cbf2608SManivannan Sadhasivam  * @hw_ev_rings: Number of hardware event rings
3100cbf2608SManivannan Sadhasivam  * @sw_ev_rings: Number of software event rings
3110cbf2608SManivannan Sadhasivam  * @nr_irqs_req: Number of IRQs required to operate (optional)
3120cbf2608SManivannan Sadhasivam  * @nr_irqs: Number of IRQ allocated by bus master (required)
3130cbf2608SManivannan Sadhasivam  * @mhi_event: MHI event ring configurations table
3140cbf2608SManivannan Sadhasivam  * @mhi_cmd: MHI command ring configurations table
3150cbf2608SManivannan Sadhasivam  * @mhi_ctxt: MHI device context, shared memory between host and device
3160cbf2608SManivannan Sadhasivam  * @pm_mutex: Mutex for suspend/resume operation
3170cbf2608SManivannan Sadhasivam  * @pm_lock: Lock for protecting MHI power management state
3180cbf2608SManivannan Sadhasivam  * @timeout_ms: Timeout in ms for state transitions
3190cbf2608SManivannan Sadhasivam  * @pm_state: MHI power management state
3200cbf2608SManivannan Sadhasivam  * @db_access: DB access states
3210cbf2608SManivannan Sadhasivam  * @ee: MHI device execution environment
322a6e2e352SManivannan Sadhasivam  * @dev_state: MHI device state
3230cbf2608SManivannan Sadhasivam  * @dev_wake: Device wakeup count
3240cbf2608SManivannan Sadhasivam  * @pending_pkts: Pending packets for the controller
3250cbf2608SManivannan Sadhasivam  * @transition_list: List of MHI state transitions
3260cbf2608SManivannan Sadhasivam  * @transition_lock: Lock for protecting MHI state transition list
3270cbf2608SManivannan Sadhasivam  * @wlock: Lock for protecting device wakeup
3281d3173a3SManivannan Sadhasivam  * @mhi_link_info: Device bandwidth info
3290cbf2608SManivannan Sadhasivam  * @st_worker: State transition worker
3300cbf2608SManivannan Sadhasivam  * @fw_worker: Firmware download worker
3310cbf2608SManivannan Sadhasivam  * @syserr_worker: System error worker
3320cbf2608SManivannan Sadhasivam  * @state_event: State change event
3330cbf2608SManivannan Sadhasivam  * @status_cb: CB function to notify power states of the device (required)
3340cbf2608SManivannan Sadhasivam  * @link_status: CB function to query link status of the device (required)
3350cbf2608SManivannan Sadhasivam  * @wake_get: CB function to assert device wake (optional)
3360cbf2608SManivannan Sadhasivam  * @wake_put: CB function to de-assert device wake (optional)
3370cbf2608SManivannan Sadhasivam  * @wake_toggle: CB function to assert and de-assert device wake (optional)
3380cbf2608SManivannan Sadhasivam  * @runtime_get: CB function to controller runtime resume (required)
3390cbf2608SManivannan Sadhasivam  * @runtimet_put: CB function to decrement pm usage (required)
340*189ff97cSManivannan Sadhasivam  * @map_single: CB function to create TRE buffer
341*189ff97cSManivannan Sadhasivam  * @unmap_single: CB function to destroy TRE buffer
3420cbf2608SManivannan Sadhasivam  * @buffer_len: Bounce buffer length
3430cbf2608SManivannan Sadhasivam  * @bounce_buf: Use of bounce buffer
3440cbf2608SManivannan Sadhasivam  * @fbc_download: MHI host needs to do complete image transfer (optional)
3450cbf2608SManivannan Sadhasivam  * @pre_init: MHI host needs to do pre-initialization before power up
3460cbf2608SManivannan Sadhasivam  * @wake_set: Device wakeup set flag
3470cbf2608SManivannan Sadhasivam  *
3480cbf2608SManivannan Sadhasivam  * Fields marked as (required) need to be populated by the controller driver
3490cbf2608SManivannan Sadhasivam  * before calling mhi_register_controller(). For the fields marked as (optional)
3500cbf2608SManivannan Sadhasivam  * they can be populated depending on the usecase.
3510cbf2608SManivannan Sadhasivam  */
3520cbf2608SManivannan Sadhasivam struct mhi_controller {
3530cbf2608SManivannan Sadhasivam 	struct device *cntrl_dev;
3540cbf2608SManivannan Sadhasivam 	struct mhi_device *mhi_dev;
3550cbf2608SManivannan Sadhasivam 	void __iomem *regs;
3566cd330aeSManivannan Sadhasivam 	void __iomem *bhi;
3573000f85bSManivannan Sadhasivam 	void __iomem *bhie;
3586cd330aeSManivannan Sadhasivam 	void __iomem *wake_db;
359a6e2e352SManivannan Sadhasivam 
3600cbf2608SManivannan Sadhasivam 	dma_addr_t iova_start;
3610cbf2608SManivannan Sadhasivam 	dma_addr_t iova_stop;
3620cbf2608SManivannan Sadhasivam 	const char *fw_image;
3630cbf2608SManivannan Sadhasivam 	const char *edl_image;
3646fdfdd27SManivannan Sadhasivam 	size_t rddm_size;
3650cbf2608SManivannan Sadhasivam 	size_t sbl_size;
3660cbf2608SManivannan Sadhasivam 	size_t seg_len;
3673000f85bSManivannan Sadhasivam 	struct image_info *fbc_image;
3686fdfdd27SManivannan Sadhasivam 	struct image_info *rddm_image;
3690cbf2608SManivannan Sadhasivam 	struct mhi_chan *mhi_chan;
3700cbf2608SManivannan Sadhasivam 	struct list_head lpm_chans;
3710cbf2608SManivannan Sadhasivam 	int *irq;
3720cbf2608SManivannan Sadhasivam 	u32 max_chan;
3730cbf2608SManivannan Sadhasivam 	u32 total_ev_rings;
3740cbf2608SManivannan Sadhasivam 	u32 hw_ev_rings;
3750cbf2608SManivannan Sadhasivam 	u32 sw_ev_rings;
3760cbf2608SManivannan Sadhasivam 	u32 nr_irqs_req;
3770cbf2608SManivannan Sadhasivam 	u32 nr_irqs;
3780cbf2608SManivannan Sadhasivam 
3790cbf2608SManivannan Sadhasivam 	struct mhi_event *mhi_event;
3800cbf2608SManivannan Sadhasivam 	struct mhi_cmd *mhi_cmd;
3810cbf2608SManivannan Sadhasivam 	struct mhi_ctxt *mhi_ctxt;
3820cbf2608SManivannan Sadhasivam 
3830cbf2608SManivannan Sadhasivam 	struct mutex pm_mutex;
3840cbf2608SManivannan Sadhasivam 	rwlock_t pm_lock;
3850cbf2608SManivannan Sadhasivam 	u32 timeout_ms;
3860cbf2608SManivannan Sadhasivam 	u32 pm_state;
3870cbf2608SManivannan Sadhasivam 	u32 db_access;
3880cbf2608SManivannan Sadhasivam 	enum mhi_ee_type ee;
389a6e2e352SManivannan Sadhasivam 	enum mhi_state dev_state;
3900cbf2608SManivannan Sadhasivam 	atomic_t dev_wake;
3910cbf2608SManivannan Sadhasivam 	atomic_t pending_pkts;
3920cbf2608SManivannan Sadhasivam 	struct list_head transition_list;
3930cbf2608SManivannan Sadhasivam 	spinlock_t transition_lock;
3940cbf2608SManivannan Sadhasivam 	spinlock_t wlock;
3951d3173a3SManivannan Sadhasivam 	struct mhi_link_info mhi_link_info;
3960cbf2608SManivannan Sadhasivam 	struct work_struct st_worker;
3970cbf2608SManivannan Sadhasivam 	struct work_struct fw_worker;
3980cbf2608SManivannan Sadhasivam 	struct work_struct syserr_worker;
3990cbf2608SManivannan Sadhasivam 	wait_queue_head_t state_event;
4000cbf2608SManivannan Sadhasivam 
4010cbf2608SManivannan Sadhasivam 	void (*status_cb)(struct mhi_controller *mhi_cntrl,
4020cbf2608SManivannan Sadhasivam 			  enum mhi_callback cb);
4030cbf2608SManivannan Sadhasivam 	int (*link_status)(struct mhi_controller *mhi_cntrl);
4040cbf2608SManivannan Sadhasivam 	void (*wake_get)(struct mhi_controller *mhi_cntrl, bool override);
4050cbf2608SManivannan Sadhasivam 	void (*wake_put)(struct mhi_controller *mhi_cntrl, bool override);
4060cbf2608SManivannan Sadhasivam 	void (*wake_toggle)(struct mhi_controller *mhi_cntrl);
4070cbf2608SManivannan Sadhasivam 	int (*runtime_get)(struct mhi_controller *mhi_cntrl);
4080cbf2608SManivannan Sadhasivam 	void (*runtime_put)(struct mhi_controller *mhi_cntrl);
409*189ff97cSManivannan Sadhasivam 	int (*map_single)(struct mhi_controller *mhi_cntrl,
410*189ff97cSManivannan Sadhasivam 			  struct mhi_buf_info *buf);
411*189ff97cSManivannan Sadhasivam 	void (*unmap_single)(struct mhi_controller *mhi_cntrl,
412*189ff97cSManivannan Sadhasivam 			     struct mhi_buf_info *buf);
4130cbf2608SManivannan Sadhasivam 
4140cbf2608SManivannan Sadhasivam 	size_t buffer_len;
4150cbf2608SManivannan Sadhasivam 	bool bounce_buf;
4160cbf2608SManivannan Sadhasivam 	bool fbc_download;
4170cbf2608SManivannan Sadhasivam 	bool pre_init;
4180cbf2608SManivannan Sadhasivam 	bool wake_set;
4190cbf2608SManivannan Sadhasivam };
4200cbf2608SManivannan Sadhasivam 
4210cbf2608SManivannan Sadhasivam /**
4220cbf2608SManivannan Sadhasivam  * struct mhi_device - Structure representing a MHI device which binds
4230cbf2608SManivannan Sadhasivam  *                     to channels
4240cbf2608SManivannan Sadhasivam  * @id: Pointer to MHI device ID struct
4250cbf2608SManivannan Sadhasivam  * @chan_name: Name of the channel to which the device binds
4260cbf2608SManivannan Sadhasivam  * @mhi_cntrl: Controller the device belongs to
4270cbf2608SManivannan Sadhasivam  * @ul_chan: UL channel for the device
4280cbf2608SManivannan Sadhasivam  * @dl_chan: DL channel for the device
4290cbf2608SManivannan Sadhasivam  * @dev: Driver model device node for the MHI device
4300cbf2608SManivannan Sadhasivam  * @dev_type: MHI device type
431e755cadbSManivannan Sadhasivam  * @ul_chan_id: MHI channel id for UL transfer
432e755cadbSManivannan Sadhasivam  * @dl_chan_id: MHI channel id for DL transfer
4330cbf2608SManivannan Sadhasivam  * @dev_wake: Device wakeup counter
4340cbf2608SManivannan Sadhasivam  */
4350cbf2608SManivannan Sadhasivam struct mhi_device {
4360cbf2608SManivannan Sadhasivam 	const struct mhi_device_id *id;
4370cbf2608SManivannan Sadhasivam 	const char *chan_name;
4380cbf2608SManivannan Sadhasivam 	struct mhi_controller *mhi_cntrl;
4390cbf2608SManivannan Sadhasivam 	struct mhi_chan *ul_chan;
4400cbf2608SManivannan Sadhasivam 	struct mhi_chan *dl_chan;
4410cbf2608SManivannan Sadhasivam 	struct device dev;
4420cbf2608SManivannan Sadhasivam 	enum mhi_device_type dev_type;
443e755cadbSManivannan Sadhasivam 	int ul_chan_id;
444e755cadbSManivannan Sadhasivam 	int dl_chan_id;
4450cbf2608SManivannan Sadhasivam 	u32 dev_wake;
4460cbf2608SManivannan Sadhasivam };
4470cbf2608SManivannan Sadhasivam 
4480cbf2608SManivannan Sadhasivam /**
4490cbf2608SManivannan Sadhasivam  * struct mhi_result - Completed buffer information
4500cbf2608SManivannan Sadhasivam  * @buf_addr: Address of data buffer
4510cbf2608SManivannan Sadhasivam  * @bytes_xferd: # of bytes transferred
4520cbf2608SManivannan Sadhasivam  * @dir: Channel direction
4530cbf2608SManivannan Sadhasivam  * @transaction_status: Status of last transaction
4540cbf2608SManivannan Sadhasivam  */
4550cbf2608SManivannan Sadhasivam struct mhi_result {
4560cbf2608SManivannan Sadhasivam 	void *buf_addr;
4570cbf2608SManivannan Sadhasivam 	size_t bytes_xferd;
4580cbf2608SManivannan Sadhasivam 	enum dma_data_direction dir;
4590cbf2608SManivannan Sadhasivam 	int transaction_status;
4600cbf2608SManivannan Sadhasivam };
4610cbf2608SManivannan Sadhasivam 
462e755cadbSManivannan Sadhasivam /**
463a6e2e352SManivannan Sadhasivam  * struct mhi_buf - MHI Buffer description
464a6e2e352SManivannan Sadhasivam  * @buf: Virtual address of the buffer
465a6e2e352SManivannan Sadhasivam  * @name: Buffer label. For offload channel, configurations name must be:
466a6e2e352SManivannan Sadhasivam  *        ECA - Event context array data
467a6e2e352SManivannan Sadhasivam  *        CCA - Channel context array data
468a6e2e352SManivannan Sadhasivam  * @dma_addr: IOMMU address of the buffer
469a6e2e352SManivannan Sadhasivam  * @len: # of bytes
470a6e2e352SManivannan Sadhasivam  */
471a6e2e352SManivannan Sadhasivam struct mhi_buf {
472a6e2e352SManivannan Sadhasivam 	void *buf;
473a6e2e352SManivannan Sadhasivam 	const char *name;
474a6e2e352SManivannan Sadhasivam 	dma_addr_t dma_addr;
475a6e2e352SManivannan Sadhasivam 	size_t len;
476a6e2e352SManivannan Sadhasivam };
477a6e2e352SManivannan Sadhasivam 
478a6e2e352SManivannan Sadhasivam /**
479e755cadbSManivannan Sadhasivam  * struct mhi_driver - Structure representing a MHI client driver
480e755cadbSManivannan Sadhasivam  * @probe: CB function for client driver probe function
481e755cadbSManivannan Sadhasivam  * @remove: CB function for client driver remove function
482e755cadbSManivannan Sadhasivam  * @ul_xfer_cb: CB function for UL data transfer
483e755cadbSManivannan Sadhasivam  * @dl_xfer_cb: CB function for DL data transfer
484e755cadbSManivannan Sadhasivam  * @status_cb: CB functions for asynchronous status
485e755cadbSManivannan Sadhasivam  * @driver: Device driver model driver
486e755cadbSManivannan Sadhasivam  */
487e755cadbSManivannan Sadhasivam struct mhi_driver {
488e755cadbSManivannan Sadhasivam 	const struct mhi_device_id *id_table;
489e755cadbSManivannan Sadhasivam 	int (*probe)(struct mhi_device *mhi_dev,
490e755cadbSManivannan Sadhasivam 		     const struct mhi_device_id *id);
491e755cadbSManivannan Sadhasivam 	void (*remove)(struct mhi_device *mhi_dev);
492e755cadbSManivannan Sadhasivam 	void (*ul_xfer_cb)(struct mhi_device *mhi_dev,
493e755cadbSManivannan Sadhasivam 			   struct mhi_result *result);
494e755cadbSManivannan Sadhasivam 	void (*dl_xfer_cb)(struct mhi_device *mhi_dev,
495e755cadbSManivannan Sadhasivam 			   struct mhi_result *result);
496e755cadbSManivannan Sadhasivam 	void (*status_cb)(struct mhi_device *mhi_dev, enum mhi_callback mhi_cb);
497e755cadbSManivannan Sadhasivam 	struct device_driver driver;
498e755cadbSManivannan Sadhasivam };
499e755cadbSManivannan Sadhasivam 
500e755cadbSManivannan Sadhasivam #define to_mhi_driver(drv) container_of(drv, struct mhi_driver, driver)
5010cbf2608SManivannan Sadhasivam #define to_mhi_device(dev) container_of(dev, struct mhi_device, dev)
5020cbf2608SManivannan Sadhasivam 
5030cbf2608SManivannan Sadhasivam /**
5040cbf2608SManivannan Sadhasivam  * mhi_register_controller - Register MHI controller
5050cbf2608SManivannan Sadhasivam  * @mhi_cntrl: MHI controller to register
5060cbf2608SManivannan Sadhasivam  * @config: Configuration to use for the controller
5070cbf2608SManivannan Sadhasivam  */
5080cbf2608SManivannan Sadhasivam int mhi_register_controller(struct mhi_controller *mhi_cntrl,
5090cbf2608SManivannan Sadhasivam 			    struct mhi_controller_config *config);
5100cbf2608SManivannan Sadhasivam 
5110cbf2608SManivannan Sadhasivam /**
5120cbf2608SManivannan Sadhasivam  * mhi_unregister_controller - Unregister MHI controller
5130cbf2608SManivannan Sadhasivam  * @mhi_cntrl: MHI controller to unregister
5140cbf2608SManivannan Sadhasivam  */
5150cbf2608SManivannan Sadhasivam void mhi_unregister_controller(struct mhi_controller *mhi_cntrl);
5160cbf2608SManivannan Sadhasivam 
517e755cadbSManivannan Sadhasivam /**
518e755cadbSManivannan Sadhasivam  * mhi_driver_register - Register driver with MHI framework
519e755cadbSManivannan Sadhasivam  * @mhi_drv: Driver associated with the device
520e755cadbSManivannan Sadhasivam  */
521e755cadbSManivannan Sadhasivam int mhi_driver_register(struct mhi_driver *mhi_drv);
522e755cadbSManivannan Sadhasivam 
523e755cadbSManivannan Sadhasivam /**
524e755cadbSManivannan Sadhasivam  * mhi_driver_unregister - Unregister a driver for mhi_devices
525e755cadbSManivannan Sadhasivam  * @mhi_drv: Driver associated with the device
526e755cadbSManivannan Sadhasivam  */
527e755cadbSManivannan Sadhasivam void mhi_driver_unregister(struct mhi_driver *mhi_drv);
528e755cadbSManivannan Sadhasivam 
529a6e2e352SManivannan Sadhasivam /**
530a6e2e352SManivannan Sadhasivam  * mhi_set_mhi_state - Set MHI device state
531a6e2e352SManivannan Sadhasivam  * @mhi_cntrl: MHI controller
532a6e2e352SManivannan Sadhasivam  * @state: State to set
533a6e2e352SManivannan Sadhasivam  */
534a6e2e352SManivannan Sadhasivam void mhi_set_mhi_state(struct mhi_controller *mhi_cntrl,
535a6e2e352SManivannan Sadhasivam 		       enum mhi_state state);
536a6e2e352SManivannan Sadhasivam 
5373000f85bSManivannan Sadhasivam /**
5383000f85bSManivannan Sadhasivam  * mhi_prepare_for_power_up - Do pre-initialization before power up.
5393000f85bSManivannan Sadhasivam  *                            This is optional, call this before power up if
5403000f85bSManivannan Sadhasivam  *                            the controller does not want bus framework to
5413000f85bSManivannan Sadhasivam  *                            automatically free any allocated memory during
5423000f85bSManivannan Sadhasivam  *                            shutdown process.
5433000f85bSManivannan Sadhasivam  * @mhi_cntrl: MHI controller
5443000f85bSManivannan Sadhasivam  */
5453000f85bSManivannan Sadhasivam int mhi_prepare_for_power_up(struct mhi_controller *mhi_cntrl);
5463000f85bSManivannan Sadhasivam 
5473000f85bSManivannan Sadhasivam /**
5483000f85bSManivannan Sadhasivam  * mhi_async_power_up - Start MHI power up sequence
5493000f85bSManivannan Sadhasivam  * @mhi_cntrl: MHI controller
5503000f85bSManivannan Sadhasivam  */
5513000f85bSManivannan Sadhasivam int mhi_async_power_up(struct mhi_controller *mhi_cntrl);
5523000f85bSManivannan Sadhasivam 
5533000f85bSManivannan Sadhasivam /**
5543000f85bSManivannan Sadhasivam  * mhi_sync_power_up - Start MHI power up sequence and wait till the device
5553000f85bSManivannan Sadhasivam  *                     device enters valid EE state
5563000f85bSManivannan Sadhasivam  * @mhi_cntrl: MHI controller
5573000f85bSManivannan Sadhasivam  */
5583000f85bSManivannan Sadhasivam int mhi_sync_power_up(struct mhi_controller *mhi_cntrl);
5593000f85bSManivannan Sadhasivam 
5603000f85bSManivannan Sadhasivam /**
5613000f85bSManivannan Sadhasivam  * mhi_power_down - Start MHI power down sequence
5623000f85bSManivannan Sadhasivam  * @mhi_cntrl: MHI controller
5633000f85bSManivannan Sadhasivam  * @graceful: Link is still accessible, so do a graceful shutdown process
5643000f85bSManivannan Sadhasivam  */
5653000f85bSManivannan Sadhasivam void mhi_power_down(struct mhi_controller *mhi_cntrl, bool graceful);
5663000f85bSManivannan Sadhasivam 
5673000f85bSManivannan Sadhasivam /**
5683000f85bSManivannan Sadhasivam  * mhi_unprepare_after_power_down - Free any allocated memory after power down
5693000f85bSManivannan Sadhasivam  * @mhi_cntrl: MHI controller
5703000f85bSManivannan Sadhasivam  */
5713000f85bSManivannan Sadhasivam void mhi_unprepare_after_power_down(struct mhi_controller *mhi_cntrl);
5723000f85bSManivannan Sadhasivam 
5736fdfdd27SManivannan Sadhasivam /**
5746fdfdd27SManivannan Sadhasivam  * mhi_download_rddm_img - Download ramdump image from device for
5756fdfdd27SManivannan Sadhasivam  *                         debugging purpose.
5766fdfdd27SManivannan Sadhasivam  * @mhi_cntrl: MHI controller
5776fdfdd27SManivannan Sadhasivam  * @in_panic: Download rddm image during kernel panic
5786fdfdd27SManivannan Sadhasivam  */
5796fdfdd27SManivannan Sadhasivam int mhi_download_rddm_img(struct mhi_controller *mhi_cntrl, bool in_panic);
5806fdfdd27SManivannan Sadhasivam 
5816fdfdd27SManivannan Sadhasivam /**
5826fdfdd27SManivannan Sadhasivam  * mhi_force_rddm_mode - Force device into rddm mode
5836fdfdd27SManivannan Sadhasivam  * @mhi_cntrl: MHI controller
5846fdfdd27SManivannan Sadhasivam  */
5856fdfdd27SManivannan Sadhasivam int mhi_force_rddm_mode(struct mhi_controller *mhi_cntrl);
5866fdfdd27SManivannan Sadhasivam 
5876fdfdd27SManivannan Sadhasivam /**
5886fdfdd27SManivannan Sadhasivam  * mhi_get_mhi_state - Get MHI state of the device
5896fdfdd27SManivannan Sadhasivam  * @mhi_cntrl: MHI controller
5906fdfdd27SManivannan Sadhasivam  */
5916fdfdd27SManivannan Sadhasivam enum mhi_state mhi_get_mhi_state(struct mhi_controller *mhi_cntrl);
5926fdfdd27SManivannan Sadhasivam 
593*189ff97cSManivannan Sadhasivam /**
594*189ff97cSManivannan Sadhasivam  * mhi_device_get - Disable device low power mode
595*189ff97cSManivannan Sadhasivam  * @mhi_dev: Device associated with the channel
596*189ff97cSManivannan Sadhasivam  */
597*189ff97cSManivannan Sadhasivam void mhi_device_get(struct mhi_device *mhi_dev);
598*189ff97cSManivannan Sadhasivam 
599*189ff97cSManivannan Sadhasivam /**
600*189ff97cSManivannan Sadhasivam  * mhi_device_get_sync - Disable device low power mode. Synchronously
601*189ff97cSManivannan Sadhasivam  *                       take the controller out of suspended state
602*189ff97cSManivannan Sadhasivam  * @mhi_dev: Device associated with the channel
603*189ff97cSManivannan Sadhasivam  */
604*189ff97cSManivannan Sadhasivam int mhi_device_get_sync(struct mhi_device *mhi_dev);
605*189ff97cSManivannan Sadhasivam 
606*189ff97cSManivannan Sadhasivam /**
607*189ff97cSManivannan Sadhasivam  * mhi_device_put - Re-enable device low power mode
608*189ff97cSManivannan Sadhasivam  * @mhi_dev: Device associated with the channel
609*189ff97cSManivannan Sadhasivam  */
610*189ff97cSManivannan Sadhasivam void mhi_device_put(struct mhi_device *mhi_dev);
611*189ff97cSManivannan Sadhasivam 
612*189ff97cSManivannan Sadhasivam /**
613*189ff97cSManivannan Sadhasivam  * mhi_prepare_for_transfer - Setup channel for data transfer
614*189ff97cSManivannan Sadhasivam  * @mhi_dev: Device associated with the channels
615*189ff97cSManivannan Sadhasivam  */
616*189ff97cSManivannan Sadhasivam int mhi_prepare_for_transfer(struct mhi_device *mhi_dev);
617*189ff97cSManivannan Sadhasivam 
618*189ff97cSManivannan Sadhasivam /**
619*189ff97cSManivannan Sadhasivam  * mhi_unprepare_from_transfer - Unprepare the channels
620*189ff97cSManivannan Sadhasivam  * @mhi_dev: Device associated with the channels
621*189ff97cSManivannan Sadhasivam  */
622*189ff97cSManivannan Sadhasivam void mhi_unprepare_from_transfer(struct mhi_device *mhi_dev);
623*189ff97cSManivannan Sadhasivam 
624*189ff97cSManivannan Sadhasivam /**
625*189ff97cSManivannan Sadhasivam  * mhi_poll - Poll for any available data in DL direction
626*189ff97cSManivannan Sadhasivam  * @mhi_dev: Device associated with the channels
627*189ff97cSManivannan Sadhasivam  * @budget: # of events to process
628*189ff97cSManivannan Sadhasivam  */
629*189ff97cSManivannan Sadhasivam int mhi_poll(struct mhi_device *mhi_dev, u32 budget);
630*189ff97cSManivannan Sadhasivam 
631*189ff97cSManivannan Sadhasivam /**
632*189ff97cSManivannan Sadhasivam  * mhi_queue_dma - Send or receive DMA mapped buffers from client device
633*189ff97cSManivannan Sadhasivam  *                 over MHI channel
634*189ff97cSManivannan Sadhasivam  * @mhi_dev: Device associated with the channels
635*189ff97cSManivannan Sadhasivam  * @dir: DMA direction for the channel
636*189ff97cSManivannan Sadhasivam  * @mhi_buf: Buffer for holding the DMA mapped data
637*189ff97cSManivannan Sadhasivam  * @len: Buffer length
638*189ff97cSManivannan Sadhasivam  * @mflags: MHI transfer flags used for the transfer
639*189ff97cSManivannan Sadhasivam  */
640*189ff97cSManivannan Sadhasivam int mhi_queue_dma(struct mhi_device *mhi_dev, enum dma_data_direction dir,
641*189ff97cSManivannan Sadhasivam 		  struct mhi_buf *mhi_buf, size_t len, enum mhi_flags mflags);
642*189ff97cSManivannan Sadhasivam 
643*189ff97cSManivannan Sadhasivam /**
644*189ff97cSManivannan Sadhasivam  * mhi_queue_buf - Send or receive raw buffers from client device over MHI
645*189ff97cSManivannan Sadhasivam  *                 channel
646*189ff97cSManivannan Sadhasivam  * @mhi_dev: Device associated with the channels
647*189ff97cSManivannan Sadhasivam  * @dir: DMA direction for the channel
648*189ff97cSManivannan Sadhasivam  * @buf: Buffer for holding the data
649*189ff97cSManivannan Sadhasivam  * @len: Buffer length
650*189ff97cSManivannan Sadhasivam  * @mflags: MHI transfer flags used for the transfer
651*189ff97cSManivannan Sadhasivam  */
652*189ff97cSManivannan Sadhasivam int mhi_queue_buf(struct mhi_device *mhi_dev, enum dma_data_direction dir,
653*189ff97cSManivannan Sadhasivam 		  void *buf, size_t len, enum mhi_flags mflags);
654*189ff97cSManivannan Sadhasivam 
655*189ff97cSManivannan Sadhasivam /**
656*189ff97cSManivannan Sadhasivam  * mhi_queue_skb - Send or receive SKBs from client device over MHI channel
657*189ff97cSManivannan Sadhasivam  * @mhi_dev: Device associated with the channels
658*189ff97cSManivannan Sadhasivam  * @dir: DMA direction for the channel
659*189ff97cSManivannan Sadhasivam  * @skb: Buffer for holding SKBs
660*189ff97cSManivannan Sadhasivam  * @len: Buffer length
661*189ff97cSManivannan Sadhasivam  * @mflags: MHI transfer flags used for the transfer
662*189ff97cSManivannan Sadhasivam  */
663*189ff97cSManivannan Sadhasivam int mhi_queue_skb(struct mhi_device *mhi_dev, enum dma_data_direction dir,
664*189ff97cSManivannan Sadhasivam 		  struct sk_buff *skb, size_t len, enum mhi_flags mflags);
665*189ff97cSManivannan Sadhasivam 
6660cbf2608SManivannan Sadhasivam #endif /* _MHI_H_ */
667